CN219876259U - Multi-layer board circuit board with heat dissipation function - Google Patents

Abstract

The utility model provides a multilayer board circuit board with a heat dissipation function. The multi-layer board circuit board comprises a first circuit substrate, a second circuit substrate arranged on the first circuit substrate and two metal blocks. The metal blocks are respectively embedded in the first circuit substrate and the second circuit substrate, and each metal block is provided with two end surfaces exposed on two opposite sides of the circuit substrate. One of the end surfaces exposed to the first wiring substrate is directly contacted with one of the end surfaces exposed to the second wiring substrate, thereby forming an interface, and the two end surfaces facing each other do not entirely overlap.

Description

Multi-layer board circuit board with heat dissipation function

Technical Field

The present utility model relates to a multi-layer board, and more particularly to a multi-layer board with heat dissipation function.

Background

With the trend of electronic devices toward (e.g., mobile phones and tablet computers) light and thin, a considerable number of electronic components must be installed in a limited space. With the increasing number of electronic components in electronic devices, the heat dissipation requirements of electronic devices are also increasing.

Generally, a copper block is disposed in a circuit board as a heat conducting medium, and heat generated by components in the circuit board is rapidly conducted to the outside of the circuit board through a high heat conduction rate of the copper block. However, since the copper block is generally cylindrical in shape and the copper block must be disposed straight throughout the entire circuit board, when the circuit board is a multi-layer board, the copper block must pass through the same region in each layer, i.e., the region where the copper blocks completely overlap throughout each layer. Therefore, not only is the wiring space compressed, but also the freedom degree of the wiring is greatly reduced, and the electrical performance of the circuit board is further affected.

Disclosure of Invention

Therefore, an embodiment of the present utility model provides a multi-layer board circuit board having both the wiring freedom and the heat dissipation function.

The multi-layer board circuit board provided by the embodiment of the utility model comprises a first circuit substrate; the first metal block is embedded in the first circuit substrate and is provided with two first end faces, and the first end faces are respectively exposed to two first surfaces on two opposite sides of the first circuit substrate; the second circuit substrate is arranged on the first circuit substrate; the second metal block is embedded in the second circuit substrate and is provided with two second end faces, the second end faces are respectively exposed to two second surfaces on two opposite sides of the second circuit substrate, and one of the first end faces directly contacts one of the second end faces to form an interface; wherein the first end surfaces and the second end surfaces facing each other do not completely overlap.

In an embodiment of the utility model, the multi-layer board further includes a first bonding layer located between the first circuit substrate and the second circuit substrate. The first bonding layer covers a portion of one of the first end surfaces of the first metal block and a portion of one of the second end surfaces of the second metal block.

In an embodiment of the utility model, a first bonding material is disposed between the first metal block and the first circuit substrate, and a second bonding material is disposed between the second metal block and the second circuit substrate, wherein the first bonding layer is respectively connected to the first bonding material and the second bonding material.

In an embodiment of the utility model, the multi-layer board further includes a plurality of conductive materials disposed in the first bonding layer, wherein the first circuit substrate is electrically connected to the second circuit substrate through the conductive materials.

In an embodiment of the utility model, the multi-layer board circuit board further includes a third circuit substrate, wherein the second circuit substrate is located between the first circuit substrate and the third circuit substrate; the third metal block is embedded in the third circuit substrate and is provided with two third end faces, and the third end faces are respectively exposed to two third surfaces on two opposite sides of the third circuit substrate. One of the third end faces directly contacts one of the second end faces.

In an embodiment of the utility model, the third end face and the second end face facing each other are completely overlapped.

In an embodiment of the utility model, the multi-layer board further includes a second bonding layer located between the second circuit substrate and the third circuit substrate. The second bonding layer covers a portion of one of the second end surfaces of the second metal block and a portion of one of the third end surfaces of the third metal block.

In an embodiment of the present utility model, a third bonding material is disposed between the third metal block and the third wiring board, and the third bonding material is connected to the second bonding layer.

In an embodiment of the present utility model, the first metal block further includes a plurality of bump structures. The bump structures are located on the side surfaces of the first metal block and are directly contacted with the first circuit substrate.

In an embodiment of the utility model, the first bonding material surrounds the bump structure of the first metal block.

In an embodiment of the utility model, the multi-layer board further includes a plurality of conductive materials disposed in the second bonding layer, wherein the second circuit substrate is electrically connected to the third circuit substrate by the conductive materials.

Based on the above, the metal blocks are respectively arranged in different areas of each layer of the multilayer circuit board, and the metal blocks in two adjacent layers can be contacted with each other. The metal blocks contacted with each other are fused together in a low-temperature co-fusion mode to be used as a heat dissipation medium in the circuit board. Thus, the degree of freedom of wiring can be improved without affecting the heat dissipation efficiency.

Drawings

The aspects of the utility model will be understood from the following detailed description taken in conjunction with the accompanying drawings. It should be noted that the various features are not drawn to scale in industry practice. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion.

Fig. 1 is a cross-sectional view of a multi-layer board according to an embodiment of the utility model.

Fig. 2A to 2G are cross-sectional views illustrating a method for manufacturing a multi-layer board according to an embodiment of the utility model.

Fig. 3 is a cross-sectional view illustrating a method for manufacturing a multi-layer board according to an embodiment of the utility model.

Fig. 4 is a top view of a metal block according to an embodiment of the utility model.

[ Main element symbols description ]

10 multilayer board circuit board

100,200,300 circuit substrate

100': initial circuit substrate

100s,102a,102b,103s,100's,120s,200s,220s,300s,320s surface

102 insulating layer

103 conductive layer

104a,104b metal layer

105a,105b line layers

106v,106h, through holes

107 conductive via

107p plug hole material

107e,160e,180b,180t,280b,280t,380b,380t, end face

109,209 contact pads

110a,110b, bonding layer

120,220,320: joining material

130 opening of

140 release film

160 conductive material

170a,170b interface

180,280,380 metal block

120e,180s side surfaces

182,282,382 bump structure

W1, W2 width

N1 normal direction

Detailed Description

In the following text, the dimensions (e.g., length, width, thickness and depth) of elements (e.g., layers, films, substrates, regions, etc.) in the drawings are exaggerated in an unequal manner and the number of elements is reduced for clarity of presentation of the technical features of the present disclosure. Accordingly, the following description and illustrations of embodiments are not limited to the number of elements in the figures and the sizes and shapes presented by the elements, but rather are intended to cover deviations in size, shape and both as a result of actual processes and/or tolerances. Accordingly, the elements presented in the drawings are intended to be schematic, and are not intended to accurately depict the actual shape of the elements, nor to limit the claims.

Further, the terms "about," "approximately" or "substantially" as used herein encompass not only the explicitly recited values and ranges of values, but also the novel range of permissible deviations as would be understood by one of ordinary skill in the art, wherein the range of deviations is determined by the errors that occur during measurement, such as due to limitations in both the measurement system or process conditions. Further, "about" may mean within one or more standard deviations of the above values, such as within + -5%, + -3%, or + -1%. The terms "about," "approximately" or "substantially" as used herein may be used to select an acceptable range of deviation or standard deviation based on optical, etching, mechanical or other properties, and not to cover all of the above with a single standard deviation.

Referring to fig. 1, the multi-layer board circuit board 10 includes a circuit substrate 100, a circuit substrate 200, a metal block 180 and a metal block 280. The metal block 180 is embedded in the circuit substrate 100, but is not electrically connected to the circuit substrate 100. Further, the metal block 180 has an end face 180t and an end face 180b, and the end face 180t and the end face 180b are respectively exposed to the surfaces 100s on opposite sides of the wiring substrate 100. In various embodiments of the present utility model, the material of the metal block 180 may comprise a metal having a relatively high thermal conductivity, such as copper, silver, or the like, or a similar alloy material.

The circuit substrate 100 includes an insulating layer 102, and a metal layer 104a and a metal layer 104b disposed on opposite sides of the insulating layer 102. The circuit substrate 100 further includes a circuit layer 105a disposed on the metal layer 104a and a circuit layer 105b disposed on the metal layer 104b, wherein the insulating layer 102, the metal layer 104a and the metal layer 104b are disposed between the circuit layer 105a and the circuit layer 105b. In addition, the circuit substrate 100 includes a plurality of conductive vias 107, and the conductive vias 107 electrically connect the circuit layer 105a and the circuit layer 105b, and each conductive via 107 further includes a plug hole material 107p.

The circuit substrate 200 is disposed on the surface 100s of the circuit substrate 100 (please refer to fig. 1, i.e. the circuit substrate 200 is located under the circuit substrate 100), and the metal block 280 is embedded in the circuit substrate 200, but is not electrically connected to the circuit substrate 200. Since the structure of the circuit substrate 200 is substantially the same as that of the circuit substrate 100, the description thereof will not be repeated here. As shown in fig. 1, the metal block 280 has an end face 280t and an end face 280b, wherein the end face 280t and the end face 280b are respectively exposed to the surfaces 200s on opposite sides of the circuit substrate 200. In addition, the metal block 280 and the metal block 180 may be connected to each other by low-temperature co-fusion.

It should be noted that the end face 180b directly contacts the end face 280t to form the interface 170a. However, in essence, the interface 170a is not a macroscopic surface, but is an interface (boundary) represented by the different microstructures contained in the metal block, and the interface caused by the difference of the microstructures can be observed under an electron microscope. For example, in the present embodiment, the interface 170a is formed by a recrystallized structure of a metal block (e.g., copper metal) after low temperature co-melting. These recrystallisation results from diffusion of metal atoms (e.g. copper atoms) from end face 180b and end face 280 t.

The multi-layer board 10 further comprises a circuit substrate 300 and a metal block 380, wherein the circuit substrate 200 is located between the circuit substrate 100 and the circuit substrate 300. Since the structure of the circuit substrate 300 is substantially the same as that of the circuit substrate 100, the description thereof will not be repeated here. The metal block 380 is embedded in the circuit substrate 300, but is not electrically connected to the circuit substrate 300. As shown in fig. 1, the metal block 380 has an end face 380t and an end face 380b, wherein the end face 380t and the end face 380b are respectively exposed to the surfaces 300s on opposite sides of the circuit substrate 300. End face 380t directly contacts end face 280b to form interface 170b.

In addition, it should be noted that the metal blocks 180,280 and 380 may be connected to the ground layers of the circuit substrate 100,200 and 300, respectively, so as to ground the metal blocks 180,280 and 380.

In the present embodiment, the end face 180b of the metal block 180 does not completely overlap with the end face 280t of the metal block 280, and the end face 280b of the metal block 280 does not completely overlap with the end face 380t of the metal block 380. In other words, the end surfaces facing each other do not overlap completely. However, the present utility model is not limited thereto, and in other embodiments, the end face 180b of the metal block 180 and the end face 280t of the metal block 280 do not completely overlap, but the end face 280b of the metal block 280 and the end face 380t of the metal block 380 may completely overlap.

The multi-layer board 10 further includes a bonding layer 110a and a bonding layer 110b. The bonding layer 110a is located between the wiring substrate 100 and the wiring substrate 200, and covers a portion of the end face 180b of the metal block 180. In addition, the bonding layer 110a also covers a portion of the end face 280t of the metal block 280. On the other hand, the bonding layer 110b is located between the wiring substrate 200 and the wiring substrate 300, and covers a part of the end face 280b of the metal block 280. The bonding layer 110b also covers a part of the end face 380t of the metal block 380.

Bonding material 120 is present between metal block 180 and circuit substrate 100, and bonding material 220 is present between metal block 280 and circuit substrate 200. The bonding layers 110a are respectively connected to the bonding material 120 and the bonding material 220. In addition, a bonding material 320 is disposed between the metal block 380 and the circuit substrate 300, and the bonding material 320 is connected to the bonding layer 110b. In this embodiment, the bonding layer 110b may be connected to the bonding material 220. In other words, the bonding layers 110a and 110b are connected to each other by the bonding material 220, wherein the bonding layers 110a (and 110 b) and the bonding materials 120 (and 220, 320) may be, for example, resins.

The multi-layer board 10 further includes a plurality of conductive materials 160 disposed in the bonding layer 110a and the bonding layer 110b. These conductive materials 160 are disposed on the wiring layers of the respective wiring substrates (e.g., the wiring layer 105b of the wiring substrate 100). In this way, the circuit substrate 100 may be electrically connected to the circuit substrate 200 through the conductive materials 160, and the circuit substrate 200 may be electrically connected to the circuit substrate 300 through the conductive materials 160.

Referring to fig. 1 and fig. 4 together, the metal block 180 further includes a plurality of bump structures 182, and the bump structures 182 are located on a side surface 180s of the metal block 180 and directly contact the circuit substrate 100. The bonding material 120 may surround the bump structure 182. It should be noted that in other embodiments, the bump structure 182 may be completely surrounded by the bonding material 120.

It should be noted that the bump structures 182 of the metal block 180 may be located at any position. For example, although the bump structure 182 is shown in fig. 1 as contacting the circuit layer 105a and the circuit layer 105b. However, in practice, the bump structure 182 may also contact the metal layer 104a and the metal layer 104b.

The method of manufacturing the multi-layer circuit board of the present utility model may include several steps as shown in fig. 2A to 2G, wherein the method of manufacturing as shown in fig. 2A to 2G is exemplified by the multi-layer circuit board 10 of fig. 1. In this embodiment, an initial circuit substrate 100' is provided. Referring to fig. 2A, the initial circuit substrate 100' may be a general copper foil substrate (Copper Clad Laminate, CCL).

The initial circuit substrate 100' includes an insulating layer 102, and a metal layer 104a and a metal layer 104b disposed on opposite sides of the insulating layer 102. The insulating layer 102 may be made of resin, and the metal layer 104a and the metal layer 104b may be deposited on the insulating layer 102. In addition, the material of the metal layer 104a and the metal layer 104b may contain copper.

Next, referring to fig. 2B, drilling (drilling) or form cutting (routing) is performed on the initial circuit substrate 100 'to form a plurality of through holes 106v and 106h communicating with both sides of the initial circuit substrate 100'. After the via hole 106v and the via hole 106h are formed, a plurality of conductive layers 103 are formed on the inner walls of the via hole 106v and the via hole 106h, respectively. Each conductive layer 103 is located between the metal layer 104a and the metal layer 104b on both sides of the initial circuit substrate 100', and is electrically connected to the metal layer 104a and the metal layer 104b. In this embodiment, the method of forming the conductive layer 103 may be electroplating (electroplating), and the material of the conductive layer 103 may include a conductive material such as copper.

Referring to fig. 2C, a plugging material 107p is filled into the inner side of the through hole 106v, and two end surfaces 107e of the plugging material 107p are aligned with two surfaces 100's of the initial circuit substrate 100' by mechanical polishing. The plug hole material 107p may contain an ink resin, and may be filled into the inside of the through hole 106v by a method such as screen printing (screen printing) or roll printing (roll printing). Next, the ink resin is baked by heating or UV irradiation to form the plug hole material 107p in a cured state.

Referring to fig. 2D, a circuit layer 105a and a circuit layer 105b are formed on the metal layer 104a and the metal layer 104b on both sides of the initial circuit substrate 100', respectively. The method of forming the wiring layer 105a and the wiring layer 105b includes: a metal layer (not shown) is formed on each of the metal layers 104a and 104b, and the two metal layers and the metal layers 104a and 104b are patterned to form a circuit layer 105a and a circuit layer 105b. In addition, the wiring layer 105a and the wiring layer 105b expose a portion of the surface 102a and a portion of the surface 102b of the insulating layer 102, respectively. Thus, the circuit substrate 100 is substantially completed.

It should be noted that the circuit layer 105a (and the circuit layer 105 b) may further include a plurality of pads 109 covering the two end surfaces 107e of the plugging material 107p. Specifically, one of the pads 109 on the circuit layer 105a may be electrically connected to the other pad 109 on the circuit layer 105b through the conductive layer 103, and the two pads 109 are respectively located on two end surfaces 107e of the same plugging material 107p.

Referring to fig. 2E, after the circuit layer 105a and the circuit layer 105b are formed, the bonding material 120 is disposed on one of the circuit layers (e.g., the circuit layer 105 b). As shown in fig. 2E, the bonding material 120 completely covers the circuit layer 105b and the surface 102b of the insulating layer 102, but does not cover the through hole 106h. Further, one side surface 120e of the bonding material 120 is flush with the surface 103s of the conductive layer 103 located inside the through hole 106h. The bonding material 120 may include a polymer material such as Polypropylene (PP), and may be disposed on the wiring layer 105b by a dummy (pre-lamination) method.

Then, a release film 140 is attached to the bonding material 120, so that the bonding material 120 is located between the insulating layer 102 and the release film 140. The release film 140 completely covers the bonding material 120 and also completely covers one end of the through hole 106h. The release film 140 may include a high molecular material coated with a release agent, such as a PET film coated with a silicon release agent.

In addition, in other embodiments, another bonding material (not shown) may be disposed on another circuit layer (e.g., the circuit layer 105 a), and another release film (not shown) may be attached to the bonding material. In other words, the bonding material and the release film are disposed on both sides of the circuit board 100.

Referring to fig. 2F, after the release film 140 is attached, the bonding material 120 and the release film 140 are drilled or cut. In this process, a portion of the bonding material 120 and a portion of the release film 140 are removed to form a plurality of openings 130. These openings 130 expose a portion of the wiring layer 105b. In the present embodiment, each opening 130 is a portion of the pad 109 in the exposed wire layer 105b. However, the present utility model is not limited thereto, and in other embodiments, the opening 130 may also expose a portion of the wiring layer 105b that is not the pad 109.

Referring to fig. 2G, after forming the openings 130 (not shown in fig. 2G, refer to fig. 2F), the conductive material 160 may be disposed in the openings 130 by, for example, screen printing or roller printing, and the conductive material 160 may include a conductive paste material such as copper paste (Cu-paste). The conductive material 160 is electrically connected to the pads 109 in the circuit layer 105b, and an end surface 160e of the conductive material 160 protrudes from the surface 120s of the bonding material 120. It should be noted that, in other embodiments, the conductive material 160 may not be disposed in the opening 130. After the conductive material 160 is disposed, the release film 140 is removed and the surface 120s of the bonding material 120 is exposed.

After the steps of fig. 2A to 2G, the circuit substrate 100 is formed, and the bonding material 120 and the conductive material 160 are further disposed on the circuit substrate 100. Fig. 3 includes a circuit board 100, a circuit board 200, and a circuit board 300 formed through the steps of fig. 2A to 2G.

As shown in fig. 3, metal blocks 180,280, and 380 are mounted on circuit board 100,200, and 300, respectively. It should be noted that the metal block 180, the metal block 280 and the metal block 380 have a plurality of bump structures 182, a bump structure 282 and a bump structure 382, respectively. As shown in fig. 4, bump structures 182 are located on side surfaces 180s of metal block 180. Although the metal block 180 in the present embodiment includes four bump structures 182, the present utility model is not limited thereto, and in other embodiments, the metal block 180 may include more than three (e.g., three) bump structures 182.

Returning to fig. 3, the width W1 of the metal block 180 is slightly smaller than the width W2 of the via 106h (not shown in fig. 3, refer to fig. 2E). Accordingly, the surface 103s of the conductive layer 103 inside the through hole 106h can be contacted by these bump structures 182, thereby fixing the metal block 180 inside the through hole 106h of the wiring substrate 100, and wherein the side surface 180s of the metal block 180 does not directly contact the surface 103s of the conductive layer 103 inside the through hole 106h. In addition, the metal blocks 280 and 380 are also fixed to the circuit board 200 and 300 by bump structures 282 and 382, respectively.

It should be noted that, in the present embodiment, the end face 180b of the metal block 180 protrudes from the surface 120s of the bonding material 120, and the end face 380t of the metal block 380 protrudes from the surface 320s of the bonding material 320. On the other hand, the two layers of bonding materials 220 are respectively located at two opposite sides of the circuit substrate 200, and the end faces 280t and 280b of the metal block 280 are respectively protruded from the surfaces 220s of the two layers of bonding materials 220.

After the metal blocks 180,280, and 380 are respectively mounted on the circuit substrate 100,200, and 300, the three circuit substrates are pressed together so that the three circuit substrates overlap each other in the normal direction N1. The bonding process further includes heating the circuit substrate 100, the circuit substrate 200, and the circuit substrate 300, wherein the heating temperature is within a range of 180 ℃ to 220 ℃ to enable the metal block 180, the metal block 280, and the metal block 380 to be co-melted at a low temperature.

Since the bonding material 120 on the wiring substrate 100 faces one of the layers of bonding material 220 on the wiring substrate 200. Therefore, when the temperature reaches the processing temperature (e.g., glass transition temperature) of the bonding material 120, the bonding material 120 is in a fluid state and is fused with one of the bonding materials 220 to form a bonding layer 110a (not shown in fig. 3, refer to fig. 1) connecting the circuit substrate 100 and the circuit substrate 200. The bonding material 320 on the circuit substrate 300 is also formed in the same manner to connect the circuit substrate 200 and the bonding layer 110b of the circuit substrate 300 (not shown in fig. 3, please refer to fig. 1).

It should be noted that, when the bonding material 120 is in a fluid state, the bonding material flows into and fills the gap between the through hole 106h and the metal block 180, so that the metal block 180 is fixed in the through hole 106h of the circuit substrate 100. On the other hand, by bonding the circuit substrate 100 and the circuit substrate 200, the conductive material 160 contacts the pads 209 on the circuit substrate 200, and further electrically connects the circuit substrate 100 and the circuit substrate 200.

In addition, when heated, co-fusion occurs between the metal pieces in contact with each other. Specifically, the end surface 180b of the metal block 180 overlaps the end surface 280t of the metal block 280 to form an interface 170a (not shown in fig. 3, refer to fig. 1). Since the end face 180b of the metal block 180 is in direct contact with the end face 280t of the metal block 280, the interface 170a may undergo diffusion of metal atoms when heated. In this way, a recrystallized microstructure is formed around the interface 170a. After the lamination step shown in fig. 3 is completed, the fabrication of the multi-layer board circuit board 10 in fig. 1 is substantially completed.

In addition, although the number of the through holes 106h is one in fig. 2B to 2G, the present utility model is not limited thereto. In other embodiments, the number of through holes 106h may be more than one. In other words, in one layer of the circuit substrate (e.g., circuit substrate 100) of the multi-layer board circuit board, the number of metal blocks (e.g., metal blocks 180) may be more than one.

In summary, the metal blocks are respectively disposed in different areas of each layer of circuit substrate, and the metal blocks in two adjacent layers of circuit substrates can be contacted with each other. The metal blocks contacted with each other are fused together in a low-temperature co-fusion mode to be used as a heat dissipation medium in the circuit board. In this way, the metal blocks are not limited to be provided on the same region of different circuit substrates, so that the wiring design is not required to be changed in order to bypass the metal blocks, and the wiring freedom is further improved.

Although the present utility model has been described with reference to the above embodiments, it should be understood that the utility model is not limited thereto, but rather may be modified or altered by persons skilled in the art without departing from the spirit and scope of the utility model.

Claims (11)

1. A multi-layer board circuit board with heat dissipation function, comprising:

a first circuit substrate;

the first metal block is embedded in the first circuit substrate and is provided with two first end faces which are respectively exposed to two first surfaces on two opposite sides of the first circuit substrate;

the second circuit substrate is arranged on the first circuit substrate; and

the second metal block is embedded in the second circuit substrate and is provided with two second end faces which are respectively exposed to two second surfaces on two opposite sides of the second circuit substrate, wherein one of the two first end faces is directly contacted with one of the two second end faces to form an interface;

wherein the first end face and the second end face facing each other do not completely overlap.

2. The multi-layer board circuit of claim 1, further comprising:

and a first bonding layer between the first circuit substrate and the second circuit substrate, the first bonding layer covering a portion of one of the two first end surfaces of the first metal block and covering a portion of one of the two second end surfaces of the second metal block.

3. The multi-layer board of claim 2, wherein a first bonding material is present between the first metal block and the first circuit substrate, and a second bonding material is present between the second metal block and the second circuit substrate, wherein the first bonding layer connects the first bonding material and the second bonding material, respectively.

4. The multi-layer board circuit of claim 3, further comprising:

the first circuit substrate is electrically connected with the second circuit substrate through the conductive materials.

5. The multi-layer board circuit of claim 3, further comprising:

a third circuit substrate, wherein the second circuit substrate is located between the first circuit substrate and the third circuit substrate; and

the third metal block is embedded in the third circuit substrate and is provided with two third end faces which are respectively exposed to two third surfaces on two opposite sides of the third circuit substrate;

wherein one of the two third end surfaces directly contacts one of the two second end surfaces.

6. The multi-layer board of claim 5, wherein the third end face and the second end face facing each other completely overlap.

7. The multi-layer board circuit of claim 5, further comprising:

and a second bonding layer between the second circuit substrate and the third circuit substrate, the second bonding layer covering a portion of one of the two second end surfaces of the second metal block and covering a portion of one of the two third end surfaces of the third metal block.

8. The multi-layer board of claim 7, wherein a third bonding material is present between the third metal block and the third wiring board, and the third bonding material is connected to the second bonding layer.

9. The multi-layer board of claim 1, wherein the first metal block further comprises a plurality of bump structures, the bump structures being located on a side surface of the first metal block and being in direct contact with the first circuit substrate.

10. The multi-layer board of claim 9, wherein the first bonding material surrounds the plurality of bump structures of the first metal block.

11. The multi-layer board circuit of claim 7, further comprising:

the second circuit substrate is electrically connected with the third circuit substrate through the conductive materials.