CN218783216U - Stripline low-pass filter and electronic equipment - Google Patents
Stripline low-pass filter and electronic equipment Download PDFInfo
- Publication number
- CN218783216U CN218783216U CN202221949235.1U CN202221949235U CN218783216U CN 218783216 U CN218783216 U CN 218783216U CN 202221949235 U CN202221949235 U CN 202221949235U CN 218783216 U CN218783216 U CN 218783216U
- Authority
- CN
- China
- Prior art keywords
- trace
- dielectric layer
- pass filter
- strip line
- wire
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Filters And Equalizers (AREA)
Abstract
The embodiment of the application provides a stripline low pass filter and electronic equipment, includes: the first dielectric layer, the second dielectric layer, the third dielectric layer and the fourth dielectric layer are sequentially stacked from top to bottom; the strip line is laid on the surface of the third dielectric layer; a first conductive via and a second conductive via; the first conductive hole and the second conductive hole penetrate from the surface of the first dielectric layer to the surface of the third dielectric layer, the first conductive hole is in contact with one end of the strip line so as to enable the first conductive hole to be electrically interconnected with the strip line, and the second conductive hole is in contact with the other end of the strip line so as to enable the second conductive hole to be electrically interconnected with the strip line; the second dielectric layer and the fourth dielectric layer are used for coupling to a zero potential to form a reference ground plane. The stripline low-pass filter can be equivalent to the low-pass filter in function in this application, adopts the stripline low-pass filter can make the filter no longer occupy the overall arrangement space on top layer, is favorable to the product miniaturization.
Description
Technical Field
The embodiment of the application relates to the technical field of chip packaging, in particular to a stripline low-pass filter and electronic equipment.
Background
Currently, the main board of an electronic device (e.g., a smart phone, a tablet computer, a wearable device, a notebook computer, a router, etc.) is generally a Printed Circuit Board (PCB). Specifically, a main board of an electronic device generally adopts a PCB layered design, the PCB layered design includes two or more conductive layers, the conductive layers can be interconnected, and an upper surface of the conductive layer is a surface layer of the PCB layered design. When the conductive layer is larger than two layers, such a layered design of the PCB may also be called a multi-layer board (multi-layer board), which can increase a wiring area and achieve high-density assembly.
Electronic devices include components (e.g., filters, etc.) for implementing functions, and the components are generally disposed on a surface layer of a PCB board by Surface Mount Technology (SMT) to form a main board of the electronic device. These components are referred to herein as SMT devices, which are typically packaged in leadless or short-lead format.
However, as electronic devices become more powerful, the number of SMT devices required for the electronic devices increases. More PCB surface space is needed to place SMT devices on the surface of the PCB. Therefore, the area of the single board of the PCB is affected by a large number of SMT devices, and the overall size of the electronic device is affected, and the manufacturing cost of the PCB is increased.
SUMMERY OF THE UTILITY MODEL
The embodiment of the application provides a stripline low-pass filter and electronic equipment to solve the problems that a traditional surface-mounted low-pass filter occupies a surface layer space and affects the overall size of the electronic equipment.
In a first aspect, an embodiment of the present application provides a stripline low-pass filter, including: the first dielectric layer, the second dielectric layer, the third dielectric layer and the fourth dielectric layer are sequentially stacked from top to bottom; the strip line is laid on the surface of the third medium layer; a first conductive via and a second conductive via; the first conductive hole and the second conductive hole penetrate through the surface of the first dielectric layer to the surface of the third dielectric layer; the first conductive via is in contact with one end of the strip line to electrically interconnect the first conductive via with the strip line; the second conductive hole is in contact with the other end of the strip line to electrically interconnect the second conductive hole and the strip line; the second dielectric layer and the fourth dielectric layer are used for coupling to a zero potential to form a reference ground plane.
According to the stripline low-pass filter provided by the embodiment of the application, the stripline is positioned between the two reference ground planes, so that the stripline and the dielectric layer can form a stripline structure. When a signal is transmitted on the strip line, the strip line may form a parasitic resistance and/or a parasitic capacitance, and the first conductive hole may also form a parasitic resistance. In this way, a stripline low pass filter may be formed by the parasitic parameters of the stripline and the first conductive via. The strip line low-pass filter can be used for replacing a surface-mounted low-pass filter, and because the strip line is positioned in the multiple dielectric layers, the surface layer space of the first dielectric layer can not be occupied, so that the strip line low-pass filter is used for replacing the surface-mounted low-pass filter, the number of surface-mounted devices on the surface layer of the first dielectric layer can be reduced, and the overall size of the dielectric layers can be reduced.
In one implementation, the stripline includes a first trace, a second trace, and a third trace; one end of the second wire is connected with the top of the first wire, and the other end of the second wire is connected with the top of the third wire, so that the strip line forms a C-shaped structure; the open end of the stripline is the opposite end of the second trace. Therefore, the first wire, the second wire and the third wire can be prevented from being mutually coupled with electromagnetic energy.
In an implementation manner, the second trace is a linear structure made of a metal material. In this way, the parasitic parameter of the second trace may be represented as a parasitic resistance.
In an implementation manner, the first trace is a sheet structure made of a metal material; the first routing comprises a first line segment and a second line segment; one end of the first line segment is connected with the second routing, and the other end of the first line segment extends along the direction vertical to the length of the second routing; one end of the second line segment is connected with the inner side of the first line segment, and the other end of the second line segment extends along the length direction parallel to the second routing line.
In this way, the parasitic parameter of the first trace can be represented as a parasitic capacitance. In addition, through the design of the first line segment and the second line segment, the whole area of the first wiring can be increased, and then the value of the parasitic capacitance of the first wiring can be increased.
In one implementable manner, the first line segment and the second line segment are of unitary construction.
In an implementation manner, the third trace is a sheet structure made of a metal material; one end of the third wire is connected with one end of the second wire far away from the first wire, and the other end extends along the direction perpendicular to the length direction of the second wire. Thus, the parasitic parameter of the third trace may be a parasitic capacitance.
In one implementable manner, the stripline includes a first signal input and a first signal output; the first signal input end is one end of the first wire far away from the second wire; the first signal output end is one end of the third wire far away from the second wire; the first conductive via contacts the first signal input terminal, and the second conductive via contacts the first signal output terminal.
In one implementation, the device further comprises a routing circuit; the wiring circuit is laid on the surface of the first dielectric layer; the wiring circuit comprises a second signal input end and a second signal output end; the second signal output end is connected with the first conductive hole, and the second signal input end is connected with the second conductive hole, so that the wiring circuit is connected with the strip line in series. Thus, the stripline low pass filter can be connected in series with the wiring circuit, and the series connection is equivalent to the low pass filter in function.
In one implementation, a surface mount device is also included; the surface-mounted device is arranged on the first dielectric layer and is positioned right above the strip line.
In one implementation, the ribbon line has a transverse width greater than or equal to 50 mils and less than or equal to 56 mils, and a longitudinal width greater than or equal to 44 mils and less than or equal to 50 mils.
In a second aspect, embodiments of the present application also provide an electronic device comprising at least one printed circuit board having the stripline low pass filter of the first aspect.
Drawings
FIG. 1 is a schematic cross-sectional view of a strip line;
FIG. 2 is a schematic diagram of a PCB board of an electronic device;
FIG. 3 is an exploded view of a stripline low pass filter provided in an embodiment of the present application;
FIG. 4 is a cross-sectional view of a stripline low pass filter provided in an embodiment of the present application;
FIG. 5 is a top view of a structure of a stripline provided in an embodiment of the present application;
FIG. 6 is a diagram of a second order low pass filter;
FIG. 7 is a model of the transfer function of the second order low pass filter of FIG. 6;
FIG. 8 is a diagram illustrating a relationship between a strip line and a third dielectric layer according to an embodiment of the present disclosure;
FIG. 9 is a schematic dimension diagram of a stripline provided in an embodiment of the present application;
fig. 10 is an exemplary amplitude-frequency characteristic curve of a stripline low-pass filter provided in an embodiment of the present application.
Wherein 010-stripline; 020-first ground plane; 030 — second ground plane; 040-SMT device; 050-PCB board; 100-a first dielectric layer; 200-a second dielectric layer; 300-a third dielectric layer; 400-a fourth dielectric layer; 500-a stripline; 501-a first wire; 5011 — first line segment; 5012 — second line segment; 502-a second trace; 503-a third trace; 504-a first signal input; 505-a first signal output; 600-a first conductive via; 700-a second conductive via; 800-routing a circuit; 801-second signal input; 802-a second signal output; 900-surface mount device.
Detailed Description
The terms "first", "second" and "third", etc. in the description and claims of this application and the description of the drawings are used for distinguishing between different objects and not for limiting a particular order.
In the embodiments of the present application, words such as "exemplary" or "for example" are used to mean serving as examples, illustrations or descriptions. Any embodiment or design described herein as "exemplary" or "such as" is not necessarily to be construed as preferred or advantageous over other embodiments or designs. Rather, use of the word "exemplary" or "such as" is intended to present concepts related in a concrete fashion.
The terminology used in the description of the embodiments of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application, which will be described in detail below with reference to the accompanying drawings.
Stripline (stripline): a stripline is a high frequency transmission conductor disposed in a dielectric between two parallel ground planes (or power planes). Fig. 1 is a schematic diagram of a cross-sectional structure of a strip line, as shown in fig. 1, the strip line structure may be applied to a multilayer Printed Circuit Board (PCB), the strip line structure may include a strip line 010, the strip line 010 may be located in an inner layer of the multilayer PCB, and is specifically disposed between a first ground plane 020 and a second ground plane 030, the first ground plane 020 and the second ground plane 030 are two layers of the multilayer PCB, and the first ground plane 020 and the second ground plane 030 are two ground planes disposed in parallel. Thus, the electric field of the strip line 010 is distributed between two conductors (planes) surrounding it, i.e. the first ground plane 020 and the second ground plane 030, so that the strip line 010 does not radiate energy nor is it disturbed by external radiation. The strip line has the advantages of small volume, light weight, wide frequency band, high Q value, simple process, low cost and the like.
Parasitic capacitance (stray capacitance): the parasitic capacitance is one of parasitic parameters, and is a virtual capacitance generated between wirings and between the wirings and a substrate material due to a capacitance effect, the influence factors of the parasitic capacitance mainly include the distance between the wirings, the larger the distance is, the smaller the generated parasitic capacitance is, and the coupling area of the wirings between two guide layers is also included, and the larger the coupling area is, the larger the generated parasitic capacitance is.
Parasitic resistance (parasitic resistance): the parasitic resistance is one of parasitic parameters and is a mutual resistance phenomenon between wirings and between the wirings and a polar plate material, the influence factors of the parasitic resistance comprise the length and the thickness of the wirings, and the longer the length of the wirings is, the larger the generated parasitic resistance is; the thicker the wiring, the smaller the parasitic resistance that is generated.
Parasitic inductance (stray inductance): the parasitic capacitance is one of parasitic parameters, and is a mutual inductance phenomenon between wirings and between the wirings and a polar plate material, and the influence factor of the parasitic inductance comprises the length of the wirings, and the longer the length of the wirings, the larger the generated parasitic inductance.
At present, a main board of an electronic device (e.g., a smart phone, a tablet computer, a wearable device, a notebook computer, a router, etc.) is generally a PCB board, and specifically, the main board of the electronic device generally adopts a PCB layered design, the PCB layered design includes two or more conductive layers, the conductive layers can be interconnected, and an upper surface of the conductive layer is a surface layer of the PCB layered design. When the conductive layer is larger than two layers, such a layered design of the PCB may also be called a multi-layer board (multi-layer board), which can increase a wiring area and achieve high-density assembly.
Electronic devices include components (e.g., filters, etc.) for realizing functions, and these components are generally arranged on the surface layer of a PCB by a surface mounting technology to form a main board of the electronic device. These components are referred to herein as SMT devices, which are typically packaged in pinless or short lead configurations. As shown in fig. 2, a plurality of SMT devices 040 in different packages are provided on the surface layer of the PCB board 050.
However, as electronic devices become more powerful, the number of SMT devices required for the electronic devices increases. More PCB surface space is needed to place SMT devices on the surface of the PCB. Therefore, the area of the single board of the PCB is affected by a large number of SMT devices, and the overall size of the electronic device is affected, and the manufacturing cost of the PCB is increased.
The embodiment of the application provides a stripline low-pass filter, which can be specially designed to enable the stripline to be equivalent to the low-pass filter in function so as to replace an SMT device. Because the stripline is a structure that is located the PCB board inlayer, consequently adopt stripline low pass filter to replace SMT low pass filter, can be so that the filter no longer occupy the overall arrangement space on PCB board top layer, can solve the filter and occupy the big problem of PCB board top layer layout area. In addition, the device can be used for laying out other SMT devices instead of the saved layout space, or the space can be reduced, so that the purpose of reducing the size of the PCB is achieved. The stripline low-pass filter provided by the embodiment of the application can be specifically applied to electronic equipment such as smart phones or routers.
Fig. 3 is an exploded view of a stripline low-pass filter provided in an embodiment of the present application, and fig. 4 is a cross-sectional view of the stripline low-pass filter provided in an embodiment of the present application. As shown in fig. 3 and 4, the stripline low-pass filter provided in this embodiment of the application includes at least four dielectric layers, which are a first dielectric layer 100, a second dielectric layer 200, a third dielectric layer 300, and a fourth dielectric layer 400, respectively, where the first dielectric layer 100, the second dielectric layer 200, the third dielectric layer 300, and the fourth dielectric layer 400 are sequentially stacked from top to bottom, and fig. 3 only shows one surface of the first dielectric layer 100, the second dielectric layer 200, the third dielectric layer 300, and the fourth dielectric layer 400. The third dielectric layer 300 is a strip line layer, and the strip line 500 is laid on the surface of the third dielectric layer 300. When a signal is transmitted on the strip line 500, the strip line 500 may form a parasitic resistance and/or a parasitic capacitance to be equivalent to a resistance device and/or a capacitance device.
Further, the second dielectric layer 200 and the fourth dielectric layer 400 are coupled to a zero potential, and then the second dielectric layer 200 and the fourth dielectric layer 400 are ground layers, which may form a complete reference ground plane. The third dielectric layer 300 is a dielectric layer filled with a dielectric, which may be an insulating dielectric. Thus, the second dielectric layer 200, the third dielectric layer 300, the fourth dielectric layer 400, and the strip line 500 may form a strip line structure.
It should be added that the first dielectric layer 100, the second dielectric layer 200, the third dielectric layer 300, and the fourth dielectric layer 400 may be several layers of a multilayer PCB of an electronic device, respectively, where the first dielectric layer 100 may be a top signal layer (top layer) of the multilayer PCB.
Further, in the embodiment of the present application, the amplitude-frequency characteristic of the strip line 500 may be adjusted by controlling the magnitude of each parasitic parameter of the strip line 500, so that the amplitude-frequency characteristic of the strip line 500 may be equivalent to a specific electronic component on a path. Thus, a stripline low pass filter comprising striplines 500 may be used in place of equivalent electronic components, for example, a stripline low pass filter may be used in place of a surface mount component second order low pass filter. This part will be described in detail below, and will not be described in detail here.
Further, at least a first conductive via 600 and a second conductive via 700 are disposed between the first dielectric layer 100 and the third dielectric layer 300, and the first conductive via 600 and the second conductive via 700 penetrate from the surface of the first dielectric layer 100 to the surface of the third dielectric layer 300. The orthographic projections of the first conductive via 600 and the second conductive via 700 on the third dielectric layer 300 may overlap the strip line 500, and in particular, the first conductive via 600 is in contact with one end of the strip line 500, so that the first conductive via 600 may be electrically interconnected with the strip line 500. The second conductive via 700 is in contact with the other end of the strip line 500, so that the second conductive via 700 can be electrically interconnected with the strip line 500.
The conductive via is a via formed based on a vertical electrical connection technique through the PCB for electrical interconnection between different layers of the PCB. Specifically, the conductive holes are through holes communicating the upper and lower surfaces of the PCB layer, and conductors (i.e., through hole metal) are poured into the through holes to form conductive connecting lines. The poured conductor may be determined according to its specific process, such as copper, which is a conductive material.
Specifically, the first conductive via 600 and the second conductive via 700 are filled with a metal filler, such as electroplated copper, and the like, and after the metal filler of the first conductive via 600 is in contact with the strip line 500, the first conductive via 600 may be electrically interconnected with the strip line 500, and after the metal filler of the second conductive via 700 is in contact with the strip line 500, the second conductive via 700 may be electrically interconnected with the strip line 500.
Further, after the device located in the first dielectric layer 100 is connected to the first conductive via 600 or the second conductive via 700, it can be electrically interconnected to the strip line 500 located in the third dielectric layer 300. The diameters of the first conductive via 600 and the second conductive via 700 may be designed according to practical situations, and the present application is not limited thereto.
Further, the strip line 500 may include a first signal input terminal 504 and a first signal output terminal 505, the first signal input terminal 504 may be disposed at one end of the strip line 500, the first signal output terminal 505 may be disposed at the other end of the strip line 500, the first conductive via 600 may be in contact with the first signal input terminal 504, and the second conductive via 700 may be in contact with the first signal output terminal 505. It is understood that the first signal input terminal 504 and the first signal output terminal 505 are not independent of the structure of the strip line 500, and both are only named for one end and the other end of the strip line 500, and are only used for describing the signal flow direction, and do not limit the specific structure of the strip line 500.
The stripline low-pass filter provided in the embodiment of the present application further includes a routing circuit 800, and the routing circuit 800 is laid on the surface of the first dielectric layer 100. Specifically, the trace circuit 800 includes a second signal input terminal 801 and a second signal output terminal 802. The second signal output terminal 802 is connected to the first conductive via 600 and the second signal input terminal 801 is connected to the second conductive via 700. In this way, the trace circuit 800 can be electrically connected with the first conductive via 600 and the second conductive via 700.
In some implementations, the trace circuitry 800 can be any circuitry with filtering requirements. Illustratively, the trace circuit 800 may be a radio frequency circuit with a fixed characteristic impedance, for example, a circuit with a characteristic impedance of 50 Ω. The second dielectric layer 200 serves as a reference ground plane and may also be used as a ground reference for controlling the characteristic impedance of the rf circuit.
As can be seen from the above, the electrical signal in the trace circuit 800 can be transmitted into the first conductive via 600 through the second signal output terminal 802, enter the third dielectric layer 300 through the first conductive via 600, and be transmitted into the strip line 500 through the first signal input terminal 504. Then, the signal is transmitted from the first signal output terminal 505 of the strip line 500, enters the second signal input terminal 801 on the surface layer of the first dielectric layer 100 through the second conductive hole 700, and is injected into the trace circuit 800. That is, the strip line 500 can be connected in series with the trace circuit 800. When the amplitude-frequency characteristic of the stripline low-pass filter formed by the stripline 500 can be equivalently replaced by an electronic component such as a second-order low-pass filter, it is equivalent to serially connecting a second-order low-pass filter to the trace circuit 800. Like this, the stripline low pass filter that this application embodiment provided can replace the table and paste low pass filter, does not occupy top layer space, has reduced the total number of SMT device in the PCB board top layer for PCB board top layer space can reduce, is favorable to reducing the overall size of PCB board, promotes the product miniaturization.
Further, with continuing reference to fig. 3 and fig. 4, the stripline low pass filter provided in the embodiment of the present application may further include a surface mount device 900, where the surface mount device 900 is disposed on the first dielectric layer 100, and the surface mount device 900 is located directly above the stripline 500. After the stripline low-pass filter replaces the SMT device, more space is provided for the layout of other SMT devices on the surface layer of the PCB, such as the surface mounted device 900.
Illustratively, the surface mount device 900 may be an SMT device, such as a radio frequency switch, a capacitor, or a resistor.
Fig. 5 is a top view of a structure of a stripline provided in the present embodiment, as shown in fig. 5, the stripline 500 includes a first trace 501, a second trace 502, and a third trace 503, and the first trace 501, the second trace 502, and the third trace 503 are located on the same plane. One end of the second wire 502 is connected to the top of the first wire 501, and the other end is connected to the top of the third wire 503 to form the C-shaped strip line 500, and the open end of the C-shaped strip line 500 is the opposite end of the second wire 502, so that the first wire 501, the second wire 502 and the third wire 503 can be prevented from electromagnetic energy coupling. The first trace 501 and the third trace 503 may be a sheet structure made of metal, preferably a copper sheet. Since the first trace 501 is located between the second dielectric layer 200 and the fourth dielectric layer 400, and the second dielectric layer 200 and the fourth dielectric layer 400 are reference ground planes, when a signal is transmitted on the first trace 501, the first trace 501 has a capacitive effect, that is, it is equivalent to charging between the first trace 501 and the reference ground plane, the first trace 501 can store charges and further embody capacitive, and at this time, the first trace 501 can generate a parasitic capacitance to ground. When a signal is transmitted on the third trace 503, the third trace 503 is also capacitive, and the specific principle is the same as that of the first trace 501, which is not described herein again. For convenience of description, the parasitic capacitance generated by the first trace 501 is referred to as a first parasitic capacitance, and the parasitic capacitance generated by the third trace 503 is referred to as a second parasitic capacitance.
The second trace 502 may be a linear structure made of a metal material, preferably a copper wire, because the metal material itself has a certain resistivity, and the second trace 502 is a thin trace, when a signal is transmitted on the second trace 502, the second trace 502 may be resistive, but hardly be capacitive or inductive, and thus the second trace 502 may generate a parasitic resistance. For convenience of description, the parasitic resistance formed by the second trace 502 is referred to as a second parasitic resistance.
It should be added that the first signal input end 504 can be an end of the first trace 501 away from the second trace 502, the first signal output end 505 can be an end of the third trace 503 away from the second trace 502, the first conductive via 600 is in contact with the first signal input end 504, and the second conductive via 700 is in contact with the first signal output end 505.
It should be added that the first trace 501, the second trace 502 and the third trace 503 may be an integral structure.
Further, since the first conductive via 600 is a via hole filled with a via metal, the first conductive via 600 may exhibit resistance when a signal is transmitted through the first conductive via 600. Moreover, for the trace circuit 800, especially when the trace circuit 800 is a radio frequency circuit with characteristic impedance, the impedance between the trace circuit 800 and the first conductive via 600 is discontinuous, and thus the first conductive via 600 is equivalent to a parasitic resistor. Further, the first conductive via 600 penetrates through the third dielectric layer 300 and is connected in series with the strip line 500 located in the third dielectric layer 300, so that a parasitic resistor is connected in series before the second parasitic resistor, and the first parasitic capacitor is connected in series between the second parasitic resistor and the parasitic resistor. For convenience of description, this parasitic resistance is referred to as a first parasitic resistance.
Therefore, the first parasitic resistor is connected with the second parasitic resistor in series, a branch circuit consisting of the first parasitic capacitor to the ground is arranged between the output end of the first parasitic resistor and the input end of the second parasitic resistor, and the output end of the second parasitic capacitor is also connected with a branch circuit consisting of the second parasitic capacitor to the ground. Therefore, the first parasitic resistance, the second parasitic resistance, the first parasitic capacitance to ground, and the second parasitic capacitance to ground can be equivalent to a second-order low-pass filter, and the specific filtering principle is as follows:
fig. 6 is a schematic diagram of a second-order low-pass filter, and as shown in fig. 6, the low-pass filter is an electronic filtering device that allows signals below a cut-off frequency to pass through but does not allow signals above the cut-off frequency to pass through. The second-order low-pass filter comprises a first resistor R1, a second resistor R2, a first capacitor C1 and a second capacitor C2, the first resistor R1 is connected with the second resistor R2, one end of the first capacitor C1 is connected between the first resistor R1 and the second resistor R2, the other end of the first capacitor C1 is grounded, one end of the second capacitor C2 is connected to one end, far away from the first resistor R1, of the second resistor R2, and the other end of the second capacitor C2 is grounded.
Fig. 7 is a transfer function model of the second-order low-pass filter shown in fig. 6, and as shown in fig. 7, the transfer function of the second-order low-pass filter is specifically as follows:
wherein H (jω) Being a transfer function of a second-order low-pass filter, U Sc For input voltage, U 1 To output a voltage, C 1 Is the capacitance value, R, of the first capacitor C1 1 Is the resistance value of the first resistor R1, C 2 Is the capacitance value, R, of the second capacitor C2 2 Is the resistance of the second resistor R2, j is an imaginary number, ω is the angular frequency of the input signal, and ω =2 π f, f is the frequency of the input signal.
As can be seen from the above equation, the transfer function of the second-order low-pass filter is the ratio of the input voltage to the output voltage, and since the resistance and the capacitance are constant quantities, the transfer function of the second-order low-pass filter is only related to the frequency of the input signal.
Furthermore, the above formula can be deformed to obtain an output voltage U 1 。
Wherein, as the frequency f of the input signal increases, ω gradually increases, U 1 Gradually decreases. Therefore, the second-order low-pass filter shown in fig. 7 can achieve the effect that signals below the cutoff frequency can pass, and signals above the cutoff frequency cannot pass.
Therefore, the stripline filter provided by the embodiment of the application can meet the requirement of low-pass filtering, can be applied to the wiring circuit 800, and can attenuate a signal with a frequency higher than a certain cutoff frequency when the signal is transmitted on the stripline low-pass filter, thereby achieving the purpose of low-pass filtering.
Fig. 8 is a positional relationship diagram of a stripline and a third dielectric layer according to an embodiment of the present disclosure, and as shown in fig. 8, in the embodiment of the present disclosure, a second trace 502 may be laid on a surface of the third dielectric layer 300.
Further, the first trace 501 is also laid on the surface of the third dielectric layer 300, the first trace 501 includes a first line segment 5011 and a second line segment 5012, one end of the first line segment 5011 is connected to the second trace 502, and the other end extends in a direction perpendicular to the length direction of the second trace 502 to form the first line segment 5011 with a rectangular shape. One end of the second line segment 5012 is connected to the inner side of the first line segment 5011, and the other end extends in a direction parallel to the length direction of the second trace 502 to form a rectangular second line segment 5012, where the inner side of the first line segment 5011 is the side thereof connected to the second trace 502. In this way, the first trace 501 may be formed in an L shape.
It should be added that the first line segment 5011 and the second line segment 5012 can be an integral structure, and together form the first trace 501.
Further, a third trace 503 is also laid on the surface of the third dielectric layer 300, one end of the third trace 503 is connected to one end of the second trace 502 far from the first trace 501, and the other end extends along a direction perpendicular to the length direction of the second trace 502, so as to form the rectangular third trace 503. The strip line 500 provided by the embodiment of the application has the characteristic of regular shape, and is high in etching precision when put into production. Further, the stripline filter constituted by the striplines 500 is high in filtering accuracy.
It should be added that the low-pass filters formed by RC parameters with different sizes have different cut-off frequencies, which can meet the filtering requirements of different routing paths. Therefore, in the embodiment of the present application, the cutoff frequency of the stripline low pass filter may be changed by designing the magnitudes of the parasitic capacitance and parasitic resistance of the stripline 500. Afterwards, whether the stripline low-pass filter can achieve the required filtering effect can be verified in a simulation mode. If the required filtering effect is not achieved, modification and simulation iteration can be carried out for multiple times until the final result achieves the required filtering effect, and device replacement is effectively completed and the purpose of saving the layout space of the surface of the PCB is achieved.
Specifically, since the first trace 501 and the third trace 503 are sheet structures made of metal, the size and the shape design of the first trace 501 and the third trace 503 will affect the size of the parasitic capacitance generated by the first trace 501 and the third trace 503, and at the same time, it will be determined whether the parasitic inductance affecting the performance of the stripline filter will be generated. Moreover, since the second trace 502 is a linear structure made of metal, the length and thickness of the second trace 502 will also affect the magnitude of the parasitic resistance generated thereby. The magnitude of the parasitic capacitance and the magnitude of the parasitic resistance ultimately affect the cut-off frequency of the stripline filter. Therefore, in the embodiment of the present application, the shape design and the size parameter of the strip line 500 can be changed to change the cut-off frequency of the strip line filter, so that the cut-off frequency of the strip line filter meets the filtering requirement of the trace circuit 800.
Further, the ability of a capacitor to store charge is related to the area of its electrode plates. Specifically, the larger the plate area is, the stronger the charge storage capacity is, and the larger the capacitance value of the capacitor is. Conversely, the smaller the plate area, the weaker the ability to store charge and the smaller the capacitance of the capacitor. Therefore, in the PCB structure, the size of the parasitic capacitance generated by a segment of trace depends on the size of the area of the segment of trace. In addition, in the PCB board level structure, when a signal is transmitted on a section of trace, the length of the trace will also affect the size of the parasitic inductance generated by the trace, so that in order to make the parasitic capacitance of the trace large enough and the parasitic inductance small enough, the area of the trace needs to be increased, and the length of the trace needs to be controlled.
Fig. 9 is a schematic size diagram of a stripline provided in the embodiment of the present application, and as shown in fig. 9, in the embodiment of the present application, an L-shaped first trace 501 and a rectangular third trace 503 are designed, and two control parameters, namely a length and a thickness, are also designed for a second trace 502. Table 1 is a design parameter of the stripline 500, and an exemplary description of the dimensions of the stripline 500 is provided, specifically:
design parameters | W1 | W2 | W3 | W4 | W5 | H1 | H2 | H3 |
Numerical mil | 15.5 | 30.4 | 27.52 | 13.4 | 12.5 | 5.09 | 27.4 | 42.7 |
TABLE 1
Wherein W1 is the width of the first wire 5011 along the length direction of the second wire 502, W2 is the length of the second wire 502, W3 is the length of the first wire 501 along the length direction of the second wire 502, W4 is the distance between the second wire 5012 and the third wire 503, W5 is the width of the third wire 503 along the length direction of the second wire 502, H1 is the diameter (thickness) of the second wire 502, H2 is the distance between the second wire 502 and the second wire 5012, and H3 is the length of the third wire 503.
It should be added that, in the PCB board level structure, two capacitive copper sheets close to each other also generate mutual inductance during signal transmission, so that the distance between the first trace 501 and the third trace 503 needs to be considered when designing the size of the stripline 500. Specifically, the distance W4 between the second segment 5012 and the third trace 503 needs to be controlled. In addition, a parasitic parameter may also be generated between the second trace 502 and the second line segment 5012 during signal transmission, so the distance H2 between the second line segment 5012 and the second trace 502 needs to be considered.
The simulation of the stripline low-pass filter having the dimensions of the stripline 500 shown in table 1 resulted in the amplitude-frequency characteristic curve of the stripline low-pass filter shown in fig. 10, in which the abscissa of the curve represents the frequency of the input signal of the stripline low-pass filter, the ordinate of the curve represents the amplitude of the output signal of the stripline low-pass filter, and the amplitude of the input signal of the stripline low-pass filter was maintained, and the M1 point in the graph has an abscissa of 7.2000 and an ordinate of-2.9384, so that the cutoff frequency at the-3 dB point of the stripline low-pass filter was 7.2GHz. When the input signal frequency is greater than the cut-off frequency of 7.2GHz, the amplitude of the output signal gradually attenuates, and the amplitude of the signal with the input signal frequency less than the cut-off frequency of 7.2GHz hardly attenuates. Therefore, a stripline low pass filter having the dimensions of stripline 500 of Table 1 may be used in place of an SMT low pass filter having a cutoff frequency of 7.2GHz.
In the embodiment of the present application, the lateral width of the strip line 500 may be greater than or equal to 50mil, and less than or equal to 56mil, as shown in fig. 9, the lateral width of the strip line 500 = W3+ W4+ W5, and preferably, the lateral width of the strip line 500 is 53.42mil. The longitudinal width of the ribbon line 500 may be greater than or equal to 44 mils and less than or equal to 50 mils, as shown in fig. 9, with the longitudinal width of the ribbon line 500 = H1+ H3, and preferably, the longitudinal width of the ribbon line 500 is 47.79 mils.
The design of the appearance and the size of the strip line 500 is affected due to too many fluctuation parameters of the size of the strip line 500, so that the cut-off frequency of the strip line low-pass filter is not easy to control. Therefore, when the dimension of the strip line 500 is designed, the embodiment of the present application may also keep the transverse width and the longitudinal width of the strip line 500 constant, that is, keep the x-axis direction dimension (W3 + W4+ W5) and the y-axis direction dimension (H1 + H3) of the strip line 500 constant, and only change the values of some parameters. For example, the embodiment of the present application may change the values of W1, W2, W3, and/or H2 without changing the values of the x-axis direction dimension (W3 + W4+ W5) and the y-axis direction dimension (H1 + H3) and ensuring that the values of W4 and H1 are unchanged. Furthermore, the required cut-off frequency can be obtained by a simulation iteration method.
Table 2 exemplarily shows the influence on the cut-off frequency of the stripline low-pass filter when the values of the width W1 of the first line segment 5011 in the length direction of the second trace 502, the length W2 of the second trace 502, the length W3 of the first trace 501 in the length direction of the second trace 502, and the distance H2 between the second trace 502 and the second line segment 5012 are changed while keeping the value of the x-axis direction dimension (W3 + W4+ W5) at 53.42mil, and the value of the y-axis direction dimension (H1 + H3) at 47.79mil, wherein the fluctuation range of the cut-off frequency is obtained by simulation and is described in the following table.
Dimensional parameters | Fluctuation range (mil) | Simulation parameter (cut-off frequency GHz) |
W1 | 13.5~17.5 | 7.09~7.35 |
W2 | 27.4~33.4 | 7.14~7.29 |
W3 | 24.52~30.52 | 6.84~7.41 |
H2 | 24.4~33.4 | 7.04~7.33 |
TABLE 2
It should be added that the shape of the first trace 501 provided in the embodiment of the present application is not limited to be designed as an L-shape, and the shape of the third trace 503 is not limited to be designed as a rectangle. The shape of the first trace 501 may be other shapes such as a rectangle and a T, the shape of the third trace 503 may be other shapes such as an L and a T, and the shape of the second trace 502 is not limited to a linear shape. When the shape and size of the strip line 500 are designed, only the parasitic capacitance and the parasitic inductance of the first trace 501 and the third trace 503, the mutual capacitance between the first trace 501 and the third trace 503, the parasitic resistance of the second trace 502, and other factors need to be considered. After the design is completed, whether the required filtering requirement can be met can be judged through simulation.
It should be added that, in the embodiment of the present invention, the strip line 500 may be manufactured according to the following process flow: first, a metal layer, preferably a copper layer, is coated on the surface of the third dielectric layer 300. The metal layer is selectively covered with the protective film according to the desired shape, size, position, etc. of the strip line 500, and then etched, in which the metal layer at the position not covered with the protective film is etched, and the metal layer covered with the protective film is not etched. Thus, the strip line 500 positioned on the surface of the third dielectric layer 300 can be obtained.
In some implementations, the stripline low pass filter provided in the embodiment of the present application may also be applied to a flexible printed circuit board (FPC) design, where the first dielectric layer 100, the second dielectric layer 200, the third dielectric layer 300, and the fourth dielectric layer 400 are several layers of a multi-layer FPC board.
According to the technical scheme, the strip line low-pass filter with the special shape design can effectively replace an SMT (surface mount technology) low-pass filter, so that the purpose of saving the layout space of the surface layer is achieved, devices are saved, and the cost is reduced. In addition, the stripline low-pass filter is of a stripline structure, is small in size, can be applied to small electronic equipment such as a smart phone or a router, and solves the problem that the existing packaged filter is large in size and cannot be applied to the smart phone or the router.
Embodiments of the present application further provide an electronic device, which includes but is not limited to a smart phone, a personal computer, a router, a server, a workstation, and the like. The electronic device comprises at least one printed circuit board PCB incorporating the stripline low pass filter of embodiments of the present application.
The terminology used in the description of the embodiments section of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application, which will be described in detail below with reference to the accompanying drawings.
The above embodiments further describe the objects, technical solutions and advantages of the present invention in detail, it should be understood that the above is only the embodiments of the present invention, and is not intended to limit the protection scope of the present invention, and any modifications, equivalent substitutions, improvements and the like made on the basis of the technical solutions of the present invention should be included in the protection scope of the present invention.
Claims (11)
1. A stripline low pass filter, comprising:
the dielectric layer structure comprises a first dielectric layer (100), a second dielectric layer (200), a third dielectric layer (300) and a fourth dielectric layer (400) which are sequentially stacked from top to bottom;
a strip line (500) laid on the surface of the third medium layer (300);
a first conductive via (600) and a second conductive via (700);
the first conductive hole (600) and the second conductive hole (700) penetrate from the surface of the first medium layer (100) to the surface of the third medium layer (300);
the first conductive via (600) is in contact with one end of the strip line (500) to electrically interconnect the first conductive via (600) and the strip line (500);
the second conductive via (700) is in contact with the other end of the strip line (500) to electrically interconnect the second conductive via (700) and the strip line (500);
the second dielectric layer (200) and the fourth dielectric layer (400) are for coupling to a zero potential to form a reference ground plane.
2. The stripline low pass filter of claim 1,
the strip line (500) comprises a first trace (501), a second trace (502) and a third trace (503);
one end of the second wire (502) is connected with the top of the first wire (501), and the other end of the second wire is connected with the top of the third wire (503), so that the strip line (500) forms a C-shaped structure;
the open end of the strip line (500) is the opposite end of the second trace (502).
3. The stripline low-pass filter according to claim 2, wherein the second trace (502) is a linear structure of metal.
4. The stripline low pass filter of claim 2,
the first wiring (501) is of a sheet structure made of metal;
the first trace (501) comprises a first line segment (5011) and a second line segment (5012);
one end of the first line segment (5011) is connected with the second wire (502), and the other end of the first line segment extends along the direction perpendicular to the length of the second wire (502);
one end of the second line segment (5012) is connected with the inner side of the first line segment (5011), and the other end of the second line segment extends along the length direction parallel to the second routing line (502).
5. The stripline low pass filter of claim 4, wherein the first line segment (5011) and the second line segment (5012) are of unitary construction.
6. The stripline low pass filter of claim 2,
the third routing (503) is a sheet structure made of metal;
one end of the third wire (503) is connected with one end of the second wire (502) far away from the first wire (501), and the other end extends along a direction perpendicular to the length direction of the second wire (502).
7. The stripline low pass filter of claim 2,
the strip line (500) comprises a first signal input (504) and a first signal output (505);
the first signal input end (504) is one end of the first wire (501) far away from the second wire (502);
the first signal output end (505) is one end of the third trace (503) far away from the second trace (502);
the first conductive via (600) is in contact with the first signal input (504) and the second conductive via (700) is in contact with the first signal output (505).
8. The stripline low pass filter of claim 1, further comprising a trace circuit (800);
the routing circuit (800) is laid on the surface of the first dielectric layer (100);
the routing circuit (800) comprises a second signal input terminal (801) and a second signal output terminal (802);
the second signal output end (802) is connected with the first conductive hole (600), and the second signal input end (801) is connected with the second conductive hole (700), so that the wiring circuit (800) is connected with the strip line (500) in series.
9. The stripline low pass filter of claim 1, further comprising a surface mount device (900);
the surface-mounted device (900) is arranged on the first dielectric layer (100), and the surface-mounted device (900) is positioned right above the strip line (500).
10. The stripline low pass filter of claim 1,
the ribbon wire (500) has a lateral width greater than or equal to 50 mils and less than or equal to 56 mils;
the ribbon wire (500) has a longitudinal width greater than or equal to 44 mils and less than or equal to 50 mils.
11. An electronic device comprising at least one printed circuit board having a stripline low pass filter of any of claims 1-10.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202221949235.1U CN218783216U (en) | 2022-07-27 | 2022-07-27 | Stripline low-pass filter and electronic equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202221949235.1U CN218783216U (en) | 2022-07-27 | 2022-07-27 | Stripline low-pass filter and electronic equipment |
Publications (1)
Publication Number | Publication Date |
---|---|
CN218783216U true CN218783216U (en) | 2023-03-31 |
Family
ID=85708183
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202221949235.1U Active CN218783216U (en) | 2022-07-27 | 2022-07-27 | Stripline low-pass filter and electronic equipment |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN218783216U (en) |
-
2022
- 2022-07-27 CN CN202221949235.1U patent/CN218783216U/en active Active
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100867150B1 (en) | Printed circuit board with embedded chip capacitor and method for embedding chip capacitor | |
US6525622B1 (en) | Adding electrical resistance in series with bypass capacitors to achieve a desired value of electrical impedance between conducts of an electrical power distribution structure | |
US20070109709A1 (en) | Internally shielded energy conditioner | |
US7983055B2 (en) | Printed circuit board with embedded cavity capacitor | |
JP7268161B2 (en) | Multilayer filter with low inductance via assembly | |
WO2000074447A1 (en) | Method and apparatus for reducing electrical resonances and noise propagation in power distribution circuits employing plane conductors | |
WO2005002295A2 (en) | Circuit and method for suppression of electromagnetic coupling and switching noise in multilayer printed circuits boards | |
CN101965096A (en) | Flexible circuit board | |
US8050015B2 (en) | Composite electric element | |
CN102083268A (en) | Flexible circuit board | |
JP6125274B2 (en) | Electronic circuits and electronic equipment | |
EP1295516B1 (en) | Bypass capacitor methods for achieving a desired value of electrical impedance between parallel planar conductors of an electrical power distribution structure, and associated electrical power distribution structures | |
JP5674363B2 (en) | Circuit board having noise suppression structure | |
CN218783216U (en) | Stripline low-pass filter and electronic equipment | |
EP1349271B1 (en) | Electronic device for supplying DC power comprising a noise filter | |
KR20010049422A (en) | High Frequency Module | |
US7035082B2 (en) | Structure of multi-electrode capacitor and method for manufacturing process of the same | |
CN211702540U (en) | Structure for inhibiting electromagnetic interference of circuit board and circuit board | |
KR101055457B1 (en) | Electromagnetic bandgap structure and printed circuit board including the same | |
US7102874B2 (en) | Capacitive apparatus and manufacturing method for a built-in capacitor with a non-symmetrical electrode | |
CN209982452U (en) | Filter circuit structure | |
FI124128B (en) | filter Design | |
US7626828B1 (en) | Providing a resistive element between reference plane layers in a circuit board | |
CN112512208B (en) | Circuit board | |
CN210781529U (en) | Capacitor parallel wiring structure |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant |