CN218633695U - Power-on slow start circuit, chip and laser radar - Google Patents
Power-on slow start circuit, chip and laser radar Download PDFInfo
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- CN218633695U CN218633695U CN202222268295.3U CN202222268295U CN218633695U CN 218633695 U CN218633695 U CN 218633695U CN 202222268295 U CN202222268295 U CN 202222268295U CN 218633695 U CN218633695 U CN 218633695U
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Abstract
The utility model provides a go up electric soft start circuit, chip and laser radar, wherein, the circuit includes: switch module, slow start module and negative feedback module, wherein: the switch module is coupled between the power input end and the power output end and is suitable for controlling a path between the power input end and the power output end; the slow starting module is coupled between the power supply input end and the control end of the switch module; the negative feedback module is coupled between the power output end and the control end of the switch module; the slow start module and the negative feedback module control the change rate of the voltage at the output end of the power supply by controlling the conduction degree of the switch module. By adopting the scheme, the change rate of the voltage of the output end of the power supply can be controlled, and the phenomenon that a circuit generates large impact current to damage components is prevented.
Description
Technical Field
The embodiment of the utility model provides an electronic circuit technical field especially relates to a go up slow start circuit, chip and laser radar.
Background
A capacitor for voltage stabilization is generally coupled in a power-on circuit, and the capacitance value of the capacitor is large, however, when a power supply is switched on instantaneously, a large rush current is generated due to the charging of the capacitor, and the rush current may cause large power consumption, and even damage to components in the circuit.
Therefore, there is a need for a power-on slow start circuit that can control the variation rate of the voltage at the output terminal of the power supply, and prevent the circuit from generating a large inrush current to damage the components.
SUMMERY OF THE UTILITY MODEL
In view of this, an embodiment of the present invention provides a power-on slow start circuit, which can effectively control the change rate of the voltage at the power output terminal.
The embodiment of the utility model provides a go up electric slow start circuit, include: switch module, slow start module and negative feedback module, wherein:
the switch module is coupled between the power input end and the power output end and is suitable for controlling a path between the power input end and the power output end;
the slow starting module is coupled between the power supply input end and the control end of the switch module;
the negative feedback module is coupled between the power output end and the control end of the switch module;
the slow start module and the negative feedback module control the change rate of the voltage at the output end of the power supply by controlling the conduction degree of the switch module.
Optionally, the switch module comprises: a first field effect transistor having a first end coupled to the power input end, a second end coupled to the power output end, and a control end coupled to the slow start module and the negative feedback module, respectively.
Optionally, the slow-start module includes: main control unit and accuse unit by oneself, wherein:
the main control unit is coupled between the power supply input end and the control end of the switch module;
the coordination control unit is coupled with the control end of the switch module and is suitable for controlling the voltage of the control end of the switch module based on the control signal of the main control unit;
the main control unit and the assistant control unit are suitable for controlling the conduction degree of the switch module.
Optionally, the main control unit includes: a first capacitor; the cooperative control unit includes: a first resistance, wherein:
the first capacitor has a first end coupled to the power input end and a second end coupled to the first resistor and the control end of the switch module, respectively.
Optionally, the negative feedback module includes: a second capacitance and a second resistance, wherein:
the first end of the second capacitor is coupled to the power output end, and the second end of the second capacitor is coupled to the second resistor and the control end of the switch module respectively.
Optionally, the main control unit includes: a first capacitor; the cooperative control unit includes: a second resistance, wherein:
the first end of the first capacitor is coupled to a power input end, and the second end of the first capacitor is coupled to the second resistor and the control end of the switch module respectively;
the negative feedback module comprises: a second capacitance and a second resistance, wherein:
the first end of the second capacitor is coupled to the power output end, and the second end of the second capacitor is coupled to the second resistor and the control end of the switch module respectively.
Optionally, a capacitance value of the first capacitor is larger than a capacitance value of the second capacitor.
Optionally, the negative feedback module further comprises: a third resistor coupled between the second capacitor and the second resistor;
a first end of the third resistor is coupled to the second capacitor, and a second end of the third resistor is coupled to the second resistor and the control end of the switch module respectively;
the sum of the impedances of the second capacitor and the third resistor is greater than the impedance of the first capacitor.
Optionally, the main control unit includes: a detection unit and a switch unit; the cooperative control unit includes: a fourth resistance, wherein:
the detection unit is coupled between the power input end and the ground end, coupled with the switch unit and suitable for controlling the switch unit to be switched on and off based on the voltage change of the power input end;
the first end of the switch unit is coupled to the power input end, the second end of the switch unit is coupled to the control end of the switch module, and the control end of the switch unit is coupled to the detection unit;
the first end of the fourth resistor is respectively coupled to the second end of the switch unit and the control end of the switch module, and the second end of the fourth resistor is coupled to the detection unit;
the detection unit, the switch unit and the fourth resistor are suitable for controlling the conduction degree of the switch module according to the change of the voltage of the power input end and the change rate of the voltage of the power input end.
Optionally, the detection unit includes: a fifth resistor and a third capacitor, wherein:
a first end of the fifth resistor is coupled to the power input end, and a second end of the fifth resistor is coupled to the first end of the third capacitor;
and a first end of the third capacitor is coupled to the second end of the fifth resistor and the control end of the switch unit respectively.
Optionally, the switching unit comprises: a second field effect transistor or a triode.
Optionally, the negative feedback module includes: a fourth capacitance and the fourth resistance, wherein:
the first end of the fourth capacitor is coupled to the power output end, and the second end of the fourth capacitor is coupled to the control end of the switch module and the first end of the fourth resistor respectively.
The embodiment of the utility model provides a chip is still provided, the chip includes above-mentioned arbitrary embodiment last slow starting circuit.
The embodiment of the utility model provides a laser radar is still provided, laser radar adopts above-mentioned arbitrary embodiment go up slow starting circuit.
Adopt the embodiment of the utility model provides an in last electric soft start circuit, through coupling in power input end with the soft start movable module between switch module's the control end, and coupling in power output end with negative feedback module between switch module's the control end, control coupling is in the switch module's between power input end and the power output end degree of conducting, thereby realizes control power output end voltage's rate of change slowly switches on with negative feedback module control switch module promptly, and then realizes that power output end's voltage slowly rises to reduce the size of the impulse current that produces when the circuit starts, prevent that the components and parts in the circuit from damaging, especially prevent switch module's damage.
Furthermore, the switch module may include a first field effect transistor, a first end of the first field effect transistor is coupled to the power input end, a second end of the first field effect transistor is coupled to the power output end, and a control end of the first field effect transistor is coupled to the slow start module and the negative feedback module respectively.
Furthermore, the slow start module may include a main control unit and a cooperative control unit, and the main control unit is coupled between the power input end and the control end of the switch module, and the cooperative control unit is coupled to the control end of the switch module, so as to control the conduction degree of the switch module, thereby controlling the change rate of the voltage at the power output end, further reducing the magnitude of the impact current generated when the circuit is started, and preventing the components in the circuit from being damaged.
Further, the main control unit may include a first capacitor, and the auxiliary control unit may include a first resistor, wherein a first end of the first capacitor is coupled to the power input end, and a second end of the first capacitor is coupled to a first end of the first resistor; the second end of the first resistor is coupled to a ground terminal, and in the power-on process, the first capacitor is charged through the first resistor, so that the conduction time of the switch module can be effectively delayed, and the rising speed of the voltage of the power output terminal is further slowed down.
Further, the negative feedback module may include a second capacitor and a second resistor, wherein a first end of the second capacitor is coupled to the power output end, and a second end of the second capacitor is coupled to a first end of the second resistor; the first end of the second resistor is coupled to the second end of the second capacitor, and the second end of the second resistor is coupled to the ground terminal.
Further, the main control unit may include a first capacitor, and the auxiliary control unit may include a second resistor, wherein a first end of the first capacitor is coupled to a power input end, and a second end of the first capacitor is coupled to the second resistor and the control end of the switch module, respectively; the negative feedback module can include second electric capacity and second resistance, wherein second electric capacity, its first end coupling are in power output end, its second end coupling are in respectively the second resistance with switch module's control end owing to accuse unit and negative feedback module have shared the second resistance by oneself, consequently can reduce the components and parts in the circuit, can not only reduce the cost of circuit, can also further simplify the structure of circuit, are favorable to the detection and the maintenance of circuit.
Furthermore, the capacitance value of the first capacitor is larger than that of the second capacitor, and because the capacitance value of the first capacitor is larger, the partial voltage on the first capacitor is smaller than the conduction voltage of the switch module when the power-on jumps instantly, the circuit cannot be conducted immediately, and the voltage at the output end of the power supply cannot rise immediately, so that the problem of overlarge impact current caused by too fast rise of the voltage at the output end due to instant conduction of the switch module at the power-on moment is solved.
Furthermore, the negative feedback module may further include a third resistor coupled between the second capacitor and the second resistor, and a sum of impedances of the second capacitor and the third resistor is greater than an impedance of the first capacitor, and since the second capacitor and the third resistor divide most of a voltage in the circuit, a divided voltage on the first capacitor is relatively small, the circuit cannot be turned on immediately when the circuit is powered on and jumps, and a voltage at the power output end cannot rise immediately, thereby effectively slowing a rising speed of the voltage at the power output end.
Further, the main control unit may further include: the detection unit is coupled between the power input end and the ground end and is coupled with the switch unit and is suitable for controlling the on and off of the switch unit based on the voltage change of the power input end, the first end of the switch unit is coupled with the power input end, the second end of the switch unit is coupled with the control end of the switch module, the control end of the switch unit is coupled with the detection unit, the first end of the fourth resistor is respectively coupled with the second end of the switch unit and the control end of the switch module, the second end of the fourth resistor is coupled with the detection unit, and the detection unit, the switch unit and the fourth resistor are suitable for controlling the on degree of the switch module according to the change of the voltage of the power input end and the change rate of the voltage of the power input end.
Furthermore, the detection unit may include a fifth resistor and a third capacitor, wherein a first end of the fifth resistor is coupled to the power input end, a second end of the fifth resistor is coupled to the first end of the third capacitor, a first end of the third capacitor is coupled to the second end of the fifth resistor and the control end of the switch unit, respectively, during the power-on process, the third capacitor is charged through the fifth resistor, the power-on speed of the power input end may be detected through the fifth resistor and the third capacitor, and when the voltage at the power input end rises faster, the switch unit is controlled to be turned on, so as to control the turn-on degree of the switch module, and thus, the turn-on time of the switch module may be effectively delayed, and the voltage rise speed of the power output terminal voltage may be slowed down.
Further, the switch unit can include a second field effect transistor or a triode, the field effect transistor is low in cost and long in service life, so that the cost of the whole circuit can be reduced by using the field effect transistor, batch production is facilitated, and the triode is used as the switch unit and can sensitively reflect the power-on rate of the power input end due to the fact that the starting voltage of the triode is usually low.
Furthermore, the negative feedback module may include a fourth capacitor and a fourth resistor, wherein a first end of the fourth capacitor is coupled to the power output end, and a second end of the fourth capacitor is coupled to the control end of the switch module and the first end of the fourth resistor, respectively.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic diagram illustrating a power-on slow start circuit according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a power-on slow start circuit in a specific application scenario according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a power-on slow start circuit in another specific application scenario according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a power-on slow start circuit in another specific application scenario according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a power-on slow start circuit in another specific application scenario according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a power-on slow start circuit in another specific application scenario according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of a power-on slow start circuit in another specific application scenario according to an embodiment of the present invention.
Detailed Description
In the current power supply system, referring to the schematic structural diagrams of the circuits shown in fig. 2 to 7, a voltage stabilizing capacitor C0 for stabilizing voltage is usually externally connected in the circuit, or a capacitor (not shown) may be connected in parallel to a load for stabilizing voltage, because the capacitance value of the voltage stabilizing capacitor C0 is large, the voltage stabilizing capacitor C0 is charged by a power input terminal when the power input terminal is rapidly powered on, and a current I0= (Δ U/Δt) × C0= (dU/dt) × C0) on the voltage stabilizing capacitor C0, when the capacitance value of the voltage stabilizing capacitor C0 is fixed, the larger the voltage change rate is, the larger the generated current I0 is, and when the current I0 is too large, the larger power consumption is caused, and even the damage to components in the circuit is caused.
To the above problem, the embodiment of the utility model provides an in, through coupling in power input end with slowly start movable module between switch module's the control end, and coupling in power output end with negative feedback module between switch module's the control end, control coupling is in the switch module's between power input end and the power output end degree of conducting, thereby realizes control the rate of change of power output end voltage slowly switches on for switch module promptly slow start-up module and negative feedback module control switch module's on-resistance, and then realizes that power output end's voltage slowly rises to reduce the size of the impulse current that produces when the circuit starts, prevent that components and parts in the circuit from damaging.
For a better understanding and enabling disclosure of the embodiments of the present invention to those skilled in the art, the following description of the embodiments of the present invention, together with the drawings, serve to explain the principles and advantages of the embodiments of the present invention.
First, an embodiment of the present invention provides a power-on slow start circuit, which refers to a structural schematic diagram of a power-on slow start circuit shown in fig. 1, where the power-on slow start circuit a includes: switch module A1, slowly start movable module A2 and negative feedback module A3, wherein:
the switch module A1 is coupled between the power input end and the power output end and is suitable for controlling a path between the power input end and the power output end;
the slow start module A2 is coupled between the power supply input end and the control end of the switch module A1;
the negative feedback module A3 is coupled between the power output end and the control end of the switch module A1;
the slow start module A2 and the negative feedback module A3 control the change rate of the voltage Vout at the output end of the power supply by controlling the conduction degree of the switch module A1.
By adopting the power-on slow start circuit, the voltage Vin is input at the power input end, the conduction degree of the switch module A1 is controlled by the slow start module A2 and the negative feedback module A3, so that the change rate of the voltage Vout at the power output end is controlled, namely the size and the change rate of the conduction resistor of the switch module A3 are controlled by the slow start module A2 and the negative feedback module A3, so that the switch module A3 is slowly and completely conducted, the voltage change rate of the power output end is reduced, the size of an impact current generated when the circuit is started is reduced, and the damage of components in the circuit is prevented.
For better understanding and implementation of those skilled in the art, the following describes how the power-up slow start circuit specifically controls the change rate of the voltage at the output end of the power supply and protects components in the circuit from damage by using a specific example.
In specific implementation, the switch module A1 may adopt a first field effect transistor, a first end of which is coupled to the power input end, a second end of which is coupled to the power output end, and a control end of which is coupled to the slow start module A2 and the negative feedback module A3, respectively, so as to be suitable for controlling a path between the power input end and the power output end.
As a specific example, referring to a schematic structural diagram of the power-up slow start circuit in a specific application scenario shown in fig. 2, the switch module A1 may specifically adopt a PMOS transistor P1, a source (S) of the PMOS transistor P1 is coupled to the power input terminal, a drain (D) of the PMOS transistor P1 is coupled to the power output terminal, and a gate (G) of the PMOS transistor P1 is coupled to the slow start module A2 and the negative feedback module A3, respectively, so that when a voltage difference Vsg between the source (S) and the gate (G) of the PMOS transistor P1 reaches a conduction threshold voltage of the PMOS transistor P1, the PMOS transistor P1 starts to be conducted, a path between the power input terminal and the power output terminal is then conducted, and the power output terminal starts to output a voltage Vout.
In a specific implementation, the slow start module A2 may include: main control unit and accuse unit by oneself, wherein:
the main control unit is coupled between the power supply input end and the control end of the switch module A1;
the cooperative control unit is coupled with the control end of the switch module A1 and is suitable for controlling the voltage of the control end of the switch module A1 based on the control signal of the main control unit;
the main control unit and the assistant control unit are suitable for controlling the conduction degree of the switch module A1.
The main control unit outputs different signals according to the voltage change (voltage size and voltage change rate) of the power input end, and the auxiliary control unit controls the conduction degree of the switch module A1 according to the output signal, namely the main control unit and the auxiliary control unit jointly control the conduction degree of the switch module A1, so that the change rate of the output end is controlled.
As a specific example, with continued reference to fig. 2, the master control unit includes: a first capacitor C1; the cooperative control unit includes: a first resistance R1, wherein:
a first end of the first capacitor C1 is coupled to a power input end, and a second end thereof is coupled to the first resistor R1 and the control end of the switch module A1, respectively.
By adopting the slow start module, when a power supply is powered on, the voltage Vin at the input end of the power supply firstly charges the capacitor C1 through the resistor R1, and at the moment, the PMOS tube P1 does not meet the conduction condition. Specifically, the conduction condition of the PMOS transistor P1 is Vg < Vs and Vsg _ P1> Vth _ P1 (where Vg is the gate (G) voltage of the PMOS transistor P1, vs is the source (S) voltage of the PMOS transistor P1, vsg _ P1 is the voltage difference between the source (S) and the gate (G) of the PMOS transistor P1, and Vth _ P1 is the threshold voltage at which the PMOS transistor P1 is turned on), because the charging process of the capacitor C1 needs to be continued for a while, in the period when the voltage at the two ends of the capacitor C1 (i.e., the voltage difference between the source (S) and the gate (G) of the PMOS transistor P1) does not reach Vth _ P1, the PMOS transistor P1 is in the off state and no voltage is output from the power output terminal, when the voltage at the two ends of the capacitor C1 reaches Vth _ P1, that is, the voltage between the source (S) and the gate (G) of the PMOS transistor P1 increases, that is, the conduction resistance of the PMOS transistor P1 gradually decreases until the conduction module is completely slowed down, and the voltage difference between the voltage at the gate (G) of the power supply can be reduced, thereby realizing the startup speed of the PMOS transistor P1 can be reduced, and the startup speed of the power supply can be reduced.
As a specific example, with continued reference to fig. 2, the negative feedback module A3 includes: a second capacitor C2 and a second resistor R2, wherein:
a first end of the second capacitor C2 is coupled to the power output end, and a second end thereof is coupled to the second resistor R2 and the gate of the PMOS transistor P1, respectively.
By adopting the negative feedback module A3, when the power supply is powered on, after the PMOS transistor P1 is turned on, the voltage Vout at the output end of the power supply rises to charge the second capacitor C2, so that the decrease of the gate voltage Vg of the PMOS transistor P1 can be suppressed, that is, the increase rate of the voltage difference Vsg _ P1 between the source (S) and the gate (G) of the PMOS transistor P1 decreases, and therefore, the control of the conduction degree of the PMOS transistor P1 can be realized. After the PMOS tube P1 is conducted, the negative feedback module A3 prolongs the time for completely conducting the PMOS tube P1 by inhibiting the falling rate of the grid voltage Vg of the PMOS tube P1, namely further slowing down the reduction of the complete conducting rate of the PMOS tube P1, thereby reducing the rising speed of the voltage Vout at the output end of the power supply and reducing the impact current when the power supply is started.
By adopting the power-on slow start circuit, when the voltage Vin at the power input end is accessed, the voltage of the source electrode (S) and the voltage of the grid electrode (G) of the PMOS tube P1 are equal to the voltage Vin at the power input end, the voltage difference Vsg _ P1 between the source electrode (S) and the grid electrode (G) of the PMOS tube P1 is 0, and the PMOS tube P1 is in a cut-off state. Vin rises to charge the capacitor C1, a voltage difference between two ends of C1 becomes large, that is, a voltage difference Vsg _ P1 between a source (S) and a gate (G) of the PMOS transistor P1 becomes large, and the PMOS transistor P1 is still in an off state before Vsg _ P1 reaches a turn-on threshold voltage Vth _ P1 of the PMOS transistor P1.
Further, when the voltage across the first capacitor C1 is greater than the threshold voltage Vth _ P1 for turning on the PMOS transistor P1, vsg _ P1> Vth _ P1, and the PMOS transistor P1 starts to be turned on, at this time, since the on-resistance of the PMOS transistor P1 is relatively large, the on-state degree of the PMOS transistor P1 is relatively low. The voltage at the two ends of the first capacitor C1 continues to rise, and the on-resistance of the PMOS tube P1 is reduced, so that the conduction degree of the PMOS tube P1 is increased until the PMOS tube P1 is completely conducted.
Further, after the PMOS transistor P1 starts to be turned on, the voltage Vout at the power output terminal rises to charge the second capacitor C2, so that the falling speed of the gate voltage Vg of the PMOS transistor P1 can be slowed down, that is, the increase rate of the voltage difference Vsg _ P1 between the source (S) and the gate (G) of the PMOS transistor P1 is reduced, thereby controlling the turn-on degree of the PMOS transistor P1, enabling the PMOS transistor P1 to be slowly turned on completely, and reducing the change rate of the voltage Vout at the power output terminal.
In some embodiments of the present invention, in order to further simplify the structure of the circuit, referring to the schematic structural diagram of the power-on slow start circuit in another specific application scenario shown in fig. 3, the main control unit includes: a first capacitor C1; the cooperative control unit comprises: a second resistor R2, wherein:
a first end of the first capacitor C1 is coupled to the power input end, and a second end thereof is coupled to the second resistor R2 and the gate (G) of the PMOS transistor P1, respectively.
The negative feedback module comprises: a second capacitor C2 and a second resistor R2, wherein:
a first end of the second capacitor C2 is coupled to the power output end, and a second end thereof is coupled to the second resistor R2 and the gate of the PMOS transistor P1, respectively.
By adopting the power-on slow start circuit, since the cooperative control unit and the negative feedback module share the second resistor R2, components in the circuit can be reduced, the cost of the circuit can be reduced, the structure of the circuit can be further simplified, and the detection and maintenance of the circuit are facilitated.
In a specific implementation, since a part of current flows to the second capacitor C2 through the first capacitor C1 and flows to the power output terminal in the process of just powering on, it is necessary to ensure that the PMOS transistor P1 does not satisfy the conduction condition in the process of increasing the voltage Vin at the power input terminal, thereby achieving the purpose of slow start.
As a specific example, the capacitance value of the first capacitor C1 may be set to be greater than the capacitance value of the second capacitor C2, and since the capacitance value of the capacitor is larger and the impedance is smaller, the capacitance value of the first capacitor C1 is set to be greater than the capacitance value of the second capacitor C2, so that the divided voltage on the first capacitor C1 is smaller and smaller than the on-state voltage of the PMOS transistor P1, and the voltage difference Vsg _ P1 between the source (S) and the gate (G) of the PMOS transistor P1 cannot reach the threshold voltage Vth _ P1 when the PMOS transistor P1 is turned on, and the PMOS transistor P1 is in the off-state, thereby preventing the problem of too large inrush current caused by too fast rising of the voltage Vout at the output end of the power supply due to instant on of the PMOS transistor P1 at the moment of power-on.
As another specific example, with continued reference to fig. 3, the negative feedback module A3 further comprises: a third resistor R3 coupled between the second capacitor C2 and the second resistor R2;
a first end of the third resistor R3 is coupled to the second capacitor C2, and a second end of the third resistor R3 is coupled to the second resistor R2 and the gate of the PMOS transistor P1, respectively;
the sum of the impedances of the second capacitor C2 and the third resistor R3 is greater than the impedance of the first capacitor C1.
By adopting the negative feedback module A3 in the above embodiment, the third resistor R3 is connected in series to the second capacitor C2, so that the divided voltage of the circuit branch where the second capacitor C2 is located is increased, that is, the divided voltage on the first capacitor C1 is reduced, so that in the process of voltage Vin at the power input end, the voltage difference Vsg _ P1 between the source (S) and the gate (G) of the PMOS transistor P1 cannot reach the threshold voltage Vth _ P1 at which the PMOS transistor P1 is turned on, and the PMOS transistor P1 is in the cut-off state, thereby achieving the purpose of slow start.
In the above embodiment, it is only necessary to ensure that the sum of the impedances of the second capacitor C2 and the third resistor R3 is greater than the impedance of the first capacitor C1, so that the capacitance values of the first capacitor C1 and the second capacitor C2 may be equal, thereby facilitating purchasing of components and reducing the cost of the circuit.
In other embodiments of the present invention, the switch module A1 may further adopt an NMOS transistor.
As a specific example, referring to a schematic structural diagram of a power-on slow start circuit in another specific application scenario shown in fig. 4, the power-on slow start circuit B includes: first resistance R1, first electric capacity C1, second electric capacity C2 and NMOS pipe N1, wherein NMOS pipe N1 constitutes switch module, and first resistance R1 and first electric capacity C1 constitute and slow start module, and first resistance R1 and second electric capacity C2 constitute negative feedback module, and is specific:
a first end of the first resistor R1 is coupled to the power input end, and a second end thereof is coupled to the gate (G) of the NMOS transistor N1;
a first end of the first capacitor C1 is coupled to the second end of the first resistor R1, and a second end thereof is coupled to the source (S) of the NMOS transistor N1;
a first end of the second capacitor C2 is coupled to the second end of the first resistor R1, and a second end thereof is coupled to the drain (D) of the NMOS transistor N1.
The source (S) of the NMOS transistor N1 is coupled to the ground terminal, and is used to control the path between the power input terminal and the power output terminal.
With the power-up slow start circuit described in the above embodiment, since the conduction condition of the NMOS transistor N1 is Vg > Vs and Vgs _ N1> Vth _ N1 (where Vg is the gate (G) voltage of the NMOS transistor N1, vs is the source (S) voltage of the NMOS transistor N1, vgs _ N1 is the voltage difference between the gate (G) and the source (S) of the NMOS transistor N1, and Vth _ N1 is the threshold voltage for turning on the NMOS transistor N1), the NMOS transistor N1 needs to be placed in the circuit loop near the low voltage side (ground side), so that the control over the NMOS transistor N1 can be realized without adding an additional driver, and the specific process of the circuit for realizing the control of the change rate of the voltage at the output end of the power supply can refer to the foregoing embodiment, and will not be described herein.
In a specific implementation, the NMOS transistor N1 may also be placed close to the high voltage side, and in this case, an additional power supply for providing high voltage needs to be connected to the gate of the NMOS transistor N1.
In some embodiments of the present specification, referring to a schematic structural diagram of a power-on slow start circuit in another specific application scenario shown in fig. 5, the power-on slow start circuit T includes: the device comprises a switch module T1, a slow start module T2 and a negative feedback module T3; the switch module T1 uses a PMOS pipe P1, and the slow start module T2 comprises: main control unit and accuse unit by oneself, wherein:
the main control unit includes: a detection unit T21, a switch unit T22; the cooperative control unit includes: a fourth resistor R4, wherein:
the detection unit T21 is coupled between the power input terminal and the ground terminal, and coupled to the switch unit T22, and adapted to control the switch unit T22 to be turned on and off based on a voltage variation of the power input terminal.
The switch unit T22 has a first end coupled to the power input end, a second end coupled to the control end of the switch module T1, and a control end coupled to the detection unit T21.
As a specific example, with reference to fig. 5, the switch unit T22 may adopt a PMOS transistor P2, a source (S) of which is coupled to the power input terminal, a drain (D) of which is coupled to a gate (G) of the PMOS transistor P1, and a gate (G) of which is coupled to the detection unit T21, which is not only beneficial to stable operation of the circuit, but also beneficial to mass production because the field effect transistor has low cost and long service life.
A first end of the fourth resistor R4 is coupled to the second end of the switch unit T22 and the control end of the switch module T1, respectively, and a second end thereof is coupled to the detection unit T21.
The detection unit T21, the switch unit T22 and the fourth resistor R4 are adapted to control the conduction degree of the switch module T1 according to the change of the voltage at the power input terminal and the change rate of the voltage at the power input terminal.
As a specific example, with continued reference to fig. 5, the detection unit T21 includes: a fifth resistor R5 and a third capacitor C3, wherein:
a first end of the fifth resistor R5 is coupled to the power input end, and a second end thereof is coupled to the first end of the third capacitor C3;
a first end of the third capacitor C3 is coupled to the second end of the fifth resistor R5 and the control end of the switch unit T22, respectively.
By adopting the slow start module T2, when a power supply is powered on, the power-on speed of the power supply input end can be detected through the fifth resistor R5 and the third capacitor C3, and when the voltage of the power supply input end rises fast, the PMOS pipe P2 is controlled to be conducted, so that the conduction degree of the PMOS pipe P1 is controlled. Specifically, the change of the voltage Vin at the power input end includes a change speed and a change magnitude, when the voltage Vin at the power input end rises slowly (i.e., the change speed is low), the impedance of the third capacitor C3 is high, the divided voltage on the fifth resistor R5 is correspondingly low, the voltage difference Vsg _ P2 between the source voltage Vs and the gate voltage Vg of the PMOS transistor P2 is low, the threshold voltage Vth _ P2 cannot reach the on-state, the PMOS transistor P2 is not conducted, the PMOS transistor P1 is conducted when the voltage reaches the on-state threshold voltage Vth _ P1 along with the rise of the voltage Vin at the power input end, and a large impact current cannot be generated along with the continuous rise of the voltage Vin at the power input end until the complete conduction, at this time, because the power-on rate of the system is low.
When the voltage Vin at the power input end rises faster (i.e. the change speed is high), the voltage difference Vsg _ P2 between the source voltage Vs and the gate voltage Vg of the PMOS transistor P2 is equal to the divided voltage of the fifth resistor R5, and the PMOS transistor P2 switches the state according to whether the divided voltage of the fifth resistor R5 reaches the threshold voltage Vth _ P2 of the turn-on state. Specifically, in the process of the voltage Vin at the power input end rising, the current passes through R5 and C3, and a divided voltage is generated on R5, when the divided voltage on R5 reaches a threshold voltage Vth _ P2 for turning on the PMOS transistor P2, the PMOS transistor P2 is turned on, at this time, the drain voltage Vd of the PMOS transistor P2 is equal to the source voltage Vs and is equal to the voltage Vin at the power input end, because the drain (D) of the PMOS transistor P2 is connected to the gate (G) of the PMOS transistor P1, the gate voltage Vg of the PMOS transistor P1 is also equal to the voltage Vin at the power input end, the voltage difference Vsg _ P1 between the source voltage Vs and the gate voltage Vg of the PMOS transistor P1 is 0, and the PMOS transistor P1 is still in the off state.
When the voltage Vin at the power input end rises to the maximum value and is kept, the voltage at the two ends of the third capacitor C3 gradually increases to Vin, the divided voltage on the resistor R5 decreases to 0, that is, the voltage difference Vsg _ P2 between the source voltage Vs and the gate voltage Vg of the PMOS transistor P2 gradually decreases, the conduction degree of the PMOS transistor P2 gradually decreases, and when Vsg _ P2 is smaller than the threshold voltage Vth _ P2 for turning on the PMOS transistor P2, the PMOS transistor P2 is turned off. When the PMOS tube P2 is cut off, the drain voltage Vd of the PMOS tube P2 is gradually reduced to 0, the voltage difference Vsg _ P1 between the source voltage Vs and the gate voltage Vg of the PMOS tube P1 is gradually increased, the PMOS tube P1 is gradually conducted, and when the PMOS tube P2 is completely cut off, the PMOS tube P1 is completely conducted, so that the rising speed of the voltage Vout at the output end of the power supply is reduced, and the impact current of the power supply during starting is reduced.
In a specific implementation, with continued reference to fig. 5, the negative feedback module T3 may include: a fourth capacitor C4 and the fourth resistor R4, wherein:
a first end of the fourth capacitor C4 is coupled to the power output end, and a second end thereof is coupled to the control end of the switch module T1 and the first end of the fourth resistor R1, respectively.
By adopting the negative feedback module T3 in the above embodiment, when the power supply is powered on, after the PMOS transistor P1 is turned on, the voltage Vout at the output end of the power supply rises to charge the fourth capacitor C4, so that the gate voltage Vg of the PMOS transistor P1 can be suppressed from decreasing, that is, the voltage difference Vsg _ P1 between the source (S) and the gate (G) of the PMOS transistor P1 is slowly increased, and thus the conduction degree of the PMOS transistor P1 can be controlled. After the PMOS tube P1 is conducted, the negative feedback module T3 increases the time for completely conducting the PMOS tube P1 by inhibiting the falling rate of the gate voltage Vg of the PMOS tube P1, namely further slowing down the reduction of the complete conducting rate of the PMOS tube P1, thereby reducing the rising speed of the voltage Vout at the output end of the power supply and reducing the impact current when the power supply is started.
By adopting the power-on slow start circuit T in the embodiment, the rising speed of the voltage Vin at the power input end is detected by the detection unit T21, and when the voltage Vin at the power input end rises slowly, large impact current cannot be generated; when the voltage Vin at the power input end rises quickly, the detection unit T21 controls the switch-on and switch-off of the switch unit T22 in response to the change of the voltage Vin at the power input end, and further controls the opening degree (on-resistance) of the switch module P1 through the fourth resistor R4, that is, the slow-start module T2 composed of the detection unit T21, the switch unit T22 and the fourth resistor R4 prolongs the time for the switch module T1 to be completely turned on, thereby reducing the rising rate of the voltage Vout at the power output end and reducing the impact current generated when the power supply is started. Furthermore, a fourth capacitor C4 and a fourth resistor R4 form a negative feedback module T3, which further prolongs the time for the switch module T1 to be completely turned on, further reduces the rising rate of the voltage Vout at the output end of the power supply, and reduces the inrush current generated when the power supply is started.
As another specific example, referring to the schematic structural diagram of the power-up slow start circuit in another specific application scenario shown in fig. 6, the switching unit T22 may also employ a PNP transistor Q1, an emitter (e) of which is coupled to the power input terminal, a collector (c) of which is coupled to the gate (G) of the PMOS transistor P1, and a base (b) of which is coupled to the detection unit T21, because the on voltage of the transistor is usually small, the transistor is used as the switching unit, and the voltage change speed of the power input terminal can be reflected more accurately.
By adopting the power-on slow start circuit T in the above embodiment, when the power supply is powered on, the power-on speed of the power supply input end can be detected through the fifth resistor R5 and the third capacitor C3, and when the voltage of the power supply input end rises faster, the triode Q1 is controlled to be conducted, so that the conduction degree of the PMOS transistor P1 is controlled. Specifically, when the voltage Vin at the power input end rises slowly (i.e. the change speed is low), the impedance of the third capacitor C3 is high, the divided voltage on the fifth resistor R5 is correspondingly low, the voltage difference Veb between the emitter (e) and the base (b) of the triode Q1 is low, and the threshold voltage Veb _ Q1 of the transistor Q1 cannot reach the threshold voltage Veb _ Q1 of the transistor on, at this time, the source voltage Vs of the PMOS transistor P1 is equal to the voltage Vin at the power input end, the gate voltage Vg of the PMOS transistor P1 is 0, the voltage difference Vsg _ P1 between the source voltage Vs and the gate voltage Vg of the PMOS transistor P1 is equal to the voltage Vin at the power input end, vsg _ P1 gradually increases along with the rise of the voltage Vin at the power input end, when Vin > Vth _ P1 is turned on, at this time, the conduction degree of the PMOS transistor P1 is low due to the high on resistance of the PMOS transistor P1, and as the voltage at the power input end continues to rise of the Vin, the PMOS transistor P1 gradually increases until the power is completely turned on, and at this time, a high impact current cannot be generated.
When the voltage Vin at the power input end rises quickly (i.e. the change speed is high), the voltage Vin at the power input end charges the third capacitor C3 through the fifth resistor R5, the voltage Ve of the emitter of the triode Q1 is equal to the voltage Vin at the power input end, the voltage difference Veb between the emitter (e) and the base (b) of the triode Q1 is equal to the divided voltage of the fifth resistor R5, when Vin rises quickly, ve > Vb > Vc > Veb _ Q1 of the triode Q1, (where Ve is the emitter voltage of the triode Q1, vb is the base voltage of the triode Q1, vc is the collector voltage of the triode Q1), the triode Q1 is turned on, at this time, the emitter voltage Ve of the triode Q1 is equal to the voltage Vin at the power input end, the collector voltage Vc of the triode Q1 is equal to the emitter voltage Ve, since the drain (D) of the PMOS transistor P2 is connected to the collector (C) of the triode Q1, vg, the gate voltage Vs _ P1 is still in a cut-off state, and the voltage difference between the source voltage Vs and the gate voltage of the PMOS transistor P1 is still about 0 g.
Further, when the voltage Vin at the power input terminal rises to the maximum and is maintained, the voltage across the third capacitor C3 gradually increases to Vin, the divided voltage across the resistor R5 decreases to 0, that is, the voltage difference Veb between the emitter (e) and the base (b) of the transistor Q1 gradually decreases, and when Veb is smaller than the threshold voltage Veb _ Q1 at which the transistor Q1 is turned on, the transistor Q1 is turned off.
Further, when the triode Q1 is turned off, the collector voltage Vc of the triode Q1 is gradually reduced to 0, because the collector (c) of the triode Q1 is coupled to the gate (G) of the PMOS transistor P1, the gate voltage Vg of the PMOS transistor P1 is also gradually reduced to 0, the voltage difference Vsg _ P1 between the source voltage Vs and the gate voltage Vg of the PMOS transistor P1 is gradually increased, the PMOS transistor P1 is gradually turned on, and when the triode Q1 is completely turned off, the PMOS transistor P1 is completely turned on.
Further, after the PMOS transistor P1 is turned on, the drain voltage Vd of the PMOS transistor P1 gradually increases to charge the fourth capacitor C4, so as to suppress a decrease in the gate voltage Vg of the PMOS transistor P1, that is, suppress an increase in the voltage difference Vsg _ P1 between the source voltage Vs and the gate voltage Vg of the PMOS transistor P1, thereby realizing control of the degree of conduction of the PMOS transistor P1 and reducing the rate of change of the power output terminal voltage Vout.
In other embodiments of the present invention, the switch module T1 may further adopt an NMOS transistor.
As a specific example, referring to a schematic structural diagram of a power-on slow start circuit in another specific application scenario shown in fig. 7, the power-on slow start circuit Y includes: a fourth resistor R4, a fifth resistor R5, a third capacitor C3, a fourth capacitor C4, an NPN type triode Q2 and an NMOS transistor N1, wherein the NMOS transistor N1 constitutes a switch module T1, the fifth resistor R5 and the third capacitor C3 constitute a detection unit T21, the NPN type triode Q2 constitutes a switch unit T22, the fourth resistor R4 constitutes a cooperative control unit, and the fourth resistor R4 and the fourth capacitor C4 constitute a negative feedback module T3, specifically, wherein:
the first end of the fourth resistor R4 is coupled to the power input end, and the second end thereof is coupled to the gate (G) of the NMOS transistor N1.
A first end of the fourth capacitor C4 is coupled to the second end of the fourth resistor R4, and a second end thereof is coupled to the drain (D) of the NMOS transistor N1.
A first end of the third capacitor C3 is coupled to the power input end, and a second end thereof is coupled to the fifth resistor R5.
A first end of the fifth resistor R5 is coupled to the second end of the third capacitor C3, and a second end thereof is coupled to a ground end.
The NPN transistor Q2 has a collector (C) coupled to the second end of the fourth resistor R4, an emitter (e) coupled to the source (S) of the NMOS transistor N1, and a base (b) coupled between the third capacitor C3 and the fifth resistor R5.
With the power-on slow start circuit of the above embodiment, since the conduction condition of the NMOS transistor is Vg > Vs and Vgs _ N1> Vth _ N1 (where Vg is the gate (G) voltage of the NMOS transistor N1; vs is the source (S) voltage of the NMOS transistor N1, vgs _ N1 is the voltage difference between the gate (G) and the source (S) of the NMOS transistor N1, and Vth _ N1 is the threshold voltage for turning on the NMOS transistor N1), the NMOS transistor N1 needs to be placed close to the low-voltage side (ground side), so that the NMOS transistor N1 can be controlled under the condition that the voltage Vin at the power input terminal is small; the conduction condition of the NPN type triode Q2 is Vc > Vb > Ve, and Vbe > Vbe _ Q2; the specific process of the circuit for controlling the change rate of the voltage at the output end of the power supply can be referred to the foregoing embodiments, and will not be described herein.
In a specific implementation, the NMOS transistor N1 may also be placed close to the high voltage side, and in this case, an additional power supply for providing high voltage needs to be connected to the gate of the NMOS transistor N1.
In specific implementation, the embodiment of the present invention does not limit the combination relationship of different embodiments between modules, and different embodiments of different modules may be combined arbitrarily.
In addition, the embodiment of the utility model provides a still provides a chip, can integrate on the chip and go up the electric slow start circuit in any one of the aforesaid embodiment.
Furthermore, the embodiment of the utility model provides a laser radar is still provided, laser radar can adopt arbitrary one kind to go up electric slow start circuit in the foregoing embodiment.
In specific implementation, in the power-on process, the power-on slow start circuit can control the change rate of the voltage at the output end of the power supply, so that the generation of large impact current in the power-on process can be avoided, and the use safety of the laser radar is guaranteed.
It should be noted that, in the embodiment of the present invention, the terms "first" and "second" are only used for distinguishing and describing, and no limitation is made to the model of the component.
Although the embodiments of the present invention have been disclosed, the present invention is not limited thereto. Various changes and modifications may be effected therein by one of ordinary skill in the pertinent art without departing from the scope or spirit of the present invention, and the scope of the present invention is defined by the appended claims.
Claims (14)
1. A power-on slow start circuit, comprising: switch module, slow start module and negative feedback module, wherein:
the switch module is coupled between the power input end and the power output end and is suitable for controlling a path between the power input end and the power output end;
the slow starting module is coupled between the power supply input end and the control end of the switch module;
the negative feedback module is coupled between the power output end and the control end of the switch module;
the slow start module and the negative feedback module control the change rate of the voltage at the output end of the power supply by controlling the conduction degree of the switch module.
2. The circuit of claim 1, wherein the switch module comprises: a first field effect transistor having a first end coupled to the power input end, a second end coupled to the power output end, and a control end coupled to the slow start module and the negative feedback module, respectively.
3. The circuit of claim 1, wherein the soft start module comprises: main control unit and accuse unit by oneself, wherein:
the main control unit is coupled between the power supply input end and the control end of the switch module;
the coordination control unit is coupled with the control end of the switch module and is suitable for controlling the voltage of the control end of the switch module based on the control signal of the main control unit;
the main control unit and the assistant control unit are suitable for controlling the conduction degree of the switch module.
4. The circuit of claim 3, wherein the master unit comprises: a first capacitor; the cooperative control unit includes: a first resistance, wherein:
the first capacitor has a first end coupled to the power input end and a second end coupled to the first resistor and the control end of the switch module, respectively.
5. The circuit of claim 4, wherein the negative feedback module comprises: a second capacitance and a second resistance, wherein:
the first end of the second capacitor is coupled to the power output end, and the second end of the second capacitor is coupled to the second resistor and the control end of the switch module respectively.
6. The circuit of claim 3, wherein the master unit comprises: a first capacitor; the cooperative control unit includes: a second resistance, wherein:
the first end of the first capacitor is coupled to a power input end, and the second end of the first capacitor is coupled to the second resistor and the control end of the switch module respectively;
the negative feedback module comprises: a second capacitance and a second resistance, wherein:
the first end of the second capacitor is coupled to the power output end, and the second end of the second capacitor is coupled to the second resistor and the control end of the switch module respectively.
7. The circuit of claim 5 or 6, wherein the capacitance of the first capacitor is greater than the capacitance of the second capacitor.
8. The circuit of claim 5 or 6, wherein the negative feedback module further comprises: a third resistor coupled between the second capacitor and the second resistor;
a first end of the third resistor is coupled to the second capacitor, and a second end of the third resistor is coupled to the second resistor and the control end of the switch module respectively;
the sum of the impedances of the second capacitor and the third resistor is greater than the impedance of the first capacitor.
9. The circuit of claim 3, wherein the master unit comprises: a detection unit and a switch unit; the cooperative control unit includes: a fourth resistance, wherein:
the detection unit is coupled between the power input end and the ground end, is coupled with the switch unit, and is suitable for controlling the switch unit to be switched on and off based on the voltage change of the power input end;
the first end of the switch unit is coupled to the power input end, the second end of the switch unit is coupled to the control end of the switch module, and the control end of the switch unit is coupled to the detection unit;
the first end of the fourth resistor is respectively coupled to the second end of the switch unit and the control end of the switch module, and the second end of the fourth resistor is coupled to the detection unit;
the detection unit, the switch unit and the fourth resistor are suitable for controlling the conduction degree of the switch module according to the change of the voltage of the power input end and the change rate of the voltage of the power input end.
10. The circuit of claim 9, wherein the detection unit comprises: a fifth resistor and a third capacitor, wherein:
a first end of the fifth resistor is coupled to the power input end, and a second end of the fifth resistor is coupled to the first end of the third capacitor;
and a first end of the third capacitor is coupled to the second end of the fifth resistor and the control end of the switch unit respectively.
11. The circuit of claim 9, wherein the switching unit comprises: a second field effect transistor or a triode.
12. The circuit of claim 9, wherein the negative feedback module comprises: a fourth capacitance and the fourth resistance, wherein:
the first end of the fourth capacitor is coupled to the power output end, and the second end of the fourth capacitor is coupled to the control end of the switch module and the first end of the fourth resistor respectively.
13. A chip, comprising: a power-up slow start circuit as claimed in any one of claims 1 to 12.
14. A lidar circuit wherein the lidar circuit of any of claims 1-12 is employed.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116364130A (en) * | 2023-03-29 | 2023-06-30 | 珠海妙存科技有限公司 | eMMC time-delay starting circuit and method |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116364130A (en) * | 2023-03-29 | 2023-06-30 | 珠海妙存科技有限公司 | eMMC time-delay starting circuit and method |
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