CN216262100U - Edge-emitting semiconductor laser chip test system - Google Patents

Abstract

The utility model relates to a side-emitting semiconductor laser chip testing system which comprises a feeding area, a blanking area, a testing area and a material taking mechanism, wherein the testing area comprises a plurality of testing loading platforms, the material taking mechanism comprises a plurality of material taking heads and rotating shafts for driving the material taking heads to rotate, the feeding area, the blanking area and the testing loading platforms are arranged around the rotating shafts, the surrounding direction of the feeding area, the surrounding direction of the blanking area and the testing loading platforms is consistent with the rotating direction of the rotating shafts, and the testing loading platforms are positioned on the surrounding path between the feeding area and the blanking area. According to the utility model, through the surrounding layout, the actions of feeding, testing and discharging can be completed by rotating the rotating shaft, and excessive bypassing operation paths are avoided, so that the volume of the system is greatly reduced, and the floor area is reduced; the chip is synchronously carried, and the chip carrying time is shortened. And the test under different temperature conditions can be completed under the configuration of multiple stages according to the configuration of stages with different sizes.

Description

Edge-emitting semiconductor laser chip test system

Technical Field

The utility model relates to the technical field of chip testing, in particular to a chip testing system of an edge-emitting semiconductor laser.

Background

With the promotion of novel applications such as cloud computing, mobile internet, internet of things and three-network integration on bandwidth requirements, the optical communication market enters a high-speed development period. The edge-emitting semiconductor laser chip is one of the cores of the optical communication emitter device and has an important strategic position. At present, after all edge-emitting semiconductor laser wafers are manufactured, rear-end processes such as cleavage, film coating and singulation are required to obtain a single chip, and each chip needs to be tested and screened for photoelectric performance, so that the time cost consumed by testing each chip becomes one of the main bottlenecks of the rear end of the manufactured chip. From the conventional test system, each chip to be tested needs to be transported to the test carrier through the suction nozzle for conducting a centering test, and then is placed in a grading manner according to the program setting and the test result, wherein the transportation and centering of the chip takes a lot of time for testing the chip, and the production efficiency is affected.

For a traditional test system, 2 test carriers with different temperatures are generally carried, and 2 to 3 suction nozzles are matched to carry modules; the structure can only be carried among 2 stations in the feeding area, the first testing station, the second testing station and the blanking area at the same time, and a great deal of time is consumed in chip carrying.

Secondly, traditional test system all generally adopts the parallel structure, and material loading district, test station one, test station two, unloading district level are progressively distributed promptly, and equipment can carry on two and more motor motors to drive the suction nozzle motion moreover, and this kind of parallel structure has leaded to equipment to have great area, and the use of a plurality of motor motors and big equipment area cause equipment to have higher cost of manufacture.

SUMMERY OF THE UTILITY MODEL

The utility model aims to provide a testing system of an edge-emitting semiconductor laser chip, which can at least solve part of defects in the prior art.

In order to achieve the above purpose, the embodiments of the present invention provide the following technical solutions: a side-emitting semiconductor laser chip testing system comprises a feeding area, a discharging area, a testing area and a material taking mechanism, wherein the testing area comprises a plurality of testing loading platforms, the material taking mechanism comprises a plurality of material taking heads and a rotating shaft for driving the material taking heads to rotate, the feeding area, the discharging area and the testing loading platforms are arranged around the rotating shaft, the surrounding direction of the feeding area, the surrounding direction of the discharging area and the surrounding direction of the testing loading platforms are consistent with the rotating direction of the rotating shaft, the testing loading platforms are located on the surrounding path between the feeding area and the discharging area, and the total number of the feeding area, the discharging area and the testing loading platforms is the same as the number of the material taking heads and are configured in a one-to-one correspondence manner.

Furthermore, the total number of the feeding area, the blanking area and the test carrying platforms is the same as the number of the material taking heads, and the material taking heads are arranged in a one-to-one correspondence manner.

Furthermore, each get the stub bar and all include suction nozzle and dead lever, the one end of dead lever is installed in the pivot, the suction nozzle is installed the other end of dead lever is served.

Further, the feeding area comprises a feeding area wafer expanding ring carrying platform and a feeding area wafer expanding ring arranged on the feeding area wafer expanding ring carrying platform, and the chip to be tested is arranged on the feeding area wafer expanding ring.

Further, the feeding area wafer expanding ring carrying platform is provided with a feeding area X-direction transmission shaft and a feeding area Y-direction transmission shaft.

Furthermore, each test carrying platform is provided with a carrying position, a test position and a guide seat capable of guiding the chip to be tested, the carrying position and the test position are arranged side by side, and the guide seat can move back and forth between the carrying position and the test position.

Further, the blanking area comprises a blanking area wafer expanding ring carrying platform and a blanking area wafer expanding ring arranged on the blanking area wafer expanding ring carrying platform, and the detected chip is placed on the blanking area wafer expanding ring.

Furthermore, the number of the blanking area wafer expanding rings on the blanking area is multiple, and each blanking area wafer expanding ring is used for accommodating chips of different grades.

Further, an NG barrel is further arranged on the blanking area wafer expanding ring carrying platform.

The test platform is characterized by further comprising test probes for testing the chips to be tested on the test platform deck, wherein the number of the test probes is the same as that of the test platform deck and the test probes are configured in a one-to-one correspondence manner.

Compared with the prior art, the utility model has the beneficial effects that: through the surrounding layout, the rotating shaft rotates to complete the actions of feeding, testing and discharging, too many bypassing operation paths are avoided, the volume of the system can be greatly reduced, and the occupied area is reduced; the chip can be carried synchronously, and the chip carrying time is greatly shortened; the chip can be conducted with the actions of guiding, testing and carrying at the same time, and the testing efficiency of the chip is improved. And the test under different temperature conditions can be completed under the configuration of multiple stages according to the configuration of stages with different sizes.

Drawings

Fig. 1 is a schematic diagram of a system for testing an edge-emitting semiconductor laser chip according to an embodiment of the present invention;

fig. 2 is a schematic view of a material taking mechanism of an edge-emitting semiconductor laser chip testing system according to an embodiment of the present invention;

fig. 3 is a schematic diagram of a loading area of an edge-emitting semiconductor laser chip testing system according to an embodiment of the present invention;

fig. 4 is a schematic diagram of a test stage No. 1 of an edge-emitting semiconductor laser chip test system according to an embodiment of the present invention;

fig. 5 is a schematic diagram of a test stage No. 2 of an edge-emitting semiconductor laser chip test system according to an embodiment of the present invention;

fig. 6 is a schematic diagram of a blanking region of an edge-emitting semiconductor laser chip test system according to an embodiment of the present invention;

reference mark middle-1-feeding area wafer expanding ring carrying platform; 2-expanding a crystal ring in a feeding area; 3-a feeding area X-direction transmission shaft; 4-a Y-direction transmission shaft in the feeding area; no. 5-1 test stage; test stage carrying position No. 6-1; test station of test platform deck No. 7-1; no. 8-2 test platform deck; a test stage carrying position No. 9-2; test station of test platform table No. 10-2; 11-a crystal expansion ring carrying platform in a blanking area; 12-a feeding area X-direction transmission shaft; 13-a Y-direction transmission shaft in the blanking area; 14-a first blanking region wafer expanding ring; 15-a second blanking area wafer expanding ring; 16-a third blanking area wafer expanding ring; 17-a fourth blanking area wafer expanding ring; 18-NG bucket; 19-a rotating shaft; 20-a first fixing bar; 21-a first suction nozzle; 22-a second fixation bar; 23-a second suction nozzle; 24-a third fixation bar; 25-a third suction nozzle; 26-a fourth fixing bar; 27-a fourth suction nozzle; 28-CCD lens; test platform test probe No. 29-1; test stage test probe No. 30-2.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Referring to fig. 1 to 6, an embodiment of the present invention provides a side-emitting semiconductor laser chip testing system, which includes a feeding area, a discharging area, a testing area, and a material taking mechanism, where the testing area includes a plurality of testing carriers, the material taking mechanism includes a plurality of material taking heads and a rotating shaft 19 for driving each material taking head to rotate, the feeding area, the discharging area, and each testing carrier are arranged around the rotating shaft 19, a surrounding direction of the feeding area, the discharging area, and each testing carrier is consistent with a rotating direction of the rotating shaft 19, each testing carrier is located on a surrounding path between the feeding area and the discharging area, and a combined number of the feeding area, the discharging area, and each testing carrier is the same as a number of the material taking heads and is configured in a one-to-one correspondence. In this embodiment, through the surrounding layout, the rotation of the rotating shaft 19 can complete the actions of feeding, testing and discharging, and there are no excessive detour operation paths, so that the volume of the system can be greatly reduced, and the floor area can be reduced; the chip can be carried synchronously, and the chip carrying time is greatly shortened; the chip can be conducted with the actions of guiding, testing and carrying at the same time, and the testing efficiency of the chip is improved. Specifically, the positions of a feeding area, a blanking area, a material taking mechanism and a plurality of test carrying platforms are arranged in advance, so that the feeding area, the blanking area and each test carrying platform are arranged around a rotating shaft 19, and the rotating shaft 19 drives a plurality of material taking heads of the material taking mechanism to rotate; placing a chip to be tested in a feeding area, and identifying and correcting the chip in the feeding area; the material taking head of the material taking mechanism takes out the identified and corrected chip from the material loading area and puts the chip on a first test platform deck adjacent to the material loading area to perform a primary photoelectric performance test; after the test is finished, the material taking head takes out the tested chip from the first test carrier, the rotating shaft 19 rotates, the material taking head puts the chip into the next test carrier to perform a photoelectric performance test again, meanwhile, the other material taking head takes out the other identified and corrected chip from the feeding area and puts the other identified and corrected chip into the test carrier which is left empty after the step S3 to perform a photoelectric performance test; and repeating the step S3 and the step S4, wherein each chip is subjected to the photoelectric performance test of all test carrying platforms, and is placed into the blanking area by the material taking head until the test of all chips to be tested on the feeding area is completed. In this embodiment, two test stages are shown, the batch of chips only needs to be tested twice, the test conditions of the two test stages are different, and for convenience, the two test stages may be defined as test stage No. 15 and test stage No. 28, respectively. In addition, in actual operation, a larger number of test stages can be arranged, the test stages can still be arranged around the circular ring, too much space is not occupied, the expansibility is extremely high, and the test can be performed only in sequence according to the steps, for example, in the case of four test stages, the test stages include a feeding area, a discharging area and four test stages, the six working positions are provided in total, six material taking heads are provided, the six material taking heads can repeatedly act on the feeding area, the discharging area and the four test stages through a rotating mode, the rotation of the rotating shaft 19 can be controlled by a timer, namely the rotating shaft stops for a period of time after being rotated in place, and the chip taking heads take out chips and transfer the chips to the next process after the current operation is finished (namely the feeding area, the discharging area and the test stages). The whole process is coherent and smooth, time delay is avoided, and preferably, the material taking heads are synchronous to move up and down, namely material taking and material discharging are carried out simultaneously, so that the control is convenient, and the working efficiency is improved.

As an optimized scheme of the embodiment of the present invention, please refer to fig. 1 to 6, each of the material taking heads includes a suction nozzle and a fixed rod, one end of the fixed rod is installed on the rotating shaft 19, and the suction nozzle is installed on the other end of the fixed rod. In this embodiment, the material taking method may be a suction nozzle suction method, for example, a vacuum suction method, each suction nozzle corresponds to one working position, the fixing rod is used to connect the suction nozzle and the rotating shaft 19, as shown in fig. 1, in the case of four working positions, four suction nozzles and four fixing rods are provided, which are respectively a first fixing rod 20, a first suction nozzle 21, a second fixing rod 22, a second suction nozzle 23, a third fixing rod 24, a third suction nozzle 25, a fourth fixing rod 26 and a fourth suction nozzle 27, and each working position is acted on by each of the four suction nozzles during the rotation process. Preferably, the driving force is given by a motor which drives the rotation shaft 19 in rotation.

As an optimization scheme of the embodiment of the present invention, please refer to fig. 1 to 6, where the feeding area includes a feeding area wafer expanding ring carrying platform 1 and a feeding area wafer expanding ring 2 arranged on the feeding area wafer expanding ring carrying platform 1, and the chip to be tested is arranged on the feeding area wafer expanding ring 2. In this embodiment, the chip that awaits measuring can be located on the crystalline ring 2 is expanded to the material loading district, and a plurality of chips that await measuring can be settled to crystalline ring 2 is expanded to the material loading district, absorb and carry to next station one by the suction nozzle.

In order to further optimize the above scheme, referring to fig. 1 to 6, the loading area wafer expanding ring carrying platform 1 has a loading area X-direction transmission shaft 3 and a loading area Y-direction transmission shaft 4. In this embodiment, the loading area wafer expanding ring carrier 1 is movable to match with the suction nozzle to suck the chip. The feeding area is moved through a motor and a slide rail, and a chip to be tested on the wafer expanding ring is conveyed to the test carrying platform by matching with the suction nozzle.

As an optimized solution of the embodiment of the present invention, please refer to fig. 1 to 6, each of the test stages has a carrying position, a test position, and a guiding seat capable of guiding a chip to be tested, the carrying position and the test position are arranged side by side, and the guiding seat can move back and forth between the carrying position and the test position. In this embodiment, the test stage has a guiding seat thereon, and when the suction nozzle puts the chip into the guiding seat, the guiding seat can guide the chip, and then the test stage can move as shown by the arrow in fig. 1 to move back and forth between the carrying position and the test position. The test carrying platforms can test the photoelectric performance of the chip at different temperatures according to program setting. The transport position and the test position on test stage No. 1 may be defined as test stage transport position No. 16 and test stage test position No. 17, respectively, and the transport position and the test position on test stage No. 2 may be defined as test stage transport position No. 2 and test stage test position No. 2 10, respectively.

As an optimization scheme of the embodiment of the present invention, please refer to fig. 1 to 6, where the blanking area includes a blanking area wafer expanding ring carrying platform 11 and a blanking area wafer expanding ring arranged on the blanking area wafer expanding ring carrying platform 11, and the detected chip is placed on the blanking area wafer expanding ring. In this embodiment, the unloading area is similar to the loading area, and it also has a wafer expanding ring for placing the tested chip. Preferably, a plurality of die-expanding rings can be arranged on the die-expanding ring carrier 11 in the blanking area as required for placing chips of different grades, for example, four die-expanding rings in the blanking area, such as the first die-expanding ring 14, the second die-expanding ring 15, the third die-expanding ring 16, and the fourth die-expanding ring 17, can be arranged for dividing into four grades, and certainly, a larger number of die-expanding rings can be arranged, in addition, an NG bucket 18 can be arranged for recovering unqualified chips, that is, qualified chips are placed in different grades according to program setting and test results of the chips, and unqualified chips are placed in an unqualified chip recovery bucket. The blanking area can also move, and is realized by a blanking area X-direction transmission shaft 12 and a blanking area Y-direction transmission shaft 13.

As an optimization scheme of the embodiment of the present invention, please refer to fig. 1 to 6, the system further includes test probes for testing the chip to be tested on the test carrier, and the number of the test probes is the same as that of the test carrier and is configured in a one-to-one correspondence manner. In this embodiment, the test probes are pressed down onto the test carriers for testing, and the number of the test probes is the same as that of the test carriers, so that each test carrier can be tested. For ease of description herein, the two test probes may be defined as test stage No. 1 test probe 29 and test stage No. 2 test probe 30.

As an optimization scheme of the embodiment of the present invention, please refer to fig. 1 to 6, the system further includes CCD lenses 28 for testing, and the number of the CCD lenses 28 is the same as the number of the test stages and is configured in a one-to-one correspondence manner. In this embodiment, the CCD lens 28 is used for recognition correction.

The embodiment of the utility model provides a method for testing a chip of an edge-emitting semiconductor laser, which comprises the following steps: s1, arranging positions of a feeding area, a blanking area, a material taking mechanism and a plurality of test carrying platforms in advance, enabling the feeding area, the blanking area and the test carrying platforms to be arranged around a rotating shaft 19, enabling the rotating shaft 19 to drive a plurality of material taking heads of the material taking mechanism to rotate, S2, placing a chip to be tested in the feeding area, and identifying and correcting the chip in the feeding area; s3, the material taking head of the material taking mechanism takes out the identified and corrected chip from the material loading area and puts the chip on a first test carrying platform adjacent to the material loading area to carry out a photoelectric performance test; s4, after the test is finished, the material taking head takes out the tested chip from the first test carrier, the rotating shaft 19 rotates, the material taking head puts the chip on the next test carrier to perform a photoelectric performance test, meanwhile, the other material taking head takes out the other identified and corrected chip from the material loading area and puts the other identified and corrected chip on the test carrier which is left empty after the step S3 to perform a photoelectric performance test; and S5, repeating the step S3 and the step S4, wherein each chip is subjected to the photoelectric performance test of all test carrying platforms, and is placed in the blanking area by the material taking head until the test of all chips to be tested on the feeding area is completed. In this embodiment, through the surrounding layout, the rotation of the rotating shaft 19 can complete the actions of feeding, testing and discharging, and there are no excessive detour operation paths, so that the volume of the system can be greatly reduced, and the floor area can be reduced; the chip can be carried synchronously, and the chip carrying time is greatly shortened; the chip can be conducted with the actions of guiding, testing and carrying at the same time, and the testing efficiency of the chip is improved. The test under different temperature conditions can be completed under the configuration of multiple stages according to the configuration of stages with different sizes.

Further optimizing the above scheme, please refer to fig. 1 to 6, the NG barrel 18 and the plurality of blanking area wafer expanding rings are arranged on the blanking area according to the grading, and the chips are placed at the corresponding positions according to the grading according to the test result of the tested chips. A plurality of die-expanding rings can be arranged on the die-expanding ring carrier 11 of the blanking area as required for placing chips of different grades, for example, four die-expanding rings of the blanking area, such as a first die-expanding ring 14 of the blanking area, a second die-expanding ring 15 of the blanking area, a third die-expanding ring 16 of the blanking area, and a fourth die-expanding ring 17 of the blanking area, can be arranged for dividing into four grades, and certainly, more die-expanding rings can be arranged, in addition, an NG bucket 18 can be arranged for recycling unqualified chips, that is, qualified chips are placed in different grades and unqualified chips are placed in an unqualified chip recycling bucket according to program setting and test results of the chips.

Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the utility model, the scope of which is defined in the appended claims and their equivalents.

Claims (10)

1. The utility model provides an edge-emitting semiconductor laser chip test system which characterized in that: the material loading and unloading device comprises a material loading area, a material unloading area, a testing area and a material taking mechanism, wherein the testing area comprises a plurality of testing loading platforms, the material taking mechanism comprises a plurality of material taking heads and a rotating shaft used for driving the material taking heads to rotate, the material loading area, the material unloading area and the testing loading platforms are arranged around the rotating shaft, the surrounding direction of the material loading area, the material unloading area and the testing loading platforms is consistent with the rotating direction of the rotating shaft, and the testing loading platforms are located on the surrounding path between the material loading area and the material unloading area.

2. An edge-emitting semiconductor laser chip test system as claimed in claim 1 wherein: the total number of the feeding area, the blanking area and the test carrying platforms is the same as that of the material taking heads, and the material taking heads are arranged in a one-to-one corresponding mode.

3. An edge-emitting semiconductor laser chip test system as claimed in claim 1 wherein: each get stub bar and all include suction nozzle and dead lever, the one end of dead lever is installed in the pivot, the suction nozzle is installed on the other end of dead lever.

4. An edge-emitting semiconductor laser chip test system as claimed in claim 1 wherein: the feeding area comprises a feeding area wafer expanding ring carrying platform and a feeding area wafer expanding ring arranged on the feeding area wafer expanding ring carrying platform, and the chip to be tested is arranged on the feeding area wafer expanding ring.

5. An edge-emitting semiconductor laser chip test system as claimed in claim 4 wherein: the feeding area wafer expanding ring carrying platform is provided with a feeding area X-direction transmission shaft and a feeding area Y-direction transmission shaft.

6. An edge-emitting semiconductor laser chip test system as claimed in claim 1 wherein: each test carrying platform is provided with a carrying position, a test position and a guide seat capable of guiding a chip to be tested, the carrying position and the test position are arranged side by side, and the guide seat can move back and forth between the carrying position and the test position.

7. An edge-emitting semiconductor laser chip test system as claimed in claim 1 wherein: the blanking area comprises a blanking area wafer expanding ring carrying platform and a blanking area wafer expanding ring arranged on the blanking area wafer expanding ring carrying platform, and the detected chip is placed on the blanking area wafer expanding ring.

8. An edge-emitting semiconductor laser chip test system as claimed in claim 7 wherein: the number of the blanking area wafer expanding rings on the blanking area is multiple, and each blanking area wafer expanding ring is used for accommodating chips of different grades.

9. An edge-emitting semiconductor laser chip test system as claimed in claim 7 wherein: and the blanking area wafer expanding ring carrying platform is also provided with an NG barrel.

10. An edge-emitting semiconductor laser chip test system as claimed in claim 1 wherein: the test platform comprises a test platform, and is characterized by also comprising test probes for testing the chip to be tested on the test platform, wherein the number of the test probes is the same as that of the test platform and the test probes are configured in a one-to-one correspondence manner.

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