CN203746835U - Packaging structure - Google Patents

Abstract

The utility model provides a packaging structure. The packaging structure comprises a base, a first groove, insulating layers, second grooves, a wiring metal layer, a solder mask layer and a welded ball, wherein the base comprises a substrate and a client layer which is arranged at the surface of the substrate, the surface of the client layer is the first surface of the base, the surface, opposite to the first surface, of the substrate is the second surface, and a plurality of welding pads are formed in the client layer; the first groove is placed in the second surface of the base, and the bottom of the first groove is exposed out of the welding pads and part of the surface of the client layer; the insulating layers are placed at the surface of the inner wall of the groove and the second surface of the base; the second grooves are arranged along the arrangement direction of the welding pads, and successively penetrate through adjacent welding pads and the client layer between the welding pads; the wiring metal layer is positioned at the surfaces of the first groove, second grooves and insulating layers; the solder masker layer is located at the surface of the wiring metal layer, and an opening is formed in the solder mask layer and exposed out of part of the surface of the wiring metal layer; and the welded ball is arranged in the opening and at the surface of the wiring metal layer. Thus, the reliability of the packing structure is relatively high.

Description

Encapsulating structure

Technical field

The utility model relates to technical field of semiconductors, particularly a kind of encapsulating structure.

Background technology

Wafer stage chip encapsulation (Wafer Level Chip Size Packaging, WLCSP) technology is that full wafer wafer is carried out cutting the technology that obtains single finished product chip after packaging and testing again, and the chip size after encapsulation is consistent with nude film.Crystal wafer chip dimension encapsulation technology changes conventional package as the pattern of ceramic leadless chip carrier (Ceramic Leadless Chip Carrier), organic leadless chip carrier (Organic Leadless Chip Carrier) and digital-code camera module formula, has complied with that market is day by day light, little, short to microelectronic product, thinning and low priceization requirement.It is highly microminiaturized that chip size after crystal wafer chip dimension encapsulation technology encapsulation has reached, chip cost along with chip size reduce significantly reduce with the increase of wafer size.Crystal wafer chip dimension encapsulation technology be IC can be designed, technology that wafer manufacture, packaging and testing, Substrate manufacture integrate, be the focus of current encapsulation field and the trend of future development.

Existing wafer-level chip size package method mainly comprises the following steps:

First, by client layer surface and the substrate pressing of semiconductor crystal wafer, described client layer refers to the material layer that is formed with device, and the device portions of crystal column surface is protected by substrate, reduces extraneous pollution and harm; Wafer is carried out after attenuate with respect to the back side of substrate, and utilize photoetching technique and plasma dry etch process, wafer is carried out to etching, form groove, and expose some weld pads.

Then, form insulating barrier in groove surfaces, and weld pad is carried out to laser drilling.

Finally, depositing metal layers on wafer rear, and described metal level is carried out graphically, form metallic circuit, complete wiring; On metallic circuit, form the solder mask of filling groove, and form opening at weld, in described opening, form soldered ball; Again wafer is opened along Cutting Road heartcut, obtained chip; Chip is electrically connected on pcb board by tin ball, realizes signal input and output.

The Chinese patent that more wafer-level chip size package methods can be CN101419952A with reference to publication number.

The reliability of the encapsulating structure that existing chip packaging method forms need further raising.

Utility model content

The problem that the utility model solves is to provide a kind of encapsulating structure, improves the reliability of encapsulating structure.

For addressing the above problem, the utility model provides a kind of encapsulating structure, comprising: substrate, described in comprise first surface and the second surface relative with described first surface, described first surface has client layer and is positioned at some weld pads of client layer; The first groove that is positioned at the second surface of described substrate, described the first bottom portion of groove exposes the surface of some weld pads and part client layer; Be positioned at the insulating barrier of the second surface of described the first groove inner wall surface and substrate; Along the orientation of weld pad, run through successively the second groove of the client layer between adjacent welding-pad and adjacent welding-pad; Be positioned at the interconnection metal layer of described the first groove, the second groove and surface of insulating layer; Be positioned at the solder mask on described interconnection metal layer surface, in described solder mask, have opening, described opening exposes the surface of part interconnection metal layer; Be positioned at the soldered ball on the interconnection metal layer surface of described opening.

Optionally, described the second groove is linear, and the width of described the second groove is less than the width of weld pad.

Optionally, between part the second groove in described client layer and the first recess sidewall, there is the first distance, between the second groove in described weld pad and the first recess sidewall, there is second distance, described the first distance is greater than second distance, and the difference range between the first distance and second distance is 10 microns～100 microns.

Optionally, on the Width of the second groove, the width of described the second groove is greater than the distance between adjacent welding-pad, and described the second groove has been removed the client layer between adjacent part of solder pads and described adjacent welding-pad.

Optionally, also comprise: the 3rd groove in the client layer between adjacent welding-pad, described the 3rd groove disconnects the metal wiring layer in the second groove and the second groove.

Optionally, also comprise: substrate, the first surface of described substrate and substrate pressing.

Compared with prior art, the technical solution of the utility model has the following advantages:

In the technical solution of the utility model, described encapsulating structure has the orientation along weld pad, runs through successively the second groove of the client layer between adjacent welding-pad and adjacent welding-pad.In prior art, only punching and still keep that client layer is complete to be compared on weld pad, the second groove in the technical solution of the utility model, not only penetrates weld pad, exposes weld pad, but also client layer is disconnected, the stress producing in client layer can be disperseed, and discharged by gap, avoid because client layer is subject to causing layering compared with large stress, and the problem that is disconnected of weld pad and substrate junction, improve the reliability of encapsulating structure.

Further, on the Width of the second groove, the width of described the second groove is greater than the distance between adjacent welding-pad, and described the second groove has been removed the client layer between adjacent part of solder pads and described adjacent welding-pad.In the process of cutting after follow-up encapsulation completes, client layer can not expose, and therefore there will not be the situation of client layer layering.

Further, between part the second groove in described client layer and the sidewall of the first groove, there is the first distance, between the second groove in described weld pad and the first recess sidewall, there is second distance, described the first distance is greater than second distance, can improve the operating space of follow-up formation the 3rd groove, and the second groove that is positioned at weld pad is broken line shape, can increase the contact area between interconnection metal layer and weld pad, improve the interface quality between interconnection metal layer and weld pad, improve electrical connection properties.

Further, in the technical solution of the utility model, in client layer, be also formed with the 3rd groove that disconnects the interconnection metal layer in the second groove and the second groove, thereby avoid the metal material in the second groove on the weld pad of different chips to connect, cause the short circuit problem between different weld pads.And described the 3rd groove further disconnects client layer, can further disperse the stress in client layer, has increased the approach of client layer internal stresses release.

Brief description of the drawings

Fig. 1 to Figure 14 is the schematic diagram of the forming process of the encapsulating structure of embodiment of the present utility model.

Embodiment

As described in the background art, the encapsulating structure reliability that existing chip packaging method forms is lower.

On the one hand, be because the thickness of the solder mask of filling in groove is larger, in the process of the described solder mask hot curing of formation, because solder mask is different from the thermal coefficient of expansion of wafer, can produce larger stress, and pass to client layer, in client layer, produce larger stress; Following adopted reflow soldering process forms soldered ball, and the high temperature in reflow process also can make generation stress in client layer.Due to before carrying out wafer cutting, client layer is a complete entirety, and the stress in client layer cannot be discharged completely.After chip cuts, client layer is no longer an entirety, and the residual stress in now solder mask hot curing and print solder paste Reflow Soldering balling-up and the stress producing in the time of follow-up reliability test can acting in conjunction cause client layer layering.

On the other hand, after completing wafer level packaging, the soldered ball on chip need to be electrically connected to then filler in the mode of Reflow Soldering with pcb board.The material of the glue material adopting during from filler due to described solder mask is different, carrying out in the process of thermal cycle test, can produce stress due to thermal mismatching effect.Because client layer is still as a whole, in client layer, can there is larger stress and be difficult to and discharge, and the silicon of bottom portion of groove and the junction of weld pad are comparatively fragile, the larger stress that client layer is subject to can cause the junction of silicon chip and weld pad to disconnect, and the reliability of packaged chip is reduced.

Embodiment of the present utility model is after the first groove surfaces forms insulating barrier, form the second groove, described the second groove is along the orientation of weld pad, run through successively the client layer between adjacent welding-pad and adjacent welding-pad, client layer is disconnected, make follow-uply filling solder mask and form in soldered ball process, the stress producing in client layer can discharge at the second groove, thereby avoids client layer layering.

For above-mentioned purpose of the present utility model, feature and advantage can more be become apparent, below in conjunction with accompanying drawing, specific embodiment of the utility model is described in detail.

Please refer to Fig. 1, substrate is provided, described substrate comprises: substrate 100 and the client layer 110 that is positioned at substrate 100 surfaces, the surface of described client layer 110 is the first surface 11 of substrate, the surface of the substrate 100 relative with described first surface 11 is second surface 12, in described client layer interior 110, is formed with some weld pads 120.

The second surface 12 of described substrate is without device side, and first surface 11 is for there being device side.In described client layer 110, be formed with semiconductor device 10, the quantity of described weld pad 120 is multiple, the discrete periphery that is arranged in semiconductor device 10, the input/output terminal being connected with external circuit as the internal circuit of semiconductor device 10.Described semiconductor device 10 can be image sensor, photodiode or MEMS (micro electro mechanical system) etc.

The generalized section that two continuous chips have been shown in Fig. 1, dotted line both sides are respectively different chips.After follow-up formation encapsulating structure, at dotted line position place, cut, obtain packaged chip, described dotted line is line of cut.

Please refer to Fig. 2, substrate 200 is provided, by the first surface of described substrate 100 11 and substrate 200 pressings.

The size of described substrate 200 and substrate 100 measure-alike, described substrate comprises base plate 201 and cavity wall 202.

Concrete, described base plate 201 can be glass, described cavity wall 202 passes through at the surperficial spin coating photoresist of base plate 201, and forms after exposing, developing.Cavity wall 202 on substrate 200 forms adhesive layer (not shown) away from the one side of base plate 201, and described adhesive layer can be polymeric adhesion material, such as silica gel, epoxy resin, benzocyclobutene etc.Described adhesive layer both can have been realized bonding effect, can play again insulation and sealing function.

First surface 11 pressings by described substrate 200 with substrate 100, the semiconductor device 10 forming on the cavity that described cavity wall 202 surrounds with client layer 110 and wafer 100 is corresponding, weld pad 120 is positioned at cavity wall 202 surfaces, and described semiconductor device 10 is positioned at cavity.

Follow-up Fig. 3 to Figure 10 is the partial schematic diagram of the region I in Fig. 2.

Please refer to Fig. 3, the second surface 12 of substrate is carried out to attenuate, the second surface 12 of then substrate described in etching, forms the first groove 101, and described the first groove 101 bottom-exposed go out the surface of some weld pads 120 and part client layer 110.

Can adopt chemical mechanical milling tech to be thinned to desired thickness to the second surface 12 of described substrate.

On described second surface 120, form the mask layer with opening; Along described opening etched substrate 100, form the first groove 101, described the first groove 101 exposes the surface of part client layer 110 and some weld pads 120.

Described the first groove 101 can arrange along the line of cut between adjacent chips (in Fig. 3 shown in dotted line), and about described line of cut symmetry, follow-up can cutting substrate along described the first groove 101.

Described mask layer can be photoresist layer, can form described the first groove 101 by using plasma etching technics.The sidewall slope angle of described the first groove 101 and bottom width can be controlled by the parameter of plasma etch process.

Please refer to Fig. 4, form insulating barrier 102 in described the first groove 101 inner wall surface.

Described insulating barrier 102 also covers described second surface 12.The material of described insulating barrier 102 can be the macromolecule organic insulation polymeric materials such as photoresist, silica gel, the material of described insulating barrier 102 can also be the inorganic insulation such as silicon nitride, silica dielectric material, can adopt spraying coating process, chemical vapor deposition method or spin coating proceeding to form described insulating barrier 102.The thickness of described insulating barrier 102 can be 2um～20um.

Described insulating barrier 102 is as the separator between interconnection metal layer and the substrate 100 of follow-up formation.

Please refer to Fig. 5, form the second groove 103, described the second groove 103, along the orientation of weld pad 120, runs through the client layer 110 between adjacent welding-pad 120 and adjacent welding-pad 120 successively.

The degree of depth of described the second groove 103 must penetrate described insulating barrier 102, and runs through described weld pad 120 and client layer 110.The bottom of described the second groove 103 is positioned at described cavity wall 202.Form after described the second groove 103, the sidewall of described the second groove 103 exposes weld pad 120.

Described the second groove 103 not only penetrates weld pad 120, and run through the client layer 110 between adjacent welding-pad 120, the complete client layer 110 of script is disconnected, make can be discharged by gap at the stress of client layer 110 interior generations in subsequent process steps, avoid in subsequent technique, because client layer 110 is subject to causing layering compared with large stress, and the problem of weld pad 120 and substrate 100 junctions disconnections.

Please refer to Fig. 6, is the schematic top plan view (insulating barrier is not shown) after described the second groove 103 forming in the present embodiment.And Fig. 5 is the generalized section along secant AA ' direction in Fig. 6.

Described the second groove 103 is linear, and the width of described the second groove 103 is less than the width of weld pad 120.Described the second groove 103, along the orientation of weld pad 120, penetrates insulating barrier (not shown) and runs through successively the client layer (not shown) between adjacent welding-pad and weld pad.

In the present embodiment, the bearing of trend of described the second groove 103 please refer to Fig. 5 with the first groove 101() bearing of trend identical, identical with the bearing of trend of line of cut.In other embodiment of the present utility model, the bearing of trend of described the second groove 103 can be also other directions.

The formation technique of described the second groove 103 is laser scribe process.Adopt that the benefit of laser scribe process is that flow process is simple, the control of the size of the second groove 103, position is comparatively accurate, speed, and less to the damage of weld pad 120.

Please refer to Fig. 7, is the second groove 103 of another embodiment of the present utility model and the schematic diagram of weld pad 120.

The width of described the second groove 103 is larger, on the Width of the second groove 103, the width of described the second groove 103 is greater than the distance between adjacent welding-pad 120, and described the second groove 103 has been removed the white space that dotted line in adjacent part of solder pads 120(Fig. 7 and the second groove 103 borders form) and described adjacent welding-pad 120 between client layer 110.In Fig. 7, the part that has filling pattern between the second groove 103 and substrate 100 is the weld pad 120 exposing.

The bearing of trend of described the second groove 103 please refer to Fig. 5 with the first groove 101() bearing of trend identical, run through the client layer between the adjacent welding-pad on this bearing of trend simultaneously, complete client layer 110 is disconnected, make can be discharged by gap at the stress of client layer 110 interior generations in subsequent process steps.

Owing to forming in the process of described the second groove 103, removed the client layer 110 between the adjacent welding-pad 120 on the second groove 103 Widths simultaneously.After follow-up encapsulation completes, chip is cut, in the process of cutting in the removed region of described client layer, client layer can not expose, and therefore there will not be the situation of client layer layering.

Because the width of described the second groove 103 is larger, can adopt cutting technique to form described the second groove 103; Can also adopt laser scribe process to form described the second groove 103, adopt laser scribe process consuming time shorter, less to the damage of weld pad 120.

Please refer to Fig. 8, the second groove 103 that Fig. 8 is another embodiment and the schematic diagram of weld pad 120.

Part the second groove 103 in described client layer 110 and the sidewall of the first groove are between substrate 100, to have the first distance B 1, the second groove 103 in described weld pad 120 and the sidewall of the first groove are between substrate 100, to have second distance D2, described the first distance B 1 is greater than second distance D2, and the difference range between the first distance B 1 and second distance D2 is 10 microns～100 microns.

In the present embodiment, the second groove 103 that is positioned at weld pad 120 is broken line shape, can increase the contact area between interconnection metal layer and the weld pad 120 of follow-up formation, improves the interface quality between interconnection metal layer and weld pad 120, raising electrical connection properties.

The first distance B 1 between the second groove 103 and substrate 100 in client layer 110 is larger, and that can improve follow-up formation the 3rd groove can operating space.

Can adopt laser scribe process to form described the second groove 103

Please refer to Fig. 9, form interconnection metal layer 104 on described the first groove 101, the second groove 103 and insulating barrier 102 surfaces.

The method that forms described interconnection metal layer 104 comprises: at described the first groove 101, the second groove 103 and insulating barrier 102 forming metal layer on surfaces; Graphical described metal level, forms interconnection metal layer 104.

The thickness of described metal level is unsuitable excessive, avoids, forming in the process of metal level, the second groove 103 open tops being blocked, and at the interior formation hole of described the second groove 103, affects the contact quality of metal level and weld pad 120.Described metal level can adopt sputtering technology to form, and makes metal level have higher uniformity, and the material of described metal level can be the metal materials such as copper, tungsten, aluminium, titanium, alumel, gold.

After metallic layer graphic, form interconnection metal layer 104, described interconnection metal layer 104 comprises the ball lower metal layer part that is positioned on substrate second surface 12 and the external lead portion that is positioned at the first groove 101 and is connected with weld pad 120 with the second groove 102; Described external lead portion is by ball lower metal layer part and weld pad 120 electric connections.The process of graphical metal level is that metal level is divided into many outer lead and the ball lower metal layer parts that mutually disconnect.

Because the second groove 103 has run through the weld pad 120 between different chips, forming in interconnection metal layer 104 processes, also need the metal level in the second groove 103 to disconnect, avoid short circuit between different chips.

Concrete, can adopt photoetching process or wet-etching technology, graphical described metal level, forms interconnection metal layer 104.

Please refer to Figure 10, the interior formation of client layer 110 the 3rd groove 105 between adjacent welding-pad 120, described the 3rd groove 105 disconnects the second groove 103.Figure 10 is that the present embodiment forms the head-down position schematic diagram (insulating barrier and interconnection metal layer are not shown) after the 3rd groove 105.

Because the width of described the second groove 103 is less, form interconnection metal layer 104(at graphical metal level and please refer to Fig. 5) be difficult to the metal level running through in the second groove 103 of adjacent welding-pad 120 to disconnect completely, easily cause short circuit between different weld pads.So, in the present embodiment, after forming interconnection metal layer 104, the interior formation of client layer 110 between adjacent welding-pad 120 disconnects the 3rd groove 105 of described the second groove 103, thereby can avoid metal material in the second groove on different weld pads to connect and cause the short circuit problem between the different weld pads in same chip.

And described the 3rd groove 105 further disconnects client layer 110, can further disperse the stress in client layer 110, improve the approach of client layer 110 internal stresses releases, thereby can avoid client layer because the excessive problem that causes layering of stress.

Can adopt laser scribe process to form described the 3rd groove 105.

Please refer to Figure 11 to Figure 12, for forming the schematic top plan view of the 3rd groove 105 in other embodiment of the present utility model.

In Figure 12, in this embodiment, distant between the part of the second groove 103 on client layer 110 and substrate 100, spacing between adjacent the second groove 103 on client layer 120 is less, thereby can make the length range of the 3rd groove 105 forming larger, forming in the process of the 3rd groove, can the increasing operating space of laser scribing, can avoid forming the damage that causes to substrate 100 sidewall surfaces in the process of the 3rd groove 105.

In other embodiment of the present utility model, forming in the process of interconnection metal layer 104, if can guarantee to disconnect in the second groove 103 and between the metal level of different weld pad connection, also can not form described the 3rd groove 105.

Please refer to Figure 13, form solder mask 106 on described interconnection metal layer 104 surfaces, in described solder mask 106, have opening 107, described opening 107 exposes the surface of part interconnection metal layer 104.

Described in described solder mask 106, solder mask 106 covers interconnection metal layer, described solder mask 106 can adopt the material identical with insulating barrier 102, can be the macromolecule organic insulation polymeric materials such as photoresist, silica gel, adopt spraying coating process or spin coating proceeding to form described solder mask 106.

The position of the opening 107 in described solder mask 106 is the position of the soldered ball of follow-up formation connecting wiring metal level 104.

The method that forms described solder mask 106 can be after interconnection metal layer 104 surfaces form solder mask material, and described solder mask material is carried out graphically, forms opening 107 in the follow-up position that need to form soldered ball.

Described solder mask 106 can protect interconnection metal layer 104 not to be subject to the impact of subsequent technique, and can reduce and avoid pad metal exposed in addition, in the process that forms soldered ball, causes short circuit problem.

Please refer to Figure 14, please refer to Figure 13 at described opening 107() in form and be positioned at the soldered ball 108 on interconnection metal layer 104 surfaces.

Described soldered ball 108 is electrically connected with weld pad 120 by interconnection metal layer 104.

Concrete, can adopt screen printing technique and technique of backflow to form described soldered ball 108.

Follow-uply can pass through cutting technique, along the first groove, substrate is cut, obtain the chip-scale packaged chip of ball grid array, and described chip is electrically connected in the mode of Reflow Soldering with pcb board by soldered ball, then filler, realizes the input and output of signal.

In prior art, after forming insulating barrier, only on weld pad, form through hole, be entirety and keep client layer, cause the stress that subsequent technique causes in client layer to discharge, cause the layering because stress is excessive in client layer, and the weld pad that is positioned at bottom portion of groove is easily pulled off under effect of stress, affects the reliability of encapsulating structure.And in embodiment of the present utility model, run through the second groove of client layer between adjacent welding-pad and weld pad by formation, client layer is disconnected.The stress producing in client layer can be disperseed and discharge, avoid causing client layer layering because stress is excessive, and the problem that is disconnected of weld pad and substrate junction.

And, in embodiment of the present utility model, can also, after forming interconnection metal layer, in client layer, form the 3rd groove that disconnects the second groove, avoid connecting due to the metal material in the second groove the problem of short circuit between the different weld pads that cause in same chip.

Embodiment of the present utility model also provides a kind of encapsulating structure that adopts said method to form.

Please refer to Figure 14, described encapsulating structure comprises: substrate, described substrate comprises: substrate 100 and the client layer 110 that is positioned at substrate 100 surfaces, the surface of described client layer 110 is the first surface 11 of substrate, the surface of the substrate 100 relative with described first surface 11 is second surface 12, in described client layer interior 110, is formed with some weld pads 120; Be positioned at the first groove 101 of the second surface 12 of described substrate, described the first groove 101 bottom-exposed go out the surface of some weld pads 120 and part client layer 110; Be positioned at the insulating barrier 102 of described the first groove 101 inner wall surface; Along the orientation of weld pad 120, run through successively the second groove of the client layer 110 between adjacent welding-pad 120 and adjacent welding-pad 120; Be positioned at the interconnection metal layer 104 on described the first groove 101, the second groove and insulating barrier 102 surfaces; Be positioned at the solder mask 106 on described interconnection metal layer 104 surfaces, in described solder mask 106, have opening, described opening exposes the surface of part interconnection metal layer 104; Be positioned at the soldered ball 108 on interconnection metal layer 104 surfaces of described opening.

Described encapsulating structure also comprises: substrate 200, first surface 11 and substrate 200 pressings of described substrate 100.The size of described substrate 200 and substrate 100 measure-alike, described substrate comprises base plate 201 and cavity wall 202.

Please refer to Fig. 6, is described the second groove 103 in the present embodiment and the schematic top plan view of weld pad 120.

Described the second groove 103 is linear, and the width of described the second groove 103 is less than the width of weld pad 120.Described the second groove 103, along the orientation of weld pad 120, penetrates insulating barrier (not shown) and runs through successively the client layer 110 between adjacent welding-pad and weld pad.

In the present embodiment, the bearing of trend of described the second groove 103 is identical with the bearing of trend of the first groove 101.In other embodiment of the present utility model, the bearing of trend of described the second groove 103 can be also other directions.

Please refer to Fig. 7 and Fig. 8, is the second groove 103 in other embodiment of the present utility model and the schematic top plan view of weld pad 120.

In Fig. 7, the width of described the second groove 103 is larger, on the Width of the second groove 103, the width of described the second groove 103 is greater than the distance between adjacent welding-pad 120, and described the second groove 103 has been removed the client layer 110 between adjacent part of solder pads 102 and described adjacent welding-pad 120.Because described the second groove has been removed the client layer between the adjacent welding-pad in the second recess width direction simultaneously.After follow-up encapsulation completes, chip is cut, in the process of cutting in the removed region of client layer, cutting process can not expose client layer, thereby there will not be the problem of client layer layering.

In Fig. 8, the first distance B 1 between part the second groove 103 and substrate 100 in described client layer 110 is greater than the second distance D2 between part the second groove 103 and the substrate 100 in weld pad 120, and the difference range between the first distance B 1 and second distance D2 is 10 microns～100 microns.The second groove 103 that is positioned at weld pad 120 is broken line shape, can increase the contact area between interconnection metal layer and the weld pad of follow-up formation, improves the interface quality between interconnection metal layer and weld pad, improves electrical connection properties.

Described encapsulating structure can also comprise: the 3rd groove in the client layer 110 between adjacent welding-pad 120, described the 3rd groove disconnects the metal wiring layer in the second groove and the second groove.

Please refer to Figure 10 to Figure 12, is the schematic top plan view of the position relationship between described the 3rd groove 105 and weld pad 120 and the second groove 103.

Client layer 110 in described encapsulating structure is disconnected by the second groove 103 and the 3rd groove 105, stress in described client layer 110 can be disperseed and be discharged by described gap, thereby avoid causing because stress is excessive client layer layering, and weld pad 120 and the problem that substrate 100 junctions are disconnected, can improve the reliability of encapsulating structure.

Described the 3rd groove 105 disconnects metal wiring layer in the second groove 103 and the second groove, can avoid metal material in the second groove to cause the problem of short circuit between the different weld pads in same chip.

Although the utility model discloses as above, the utility model is not defined in this.Any those skilled in the art, not departing from spirit and scope of the present utility model, all can make various changes or modifications, and therefore protection range of the present utility model should be as the criterion with claim limited range.

Claims (6)

1. an encapsulating structure, is characterized in that, comprising:

Substrate, described substrate comprises: substrate and the client layer that is positioned at substrate surface, the first surface that the surface of described client layer is substrate, the surface of the substrate relative with described first surface is second surface, is formed with some weld pads in described client layer;

The first groove that is positioned at the second surface of described substrate, described the first bottom portion of groove exposes the surface of some weld pads and part client layer;

Be positioned at the insulating barrier of the second surface of described the first groove inner wall surface and substrate;

Along the orientation of weld pad, run through successively the second groove of the client layer between adjacent welding-pad and adjacent welding-pad;

Be positioned at the interconnection metal layer of described the first groove, the second groove and surface of insulating layer;

Be positioned at the solder mask on described interconnection metal layer surface, in described solder mask, have opening, described opening exposes the surface of part interconnection metal layer;

Be positioned at the soldered ball on the interconnection metal layer surface of described opening.

2. encapsulating structure according to claim 1, is characterized in that, described the second groove is linear, and the width of described the second groove is less than the width of weld pad.

3. encapsulating structure according to claim 1, it is characterized in that, between part the second groove in described client layer and the first recess sidewall, there is the first distance, between the second groove in described weld pad and the first recess sidewall, there is second distance, described the first distance is greater than second distance, and the difference range between the first distance and second distance is 10 microns～100 microns.

4. encapsulating structure according to claim 1, it is characterized in that, on the Width of the second groove, the width of described the second groove is greater than the distance between adjacent welding-pad, and described the second groove has been removed the client layer between adjacent part of solder pads and described adjacent welding-pad.

5. encapsulating structure according to claim 1, is characterized in that, also comprises: the 3rd groove in the client layer between adjacent welding-pad, described the 3rd groove disconnects the metal wiring layer in the second groove and the second groove.

6. encapsulating structure according to claim 1, is characterized in that, also comprises: substrate, the first surface of described substrate and substrate pressing.