CN203423834U - LED drive circuit and transconductance amplifier thereof. - Google Patents
LED drive circuit and transconductance amplifier thereof. Download PDFInfo
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- CN203423834U CN203423834U CN201320566645.2U CN201320566645U CN203423834U CN 203423834 U CN203423834 U CN 203423834U CN 201320566645 U CN201320566645 U CN 201320566645U CN 203423834 U CN203423834 U CN 203423834U
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Abstract
The utility model provides an LED drive circuit and a transconductance amplifier thereof. The LED drive circuit comprises a constant current control circuit, a transformer, a switch tube, a sampling resistor, a freewheeling diode and an output capacitor. The constant current control circuit comprises a peak sampling and maintaining circuit, an output equivalent current calculating circuit, a transconductance amplifier, a PWM signal generation circuit, and a logic and drive circuit. The transconductance amplifier comprises a differential input stage circuit, an input switch network, a current transfer circuit, a current transfer switch network, and a clock signal generator, wherein the input switch network carries out switching on the inputted positive input signal and the negative input signal to enable the signals to be inputted alternatively to the input ends of a first voltage current conversion circuit and a second voltage current conversion circuit; and the current transfer switch network carries out switching on the current transfer paths of the current transfer circuit. The LED drive circuit has the advantages that detuning due to device matching and stress packaging can be reduced, and improvement on consistency of the circuit and the output current is facilitated.
Description
Technical field
The utility model relates to LED drive circuit field, relates in particular to a kind of LED drive circuit and trsanscondutance amplifier thereof.
Background technology
With reference to figure 1, traditional step-down LED drive circuit mainly comprises: constant-current control circuit 100, sustained diode 1, inductance L 1, capacitor C 1, switching tube M1, sampling resistor Rcs.Wherein, the negative pole of sustained diode 1 is connected to positive pole and the power end Vin of load LED, and the positive pole of sustained diode 1 is connected to the first end of inductance L 1, and the second end of inductance L 1 is connected to the negative pole of load LED; Switching tube M1 is connected between inductance L 1 and sampling resistor Rcs, and this switching tube M1 is controlled by constant-current control circuit 100.
Wherein, constant-current control circuit 100 comprises: peak sampling hold circuit 106, and during power switch M1 conducting, sample streams is the sampled voltage Vcs on sampling resistor Rcs through the peak current of power switch; Output equivalent Current calculation circuit 105, calculates output equivalent electric current according to the peak meter of the sampled voltage Vcs on sampling resistor Rcs; Trsanscondutance amplifier 101, does error amplification to output equivalent electric current and fiducial value Vref1, and output error signal is to loop compensation end COMP; Loop compensation end COMP, this loop compensation end COMP can additional compensating element,, generally resistance, electric capacity connection in series-parallel, consists of, and by error signal, Vcomp carrys out control loop; Pwm signal generation circuit 102, receive error signal Vcomp, produce pwm signal to logic control circuit 103, the duty ratio of pwm signal is relevant to error signal Vcomp, and logic control circuit 103 produces pre-drive signal GT1 through drive circuit 104 driving power switch M1.
Wherein, the precision of output current and fiducial value Vref1, peak value sampling retention value are relevant, also relevant to the precision of trsanscondutance amplifier 101, and for the consistency of circuit, the precision of trsanscondutance amplifier 101 has conclusive effect.
With reference to figure 2, in traditional transconductance type transconductance amplifier circuit, MOS transistor N1, N2 are as input to pipe, and resistance R 1 and resistance R 2 are used for widening the input range of linearity of trsanscondutance amplifier, if the input range of linearity is enough, resistance R 1 and resistance R 2 can be omitted.MOS transistor P1, P2, P3, P4, N4, N5 are as intergrade, and mirror image delivered current, makes output current Iout=Gm*(Vp-Vn), Iout is output current, Gm is mutual conductance, the magnitude of voltage that Vp is positive input signal, Vn is the magnitude of voltage of negative input signal.Wherein, the size of mutual conductance Gm with as the MOS transistor N1 of input pipe, the size of N2, the size of resistance R 1 and resistance R 2, and the ratio that image current transmits is relevant.
The mismatch of trsanscondutance amplifier can cause actual value and the desired value generation deviation controlled.At LED drive circuit, especially use in the LED drive circuit of trsanscondutance amplifier, for the consistency of circuit is carried out, with regard to requiring, the mutual conductance of circuit is done accurately, and reduced as far as possible the imbalance of circuit.But, due to the deviation in processes manufacture process and encapsulation stress, can cause symmetrical input pipe, synistor and the image current of design to become mismatch, thereby cause the mutual conductance of side circuit no longer accurate, the imbalance of circuit obviously increases.In order to reduce this mismatch, generally need to cause the element of mismatch to do symmetrically as much as possible all meetings, comprise the Central Symmetry of domain, and strengthen the size of symmetric element, but can cause like this need to be larger chip area, also just increased coupling cost.In addition, even if use these measures, still not can solve the impact that the problem that mismatch causes, especially mismatch are subject to encapsulation stress, the effect of the size of increasing symmetric element is also not obvious.
Utility model content
The technical problems to be solved in the utility model is to provide a kind of LED drive circuit and trsanscondutance amplifier thereof, can reduce the trsanscondutance amplifier imbalance that causes due to device matching and encapsulation stress, is conducive to improve the consistency of circuit and the consistency of output current.
For solving the problems of the technologies described above, the utility model provides a kind of LED drive circuit, comprises constant-current control circuit, transformer, switching tube, sampling resistor, fly-wheel diode and output capacitance, wherein,
The Same Name of Ends of the former limit winding of described transformer receives input voltage, the Same Name of Ends ground connection of the secondary winding of described transformer, and the different name end of the secondary winding of described transformer connects the positive pole of described fly-wheel diode;
The drain electrode of described switching tube connects the different name end of the former limit winding of described transformer, and the grid of described switching tube connects the output of described constant-current control circuit;
The first end of described sampling resistor connects the source electrode of described switching tube and the sampling input of described constant-current control circuit, the second end ground connection of described sampling resistor;
The first end of described output capacitance connects the negative pole of described fly-wheel diode, the second end ground connection of described output capacitance,
Wherein, described constant-current control circuit comprises:
Peak sampling hold circuit, its input connects the sampling input of described constant-current control circuit, and the sampled voltage on described sampling resistor is sampled;
Output equivalent Current calculation circuit, its input is connected with the output of described peak sampling hold circuit, according to described sampled voltage, calculates output equivalent electric current, and output represents the equivalent voltage of this output equivalent electric current;
Trsanscondutance amplifier, its first input end connects the output of described output equivalent Current calculation circuit, and its second input receives reference voltage, and described equivalent voltage and reference voltage are carried out to error amplification;
Pwm signal generation circuit, its input connects the output of described trsanscondutance amplifier, according to the error signal of described trsanscondutance amplifier output, produces pwm signal, and the duty ratio of described pwm signal is regulated by described error signal;
Logic and driver circuitry, its input connects the output of described pwm signal generation circuit, and described pwm signal transfers to the grid of described switching tube via this logic and driver circuitry;
Wherein, described trsanscondutance amplifier comprises:
Differential input stage circuit, comprises that the first voltage turns current circuit and second voltage turns current circuit;
Input switch network, positive input signal and negative input signal to the input of the first input end from described trsanscondutance amplifier and the second input switch, and make described positive input signal and negative input signal alternately input to described the first voltage and turn the input that current circuit and second voltage turn current circuit;
Current transfer circuit, transmits the electric current of described differential input stage circuit output;
Current delivery switching network, switches the current delivery path of described current transfer circuit, makes the output signal of described trsanscondutance amplifier and described positive input signal keep positive polarity, and keeps reversed polarity with described negative input signal;
Clock-signal generator, produce periodically non-the first overlapping clock signal and second clock signal, this first clock signal and second clock signal inversion, this first clock signal and second clock signal are used for controlling described input switch network and current delivery switching network;
Wherein, described current transfer circuit comprises:
The first mirror current source, its input is connected with the output that described the first voltage turns current circuit;
The second mirror current source, its input is connected with the output that described second voltage turns current circuit;
The 3rd mirror current source, its input is connected with the output of the second mirror current source with described the first mirror current source respectively via described current delivery switching network with output.
According to an embodiment of the present utility model, described input switch network comprises:
The first switch, its first end receives described negative input signal, and its second end connects the input that described the first voltage turns current circuit, and its control end receives described the first clock signal;
Second switch, its first end receives described positive input signal, and its second end connects the input that described the first voltage turns current circuit, and its control end receives described second clock signal;
The 3rd switch, its first end receives described positive input signal, and its second end connects the input that described second voltage turns current circuit, and its control end receives described the first clock signal;
The 4th switch, its first end receives described negative input signal, and its second end connects the input that described second voltage turns current circuit, and its control end receives described second clock signal.
According to an embodiment of the present utility model, described current delivery switching network comprises:
The 5th switch, its first end connects the output of described the first mirror current source, and its second end connects the output of described trsanscondutance amplifier, and its control end receives described second clock signal;
The 6th switch, its first end connects the output of described the first mirror current source, and its second end connects the input of described the 3rd mirror current source, and its control end receives described the first clock signal;
Minion is closed, and its first end connects the output of described the second mirror current source, and its second end connects the input of described the 3rd mirror current source, and its control end receives described second clock signal;
The 8th switch, its first end connects the output of described the second mirror current source, and its second end connects the output of described the 3rd mirror current source, and its control end receives described the first clock signal.
According to an embodiment of the present utility model, the duty ratio of described the first clock signal and second clock signal is 0.5.
According to an embodiment of the present utility model, described the first voltage turns current circuit and comprises that the first difference input is to pipe, and described second voltage turns current circuit and comprises that the second difference input is to pipe.
According to an embodiment of the present utility model, described the first differential pair tube is connected with the first resistance, and described the second differential pair tube is connected with the second resistance.
According to an embodiment of the present utility model, described the first difference input is nmos pass transistor, NPN triode, PMOS transistor or PNP triode to pipe and the input of the second difference to pipe.
The utility model also provides a kind of trsanscondutance amplifier, comprising:
Differential input stage circuit, comprises that the first voltage turns current circuit and second voltage turns current circuit;
Input switch network, positive input signal and negative input signal to the input of the first input end from described trsanscondutance amplifier and the second input switch, and make described positive input signal and negative input signal alternately input to described the first voltage and turn the input that current circuit and second voltage turn current circuit;
Current transfer circuit, transmits the electric current of described differential input stage circuit output,
Current delivery switching network, switches the current delivery path of described current transfer circuit, makes the output signal of described trsanscondutance amplifier and described positive input signal keep positive polarity, and keeps reversed polarity with described negative input signal;
Clock-signal generator, produce periodically non-the first overlapping clock signal and second clock signal, this first clock signal and second clock signal inversion, this first clock signal and second clock signal are used for controlling described input switch network and current delivery switching network;
Wherein, described current transfer circuit comprises:
The first mirror current source, its input is connected with the output that described the first voltage turns current circuit;
The second mirror current source, its input is connected with the output that described second voltage turns current circuit;
The 3rd mirror current source, its input is connected with the output of the second mirror current source with described the first mirror current source respectively via described current delivery switching network with output.
According to an embodiment of the present utility model, described input switch network comprises:
The first switch, its first end receives described negative input signal, and its second end connects the input that described the first voltage turns current circuit, and its control end receives described the first clock signal;
Second switch, its first end receives described positive input signal, and its second end connects the input that described the first voltage turns current circuit, and its control end receives described second clock signal;
The 3rd switch, its first end receives described positive input signal, and its second end connects the input that described second voltage turns current circuit, and its control end receives described the first clock signal;
The 4th switch, its first end receives described negative input signal, and its second end connects the input that described second voltage turns current circuit, and its control end receives described second clock signal.
According to an embodiment of the present utility model, described current delivery switching network comprises:
The 5th switch, its first end connects the output of described the first mirror current source, and its second end connects the output of described trsanscondutance amplifier, and its control end receives described second clock signal;
The 6th switch, its first end connects the output of described the first mirror current source, and its second end connects the input of described the 3rd mirror current source, and its control end receives described the first clock signal;
Minion is closed, and its first end connects the output of described the second mirror current source, and its second end connects the input of described the 3rd mirror current source, and its control end receives described second clock signal;
The 8th switch, its first end connects the output of described the second mirror current source, and its second end connects the output of described the 3rd mirror current source, and its control end receives described the first clock signal.
According to an embodiment of the present utility model, the duty ratio of described the first clock signal and second clock signal is 0.5.
According to an embodiment of the present utility model, described the first voltage turns current circuit and comprises that the first difference input is to pipe, and described second voltage turns current circuit and comprises that the second difference input is to pipe.
According to an embodiment of the present utility model, described the first differential pair tube is connected with the first resistance, and described the second differential pair tube is connected with the second resistance.
According to an embodiment of the present utility model, described the first difference input is nmos pass transistor, NPN triode, PMOS transistor or PNP triode to pipe and the input of the second difference to pipe.
Compared with prior art, the utlity model has following advantage:
In the LED drive circuit of the utility model embodiment, employing reduces the trsanscondutance amplifier of mismatch technology and controls LED constant current driving, this trsanscondutance amplifier adopt input switch network by positive input signal and negative input signal alternately in other words periodically alternately input to two inputs of differential input stage circuit, making the first voltage of differential input stage inside circuit turn the mismatch that current circuit and second voltage turn between current circuit can cancel out each other; And this trsanscondutance amplifier adopts current delivery switching network to switch the connected mode of a plurality of mirror current sources in current transfer circuit, with switch current bang path, mismatch between the device of each mirror current source in current transfer circuit also can be cancelled out each other, be conducive to improve the consistency of trsanscondutance amplifier.Adopt such trsanscondutance amplifier to control LED constant current and drive, improved significantly the consistency of output current, and circuit realization is simple, successful.
Accompanying drawing explanation
Fig. 1 is the electrical block diagram of a kind of trsanscondutance amplifier in prior art;
Fig. 2 is the electrical block diagram of a kind of trsanscondutance amplifier in prior art;
Fig. 3 is the electrical block diagram of the trsanscondutance amplifier of the utility model embodiment;
Fig. 4 is the oscillogram of the clock signal of the utility model embodiment;
Fig. 5 is the structural representation of the clock-signal generator of the utility model embodiment;
Fig. 6 is the electrical block diagram of the LED drive circuit of the utility model embodiment.
Embodiment
Below in conjunction with specific embodiments and the drawings, the utility model is described in further detail, but should not limit protection range of the present utility model with this.
With reference to figure 3, to Fig. 5, the trsanscondutance amplifier of the present embodiment comprises: input switch network 200, differential input stage circuit 201, current transfer circuit, current delivery switching network and clock-signal generator.
Furthermore, differential input stage circuit 201 comprises that the first voltage turns current circuit and second voltage turns current circuit.In the present embodiment, the first voltage turns current circuit and comprises first resistance R 1 of the first difference input to pipe N1 and series connection with it, second voltage turns current circuit and comprises second resistance R 2 of the second difference input to pipe N2 and series connection with it, differential input stage circuit 201 is connected to ground via transistor N3, and the grid of transistor N3 receives bias voltage Vbias.Wherein, the first resistance R 1 and the second resistance R 2, for increasing the input range of linearity, are optional.The first difference input can be nmos pass transistor, NPN triode, PMOS transistor or PNP triode to pipe N1 and the input of the second difference to pipe N2, or can be also other suitable transistors.As a nonrestrictive example, in the example shown in Fig. 3, the first difference input is nmos pass transistor to pipe N1 and the input of the second difference to pipe N2.
The positive input signal Vp of 200 pairs of inputs of input switch network and negative input signal Vn carry out periodicity and switch, and make positive input signal Vp and negative input signal Vn alternately input to the first voltage and turn the input that current circuit and second voltage turn current circuit.It should be noted that, " just " and " bearing " in positive input signal Vp and negative input signal Vn be only for distinguishing two-way input signal herein, and the voltage of non-limiting two-way input signal or the polar relationship of electric current, and the two can be for example positive voltage signal.
In the present embodiment, input switch network 200 comprises switch S 1, switch S 2, switch S 3, switch S 4.Wherein, the first end of switch S 1 receives negative input signal Vn, and the second end connects the input (being specially in the present embodiment the grid of MOS transistor N1) that the first voltage turns current circuit, and its control end receives the first clock signal C H0; The first end of switch S 2 receives positive input signal Vp, and its second end connects the input (being specially in the present embodiment the grid of MOS transistor N1) that the first voltage turns current circuit, and its control end receives second clock signal CL0; The first end of switch S 3 receives positive input signal Vp, and its second end connects the input (being specially the grid of MOS transistor N2 in the present embodiment) that second voltage turns current circuit, and its control end receives the first clock signal C H0; The first end of switch S 4 receives negative input signal Vn, and its second end connects the input (being specially the grid of MOS transistor N2 in the present embodiment) that second voltage turns current circuit, and its control end receives second clock signal CL0.
Current transfer circuit is for transmitting the electric current of differential input stage circuit 201 outputs, and in the present embodiment, this current transfer circuit comprises the first mirror current source 203, the second mirror current source 204 and the 3rd mirror current source 206.Wherein, the input of the first mirror current source 203 is connected with the output that the first voltage turns current circuit, and more specifically, the input of the first mirror current source 203 connects the first drain electrode of difference input to pipe N1; The input of the second mirror current source 204 is connected with the output that second voltage turns current circuit, and more specifically, the input of the second mirror current source 203 connects the second drain electrode of difference input to pipe N2; The input of the 3rd mirror current source 206 is connected with the output of output via current delivery switching network respectively with the first mirror current source 203 and the second mirror current source 204.As a nonrestrictive example, the first mirror current source 203 comprises mirror image pipe P1 and mirror image pipe P2; The second mirror current source 204 comprises mirror image pipe P3 and mirror image pipe P4; The 3rd mirror current source 206 comprises mirror image pipe N4 and mirror image pipe N5.
Above-mentioned each mirror current source 203,204 and 206 can adopt MOS transistor transmission, also can adopt triode transmission, can also use amplifier architecture to realize and transmit.
Current delivery switching network comprises: switching network 202 and switching network 205, and wherein, switching network 202 comprises switch S 5 and switch S 6; Switching network 205 comprises switch S 7 and switch S 8.Furthermore, the first end of switch S 5 connects the output of the first mirror current source 203, and its second end connects the output C of trsanscondutance amplifier, and its control end receives second clock signal CL0; The first end of switch S 6 connects the output of the first mirror current source, and its second end connects the input of the 3rd mirror current source 206, and its control end receives the first clock signal C H0; The first end of switch S 7 connects the output of the second mirror current source 204, and its second end connects the input of the 3rd mirror current source 206, and its control end receives second clock signal CL0; The first end of switch S 8 connects the output of the second mirror current source 204, and its second end connects the output of the 3rd mirror current source 206, and its control end receives the first clock signal C H0.
In conjunction with Fig. 3 to Fig. 5, the first clock signal C H0 and second clock signal CL0 can be produced by clock-signal generator 120 simultaneously, and this first clock signal C H0 and second clock signal CL0 are periodically, inverting each other and non-overlapping.This clock-signal generator 120 can adopt any suitable structure in prior art to realize.Preferably, this first clock signal C H0 and second clock signal CL0 can be the square-wave signal of duty ratio 0.5.
As a nonrestrictive example, when second clock signal CL0 is when for logic is high, the first clock signal C H0 is logic low, switch S 2, S4, S5, S7 conducting, switch S 1, S3, S6, S8 disconnects, the first input end A of trsanscondutance amplifier receives negative input signal Vn, the second input B of trsanscondutance amplifier receives positive input signal Vp, the output C of negative input signal Vn and trsanscondutance amplifier is reversed polarity, be that negative input signal Vn adds the lower voltage that conference causes output C, the output signal of the output C of positive input signal Vp and trsanscondutance amplifier is positive polarity, be that positive input signal Vp adds the voltage rising that conference causes output C.
When second clock signal CL0 is that logic low and the first clock signal C H0 are when to be logic high, switch S 1, S3, S6, S8 conducting, switch S 2, S4, S5, S7 disconnects, the first input end A of trsanscondutance amplifier meets positive input signal Vp, the second input B of trsanscondutance amplifier meets negative input signal Vn, the output signal of the output C of negative input signal Vn and trsanscondutance amplifier is still reversed polarity, be that negative input signal Vn adds the lower voltage that conference causes output C, the output signal of the output C of positive input signal Vp and trsanscondutance amplifier is still positive polarity, be that positive input signal Vp adds the voltage rising that conference causes output C.
Like this, under second clock signal CL0 and the first clock signal C H0 control, the transitive relation of switch current transfer circuit in the input signal receiving by two inputs switching trsanscondutance amplifier, remain output C and the negative input signal Vn reversed polarity of trsanscondutance amplifier, keep output C and the positive input signal Vp positive polarity of trsanscondutance amplifier.
In trsanscondutance amplifier, the size of current Iout of output is expressed as: Iout=Gm*(Vp-Vn), the wherein mutual conductance of Gm for setting, the magnitude of voltage that Vp is positive input signal, Vn is the magnitude of voltage of negative input signal.The big or small correlative factor of mutual conductance Gm has: difference input is the size to pipe N2 to pipe N1 and difference input, the size of resistance R 1 and resistance R 2, mirror image pipe P1 and mirror image pipe P2 size, mirror image pipe P3 and mirror image pipe P4 size, mirror image pipe N4 and mirror image pipe N5 size.
When requiring mutual conductance Gm precision higher, need difference input symmetrical to pipe N2 to pipe N1 and difference input, resistance R 1 and resistance R 2 symmetries, mirror image pipe P1 and mirror image pipe P2 are symmetrical, and mirror image pipe P3 and mirror image pipe P4 are symmetrical, and mirror image pipe N4 and mirror image pipe N5 are symmetrical.Above symmetrical device in fact can not be accomplished full symmetric, can have imbalance, thereby can cause the imbalance of amplifier.When the trsanscondutance amplifier of imbalance is controlled as loop, can cause the reduction of control precision, affect the consistency of circuit.For example, for constant voltage, controlling is constant voltage generation deviation, and for constant current, controlling is constant current generation deviation, for permanent power, is firm power generation deviation, etc.
Suppose, the differential input stage circuit mismatch of trsanscondutance amplifier causes under identical positive input signal Vp, negative input signal Vn, flows through difference input the electric current of pipe N1 is greater than and flows through the electric current of difference input to pipe N2.When adopting periodically non-overlapping a pair of inversion clock signal CL0 and CH0 to control to switch, because the difference input of trsanscondutance amplifier receives positive input signal Vp and negative input signal Vn in turn to pipe N1 and N2.When negative input signal Vn transfers to difference input to pipe N1, the electric current that negative input signal Vn is corresponding is relatively large; When positive input signal Vp is connected to difference input to pipe N1, the electric current that positive input signal Vp is corresponding is relatively large.If it is 0.5 that the duty ratio of second clock signal CL0 and the first clock signal C H0 is set, in whole one-period, the imbalance of the electric current that the negative input signal Vn causing due to differential input stage circuit and positive input signal Vp are corresponding will be cancelled out each other, and greatly improve the consistency of circuit.
As shown from the above technical solution, the major function of differential input stage circuit 201 is that voltage transitions is become to electric current, and the major function of current transfer circuit is that electric current is transmitted, therefore, can replace differential input stage circuit 201 by the voltage transitions electric current structure of any appropriate format, can replace current transfer circuit by the current delivery structure of any appropriate format, include but not limited to various current-mirror structure.
With reference to figure 6, Fig. 6 shows the LED drive circuit of the present embodiment, comprising: constant-current control circuit 900, transformer T1, switching tube M1, sampling resistor Rcs, sustained diode 2, output capacitance Cbulk.Wherein, the Same Name of Ends of the former limit winding L 2 of transformer T1 receives input voltage vin, and the different name end of the secondary winding L 3 of transformer T1 connects the positive pole of sustained diode 2, the Same Name of Ends ground connection of secondary winding L 3; The drain electrode of switching tube M1 connects the different name end of former limit winding L 2, and the grid of switching tube M1 connects the output of constant-current control circuit 900; The source electrode of the first end connecting valve pipe M1 of sampling resistor Rcs and the sampling input of constant-current control circuit 900, the second end ground connection of sampling resistor Rcs; The first end of output capacitance Cbulk connects the negative pole of sustained diode 2, the second end ground connection of output capacitance Cbulk.It should be noted that, " ground connection " refers to and is connected to conventional ground herein, and non-floating ground.
Furthermore, constant-current control circuit 900 comprises: trsanscondutance amplifier 901, pwm signal generation circuit 902, logic and driver circuitry 903, output equivalent Current calculation circuit 904 and peak sampling hold circuit 905.
Wherein, the input of peak sampling hold circuit 905 connects the sampling input of constant-current control circuit 900, and the sampled voltage on sampling resistor Rcs is sampled; The input of output equivalent Current calculation circuit 904 is connected with the output of peak sampling hold circuit 905, and the sampled voltage obtaining according to employing calculates output equivalent electric current, and output represents the equivalent voltage of this output equivalent electric current; The first input end of trsanscondutance amplifier 901 connects the output of output equivalent Current calculation circuit 904, and its second input receives reference voltage Vref 1, and equivalent voltage and reference voltage Vref 1 are carried out to error amplification; The input of pwm signal generation circuit 902 connects the output of trsanscondutance amplifier 901, according to the error signal of trsanscondutance amplifier 901 outputs, produces pwm signal GT1, and the duty ratio of this pwm signal GT1 is regulated by above-mentioned error signal; The input of logic and driver circuitry 903 connects the output of pwm signal generation circuit 902, pwm signal GT1 obtains driving signal GT after processing via this logic and driver circuitry 903, this driving signal GT transfers to the grid of switching tube M1, in order to the turn-on and turn-off of control switch pipe M1.
In addition, this constant-current control circuit 900 can also have compensation port COMP, and this compensation port COMP is connected with the output of trsanscondutance amplifier 901 and the input of pwm signal generation circuit 902.This compensation port COMP can external compensating element,, for example, by resistance, capacitances in series or be formed in parallel.
The structure of the trsanscondutance amplifier 901 in Fig. 6 is the transconductance amplifier circuit structure shown in Fig. 3, no longer elaborates here.Because trsanscondutance amplifier 901 adopts input switch networks and the current delivery switching network bang path of switched differential input stage circuit and mirror current source in turn, therefore can significantly improve the consistency of output current.
The above, be only preferred embodiment of the present utility model, not the utility model done to any pro forma restriction.Therefore, every content that does not depart from technical solutions of the utility model, just according to technical spirit of the present utility model to any simple modification made for any of the above embodiments, the conversion that is equal to, all still belong in the protection range of technical solutions of the utility model.
Claims (14)
1. a LED drive circuit, comprises constant-current control circuit, transformer, switching tube, sampling resistor, fly-wheel diode and output capacitance, wherein,
The Same Name of Ends of the former limit winding of described transformer receives input voltage, the Same Name of Ends ground connection of the secondary winding of described transformer, and the different name end of the secondary winding of described transformer connects the positive pole of described fly-wheel diode;
The drain electrode of described switching tube connects the different name end of the former limit winding of described transformer, and the grid of described switching tube connects the output of described constant-current control circuit;
The first end of described sampling resistor connects the source electrode of described switching tube and the sampling input of described constant-current control circuit, the second end ground connection of described sampling resistor;
The first end of described output capacitance connects the negative pole of described fly-wheel diode, the second end ground connection of described output capacitance,
It is characterized in that, described constant-current control circuit comprises:
Peak sampling hold circuit, its input connects the sampling input of described constant-current control circuit, and the sampled voltage on described sampling resistor is sampled;
Output equivalent Current calculation circuit, its input is connected with the output of described peak sampling hold circuit, according to described sampled voltage, calculates output equivalent electric current, and output represents the equivalent voltage of this output equivalent electric current;
Trsanscondutance amplifier, its first input end connects the output of described output equivalent Current calculation circuit, and its second input receives reference voltage, and described equivalent voltage and reference voltage are carried out to error amplification;
Pwm signal generation circuit, its input connects the output of described trsanscondutance amplifier, according to the error signal of described trsanscondutance amplifier output, produces pwm signal, and the duty ratio of described pwm signal is regulated by described error signal;
Logic and driver circuitry, its input connects the output of described pwm signal generation circuit, and described pwm signal transfers to the grid of described switching tube via this logic and driver circuitry;
Wherein, described trsanscondutance amplifier comprises:
Differential input stage circuit, comprises that the first voltage turns current circuit and second voltage turns current circuit;
Input switch network, positive input signal and negative input signal to the input of the first input end from described trsanscondutance amplifier and the second input switch, and make described positive input signal and negative input signal alternately input to described the first voltage and turn the input that current circuit and second voltage turn current circuit;
Current transfer circuit, transmits the electric current of described differential input stage circuit output;
Current delivery switching network, switches the current delivery path of described current transfer circuit, makes the output signal of described trsanscondutance amplifier and described positive input signal keep positive polarity, and keeps reversed polarity with described negative input signal;
Clock-signal generator, produce periodically non-the first overlapping clock signal and second clock signal, this first clock signal and second clock signal inversion, this first clock signal and second clock signal are used for controlling described input switch network and current delivery switching network;
Wherein, described current transfer circuit comprises:
The first mirror current source, its input is connected with the output that described the first voltage turns current circuit;
The second mirror current source, its input is connected with the output that described second voltage turns current circuit;
The 3rd mirror current source, its input is connected with the output of the second mirror current source with described the first mirror current source respectively via described current delivery switching network with output.
2. LED drive circuit according to claim 1, is characterized in that, described input switch network comprises:
The first switch, its first end receives described negative input signal, and its second end connects the input that described the first voltage turns current circuit, and its control end receives described the first clock signal;
Second switch, its first end receives described positive input signal, and its second end connects the input that described the first voltage turns current circuit, and its control end receives described second clock signal;
The 3rd switch, its first end receives described positive input signal, and its second end connects the input that described second voltage turns current circuit, and its control end receives described the first clock signal;
The 4th switch, its first end receives described negative input signal, and its second end connects the input that described second voltage turns current circuit, and its control end receives described second clock signal.
3. LED drive circuit according to claim 1, is characterized in that, described current delivery switching network comprises:
The 5th switch, its first end connects the output of described the first mirror current source, and its second end connects the output of described trsanscondutance amplifier, and its control end receives described second clock signal;
The 6th switch, its first end connects the output of described the first mirror current source, and its second end connects the input of described the 3rd mirror current source, and its control end receives described the first clock signal;
Minion is closed, and its first end connects the output of described the second mirror current source, and its second end connects the input of described the 3rd mirror current source, and its control end receives described second clock signal;
The 8th switch, its first end connects the output of described the second mirror current source, and its second end connects the output of described the 3rd mirror current source, and its control end receives described the first clock signal.
4. LED drive circuit according to claim 1, is characterized in that, the duty ratio of described the first clock signal and second clock signal is 0.5.
5. LED drive circuit according to claim 1, is characterized in that, described the first voltage turns current circuit and comprises that the first difference input is to pipe, and described second voltage turns current circuit and comprises that the second difference input is to pipe.
6. LED drive circuit according to claim 5, is characterized in that, described the first differential pair tube is connected with the first resistance, and described the second differential pair tube is connected with the second resistance.
7. LED drive circuit according to claim 5, is characterized in that, described the first difference input is nmos pass transistor, NPN triode, PMOS transistor or PNP triode to pipe and the input of the second difference to pipe.
8. a trsanscondutance amplifier, is characterized in that, comprising:
Differential input stage circuit, comprises that the first voltage turns current circuit and second voltage turns current circuit;
Input switch network, positive input signal and negative input signal to the input of the first input end from described trsanscondutance amplifier and the second input switch, and make described positive input signal and negative input signal alternately input to described the first voltage and turn the input that current circuit and second voltage turn current circuit;
Current transfer circuit, transmits the electric current of described differential input stage circuit output,
Current delivery switching network, switches the current delivery path of described current transfer circuit, makes the output signal of described trsanscondutance amplifier and described positive input signal keep positive polarity, and keeps reversed polarity with described negative input signal;
Clock-signal generator, produce periodically non-the first overlapping clock signal and second clock signal, this first clock signal and second clock signal inversion, this first clock signal and second clock signal are used for controlling described input switch network and current delivery switching network;
Wherein, described current transfer circuit comprises:
The first mirror current source, its input is connected with the output that described the first voltage turns current circuit;
The second mirror current source, its input is connected with the output that described second voltage turns current circuit;
The 3rd mirror current source, its input is connected with the output of the second mirror current source with described the first mirror current source respectively via described current delivery switching network with output.
9. trsanscondutance amplifier according to claim 8, is characterized in that, described input switch network comprises:
The first switch, its first end receives described negative input signal, and its second end connects the input that described the first voltage turns current circuit, and its control end receives described the first clock signal;
Second switch, its first end receives described positive input signal, and its second end connects the input that described the first voltage turns current circuit, and its control end receives described second clock signal;
The 3rd switch, its first end receives described positive input signal, and its second end connects the input that described second voltage turns current circuit, and its control end receives described the first clock signal;
The 4th switch, its first end receives described negative input signal, and its second end connects the input that described second voltage turns current circuit, and its control end receives described second clock signal.
10. trsanscondutance amplifier according to claim 8, is characterized in that, described current delivery switching network comprises:
The 5th switch, its first end connects the output of described the first mirror current source, and its second end connects the output of described trsanscondutance amplifier, and its control end receives described second clock signal;
The 6th switch, its first end connects the output of described the first mirror current source, and its second end connects the input of described the 3rd mirror current source, and its control end receives described the first clock signal;
Minion is closed, and its first end connects the output of described the second mirror current source, and its second end connects the input of described the 3rd mirror current source, and its control end receives described second clock signal;
The 8th switch, its first end connects the output of described the second mirror current source, and its second end connects the output of described the 3rd mirror current source, and its control end receives described the first clock signal.
11. trsanscondutance amplifiers according to claim 8, is characterized in that, the duty ratio of described the first clock signal and second clock signal is 0.5.
12. trsanscondutance amplifiers according to claim 8, is characterized in that, described the first voltage turns current circuit and comprises that the first difference input is to pipe, and described second voltage turns current circuit and comprises that the second difference input is to pipe.
13. trsanscondutance amplifiers according to claim 12, is characterized in that, described the first differential pair tube is connected with the first resistance, and described the second differential pair tube is connected with the second resistance.
14. trsanscondutance amplifiers according to claim 12, is characterized in that, described the first difference input is nmos pass transistor, NPN triode, PMOS transistor or PNP triode to pipe and the input of the second difference to pipe.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320566645.2U CN203423834U (en) | 2013-09-12 | 2013-09-12 | LED drive circuit and transconductance amplifier thereof. |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320566645.2U CN203423834U (en) | 2013-09-12 | 2013-09-12 | LED drive circuit and transconductance amplifier thereof. |
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| Publication Number | Publication Date |
|---|---|
| CN203423834U true CN203423834U (en) | 2014-02-05 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201320566645.2U Expired - Lifetime CN203423834U (en) | 2013-09-12 | 2013-09-12 | LED drive circuit and transconductance amplifier thereof. |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104470091A (en) * | 2014-11-21 | 2015-03-25 | 南京大学 | Low-power current self-locking LED controller |
| CN117388723A (en) * | 2023-12-12 | 2024-01-12 | 成都市易冲半导体有限公司 | Current sampling circuit, chip and electronic equipment |
-
2013
- 2013-09-12 CN CN201320566645.2U patent/CN203423834U/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104470091A (en) * | 2014-11-21 | 2015-03-25 | 南京大学 | Low-power current self-locking LED controller |
| CN117388723A (en) * | 2023-12-12 | 2024-01-12 | 成都市易冲半导体有限公司 | Current sampling circuit, chip and electronic equipment |
| CN117388723B (en) * | 2023-12-12 | 2024-02-23 | 成都市易冲半导体有限公司 | Current sampling circuit, chip and electronic equipment |
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