CN201623627U - Power PFC circuit and television set having the same - Google Patents
Power PFC circuit and television set having the same Download PDFInfo
- Publication number
- CN201623627U CN201623627U CN201020001309XU CN201020001309U CN201623627U CN 201623627 U CN201623627 U CN 201623627U CN 201020001309X U CN201020001309X U CN 201020001309XU CN 201020001309 U CN201020001309 U CN 201020001309U CN 201623627 U CN201623627 U CN 201623627U
- Authority
- CN
- China
- Prior art keywords
- pin
- management chip
- power management
- described power
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Landscapes
- Dc-Dc Converters (AREA)
Abstract
The utility model embodiment discloses a power PFC circuit and a television set having the same. The power PFC circuit comprises a power management chip, the ZCDA base pin and the GDA base pin of which is connected with a first boost circuit, the ZCDB base pin and the GDB base pin of which is connected with a second boost circuit, the VSENSE base pin and the TEST base pin of which is connected with a first bleeder circuit, the COMP base pin and the AGND base pin of which is connected with a soft start-up circuit, the HVSEN base pin of which is connected with a second bleeder circuit, and the VINAC base pin of which is connected with a third bleeder circuit. The utility model is suitable for the power supply circuit PFC of liquid crystal display televisions.
Description
Technical field
The utility model relates to the power circuit technical field, particularly a kind of power supply pfc circuit and have the television set of this circuit.
Background technology
Usually, power supply can produce heat when work, and this has just wasted a part of energy; Simultaneously, when converting alternating current to direct current, itself also can cause a part of energy to run off.In order to reduce the loss of the energy, improve the utilization ratio of power supply, in the power supply design, adopt PFC (Power Factor Correction, power factor correction) circuit to improve the utilization ratio of electric energy.PFC is mainly used to characterize the utilization ratio of electronic product to electric energy, and the value of PFC is high more, illustrates that the utilization ratio of electric energy is high more; Utilization ratio is high more, and is just energy-conservation more, and the user just can save more cost when using electronic product.
At present, in the power supply design of LCD TV, traditional power supply pfc circuit has only a metal-oxide-semiconductor, an inductance and a diode, promptly has only a BOOST booster circuit, the complete machine power of LCD TV can only be accomplished below the 500W, can't satisfy the requirement of large scale liquid crystal TV to power.
The utility model content
Embodiment of the present utility model provides a kind of power supply pfc circuit and has the television set of this circuit, can satisfy the requirement of large scale liquid crystal TV to power.
The technical scheme that the utility model embodiment adopts is:
A kind of power supply pfc circuit, comprise power management chip, the ZCDA pin of described power management chip is connected with first booster circuit with the GDA pin, the ZCDB pin of described power management chip is connected with second booster circuit with the GDB pin, the VSENSE pin of described power management chip is connected with first bleeder circuit with the TEST pin, the COMP pin of described power management chip is connected with soft starting circuit with the AGND pin, the HVSEN pin of described power management chip is connected with second bleeder circuit, and the VINAC pin of described power management chip is connected with the 3rd bleeder circuit.
Further, the ZCDA pin of described power management chip is connected with ground by electric capacity respectively with the ZCDB pin.
Wherein, described first booster circuit all is connected with the positive pole of first diode with second booster circuit, the negative pole of described first diode is connected with the positive pole of first electrochemical capacitor, the positive pole of second electrochemical capacitor, the equal ground connection of negative pole of the negative pole of described first electrochemical capacitor, second electrochemical capacitor.
Further, be connected with electric capacity between the VREF pin of described power management chip and the PGND pin, the VREF pin of described power management chip is connected with the PHB pin, between the VREF pin of described power management chip and the PHB pin and be connected to resistance.
Further, the VSENSE pin of described power management chip is connected with first bleeder circuit with the TEST pin.
Further, the COMP pin of described power management chip is connected with soft starting circuit with the AGND pin.
Further, the HVSEN pin of described power management chip is connected with second bleeder circuit;
The VINAC pin of described power management chip is connected with the 3rd bleeder circuit.
Further, the CS pin of described power management chip is connected with ground by electric capacity, and the CS pin of described power management chip is connected with the CS end by resistance.
Further, the VCC pin of described power management chip is connected with ground by two electric capacity that are in parallel, one of them electric capacity is electrochemical capacitor, and the negative pole of described electrochemical capacitor is connected with ground, and the VCC pin of described power management chip is connected with out-put supply by resistance.
A kind of television set, described television set has above-described power supply pfc circuit, wherein, described power supply pfc circuit comprises power management chip, the ZCDA pin of described power management chip is connected with first booster circuit with the GDA pin, the ZCDB pin of described power management chip is connected with second booster circuit with the GDB pin, the VSENSE pin of described power management chip is connected with first bleeder circuit with the TEST pin, the COMP pin of described power management chip is connected with soft starting circuit with the AGND pin, the HVSEN pin of described power management chip is connected with second bleeder circuit, and the VINAC pin of described power management chip is connected with the 3rd bleeder circuit.
Further, the ZCDA pin of described power management chip is connected with ground by electric capacity respectively with the ZCDB pin.
Wherein, described first booster circuit all is connected with the positive pole of first diode with second booster circuit, the negative pole of described first diode is connected with the positive pole of first electrochemical capacitor, the positive pole of second electrochemical capacitor, the equal ground connection of negative pole of the negative pole of described first electrochemical capacitor, second electrochemical capacitor.
Further, be connected with electric capacity between the VREF pin of described power management chip and the PGND pin, the VREF pin of described power management chip is connected with the PHB pin, between the VREF pin of described power management chip and the PHB pin and be connected to resistance.
Further, the VSENSE pin of described power management chip is connected with first bleeder circuit with the TEST pin.
Further, the COMP pin of described power management chip is connected with soft starting circuit with the AGND pin.
Further, the HVSEN pin of described power management chip is connected with second bleeder circuit;
The VINAC pin of described power management chip is connected with the 3rd bleeder circuit.
Further, the CS pin of described power management chip is connected with ground by electric capacity, and the CS pin of described power management chip is connected with the CS end by resistance.
Further, the VCC pin of described power management chip is connected with ground by two electric capacity that are in parallel, one of them electric capacity is electrochemical capacitor, and the negative pole of described electrochemical capacitor is connected with ground, and the VCC pin of described power management chip is connected with out-put supply by resistance.
The utility model embodiment power supply pfc circuit and have the television set of this circuit, utilize power management chip N1 to realize the staggered conducting of two metal-oxide-semiconductors, can realize two BOOST (switch DC boosts) circuit, come to be two inductance and diode continuousing flow, thereby can satisfy of the requirement of large scale liquid crystal TV power; Improve soft starting circuit by peripheral circuit, reduce the impact of big start-up circuit and the output overvoltage of minimizing pfc circuit; By under-voltage protection, detect the voltage at the VSENSE pin place of power management chip N1, when being lower than 1.25V, there is not driving; The utility model adopts two inductor design, and single volume is very little, can be so that pfc circuit is done thinlyyer; Two inductance take turns to operate in the utility model, and the two BOOST circuit of realization are raised the efficiency than traditional single-phase inductance; Compare with only adopting a BOOST circuit in the prior art, the utility model can be realized high-power (greater than 600W) design, satisfies the requirement of large scale liquid crystal TV to power.
Description of drawings
In order to be illustrated more clearly in the utility model embodiment or technical scheme of the prior art, to do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art below, apparently, accompanying drawing in describing below only is embodiment more of the present utility model, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
The power supply pfc circuit schematic diagram that Fig. 1 provides for the utility model embodiment.
Embodiment
Below in conjunction with the accompanying drawing among the utility model embodiment, the technical scheme among the utility model embodiment is clearly and completely described, obviously, described embodiment only is the utility model part embodiment, rather than whole embodiment.Based on the embodiment in the utility model, those of ordinary skills are not making all other embodiment that obtained under the creative work prerequisite, all belong to the scope of the utility model protection.
For the advantage that makes technical solutions of the utility model is clearer, the utility model is elaborated below in conjunction with drawings and Examples.
Embodiment of the present utility model provides a kind of power supply pfc circuit, can satisfy the requirement of large scale liquid crystal TV to power.
As shown in Figure 1, described power supply pfc circuit comprises power management chip N1, the ZCDA pin of described power management chip N1 is connected with first booster circuit with the GDA pin, the ZCDB pin of described power management chip N1 is connected with second booster circuit with the GDB pin, the ZCDA pin of described power management chip N1 is connected with ground by capacitor C 11, and the ZCDB pin of described power management chip N1 is connected with ground by capacitor C 21;
In the present embodiment, described power management chip N1 can be chip UCC28061, but is not limited only to this;
Wherein, described first booster circuit comprises: metal-oxide-semiconductor V11, inductance L 1, triode V12, diode VD11, VD12, resistance R 11, R12, R13, R14, and capacitor C 12;
The ZCDA pin of described power management chip N1 is connected with second pin of inductance L 1 by resistance R 14, the first pin ground connection of described inductance L 1, the 3rd pin of described inductance L 1 is connected with the positive pole of diode VD11, the negative pole of described diode VD11 is connected with input power supply (380V), and the 4th pin of described inductance L 1 is connected with input power supply (380V); The GDA pin of described power management chip N1 is connected with the positive pole of diode VD12, and be connected with the base stage of positive-negative-positive triode V12 by resistance R 13, the emitter of described triode V12 is connected with the negative pole of diode VD12, the grounded collector of described triode V12, the negative pole of described diode VD12 is connected with the grid of metal-oxide-semiconductor V11 by resistance R 12, the grid of described metal-oxide-semiconductor V11 is connected with ground by resistance R 11, the source ground of described metal-oxide-semiconductor V11, the source electrode of described metal-oxide-semiconductor V11 and the drain electrode between and be connected to capacitor C 12, the drain electrode of described metal-oxide-semiconductor V11 is connected with the positive pole of diode VD11;
Wherein, described second booster circuit comprises: metal-oxide-semiconductor V21, inductance L 2, triode V22, diode VD21, VD22, resistance R 21, R22, R23, R24, R25, and capacitor C 22;
The ZCDB pin of described power management chip N1 is connected with second pin of inductance L 2 by resistance R 24, the first pin ground connection of described inductance L 2, the 3rd pin of described inductance L 2 is connected with the positive pole of diode VD21, the negative pole of described diode VD21 is connected with input power supply (380V), and the 4th pin of described inductance L 2 is connected with input power supply (380V); The GDB pin of described power management chip N1 is connected with the positive pole of diode VD22, and be connected with the base stage of positive-negative-positive triode V22 by resistance R 23, between the GDB pin of described power management chip N1 and the positive pole of diode VD22 and be connected to resistance R 25, the emitter of described triode V22 is connected with the negative pole of diode VD22, the grounded collector of described triode V22, the negative pole of described diode VD22 is connected with the grid of metal-oxide-semiconductor V21 by resistance R 22, the grid of described metal-oxide-semiconductor V21 is connected with ground by resistance R 21, the source ground of described metal-oxide-semiconductor V21, the source electrode of described metal-oxide-semiconductor V21 and the drain electrode between and be connected to capacitor C 22, the drain electrode of described metal-oxide-semiconductor V21 is connected with the positive pole of diode VD21;
The 4th pin of described inductance L 1, the 4th pin of inductance L 2 all are connected with the positive pole of diode VD0, the negative pole of the negative pole of described diode VD11, diode VD21 all is connected with the negative pole of diode VD0, the negative pole of described diode VD0 is connected with the positive pole of electrochemical capacitor C01, the positive pole of electrochemical capacitor C02, the equal ground connection of negative pole of the negative pole of described electrochemical capacitor C01, electrochemical capacitor C02;
Be connected with capacitor C 3 between the VREF pin of described power management chip N1 and the PGND pin, the VREF pin of described power management chip N1 is connected with the PHB pin, between the VREF pin of described power management chip N1 and the PHB pin and be connected to resistance R 3;
The VSENSE pin of described power management chip N1 is connected with first bleeder circuit with the TEST pin, and wherein, described first bleeder circuit comprises: resistance R 41, R42, R43, R44, R45, R46, R47 and capacitor C 4;
The VSENSE pin of described power management chip N1 is connected with ground with capacitor C 4 by the resistance R 42 that is in parallel, the VSENSE pin of described power management chip N1 is connected with input power supply (380V) by resistance R 43, R44, the R45 that is in series, between the VSENSE pin of described power management chip N1 and the resistance R 42 and be connected to resistance R 46 and the R47 that is in parallel, the TEST pin of described power management chip N1 is connected with ground by resistance R 41;
The COMP pin of described power management chip N1 is connected with soft starting circuit with the AGND pin, and wherein, described soft starting circuit comprises: resistance R 51, R52, R53, R54, capacitor C 51, C52, C53, C54, diode VD5 and triode V5;
The COMP pin of described power management chip N1 is connected with ground with capacitor C 51 by the resistance R 51 that is in series, the COMP pin of described power management chip N1 is connected with ground by capacitor C 52, the COMP pin of described power management chip N1 is connected with the collector electrode of NPN type triode V5 by resistance R 52, the grounded emitter of described NPN type triode V5, the base stage of described NPN type triode V5 is connected with ground with resistance R 53 by the capacitor C 53 that is in parallel, the base stage of described NPN type triode V5 is connected with the negative pole of diode VD5 by resistance R 54, the negative pole of described diode VD5 is connected with out-put supply (VCC) by capacitor C 54, the plus earth of described diode VD5, the AGND pin ground connection of described power management chip N1;
The HVSEN pin of described power management chip N1 is connected with second bleeder circuit, and wherein, described second bleeder circuit comprises: resistance R 61, R62, R63, R64, R65 and capacitor C 6;
The HVSEN pin of described power management chip N1 is connected with ground with capacitor C 6 by the resistance R 65 that is in parallel, the HVSEN pin of described power management chip N1 is connected with input power supply (380V) by resistance R 62, R63, the R64 that is in series, between the HVSEN pin of described power management chip N1 and the resistance R 65 and be connected to resistance R 61;
The VI NAC pin of described power management chip N1 is connected with the 3rd bleeder circuit, and wherein, described the 3rd bleeder circuit comprises: resistance R 71, R72, R73, R74, R75 and capacitor C 7;
The VINAC pin of described power management chip N1 is connected with ground with capacitor C 7 by the resistance R 75 that is in parallel, the VINAC pin of described power management chip N1 is connected with input power supply (380V) by resistance R 72, R73, the R74 that is in series, between the VINAC pin of described power management chip N1 and the resistance R 75 and be connected to resistance R 71;
The CS pin of described power management chip N1 is connected with ground by capacitor C 8, and the CS pin of described power management chip N1 is connected with the CS end by resistance R 8;
The VCC pin of described power management chip N1 is connected with ground with C92 by the capacitor C 91 that is in parallel, described capacitor C 91 is an electrochemical capacitor, the negative pole of described capacitor C 91 is connected with ground, and the VCC pin of described power management chip N1 is connected with out-put supply (VCC) by resistance R 91.
The operation principle of described power supply pfc circuit is as follows:
Utilize the capacitor C 54 logical effects that exchange the resistance direct current, make the VCC powered on moment, there is electric current to open triode V5 by resistance R 53 and R54 dividing potential drop, COMP pin ground connection with power management chip N1, realize the soft start of chip, then, because the capacitor C 54 logical effects that exchange the resistance direct current, triode V5 closes, the chip operate as normal; Resistance R 42, R43, R44, R45 carry out dividing potential drop, and sampling resistor R42 output voltage is approximately 6V, utilize the VSENSE pin senses output over-voltage protection of power management chip N1; The ZCDA pin of power management chip N1, ZCDB pin senses zero current interlocks and opens metal-oxide-semiconductor V11 and V21, because metal-oxide-semiconductor has junction capacitance, need discharge rapidly, external positive-negative-positive triode V11 and V21 discharge, when the electric current that detects inductance L 1 coupling as ZCDA is zero, the GDA pin driven MOS pipe V11 of power management chip N1 opens, the out-put supply of 300V is inductance L 1 afterflow, at this moment, inductance L 2 is an electric by diode VD21, when the electric current that detects inductance L 2 coupling as ZCDB is zero, the GDB pin driven MOS pipe V21 of power management chip N1 opens, the out-put supply of 300V is voltage device L2 afterflow, and this moment, inductance L 1 was an electric by diode VD11.
The power supply pfc circuit that the utility model embodiment provides, utilize power management chip N1 to realize the staggered conducting of two metal-oxide-semiconductors, can realize two BOOST (switch DC boosts) circuit, come to be two inductance and diode continuousing flow, thereby can satisfy of the requirement of large scale liquid crystal TV power; Improve soft starting circuit by peripheral circuit, reduce the impact of big start-up circuit and the output overvoltage of minimizing pfc circuit; By under-voltage protection, detect the voltage at the VSENSE pin place of power management chip N1, when being lower than 1.25V, there is not driving; The utility model adopts two inductor design, and single volume is very little, can be so that pfc circuit is done thinlyyer; Two inductance take turns to operate in the utility model, and the two BOOST circuit of realization are raised the efficiency than traditional single-phase inductance; Compare with only adopting a BOOST circuit in the prior art, the utility model can be realized high-power (greater than 600W) design, satisfies the requirement of large scale liquid crystal TV to power.
Embodiment of the present utility model also provides a kind of television set, and described television set has above-described power supply pfc circuit.
The utility model is applicable in the large scale liquid crystal television set power circuit is carried out power factor correction, but is not limited only to this.
The above; it only is embodiment of the present utility model; but protection range of the present utility model is not limited thereto; anyly be familiar with those skilled in the art in the technical scope that the utility model discloses; the variation that can expect easily or replacement all should be encompassed within the protection range of the present utility model.Therefore, protection range of the present utility model should be as the criterion with the protection range of claim.
Claims (10)
1. power supply pfc circuit, it is characterized in that, comprise power management chip, the ZCDA pin of described power management chip is connected with first booster circuit with the GDA pin, the ZCDB pin of described power management chip is connected with second booster circuit with the GDB pin, the VSENSE pin of described power management chip is connected with first bleeder circuit with the TEST pin, the COMP pin of described power management chip is connected with soft starting circuit with the AGND pin, the HVSEN pin of described power management chip is connected with second bleeder circuit, and the VINAC pin of described power management chip is connected with the 3rd bleeder circuit.
2. power supply pfc circuit according to claim 1 is characterized in that, the ZCDA pin of described power management chip is connected with ground by electric capacity respectively with the ZCDB pin.
3. power supply pfc circuit according to claim 1 and 2, it is characterized in that, described first booster circuit all is connected with the positive pole of first diode with second booster circuit, the negative pole of described first diode is connected with the positive pole of first electrochemical capacitor, the positive pole of second electrochemical capacitor, the equal ground connection of negative pole of the negative pole of described first electrochemical capacitor, second electrochemical capacitor.
4. power supply pfc circuit according to claim 1, it is characterized in that, be connected with electric capacity between the VREF pin of described power management chip and the PGND pin, the VREF pin of described power management chip is connected with the PHB pin, between the VREF pin of described power management chip and the PHB pin and be connected to resistance.
5. power supply pfc circuit according to claim 1 is characterized in that, the VSENSE pin of described power management chip is connected with first bleeder circuit with the TEST pin.
6. power supply pfc circuit according to claim 1 is characterized in that, the COMP pin of described power management chip is connected with soft starting circuit with the AGND pin.
7. power supply pfc circuit according to claim 1 is characterized in that, the HVSEN pin of described power management chip is connected with second bleeder circuit;
The VINAC pin of described power management chip is connected with the 3rd bleeder circuit.
8. power supply pfc circuit according to claim 1 is characterized in that, the CS pin of described power management chip is connected with ground by electric capacity, and the CS pin of described power management chip is connected with the CS end by resistance.
9. power supply pfc circuit according to claim 1, it is characterized in that, the VCC pin of described power management chip is connected with ground by two electric capacity that are in parallel, one of them electric capacity is electrochemical capacitor, the negative pole of described electrochemical capacitor is connected with ground, and the VCC pin of described power management chip is connected with out-put supply by resistance.
10. a television set is characterized in that, described television set has each described power supply pfc circuit in the claim 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201020001309XU CN201623627U (en) | 2010-01-04 | 2010-01-04 | Power PFC circuit and television set having the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201020001309XU CN201623627U (en) | 2010-01-04 | 2010-01-04 | Power PFC circuit and television set having the same |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201623627U true CN201623627U (en) | 2010-11-03 |
Family
ID=43027082
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201020001309XU Expired - Lifetime CN201623627U (en) | 2010-01-04 | 2010-01-04 | Power PFC circuit and television set having the same |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201623627U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104852563A (en) * | 2015-05-20 | 2015-08-19 | 重庆大学 | Switching power supply external soft start circuit |
| CN106329908A (en) * | 2016-11-16 | 2017-01-11 | 昆山华恒焊接股份有限公司 | Welding power circuit |
| CN114421822A (en) * | 2022-01-24 | 2022-04-29 | 浙江三锋实业股份有限公司 | Intelligent control method of brushless motor |
-
2010
- 2010-01-04 CN CN201020001309XU patent/CN201623627U/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104852563A (en) * | 2015-05-20 | 2015-08-19 | 重庆大学 | Switching power supply external soft start circuit |
| CN106329908A (en) * | 2016-11-16 | 2017-01-11 | 昆山华恒焊接股份有限公司 | Welding power circuit |
| CN114421822A (en) * | 2022-01-24 | 2022-04-29 | 浙江三锋实业股份有限公司 | Intelligent control method of brushless motor |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN207304403U (en) | A kind of Switching Power Supply | |
| CN204216600U (en) | Synchronization lifting piezoelectric battery charging device | |
| CN102665322B (en) | Driving power supply without electrolytic capacitor | |
| CN101471608A (en) | Switch power supply circuit | |
| CN103379701A (en) | LED driving circuit and LED lamp | |
| CN104155892B (en) | Circuit and method using the faint energy collection technology of single-chip I/O mouth | |
| CN201623627U (en) | Power PFC circuit and television set having the same | |
| CN201562997U (en) | Quick charging device for electric bike | |
| CN202514138U (en) | Drive power supply for non-electrolytic capacitor | |
| CN102332836B (en) | PFC boost follower circuit | |
| CN202759643U (en) | LED television and backlight driving circuit thereof | |
| CN202178711U (en) | Dual supply output circuit possessing ultralow no-load power consumption and high efficiency under low load | |
| CN204578353U (en) | Secondary commutation absorbing circuit in DC converter used for electric vehicle | |
| CN201182026Y (en) | Driving power supply device of LED lamp group | |
| CN102843047B (en) | Transformer with microprocessor to control series-parallel connection conversion of a capacitor | |
| CN2595063Y (en) | Active power factor corrector with low cost | |
| CN103259295A (en) | Portable electronic device with solar charging function | |
| CN202167992U (en) | Self-excited synchronous rectifying booster converter | |
| CN203457054U (en) | Wide input voltage flyback switching power supply suitable for DC motor driving | |
| CN202750022U (en) | Series-parallel conversion transformer using microprocessor to control capacitors | |
| CN202907268U (en) | LED driving circuit | |
| CN201345612Y (en) | Power supply circuit of display | |
| CN202750024U (en) | Power supply device and plasma display device | |
| CN201435865Y (en) | Preheating circuit of electronic ballast | |
| CN202455272U (en) | Power supply circuit with over-current protection |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20101103 |