CN201571229U - Lighting-up system - Google Patents
Lighting-up system Download PDFInfo
- Publication number
- CN201571229U CN201571229U CN2009201625508U CN200920162550U CN201571229U CN 201571229 U CN201571229 U CN 201571229U CN 2009201625508 U CN2009201625508 U CN 2009201625508U CN 200920162550 U CN200920162550 U CN 200920162550U CN 201571229 U CN201571229 U CN 201571229U
- Authority
- CN
- China
- Prior art keywords
- lamp
- signal
- processing unit
- control circuit
- resistance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Projection Apparatus (AREA)
Abstract
The utility model relates to a lighting-up system which comprises a first lamp, a second lamp, a system control and treatment unit and a lamp control and drive unit, wherein the system control and processing unit is used for receiving and treating a command of a user to send system control signals and double-lamp enabling signals; and the lamp control and drive unit is coupled with the first lamp, the second lamp and the system control and treatment unit and is used for carrying out logical operation on the system control signals and the double-lamp enabling signals to send double-lamp drive signals to light up at least one of the first lamp and the second lamp.
Description
Technical field
The utility model relates to a kind of lighting system, and is particularly related to a kind of lighting system that is applied to projection arrangement.
Background technology
Product in conjunction with display and projector is one of emphasis of technical development in recent years, for example liquid crystal display (1iquid crystal display, LCD) projector, (the digital lightprocessing of digit optical place, DLP) projector or liquid crystal over silicon (1iquid crystal on silicon, LCOS) projector or the like.Wherein, digital optical processing projector is different from the past liquid crystal projector light beam is penetrated the liquid crystal panel imaging mode, but makes light beam produce image via the reflection of the micromirror on the digital micro-mirror device.
Utilize the technology of digital micro-mirror device that the weight of projection arrangement is reduced, volume also can significantly dwindle, and optical efficiency and higher resolution preferably can be provided simultaneously.Because digital micro-mirror device has reflectivity and high characteristic of filling up rate produces higher optical efficiency.Therefore, digital optical processing projector is applicable to needs high brightness and high-resolution purposes.Simultaneously, the total digitalization design of digit optical processing also provides more correct and stable regeneration image.
Digit optical is handled the design that projector adopts single lamp projection mostly now.Figure 1 shows that the schematic diagram of single lamp projection of conventional digital optical treatment projector.With reference to Fig. 1, the general DLP ASIC 101 that adopts Texas Instrument (TI) to be researched and developed mostly in order to the control unit of lighting lamp 107.TI DLP ASIC101 is after colour wheel (color wheel, not shown) stabilization of speed, and the system control signal LCS that can send logic high gives lamp control circuit 103.
When lamp control circuit 103 receives the system control signal LCS of logic high, the lamp drive signal SCI that lamp control circuit 103 can send logic low gives lamp driver 105, and provide a continuous current loop to lamp driver 105, make lamp driver 105 drive (lighting) lamp 107.In other words, when the lamp drive signal SCI that sends logic high when lamp control circuit 103 gave lamp driver 105, current circuit can be cut off.Thus, lamp 107 will extinguish.
Traditionally, when lamp driver 105 was successfully lighted lamp 107, the lamp status signal LST that lamp control circuit 103 can transmit a logic low gave TI DLP ASIC 101 (expression is lit a lamp successfully).Thus, TI DLPASIC 101 can give lamp control circuit 103 by transfer system synchronizing signal SYNC after learning that lamp 107 has successfully been lighted, control the polarity (frequency) and the sense of current of lamp 107 thus, produces flicker in order to avoid throwing image.
On the other hand, when lamp driver 105 was not lighted lamp 107 as scheduled, the lamp status signal LST that lamp control circuit 103 can transmit a logic high gave TI DLP ASIC 101 (expression light a lamp failure).Thus, TI DLP ASIC 101 is after learning that lamp 107 is not lighted as scheduled, the system control signal LCS of logic high of can retransferring gives lamp control circuit 103 to light lamp 107 once more, till a pre-determined number, for example TI DLP ASIC 101 can repeat the system control signal LCS of 6 transmission logic highs to lamp control circuit 103.
Based on above-mentioned, if the words that adopt TI DLP ASIC 101 to drive two lamps or the projection of many lamps (have United States Patent (USP) case number the 7th with many lamps relevant patent of lighting a lamp, 009,348 B2 numbers), that is: directly the system control signal LCS that TI DLPASIC 101 is sent offers two or more lamp control circuit/lamp drivers in parallel, has following some situation:
1, can't specify to light specific lamp according to the user;
2, can't be under the state that a certain lamp has been lighted, extra (increase) lights another lamp;
3, can't under the state that a certain lamp has been lighted, alternately light another lamp; And
4, lighting two lamps wherein under the state of success and another failure, can't light a lamp once more and do not influence that lamp of successfully lighting at that lamp of lighting failure.
The utility model content
In view of this, the utility model proposes a kind of lighting system, can adjust the quantity of lighting lamp according to operating position.
Other purpose of the present utility model and advantage can be further understood from the disclosed technical characterictic of the utility model.
For reaching one of above-mentioned or partly or entirely purpose or other purpose, an embodiment of the present utility model provides a kind of lighting system, is applicable to a projection arrangement.Lighting system comprises first lamp and second lamp, system's control and processing unit, and lamp control and driver element.System's control and processing unit are in order to receive and to handle user's order, with transmitting system control signal and two lamp enable signals.Lamp control and driver element couple first lamp, second lamp and system's control and processing unit, lamp control and driver element be in order to carrying out logical operation to system control signal and two lamp enable signals, with send two lamp drive signals light first lamp and second lamp at least one of them.
In an embodiment of the present utility model, system's control and processing unit comprise system processing unit and system control unit.System processing unit is in order to receiving and to handle user's order sending two lamp enable signals, and according to two lamp status signals with the transmitting system status signal.System control unit coupling system processing unit in order to exporting transmitting system control signal behind the two lamp enable signals at system processing unit, and determines whether resending system control signal according to system status signal.
In an embodiment of the present utility model, two lamp enable signals comprise the first lamp enable signal and the second lamp enable signal, two lamp drive signals comprise the first lamp drive signal and the second lamp drive signal, and two lamp status signals comprise the first lamp status signal and the second lamp status signal.
In an embodiment of the present utility model, lamp control and driver element comprise first lamp control circuit and first lamp driver.First lamp control circuit coupling system processing unit and the system control unit, in order to the receiving system control signal and the first lamp enable signal, and in order to the system control signal and the first lamp enable signal are carried out logical operation, to send first drive signal.First lamp driver couples first lamp control circuit and first lamp, in order to receive and according to the first lamp drive signal, whether to light first lamp with decision.
In an embodiment of the present utility model, logical operation is the NAND Logic computing.
In an embodiment of the present utility model, when the first lamp drive signal was logic low, described first lamp was lighted in the decision of first lamp driver.
In an embodiment of the present utility model, when the decision of first lamp driver is lighted first lamp and is not successfully lighted first lamp, first lamp control circuit transmits the first lamp status signal of logic high and gives system processing unit, when the decision of first lamp driver was lighted first lamp and successfully lighted first lamp, first lamp control circuit transmitted the first lamp status signal of logic low and gives system processing unit.
In an embodiment of the present utility model, lamp control and driver element also comprise second lamp control circuit and second lamp driver.Second lamp control circuit coupling system processing unit and the system control unit, in order to the receiving system control signal and the second lamp enable signal, and in order to the system control signal and the second lamp enable signal are carried out logical operation, to send second drive signal.Second lamp driver couples second lamp control circuit and second lamp, in order to receive and according to the second lamp drive signal, whether to light second lamp with decision.
In an embodiment of the present utility model, when the second lamp drive signal was logic low, second lamp was lighted in the decision of second lamp driver.
In an embodiment of the present utility model, when the decision of second lamp driver is lighted second lamp and is not successfully lighted second lamp, second lamp control circuit transmits the second lamp status signal of logic high and gives system processing unit, when the decision of second lamp driver was lighted second lamp and successfully lighted second lamp, second lamp control circuit transmitted the second lamp status signal of logic low and gives system processing unit.
In an embodiment of the present utility model, when one of them of two lamp status signals was logic high, system processing unit sent the system status signal of logic high, so that system control unit resends system control signal; When one of them of two lamp status signals was logic low, system processing unit sent the system status signal of logic low, so that system control unit transmitting system synchronizing signal is to lamp control and driver element.
In an embodiment of the present utility model, system processing unit is also kept signal to lamp control and driver element according to two lamp status signals to send two lamps.
In an embodiment of the present utility model, lamp control and driver element are also kept signal alternately to light first lamp and second lamp according to two lamps.
In an embodiment of the present utility model, two lamps are kept signal and are comprised that first lamp is kept signal and second lamp is kept signal.
In an embodiment of the present utility model, when the first lamp status signal of first lamp control circuit transmission logic high was given system processing unit, system processing unit transmitted first lamp of logic low and keeps signal to first lamp control circuit.In addition, when the second lamp status signal of second lamp control circuit transmission logic high was given system processing unit, system processing unit transmitted second lamp of logic low and keeps signal to second lamp control circuit.
In an embodiment of the present utility model, when first lamp that sends logic high when system processing unit was kept signal, system processing unit forced first lamp driver to light first lamp.In addition, when second lamp that sends logic high when system processing unit was kept signal, system processing unit forced second lamp driver to light second lamp.
In an embodiment of the present utility model, first lamp control circuit comprises NAND gate, bipolar transistor, first resistance, electric capacity and second resistance.Two inputs of NAND gate are in order to the difference receiving system control signal and the first lamp enable signal, and the output of NAND gate is in order to send the first lamp drive signal.The base stage of bipolar transistor is kept signal in order to receive first lamp, and the emitter-base bandgap grading of bipolar transistor couples an earthing potential, and the collection utmost point of bipolar transistor is coupled to the output of NAND gate.First end of first resistance couples a system voltage, and second end of first resistance couples first lamp driver.First end of electric capacity couples second end of first resistance, and second end of electric capacity is coupled to earthing potential.First end of second resistance couples second end of first resistance, and the second end coupling system processing unit of second resistance, to transmit the first lamp status signal.
In an embodiment of the present utility model, second lamp control circuit comprises NAND gate, bipolar transistor, first resistance, electric capacity and second resistance.Two inputs of NAND gate are in order to the difference receiving system control signal and the second lamp enable signal, and the output of NAND gate is in order to send the second lamp drive signal.The base stage of bipolar transistor is kept signal in order to receive second lamp, and the emitter-base bandgap grading of bipolar transistor couples an earthing potential, and the collection utmost point of bipolar transistor is coupled to the output of NAND gate.First end of first resistance couples a system voltage, and second end of first resistance couples second lamp driver.First end of electric capacity couples second end of first resistance, and second end of electric capacity is coupled to earthing potential.First end of second resistance couples second end of first resistance, and the second end coupling system processing unit of second resistance, to transmit the second lamp status signal.
In an embodiment of the present utility model, the default value of the first lamp enable signal and the second lamp enable signal is that logic low, first lamp are kept signal and second lamp to keep the default value of signal be logic low, and the default value of system status signal is a logic high.
In an embodiment of the present utility model, whether the embedded nonvolatile memory of system processing unit is lighted before the projection arrangement shutdown in order to write down first lamp and second lamp.
Based on above-mentioned, in the utility model the foregoing description, lighting system can reach following one of them purpose or other purpose at least:
1, the number of the lamp of increase projection arrangement is to increase the upper limit of projection brightness;
2, can specify according to the user and light specific lamp;
3, can be under the state that a certain small cup lamp has been lighted, extra (increase) lights another lamp;
4, can under the state that a certain small cup lamp has been lighted, alternately light another lamp; And
5, can light two lamps wherein under the state of a success and another failure, light a lamp once more and do not influence that lamp of successfully lighting at that lamp of lighting failure.
For above-mentioned feature and advantage of the present utility model can be become apparent, a plurality of embodiment cited below particularly, and in conjunction with the accompanying drawings, be described in detail below.
Description of drawings
Figure 1 shows that the schematic diagram of single lamp projection of conventional digital optical treatment projector.
Figure 2 shows that the schematic diagram of the lighting system of the utility model one embodiment.
Figure 3 shows that first lamp control circuit of the utility model one embodiment and the circuit diagram of second lamp control circuit.
Fig. 4 to Fig. 7 is depicted as the flow chart of many lamps ignition method of the utility model one embodiment respectively.
Figure 8 shows that the flow chart of many lamps ignition method of another embodiment of the utility model.
[main element symbol description]
101：TI?DLP?ASIC
103: lamp control circuit
105: lamp driver
107,201,203: lamp
205: system's control and processing unit
207: lamp control and driver element
209: system processing unit
211: system control unit
213: the first lamp control circuits
215: the first lamp drivers
217: the second lamp control circuits
219: the second lamp drivers
M: nonvolatile memory
NA: NAND gate
T: bipolar transistor
R1, R2: resistance
C: electric capacity
V
DD: system voltage
GND: earthing potential
LCS: system control signal
LST: lamp status signal
SYNC: system synchronization signal
SCI: lamp drive signal
SCI_1: the first lamp drive signal
SCI_2: the second lamp drive signal
L1_En: the first lamp enable signal
L2_En: the second lamp enable signal
L1_K: first lamp is kept signal
L2_K: second lamp is kept signal
L1ST: the first lamp status signal
L2ST: the second lamp status signal
UC: user's order
S401～S405, S501～S512, S601～S612, S701～S746, S801～S812: each step of flow chart of many lamps ignition method of the utility model embodiment
Embodiment
Aforementioned and other technology contents, characteristics and effect about the utility model in the detailed description below in conjunction with a plurality of embodiment of accompanying drawing, can clearly present.The direction term of being mentioned in following examples, for example " on ", D score, " preceding ", " back ", " left side ", " right side " etc., only be direction with reference to the accompanying drawings.Therefore, the direction term of use is to be used for explanation, but not is used for limiting the utility model.
Figure 2 shows that the schematic diagram of the lighting system 200 of the utility model one embodiment.With reference to Fig. 2, the lighting system 200 of present embodiment goes for projection arrangement, and in the present embodiment, projection arrangement is a digital optical processing projector for example, but is not limited to this.Lighting system 200 comprises first lamp 201, second lamp 203, system's control and processing unit 205, and lamp control and driver element 207.Wherein, first lamp 201 and second lamp 203 can be high-pressure mercury lamps for example, but are not limited to this.System's control and processing unit 205 are ordered UC in order to receive and to handle the user, and in order to transmitting system control signal LCS, the first lamp enable signal L1_En and the second lamp enable signal L2_En.
In addition, lamp control and driver element 207 couple first lamp 201, second lamp 203 and system's control and processing unit 205.The result that lamp control and driver element 207 can be according to system control signal LCS carry out logical operation with the first lamp enable signal L1_En and the second lamp enable signal L2_En respectively, lamp control and driver element 207 can be according to the results of logical operation, send the first lamp drive signal SCI_1 separately and light first lamp 201, or send the second lamp drive signal SCI_2 separately and light second lamp 203, perhaps send the first lamp drive signal SCI_1 and the second lamp drive signal SCI_2 lights first lamp 201 and second lamp 203 simultaneously.
Clearer, system's control and processing unit 205 comprise system processing unit 209 and system control unit 211.Wherein, system processing unit 209 (for example being the image zooming device in the digital optical processing projector) is ordered UC in order to receive and to handle the user, and in order to send the first lamp enable signal L1_En and the second lamp enable signal L2_En.In addition, system processing unit 209 also can be according to the first lamp status signal L1ST and the second lamp status signal L2ST that are replied from lamp control and driver element 207, with transmitting system status signal LST.In the present embodiment, system processing unit 209 is embedded with a nonvolatile memory M, for example be that (electrically-erasable programmable read-only memory EEPROM), but is not limited to this to electronic type EPROM.Whether nonvolatile memory M is lighted before the digital optical processing projector shutdown in order to write down first lamp 201 and second lamp 203.
In addition, system control unit 211 for example is TI DLP ASIC, system control unit 211 coupling system processing units 209.System control unit 211 meetings are ability transmitting system control signal LCS behind the system processing unit 209 output first lamp enable signal L1_En and the second lamp enable signal L2_En.In addition, system control unit 211 also can determine whether resend system control signal LCS according to system status signal LST.
On the other hand, lamp control and driver element 207 comprise first lamp control circuit 213, first lamp driver 215, second lamp control circuit 217, and second lamp driver 219.Wherein, first lamp control circuit, 213 coupling system processing units 209 and system control unit 211.First lamp control circuit 213 is in order to the receiving system control signal LCS and the first lamp enable signal L1_En, and system control signal LCS and the first lamp enable signal L1_En are for example carried out and non-(NAND) logical operation, to send the first drive signal SCI_1.
In addition, first lamp driver 215 couples first lamp control circuit 213 and first lamp 201.First lamp driver 215 is in order to receive and according to the first lamp drive signal SCI_1, whether to light first lamp 201 with decision.Therefore, when the first lamp drive signal SCI_1 is logic low (when the system control signal LCS and the first lamp enable signal L1_En are all logic high), because first lamp control circuit 213 can provide a continuous current loop to first lamp driver 215.Thus, first lamp driver 215 can decision be lighted first lamp 201.Thus, light first lamp 201 and when successfully not lighting, the first lamp status signal L1ST that first lamp control circuit 213 can transmit logic highs gives system processing unit 209 when the decision of first lamp driver 215; And when 215 decisions of first lamp driver were lighted first lamp 201 and successfully lighted, the first lamp status signal L1ST that first lamp control circuit 213 can transmit logic low gave system processing unit 209.
Similarly, second lamp control circuit, 217 coupling system processing units 209 and system control unit 211.Second lamp control circuit 217 is in order to the receiving system control signal LCS and the second lamp enable signal L2_En, and system control signal LCS and the second lamp enable signal L2_En are for example carried out and non-(NAND) logical operation, to send the second drive signal SCI_2.In addition, second lamp driver 219 couples second lamp control circuit 217 and second lamp 203.Second lamp driver 219 is in order to receive and according to the second lamp drive signal SCI_2, whether to light second lamp 203 with decision.Therefore, when the second lamp drive signal SCI_1 is logic low (when the system control signal LCS and the second lamp enable signal L2_En are all logic high), because second lamp control circuit 217 can provide a continuous current loop to second lamp driver 219.Thus, second lamp driver 219 can decision be lighted second lamp 203.Thus, light second lamp 203 and when successfully not lighting, the second lamp status signal L2ST that second lamp control circuit 217 can transmit logic highs gives system processing unit 209 when the decision of second lamp driver 219; And when 219 decisions of second lamp driver were lighted second lamp 203 and successfully lighted, the second lamp status signal L2ST that second lamp control circuit 217 can transmit logic low gave system processing unit 209.
In the present embodiment, not one of them when the logic high (not lighting all lamps as scheduled) as the first lamp status signal L1ST and the second lamp status signal L2ST, system processing unit 209 can send the system status signal LST of logic high, makes system control unit 211 resend system control signal LCS; Yet, when the first lamp status signal L1ST and the second lamp status signal L2ST are all logic low (lighting all lamps as scheduled), system processing unit 209 can send the system status signal LST of logic low, makes system control unit 211 transmitting system synchronizing signal SYNC to first lamp control circuit 213 and second lamp control circuit 217 in lamp control and the driver element 207.Thus, the polarity (frequency) of first lamp 201 and second lamp 203 will be controlled with the sense of current, produces flicker thereby avoid throwing image.
At this, referring again to Fig. 2, system processing unit 209 also can be according to the first lamp status signal L1ST and the second lamp status signal L2ST, and first lamp is kept signal L1_K and second lamp is kept signal L2_K to first lamp control circuit 213 and second lamp control circuit 217 in lamp control and the driver element 207 to send respectively.In addition, lamp control and driver element 207 also can be kept signal L1_K and second lamp is kept signal L2_K according to first lamp, alternately to light first lamp 201 and second lamp 203.
In the present embodiment, when the first lamp status signal L1ST of first lamp control circuit, 213 transmission logic highs gives system processing unit 209 (not lighting first lamp 201 as scheduled), system processing unit 209 can send first lamp of logic lows and keep signal L1_K to first lamp control circuit 213.Similarly, when the second lamp status signal L2ST of second lamp control circuit, 217 transmission logic highs gives system processing unit 209 (not lighting first lamp 203 as scheduled), system processing unit 209 can send second lamp of logic lows and keep signal L2_K to second lamp control circuit 217.
In addition, when first lamp that sends logic high when system processing unit 209 was kept signal L1_K and given first lamp control circuit 213, system processing unit 209 can force first lamp driver 215 light first lamp 201.Similarly, when second lamp that sends logic high when system processing unit 209 was kept signal L2_K and given second lamp control circuit 217, system processing unit 209 can force second lamp driver 219 light second lamp 203.
Figure 3 shows that first lamp control circuit 213 of the utility model one embodiment and the circuit diagram of second lamp control circuit 217.Merging is with reference to Fig. 2 and Fig. 3, and first lamp control circuit 213 and second lamp control circuit 217 comprise NAND gate NA, N type bipolar transistor T, resistance R 1 and R2 respectively, and capacitor C.Wherein, in first lamp control circuit 213, two inputs of NAND gate NA are in order to the difference receiving system control signal LCS and the first lamp enable signal L1_En, and the output of NAND gate NA is in order to send the first lamp drive signal SCI_1.The base stage of N type bipolar transistor T is kept signal L1_K in order to receive first lamp, and the emitter-base bandgap grading of N type bipolar transistor T is coupled to an earthing potential GND, and the collection utmost point of N type bipolar transistor T is coupled to the output of NAND gate NA.First end of resistance R 1 is coupled to a system voltage V
DD, and second end of resistance R 1 couples first lamp driver 215.First end of capacitor C couples second end of resistance R 1, and second end of capacitor C is coupled to earthing potential GND.First end of resistance R 2 couples second end of resistance R 1, and the second end coupling system processing unit 209 of resistance R 2, in order to transmit the first lamp status signal L1ST.
In second lamp control circuit 217, two inputs of NAND gate NA are in order to the difference receiving system control signal LCS and the second lamp enable signal L2_En, and the output of NAND gate NA is in order to send the second lamp drive signal SCI_2.The base stage of N type bipolar transistor T is kept signal L1_K in order to receive second lamp, and the emitter-base bandgap grading of N type bipolar transistor T is coupled to an earthing potential GND, and the collection utmost point of N type bipolar transistor T is coupled to the output of NAND gate NA.First end of resistance R 1 is coupled to a system voltage V
DD, and second end of resistance R 1 couples second lamp driver 219.First end of capacitor C couples second end of resistance R 1, and second end of capacitor C is coupled to earthing potential GND.First end of resistance R 2 couples second end of resistance R 1, and the second end coupling system processing unit 209 of resistance R 2, in order to transmit the second lamp status signal L2ST.
Based on above-mentioned, Fig. 4～Fig. 7 is depicted as the flow chart of many lamps ignition method of the utility model one embodiment respectively.Merging is with reference to Fig. 2～Fig. 7, at first, in step S401, to keep the default value of signal L2_K be that the default value of logic low, system status signal LCS is a logic high to the default value (default value) of supposing the first lamp enable signal L1_En and the second lamp enable signal L2_En for logic low, first lamp are kept signal L1_K and second lamp, and allow the number of times Cnt that lights a lamp again for example to can be 3 times.
Then, as described in step S402, when digital optical processing projector was started shooting, system processing unit 209 can go to read the content that is embedded in the volatile storage M in the system processing unit 209 earlier.By content that previous embodiment disclosed as can be known, whether nonvolatile memory M is lighted before the digital optical processing projector shutdown in order to write down first lamp 201 and second lamp 203.At this, suppose that first lamp 201 is lighted before the digital optical processing projector shutdown, and the words (being single lamp projection) that second lamp 203 is not lighted before the digital optical processing projector shutdown, then can move towards step S403, to light the flow process of first lamp 201 separately in the judged result of step S402.
In addition, suppose that first lamp 201 is not lighted before the digital optical processing projector shutdown, and the words (being single lamp projection) that second lamp 203 is lighted before the digital optical processing projector shutdown, then can move towards step S404, to light the flow process of second lamp 203 separately in the judged result of step S402.Moreover, suppose the words (promptly two lamp projection) that first lamp 201 and second lamp 203 are all lighted before the digital optical processing projector shutdown, then can move towards step S405, to light the flow process of first lamp 201 and second lamp 203 simultaneously in the judged result of step S402.
In the present embodiment, when the judged result of step S402 is moved towards step S403 when lighting the flow process of first lamp 201 separately, with reference to Fig. 5.The flow process of lighting first lamp 201 separately comprises: system processing unit 209 can send the first lamp enable signal L1_En (step S501) of logic high earlier, then, resupplies system control unit 211 (being TI DLP ASIC) power supply (step S502).Thus, after errorless and colour wheel (not shown) stabilization of speed, system control unit 211 can send the system control signal LCS of logic highs to first lamp control circuit 213 (step S503) to system control unit 211 in self-examination.
Because the system control signal LCS and the first lamp enable signal L1_En are all logic high, so the first low lamp drive signal SCI_1 of output meeting output logic of the NAND gate NA in first lamp control circuit 213 is to provide a continuous current loop to first lamp driver 215.Thus, first lamp driver 215 can begin to light first lamp 201.Light in the process of first lamp 201 at first lamp driver 215, system processing unit 209 can judge whether the first lamp status signal L1ST that first lamp control circuit 213 is transmitted is logic low (step S504).
When system processing unit 209 is judged the first lamp status signal L1ST that first lamp control circuit 213 transmitted and is logic low (successfully lighting first lamp 201), the system status signal LST that system processing unit 209 can send logic low earlier makes system control unit 211 transmitting system synchronizing signal SYNC give first lamp control circuit 213 (step S506) to system control unit 211 (step S505).Thus, first lamp 201 promptly can enter external sync pattern (step S507) and successfully be lighted (step S508).Wherein, when first lamp 201 enters the external sync pattern, represent its polarity (frequency) and sense of current Be Controlled, therefore throw image and just can not produce flicker.
On the other hand, to judge the first lamp status signal L1ST that first lamp control circuit 213 transmitted non-during for logic low (successfully not lighting first lamp 201) when system processing unit 209, then system processing unit 209 can send the system status signal LST of logic high to system control unit 211, so that the system control signal LCS that system control unit 211 resends logic high gives first lamp control circuit 213 in a preset times (that is in step S401 Cnt defined 3 times), and continue to judge whether the first lamp status signal L1ST that first lamp control circuit 213 is transmitted transfers logic low (step S504 to, S509 and S510).
In case when system processing unit 209 is judged the first lamp status signal L1ST that first lamp control circuit 213 transmitted transfer logic low in pre-determined number (successfully lighting first lamp 201), the system status signal LST that system processing unit 209 can send logic low earlier is to system control unit 211 (step S505), so that system control unit 211 transmitting system synchronizing signal SYNC give first lamp control circuit 213 (step S506).Thus, first lamp 201 promptly can enter external sync pattern (step S507) and successfully be lighted (step S508).
Yet, judge when system processing unit 209 and (to repeat 3 times and all can't successfully light first lamp 201 when the first lamp status signal L1ST that first lamp control circuit 213 transmitted does not transfer logic low in pre-determined number, represent that first lamp 201 may damage), then system processing unit 209 can go to revise the content (step S511) of the nonvolatile memory M of embedded system processing unit 209, and finishes to light the flow process (step S512) of first lamp 201.Wherein, the content that system processing unit 209 is revised the nonvolatile memory M that is embedded in system processing unit 209 comprises that record first lamp 201 is not lighted before the digital optical processing projector shutdown, and second lamp 203 is lighted before the digital optical processing projector shutdown.Thus, when digital optical processing projector was started shooting again, system processing unit 209 will attempt lighting second lamp 203, but not the first original lamp 201.
Similarly, when the judged result of step S402 is moved towards step S404 when lighting the flow process of second lamp 203 separately, with reference to Fig. 6.The flow process of lighting second lamp 203 separately comprises: system processing unit 209 can send the second lamp enable signal L2_En (step S601) of logic high earlier, then, resupplies system control unit 211 (being TI DLP ASIC) power supply (step S602).Thus, after the errorless and colour wheel stabilization of speed, system control unit 211 can send the system control signal LCS of logic highs to second lamp control circuit 217 (step S603) to system control unit 211 in self-examination.
Because the system control signal LCS and the second lamp enable signal L2_En are all logic high, so the second low lamp drive signal SCI_2 of output meeting output logic of the NAND gate NA in second lamp control circuit 217 is to provide a continuous current loop to second lamp driver 219.Thus, second lamp driver 219 can begin to light second lamp 203.Light in the process of second lamp 203 at second lamp driver 219, system processing unit 209 can judge whether the second lamp status signal L2ST that second lamp control circuit 217 is transmitted is logic low (step S604).
When system processing unit 209 is judged the second lamp status signal L2ST that second lamp control circuit 217 transmitted and is logic low (successfully lighting second lamp 203), the system status signal LST that system processing unit 209 can send logic low earlier is to system control unit 211 (step S605), so that system control unit 211 transmitting system synchronizing signal SYNC give second lamp control circuit 217 (step S606).Thus, second lamp 203 promptly can enter external sync pattern (step S607) and successfully be lighted (step S608).Wherein, when second lamp 203 enters the external sync pattern, represent its polarity (frequency) and sense of current Be Controlled, therefore throw image and just can not produce flicker.
On the other hand, to judge the second lamp status signal L2ST that second lamp control circuit 217 transmitted non-during for logic low (successfully not lighting second lamp 203) when system processing unit 209, then system processing unit 209 can send the system status signal LST of logic high to system control unit 211, so that the system control signal LCS that system control unit 211 resends logic high gives second lamp control circuit 217 in a preset times (that is in step S401 Cnt defined 3 times), and continue to judge whether the second lamp status signal L2ST that second lamp control circuit 217 is transmitted transfers logic low (step S604 to, S609 and S610).
In case when system processing unit 209 is judged the second lamp status signal L2ST that second lamp control circuit 217 transmitted transfer logic low in pre-determined number (successfully lighting second lamp 203), the system status signal LST that system processing unit 209 can send logic low earlier is to system control unit 211 (step S605), so that system control unit 211 transmitting system synchronizing signal SYNC give first lamp control circuit 213 (step S606).Thus, second lamp 201 promptly can enter external sync pattern (step S607) and successfully be lighted (step S608).
Yet, judge when system processing unit 209 and (to repeat 3 times and all can't successfully light second lamp 203 when the second lamp status signal L2ST that second lamp control circuit 217 transmitted does not transfer logic low in pre-determined number, represent that second lamp 203 may damage), then system processing unit 209 can go to revise the content (step S611) of the nonvolatile memory M that is embedded in system processing unit 209, and finishes to light the flow process (step S612) of second lamp 203.Wherein, the content that system processing unit 209 is revised the nonvolatile memory M that is embedded in system processing unit 209 comprises that record first lamp 201 is lighted before the digital optical processing projector shutdown, and second lamp 203 is not lighted before the digital optical processing projector shutdown.Thus, when digital optical processing projector was started shooting again, system processing unit 209 will attempt lighting first lamp 201, but not the second original lamp 203.
In addition, when the judged result of step S402 is moved towards step S405 when lighting the flow process of first lamp 201 and second lamp 203 simultaneously, with reference to Fig. 7.The flow process of lighting first lamp 201 and second lamp 203 simultaneously comprises: system processing unit 209 can send earlier the first lamp enable signal L1_En and the second lamp enable signal L2_En (step S701) of logic high simultaneously, then, resupply system control unit 211 (being TI DLP ASIC) power supply (step S702).Thus, after the errorless and colour wheel stabilization of speed, the system control signal LCS that can send logic high is to first lamp control circuit 213 and second lamp control circuit 217 (step S703) in self-examination for system control unit 211.
Because the system control signal LCS and the first lamp enable signal L1_En are all logic high, so the first low lamp drive signal SCI_1 of output meeting output logic of the NAND gate NA in first lamp control circuit 213 is to provide a continuous current loop to first lamp driver 215.Thus, first lamp driver 215 can begin to light first lamp 201.
Similarly, because the system control signal LCS and the second lamp enable signal L2_En are all logic high, so the second low lamp drive signal SCI_2 of output meeting output logic of the NAND gate NA in second lamp control circuit 217 is to provide a continuous current loop to second lamp driver 219.Thus, second lamp driver 219 can begin to light second lamp 203.
Distinctly light in the process of first lamp 201 and second lamp 203 at first lamp driver 215 and second lamp driver 219, system processing unit 209 can judge whether the first lamp status signal L1ST that first lamp control circuit 213 is transmitted is logic low (step S704) earlier, when system processing unit 209 is judged the first lamp status signal L1ST that first lamp control circuit 213 transmitted and is logic low (successfully lighting first lamp 201), system processing unit 209 can continue judge whether the second lamp status signal L2ST that second lamp control circuit 219 is transmitted is logic low (step S705).
When system processing unit 209 is judged the second lamp status signal L2ST that second lamp control circuit 219 transmitted and is logic low (successfully lighting second lamp 203), the system status signal LST that system processing unit 209 can send logic low earlier is to system control unit 211 (step S706), so that system control unit 211 transmitting system synchronizing signal SYNC give first lamp control circuit 213 and second lamp control circuit 217 (step S707).Thus, first lamp 201 and second lamp 203 promptly can enter external sync pattern (step S708) and successfully be lighted (step S709).Wherein, when first lamp 201 and second lamp 203 enter the external sync pattern, represent its polarity (frequency) and sense of current Be Controlled, therefore throw image and just can not produce flicker.
On the other hand, judging the first lamp status signal L1ST that first lamp control circuit 213 transmitted when system processing unit 209 is logic low (promptly successfully lighting first lamp 201), but the second lamp status signal L2ST that second lamp control circuit 217 is transmitted is non-when the logic low (successfully not lighting second lamp 203), system processing unit 209 can send first lamp of logic highs earlier keep signal L1_K to first lamp control circuit 213, N type bipolar transistor T in Open from This Side first lamp control circuit 213; Then, system processing unit 209 can send the system status signal LST of logic high again to system control unit 211 (step S710).Thus, first lamp 201 promptly can enter spontaneous pattern (step S711).
After first lamp 201 enters spontaneous pattern, the system status signal LST of the logic high that system processing unit 209 is sent at step S710 can make system control signal LCS that system control unit 211 resends logic high give second lamp control circuit 217 in a preset times (that is in step S401 Cnt defined 3 times), and system processing unit 209 can continue to judge whether the second lamp status signal L2ST that second lamp control circuit 217 is transmitted transfers logic low (step S712～S714) to.
In case when system processing unit 209 is judged the second lamp status signal L2ST that second lamp control circuit 217 transmitted transfer logic low in pre-determined number (successfully lighting second lamp 203), system processing unit 209 can send the system status signal LST of logic low earlier to system control unit 211 (step S715), so that system control unit 211 transmitting system synchronizing signal SYNC (step S716); Then, system processing unit 209 can send first lamp of logic low again and keep signal L1_K to first lamp control circuit 213 (step S717), so that first lamp control circuit 213 and second lamp control circuit 217 receive the system synchronization signal SYNC that system control unit 211 is sent.Thus, first lamp 201 and second lamp 203 promptly can enter external sync pattern (step S718) and successfully be lighted (step S719).
Yet, judge when system processing unit 209 and (to repeat 3 times and all can't successfully light second lamp 203 when the second lamp status signal L2ST that second lamp control circuit 217 transmitted does not transfer logic low in pre-determined number, represent that second lamp 203 may damage), system processing unit 209 can go to revise the content (step S720) of the nonvolatile memory M that is embedded in system processing unit 209 earlier, then the system status signal LST that sends logic low again is to system control unit 211 (step S721), so that system control unit 211 transmitting system synchronizing signal SYNC (step S722); Then, system processing unit 209 can send first lamp of logic low again and keep signal L1_K to first lamp control circuit 213 (step S723), so that first lamp control circuit 213 receives the system synchronization signal SYNC that system control unit 211 is sent.Thus, first lamp 201 promptly can enter external sync pattern (step S724) and successfully be lighted.
Owing to can't light second lamp 203 (being that digital optical processing projector can't operate in two lamp projection mode) smoothly, so after first lamp 201 enters the external sync pattern and is successfully lighted, can also on screen, show (on-screen display, OSD) information successfully do not lighted of second lamp 203 is known (step S725) to the user, can allow the user further second lamp 203 be changed or checks.
In addition, owing to can't light second lamp 203 smoothly, therefore in step S720, the content that system processing unit 209 is revised the nonvolatile memory M that is embedded in system processing unit 209 comprises that record first lamp 201 is lighted before the digital optical processing projector shutdown, and second lamp 203 is not lighted before the digital optical processing projector shutdown.Thus, when digital optical processing projector was started shooting again, system processing unit 209 just only can remove to light first lamp 201 separately, does not remove to light second lamp 203 that may damage again and can not waste resource.
Again on the other hand, to judge the first lamp status signal L1ST that first lamp control circuit 213 transmitted in step S704 non-during for logic low (promptly successfully not lighting first lamp 201) when system processing unit 209, and system processing unit 209 can continue judge whether the second lamp status signal L2ST that second lamp control circuit 219 is transmitted is logic low (step S726).
When system processing unit 209 is judged the second lamp status signal L2ST that second lamp control circuit 217 transmitted and is logic low (successfully lighting second lamp 203), system processing unit 209 can send second lamp of logic high earlier and keep signal L2_K to second lamp control circuit 217, in order to open N type bipolar transistor T in second lamp control circuit 217; Then, system processing unit 209 can send the system status signal LST of logic high again to system control unit 211 (step S727).Thus, second lamp 203 promptly can enter spontaneous pattern (step S728).
After second lamp 203 enters spontaneous pattern, the system status signal LST of the logic high that system processing unit 209 is sent at step S727 can make system control signal LCS that system control unit 211 resends logic high give first lamp control circuit 213 in a preset times (that is in step S401 Cnt defined 3 times), and system processing unit 209 can continue to judge whether the first lamp status signal L1ST that first lamp control circuit 213 is transmitted transfers logic low (step S729～S731) to.
In case when system processing unit 209 is judged the first lamp status signal L1ST that first lamp control circuit 213 transmitted transfer logic low in pre-determined number (successfully lighting first lamp 201), system processing unit 209 can send the system status signal LST of logic low earlier to system control unit 211 (step S732), so that system control unit 211 transmitting system synchronizing signal SYNC (step S733); Then, system processing unit 209 can send second lamp of logic low again and keep signal L2_K to second lamp control circuit 217 (step S734), so that first lamp control circuit 213 and second lamp control circuit 217 receive the system synchronization signal SYNC that system control unit 211 is sent.Thus, first lamp 201 and second lamp 203 promptly can enter external sync pattern (step S735) and successfully be lighted (step S736).
Yet, judge when system processing unit 209 and (to repeat 3 times and all can't successfully light first lamp 201 when the first lamp status signal L1ST that first lamp control circuit 213 transmitted does not transfer logic low in pre-determined number, represent that first lamp 201 may damage), system processing unit 209 can go to revise the content (step S737) of the nonvolatile memory M that is embedded in system processing unit 209 earlier, then the system status signal LST that sends logic low again is to system control unit 211 (step S738), so that system control unit 211 transmitting system synchronizing signal SYNC (step S739); Then, system processing unit 209 can send second lamp of logic low again and keep signal L2_K to second lamp control circuit 217 (step S740), so that second lamp control circuit 217 receives the system synchronization signal SYNC that system control unit 211 is sent.Thus, second lamp 203 promptly can enter external sync pattern (step S741) and successfully be lighted.
Owing to can't light first lamp 201 (being that digital optical processing projector can't operate in two lamp projection mode) smoothly, so after second lamp 203 enters the external sync pattern and is successfully lighted, can also show on screen that the information that first lamp 201 is not successfully lighted knows (step S742) to the user, can allow the user further first lamp 201 be changed or check.
In addition, owing to can't light first lamp 201 smoothly, therefore in step S737, the content that system processing unit 209 is revised the nonvolatile memory M that is embedded in system processing unit 209 comprises that record first lamp 201 is not lighted before the digital optical processing projector shutdown, and second lamp 203 is lighted before the digital optical processing projector shutdown.Thus, when digital optical processing projector was started shooting again, system processing unit 209 just only can remove to light second lamp 203 separately, does not remove to light first lamp 201 that may damage again and can not waste resource.
Again on the other hand, to judge the second lamp status signal L2ST that second lamp control circuit 219 transmitted in step S726 non-during for logic low (first lamp 201 and second lamp 203 are not all successfully lighted) when system processing unit 209, the system status signal LST that system processing unit 209 can send logic highs is to system control unit 211 (step S743), so that the system control signal LCS that system control unit 211 resends logic high gives first lamp control circuit 213 and second lamp control circuit 217 (step S744 and S745) in a preset times (that is in step S401 Cnt defined 3 times).When in preset times, not lighting first lamp 201 or second lamp 203 yet, then finish to light the flow process (step S746) of first lamp 201 and second lamp 203.Otherwise, then return step S704.
Figure 8 shows that the flow chart of many lamps ignition method of another embodiment of the utility model.Merging is with reference to Fig. 2, Fig. 3 and Fig. 8, suppose that first lamp 201 is lighted, and this moment, desire increased or when alternately lighting second lamp 203, many lamps ignition method of present embodiment comprises: system processing unit 209 can send second lamp of logic high and keep signal L2_K to second lamp control circuit 217 (step S801), N type bipolar transistor T in Open from This Side second lamp control circuit 217, thus force second lamp driver 219 to light second lamp 203.
Thus, system processing unit 209 can judge whether the second lamp status signal L2ST that second lamp control circuit 217 is transmitted is logic low (step S802).To judge the second lamp status signal L2ST that second lamp control circuit 217 transmitted non-during for logic low (successfully not lighting second lamp 203) when system processing unit 209, can show on screen that then first lamp 201 continues to be lighted, and the information that second lamp 203 is not successfully lighted is known (step S803) to the user, thereby allows the user further second lamp 203 be changed or check.
On the other hand, when system processing unit 209 is judged the second lamp status signal L2ST that second lamp control circuit 217 transmitted and is logic low (successfully lighting second lamp 203), second lamp of the logic high that system processing unit 209 is sent at step S801 is kept signal L2_K can make second lamp 203 enter spontaneous pattern (step S804); Then, system processing unit 209 can send the second lamp enable signal L2_En of logic high earlier to second lamp control circuit 217 (step S805), second lamp that sends logic low is afterwards again kept signal L2_K to second lamp control circuit 217 (step S806), allows second lamp 203 enter external sync pattern (step S807) thus and is successfully lighted (step S808).
Thus, after system processing unit 209 only needed the user that it is received to order UC to handle (parsing), system processing unit 209 can judge whether to extinguish first lamp 201 (step S809).Lighted and desire extra (increases) this moment and light under the situation of second lamp 203 at first lamp 201, the judged result of step S809 can be moved towards step S810, that is: allow first lamp 201 and 203 whiles of second lamp projection light source as digital optical processing projector.That is to say that digital optical processing projector is in two lamp projection mode.
In addition, first lamp 201 lighted and this moment desire alternately light under the situation of second lamp 203, the judged result of step S809 can be moved towards step S811, that is: system processing unit 811 can send the first lamp enable signal L1_En of logic low to first lamp control circuit 213.Thus, first lamp 201 will extinguish (step S812), to allow the projection light source (step S813) of second lamp 203 as digital optical processing projector.That is to say that digital optical processing projector is in single lamp projection mode.
Similarly, in other embodiment of the utility model, also can be under the situation that second lamp 203 has been lighted, extra (increase) or alternately light first lamp 201, so its overall flow is similar to Fig. 8, does not repeat them here.
The lighting system of the foregoing description can be applied in the digital optical processing projector, and its projection light source is not restricted to two lamp systems.That is to say, can be according to practical application or design requirement, and in digital optical processing projector, set up several groups of lamps, lamp driver and lamp control circuit more.Yet in view of the content that the various embodiments described above disclosed, but the utility model field those of ordinary skill should class be released the above operation principles of two lamps, does not therefore repeat them here.In other words, so long as the digital optical processing projector of the lighting system of using the foregoing description is arranged, or even the above lighting system of two lamp promptly belongs to the scope of the utility model institute desire protection.
In sum, in the utility model the foregoing description, lighting system can reach following one of them purpose or other purpose at least:
1, the number of the lamp of increase digital optical processing projector is to increase the upper limit of projection brightness;
2, can specify according to the user and light specific lamp;
3, can be under the state that a certain small cup lamp has been lighted, extra (increase) lights another lamp;
4, can under the state that a certain small cup lamp has been lighted, alternately light another lamp; And
5, can light two lamps wherein under the state of success and another failure, light a lamp once more and do not influence that lamp of successfully lighting at that lamp of lighting failure.
The above; it only is preferred embodiment of the present utility model; when not limiting the scope that the utility model is implemented with this, promptly the simple equivalent of being done according to the utility model claim and utility model description generally changes and revises, and all still belongs in the protection range of the present utility model.In addition, arbitrary embodiment of the present utility model or claim must not reached the disclosed whole purposes of the utility model or advantage or characteristics.In addition, summary and title only are to be used for auxiliary patent document retrieval, are not to be used for limiting interest field of the present utility model.
Claims (8)
1. a lighting system is characterized in that, is applicable to projection arrangement, and described lighting system comprises:
First lamp and second lamp;
System's control and processing unit are in order to receive and to handle user's order, with transmitting system control signal and two lamp enable signals; And
Lamp control and driver element, couple described first lamp, described second lamp and control of described system and processing unit, control of described lamp and driver element be in order to carrying out logical operation to described system control signal and described two lamp enable signals, with send two lamp drive signals light described first lamp and described second lamp at least one of them.
2. lighting system as claimed in claim 1 is characterized in that, control of described system and processing unit comprise:
System processing unit, in order to receiving and to handle described user's order sending described two lamp enable signals, and according to two lamp status signals with the transmitting system status signal; And
System control unit couples described system processing unit, sends described system control signal after described system processing unit is exported described two lamp enable signals, and determines whether resend described system control signal according to described system status signal.
3. lighting system as claimed in claim 2, it is characterized in that, described two lamp enable signals comprise the first lamp enable signal and the second lamp enable signal, described two lamp drive signals comprise the first lamp drive signal and the second lamp drive signal, and described two lamp status signals comprise the first lamp status signal and the second lamp status signal.
4. lighting system as claimed in claim 3 is characterized in that, described lamp control and driver element comprise:
First lamp control circuit, couple described system processing unit and described system control unit, in order to receive described system control signal and the described first lamp enable signal, and in order to described system control signal and the described first lamp enable signal are carried out described logical operation, to send described first drive signal; And
First lamp driver couples described first lamp control circuit and described first lamp, in order to receive and according to the described first lamp drive signal, whether to light described first lamp with decision.
5. lighting system as claimed in claim 4 is characterized in that, described logical operation is the NAND Logic computing.
6. lighting system as claimed in claim 5 is characterized in that, described lamp control and driver element also comprise:
Second lamp control circuit, couple described system processing unit and described system control unit, in order to receive described system control signal and the described second lamp enable signal, and in order to described system control signal and the described second lamp enable signal are carried out described logical operation, to send described second drive signal; And
Second lamp driver couples described second lamp control circuit and described second lamp, in order to receive and according to the described second lamp drive signal, whether to light described second lamp with decision.
7. lighting system as claimed in claim 6 is characterized in that, described two lamps are kept signal and comprised that first lamp is kept signal and second lamp is kept signal, and described first lamp control circuit comprises:
NAND gate, two inputs of described NAND gate are in order to receiving described system control signal and the described first lamp enable signal respectively, and the output of described NAND gate is in order to send the described first lamp drive signal;
Bipolar transistor, the base stage of described bipolar transistor is kept signal in order to receive described first lamp, and the emitter-base bandgap grading of bipolar transistor couples earthing potential, and the collection utmost point of bipolar transistor is coupled to the output of described NAND gate;
First resistance, the first end coupling system voltage of described first resistance, and second end of described first resistance couples described first lamp driver;
Electric capacity, first end of described electric capacity couple described second end of described first resistance, and second end of described electric capacity is coupled to described earthing potential; And
Second resistance, first end of described second resistance couple described second end of described first resistance, and second end of described second resistance couples described system processing unit, to transmit the described first lamp status signal.
8. lighting system as claimed in claim 6 is characterized in that, described second lamp control circuit comprises:
NAND gate, two inputs of described NAND gate are in order to receiving described system control signal and the described second lamp enable signal respectively, and the output of described NAND gate is in order to send the described second lamp drive signal;
Bipolar transistor, the base stage of described bipolar transistor is kept signal in order to receive described second lamp, and the emitter-base bandgap grading of described bipolar transistor couples earthing potential, and the collection utmost point of described bipolar transistor is coupled to the output of described NAND gate;
First resistance, the first end coupling system voltage of described first resistance, and second end of described first resistance couples described second lamp driver;
Electric capacity, first end of described electric capacity couple described second end of described first resistance, and second end of described electric capacity is coupled to described earthing potential; And
Second resistance, first end of described second resistance couple described second end of described first resistance, and second end of described second resistance couples described system processing unit, to transmit the described second lamp status signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009201625508U CN201571229U (en) | 2009-08-18 | 2009-08-18 | Lighting-up system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009201625508U CN201571229U (en) | 2009-08-18 | 2009-08-18 | Lighting-up system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201571229U true CN201571229U (en) | 2010-09-01 |
Family
ID=42663527
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2009201625508U Expired - Fee Related CN201571229U (en) | 2009-08-18 | 2009-08-18 | Lighting-up system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201571229U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106163028A (en) * | 2015-03-27 | 2016-11-23 | 东林科技股份有限公司 | Light-dimming method |
| CN106842792A (en) * | 2016-12-16 | 2017-06-13 | 苏州佳世达光电有限公司 | The replacing options of many projector lamps and its light source cell |
| CN109152175A (en) * | 2014-11-27 | 2019-01-04 | 株式会社小糸制作所 | Lamp circuit and lamp system |
-
2009
- 2009-08-18 CN CN2009201625508U patent/CN201571229U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109152175A (en) * | 2014-11-27 | 2019-01-04 | 株式会社小糸制作所 | Lamp circuit and lamp system |
| CN106163028A (en) * | 2015-03-27 | 2016-11-23 | 东林科技股份有限公司 | Light-dimming method |
| CN106842792A (en) * | 2016-12-16 | 2017-06-13 | 苏州佳世达光电有限公司 | The replacing options of many projector lamps and its light source cell |
| CN106842792B (en) * | 2016-12-16 | 2019-03-19 | 苏州佳世达光电有限公司 | The replacing options of more projector lamps and its light source unit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100515737B1 (en) | Set of device for driving display device | |
| CN1166186C (en) | Projection display | |
| TWI240907B (en) | Display device including a plurality of cascade-connected driver ICs | |
| CN102314042A (en) | Interchangeable lens, camera main-body and camera system | |
| CN201571229U (en) | Lighting-up system | |
| CN101399027A (en) | Backlight driver and liquid crystal display including the same | |
| CN207541916U (en) | LED splice displaying systems | |
| JP4213127B2 (en) | Source driver, source driver array, driver with source driver array, and display device with driver | |
| US20060033456A1 (en) | Flashing light control apparatus and method thereof | |
| US20170309217A1 (en) | Display driving device and display device including the same | |
| JP2003330436A (en) | Wireless transmission system and wireless receiver | |
| CN108898985B (en) | Master-slave optical fiber video playing system | |
| US20200074935A1 (en) | Display Apparatus, Driver for Driving Display Panel and Source Driving Signal Generation Method | |
| CN115440157A (en) | Display device and cascade control method | |
| US9967942B1 (en) | Light emitting diode driving system and burning method thereof | |
| US6069926A (en) | Communication control system and apparatus | |
| JP4016605B2 (en) | Shift register, electro-optical device, drive circuit, and electronic device | |
| US8135011B2 (en) | Method for operating multipoint control system | |
| CN103971641A (en) | Led display screen control system | |
| TW201523576A (en) | Transmission method for display device | |
| TW201616478A (en) | Power saving display system and method | |
| CN115742946B (en) | Interactive car lamp system, car and control method | |
| CN100456342C (en) | Plasma display apparatus and method of driving thereof | |
| TWI825938B (en) | Screen control system | |
| KR102048915B1 (en) | Low power LVDS video transmission method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: ESIN TECHNOLOGY CO., LTD. Free format text: FORMER OWNER: ZHONGQIANG PHOTOELECTRIC CO LTD Effective date: 20120305 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20120305 Address after: Delaware Patentee after: Suzhou Canyu Optics Co., Ltd. Address before: Hsinchu Science Park, Taiwan, China Patentee before: Zhongqiang Photoelectric Co., Ltd. |
|
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100901 Termination date: 20130818 |