CN209571411U - The matrix frame of multi-pipe pin semiconductor product - Google Patents
The matrix frame of multi-pipe pin semiconductor product Download PDFInfo
- Publication number
- CN209571411U CN209571411U CN201920099144.5U CN201920099144U CN209571411U CN 209571411 U CN209571411 U CN 209571411U CN 201920099144 U CN201920099144 U CN 201920099144U CN 209571411 U CN209571411 U CN 209571411U
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- Prior art keywords
- unit group
- chip unit
- pin
- area
- chip
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- 239000004065 semiconductor Substances 0.000 title claims description 25
- 239000011159 matrix material Substances 0.000 title claims description 18
- 238000003466 welding Methods 0.000 claims description 33
- 239000003292 glue Substances 0.000 claims description 29
- 210000003205 muscle Anatomy 0.000 claims description 23
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 7
- 229910052802 copper Inorganic materials 0.000 claims description 5
- 239000010949 copper Substances 0.000 claims description 5
- 238000005520 cutting process Methods 0.000 description 30
- 238000000465 moulding Methods 0.000 description 29
- 238000000034 method Methods 0.000 description 22
- 239000012778 molding material Substances 0.000 description 22
- 239000000047 product Substances 0.000 description 19
- 229910052751 metal Inorganic materials 0.000 description 10
- 239000002184 metal Substances 0.000 description 10
- 238000007747 plating Methods 0.000 description 10
- 239000000463 material Substances 0.000 description 9
- 238000004806 packaging method and process Methods 0.000 description 7
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 239000003822 epoxy resin Substances 0.000 description 4
- 229920000647 polyepoxide Polymers 0.000 description 4
- 230000032683 aging Effects 0.000 description 3
- 239000012528 membrane Substances 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 229910052763 palladium Inorganic materials 0.000 description 3
- BVPWJMCABCPUQY-UHFFFAOYSA-N 4-amino-5-chloro-2-methoxy-N-[1-(phenylmethyl)-4-piperidinyl]benzamide Chemical compound COC1=CC(N)=C(Cl)C=C1C(=O)NC1CCN(CC=2C=CC=CC=2)CC1 BVPWJMCABCPUQY-UHFFFAOYSA-N 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000007812 deficiency Effects 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 238000012858 packaging process Methods 0.000 description 2
- 238000012536 packaging technology Methods 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 241000218202 Coptis Species 0.000 description 1
- 235000002991 Coptis groenlandica Nutrition 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 239000012467 final product Substances 0.000 description 1
- 230000002431 foraging effect Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- BSIDXUHWUKTRQL-UHFFFAOYSA-N nickel palladium Chemical compound [Ni].[Pd] BSIDXUHWUKTRQL-UHFFFAOYSA-N 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 230000035882 stress Effects 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
The utility model discloses the matrix frames of multi-pipe pin semiconductor product, including frame and chip unit group, chip unit group includes two chip units, the radiating area of two chip units in same chip unit group is connected by the first dowel, along frame length direction arrangement N row chip unit group, N >=1 is connected with the second dowel is passed through between a line chip unit group；Every a line chip unit group includes the first pin area and the second pin area, and the first pin area of the first row chip unit group is fixedly connected with frame, and the second pin area of last line chip unit group is fixedly connected with frame；Second pin area of line n chip unit group is fixedly connected with the first pin area of the (n+1)th row chip unit group, n=[1, N]；The pin area of each chip unit includes several pins, passes through gear glue muscle connection between the adjacent pin of each chip unit.The utility model can greatly improve stock utilization, production efficiency and qualification rate.
Description
Technical field
The utility model relates to the lead frame of semiconductor product more particularly to a kind of matrixes of multi-pipe pin semiconductor product
Formula lead frame.
Background technique
Currently, existing multi-pipe pin product has the following disadvantages and deficiency: chip unit is all single in lead frame,
And asymmetrical design, lead to the disadvantages of stock utilization is not high, production efficiency is low, production ratio of defects is high.
Utility model content
For overcome the deficiencies in the prior art, the purpose of this utility model is to provide the matrixes of multi-pipe pin semiconductor product
Formula lead frame is able to solve the asymmetrical design of multi-pipe pin product in the prior art, causes stock utilization not high, production
The problems such as inefficiency.
The purpose of this utility model adopts the following technical scheme that realization:
The matrix frame of multi-pipe pin semiconductor product, including frame and chip unit group, the chip unit group
Including two chip units, the chip unit includes radiating area and pin area, and the radiating area is equipped with chip bearing area, together
The radiating area of two chip units in one chip unit group is connected by the first dowel, is arranged along the frame length direction
N row chip unit group, N >=1 are connected with the second dowel is passed through between a line chip unit group；Every a line chip unit group is equal
Including the first pin area and the second pin area, the first pin area of the first row chip unit group is fixedly connected with frame, last
Second pin area of row chip unit group is fixedly connected with frame；Second pin area of line n chip unit group and the (n+1)th row core
First pin area of blade unit group is fixedly connected, n=1,2 ..., N；If the pin area of each chip unit includes main pipe
Foot passes through gear glue muscle connection between the adjacent pin of each chip unit.
Further, every row chip unit group includes the chip unit group that quantity is 2A, wherein the 2a-1 core
It is the first pre-determined distance, the 2a chip unit group and the 2a+1 core between blade unit group and the 2a chip unit group
It is the second pre-determined distance between blade unit group, first pre-determined distance is greater than second pre-determined distance, a=1,2 ..., A；
It is connected between the 2a-1 chip unit group and the 2a chip unit group by third dowel, the 2a chip
It is connected between unit group and the 2a+1 chip unit group by the 4th dowel.
Further, the 5th dowel, the line n chip unit group are equipped between the adjacent rows chip unit group
The second pin area pass through the 5th dowel 45 with the first pin area of the (n+1)th row chip unit group and be fixedly connected.
Further, the pin area is generally aligned in the same plane with the frame, plane and side where the chip bearing area
Have preset height poor between plane where frame；The thickness in the chip bearing area, pin area and frame is all the same.
Further, the pin area is equipped with fixing pin and terminal pins, the fixed company of fixing pin and chip bearing area
It connects, the terminal pins are equipped with wire welding area；It is connected between the wire welding area of terminal pins and the wire welding area of chip by lead.
Further, the cross section of the wire welding area of terminal pins is greater than the pin cross section of the terminal pins.
Further, the wire welding area of the terminal pins is additionally provided with lock glue hole.
Further, the lead frame is copper lead frame, and the lead is copper lead.
Further, multiple location holes are additionally provided on the frame, location hole is used for lead frame when packaged, by lead
Frame is fixed on sealed in unit.
Further, the location hole includes circular locating openings, rectangular location hole and oval location hole.
Compared with prior art, the utility model has the beneficial effects that:
The utility model is improved by the lead frame to existing multi-pipe pin semiconductor product, so that lead frame
In chip unit expand to multiple rows of from single, be greatly improved stock utilization, and then improve production efficiency and product closes
Lattice rate.
Detailed description of the invention
Fig. 1 is matrix frame structural schematic diagram provided by the utility model；
Fig. 2 is the enlarged diagram of chip unit pin in Fig. 1；
Fig. 3 is packaging method flow chart provided by the utility model；
Fig. 4 is the schematic diagram of structural changes of lead frame in rib cutting step；
Fig. 5 is the schematic diagram of structural changes of lead frame in separating step；
Fig. 6 is that the molding material of conventional lead frame and matrix frame in molding flows to comparison diagram；
Fig. 7 is that molding material corresponding to A1 shunts figure in Fig. 6；
Fig. 8 is that molding material corresponding to A2 shunts figure in Fig. 6.
In figure: 1, frame；21, terminal pins；22, fixing pin；23, the wire welding area of terminal pins；24, the first pin
Area；25, the second pin area；3, radiating area；41, the first dowel；43, third dowel；44, the 4th dowel；45, the 5th connects
Connect muscle；5, location hole；6, glue hole is locked；7, glue muscle is kept off；81, the first prepsetting gap；82, the second prepsetting gap；9, injecting glue road；10,
Gum-injecting port.
Specific embodiment
In the following, being described further in conjunction with attached drawing and specific embodiment to the utility model, it should be noted that
Under the premise of not colliding, it can be formed in any combination between various embodiments described below or between each technical characteristic new
Embodiment.
Embodiment one:
For existing multi-pipe pin semiconductor product how single lead frame is, asymmetrical design, cause encapsulating material sharp
With the low defect of rate, present embodiments provide a kind of lead frame of new multi-pipe pin semiconductor product, by lead frame from
It is single to be extended to multiple rows of, matrix form integral structure, symmetric design, it is remarkably improved encapsulating material utilization rate, and improve and partly lead
The production efficiency of body product.
The lead frame includes frame and chip unit group, and each chip unit group includes two chip units.Each core
Blade unit includes pin area and radiating area, and the radiating area of two chip units in same chip unit group passes through the first dowel
Connection is at least placed with a line chip unit group along frame length direction, and every a line chip unit group includes several being listed in frame
Matrix form integral structure composed by interior multiple row chip unit group.Every a line chip unit group includes the first pin area and
The first pin area in two pin areas, the first row chip unit group is fixedly connected with frame, and the second of last line chip unit group
Pin area is fixedly connected with frame；And first pipe in the second pin area of line n chip unit group and the (n+1)th row chip unit group
Foot area is fixedly connected, n=1,2 ..., N, N >=1.
Every row chip unit group further includes the chip unit group that quantity is 2A, wherein the 2a-1 chip unit group and the
Be the first pre-determined distance between 2a chip unit group, the 2a chip unit group and the 2a+1 chip unit group it
Between be the second pre-determined distance, first pre-determined distance be greater than second pre-determined distance, a=1,2 ..., A；The 2a-1
It is connected between a chip unit group and the 2a chip unit group by third dowel, the 2a chip unit group and the
It is connected between 2a+1 chip unit group by the 4th dowel.
Preferably, the 5th dowel, the second pin of line n chip unit group are equipped between adjacent rows chip unit group
Area passes through the 5th dowel with the first pin area of the (n+1)th row chip unit group and is fixedly connected.
A kind of preferred embodiment is present embodiments provided, as depicted in figs. 1 and 2, which includes frame 1 and row
Two row chip unit groups being distributed in frame 1, every a line chip unit group include 24 column chip unit groups.Each chip unit packet
Include pin area 2 and radiating area 3.Wherein, lead between the chip unit A1 in the same chip unit group and the cooling fin 3 of chip A2
Cross the first dowel 41 connection, between chip unit A3 and chip unit A4 in chip unit group also by the first dowel 41
Connection.
Such as the chip unit group for every a line: lead frame from left to right successively: first row chip unit group with
It is provided with the first prepsetting gap 81 between secondary series chip unit group, and is connected by third dowel 43, that is to say first
It is the first pre-determined distance between column chip unit group and the second chip unit；And secondary series chip unit group and third column chip list
It is provided with the second prepsetting gap 82 between tuple, and is connected by the 4th dowel 44, that is to say secondary series chip unit group
It is the second pre-determined distance between third column chip unit group；And so on, the 24 column chip unit group of every a line in Fig. 1 is such as
Upper arrangement.Wherein, the first pre-determined distance is greater than the second pre-determined distance.When lead frame is in molding, lead frame is placed in
When in molding frame, by forming a cavity between the first prepsetting gap 81 and upper/lower die, note when which is exactly molding
Jiao Dao, as shown in Figure 6 in injecting glue road 9.
Further, each chip unit group includes the first pin area 24 and the second pin area 25, such as the first row core
First pin area 24 of blade unit group, the second row chip unit group the second pin area 25 connect with frame 1.The first row core
Second pin area 25 of blade unit, the second row chip unit group the first pin area 24 between by the 5th dowel 45 connect.
Preferably, as shown in Fig. 2, the pin area of each chip unit further includes several pins, the phase of each chip unit
It is connected between adjacent pin by gear glue muscle 7.By the way that gear glue muscle 7 is arranged between adjacent pin, the molding material in molding can be prevented
Material largely spills into the region between the adjacent pin of chip unit.
Radiating area 3 includes chip bearing area, which is used for adhering chip.
Preferably, the pin Qu Junyu frame 1 of each chip unit is in same plane, 3 place plane of radiating area and side
Have preset height poor between 1 place plane of frame, by the way that difference in height is arranged, heat dissipation after packaging comprising chip bearing area can be made
Area 3 is exposed and radiates.In addition, the thickness of radiating area 3, pin area and frame 1 is all the same.
The pin area of each chip unit includes multiple pins, is divided into fixing pin 22 and terminal pins 21, fixing pin
22 are fixedly connected with chip bearing area, and terminal pins 21 are equipped with wire welding area, and chip bearing area also is provided with wire welding area.Terminal pins
It is connected between wire welding area 23 and the wire welding area of chip by lead.When chip is adhered in chip bearing area, chip passes through
Pin is connect with external circuit.
Preferably, the cross section of the wire welding area 23 of terminal pins is greater than the pin cross section of the terminal pins 21, in this way may be used
To increase the contact area of the wire welding area 23 of bonding wire and terminal pins, it is easier bonding wire.
The wire welding area 23 of terminal pins is additionally provided with lock glue hole 6 can be by molding material lock in terminal pins in molding
Wire welding area 23 and gear glue muscle 7 between, greatly reinforced the combination of molding material and lead frame.
In order to enable bonding wire is stronger in later period use process, the present embodiment also sets the wire welding area of terminal pins 23
It is set to curved shape, so that the wire welding area 23 of terminal pins is with the projected centre lines of corresponding terminal pins 21 not in same straight line
On.When using finished product in the later period, since welding zone is that curved shape is tightly embedded in inside molding body, in product upper plate application process
In pin will not be caused to loosen because of the extra-stress acted on pin, play the role of protecting inner lead well.
It is additionally provided with location hole 5 on the frame 1 of the lead frame of the utility model, is used in packaging technology, by lead
Frame is fixed on sealed in unit.Wherein location hole 5 can be divided into circular locating openings and oval location hole, circular locating openings one
As be for stationary positioned, and oval location hole be in order to prevent lead frame in packaging technology process due to expanding with heat and contract with cold
Cause its length, width etc. to expand, and the position of lead frame is migrated relative to the position of circular locating openings.
For the lead frame that the utility model uses for the lead frame of copper, lead is copper wire, is drawn compared to traditional using gold
For line, cost is greatlyd save.
In addition, in order to enable preferably being combined between the wire welding area and lead of chip, the utility model is also right in bonding wire
Nickel plating palladium metal layer on the wire welding area of chip.By the wire welding area nickel plating palladium in chip, be greatly improved the wire welding area of chip with
The reliability welded between lead.In addition, in order to increase the wire welding area of chip and the reliability of lead, leading to when traditional bonding wire
It is often using gold thread as lead；And the utility model is by the wire welding area nickel plating palladium in chip, be also greatly improved copper wire with
Reliability between chip, under the premise of guaranteeing soldering reliability, more saving material cost.
The utility model is by using matrix frame, so that the lead frame of traditional multi-pipe pin product is single
Design becomes multiple rows of design, and is symmetric design, is greatly improved the quantity of chip product；And material is greatly improved in turn
Utilization rate and production efficiency, qualification rate etc..
Embodiment two:
The utility model additionally provides another embodiment, a kind of envelope of the lead frame of multi-pipe pin semiconductor product
Dress method has fundamentally prevented burr risk by changing traditional semiconductor packaging process process.Meanwhile for weldering
Nickel palladium depositing process has been introduced in solder joint area when line, has substantially increased the reliability of welding.
For existing semiconductor packaging process process, following below scheme step is generally comprised: patch chip step, wire bonding
Step, molding step, plating step and discretely-formed step.
Multitube pin semiconductor has just been directly obtained after it can be seen that the rib cutting separation for lead frame in the above process
Device.But for multi-pipe pin product, since number of pin is more, the gap between adjacent pin is smaller, when rib cutting by
It is more in the number of pin cut, it is easy to generate metal burr, if these metal burrs are remained onto chip unit, can make
In the presence of the risk of short circuit when later period user uses.
In order to solve the above-mentioned technical problem, the utility model provides a kind of new packaging method, which passes through
Increase rib cutting step after molding step and deburring step, the part of lead frame when that is to say to molding are cut
Then dowel between muscle, such as pin carries out deburring processing to the lead frame after rib cutting, institute during rib cutting is residual
The metal burr removal stayed, is then again electroplated lead frame, is separated and forming processes, be that is to say, as shown in figure 3,
The packaging method concrete processing procedure is as follows:
Chip: being pasted on the chip bearing area of each chip unit of lead frame by patch chip step, so that chip is solid
It is scheduled on chip bearing area.
In addition, chip is obtained generally by following steps, specifically include:
Wafer step of membrane sticking: by bonding wafer to blue film, the step is in order to fix wafer, convenient for adding for subsequent technique
Work；
Wafer cutting step: multiple chips are cut to along the Cutting Road of crystal column surface.
After the completion of chip in lead frame is pasted, wire bonding step is executed, that is to say:
Wire bonding step: pair of chip unit is corresponded on the wire welding area of the chip in chip bearing area and lead frame
Welding lead between the wire welding area of pin is answered, so that chip is connect by pin with external circuit.
Molding step: being packaged lead frame using molding material, forms the bonding wire of the pin of each chip unit
The molding body that area, bonding wire and chip bearing area are wrapped up by molding material.Such as by the radiating area, bonding wire and pipe of lead frame
The wire welding area molding material package of foot is got up, and prevents chip and lead by the influence of external physical and/or chemistry, such as object
Reason is hit or chemical attack.Molding material can be epoxy resin.Molding body referred to herein refers to by the chip after molding
The corresponding part wrapped up by molding material of unit.Rib cutting step: between adjacent chips unit in the lead frame after encapsulation
Company's muscle and pin between company's muscle carry out rib cutting processing.
Deburring step: deburring processing is carried out to rib cutting treated lead frame.
Plating step: electricity is carried out to the metallic region for not having molding material to wrap up on deburring treated lead frame
Plating.For example the metal layers such as tin plating/tin-lead can enhance the solderability of lead frame, be easy to later period installation on circuit boards.
Separating step: the frame of the lead frame after plating is cut off, single multi-pipe pin semiconductor devices is separated into.
Forming step: by the pin disposal of each multi-pipe pin semiconductor devices at preset shape.
The utility model by increasing rib cutting step before the electroplating step, to the adjacent chips of the lead frame after molding
Company's muscle between unit and company's muscle between pin carry out rib cutting processing, are then removed caused by rib cutting by deburring again
Metal burr, so can avoid due to metal burr residual in the product, cause later period user using when be likely to result in short circuit
Risk.
Based on the new lead frame that the utility model provides, corresponding rib cutting step and separating step specifically:
As shown in Figure 4, wherein rib cutting step primarily directed to the pin of chip unit each in lead frame at
Reason that is to say the various even muscle that excision is connect with the pin of each chip unit.As shown in figure 4, specifically:
The 4th dowel between adjacent column chip unit group is cut off first；Than the 4th dowel 44 as shown in Figure 2；
Then the third dowel between adjacent column chip unit group is cut off again；Than third dowel 43 as shown in Figure 2；Finally again
The gear glue muscle between the pin of each chip unit is cut off, keeps off glue muscle 7 as shown in Figure 3.In addition, when excision keeps off glue muscle,
First excision gear glue muscle A and gear glue muscle B, then cuts off gear glue muscle C and gear glue muscle D again.To connect with pin by the rib cutting step
The excisions such as the dowel, the gear glue muscle that connect, so that pin separates.Then again by carrying out unhairing to the lead frame after rib cutting
Thorn processing, can by generated metal burr removes on pin after rib cutting, while can also further to molding when it is remaining
Excessive glue removal, avoids metal burr from remaining in final product, influences the use of user.
As shown in figure 5, separating step is cut off primarily directed to dowels other in the excision of frame and lead frame,
So that chip unit separates.
Separating step specifically: be first turned off the interim pins of each chip unit, then cut off the frame of lead frame with
And the 5th dowel between adjacent rows chip unit group, frame 1 as shown in Figure 2 and the first row chip unit group
The second pin area and the second chip unit group the first pin area between the 5th dowel 45 so that pin separate；Then
Cut off the first dowel in each chip unit group between the radiating area of two chip units, the first connection as shown in Figure 2
Muscle 41, so that each chip unit separates.
In addition, for the 2a chip unit group in row chip unit group every in lead frame provided by the utility model
It is the second pre-determined distance between the 2a+1 chip unit group, for example secondary series chip unit group as shown in Figure 1 and third arrange
There are the second prepsetting gaps 82 between chip unit group；In molding, due to there is the presence of the prepsetting gap, a small amount of mould is had
Closure material is spilt between the 2a chip unit group and the 2a+1 chip unit group.In order to improve in rib cutting, molding material
Material will not impact rib cutting equipment, before the fixing pin for cutting off each chip unit further include: cut off every row chip
The 2a chip unit group in unit group and the molding material between the 2a+1 chip unit group.
Preferably, before the fixing pin for cutting off each chip unit further include: by two cores in each chip unit group
The part of the first dowel between the radiating area of blade unit is cut off, so that the first dowel residue width is the first dowel
The 50% of former width；Then it after pin separation, then cuts off in each chip unit group between the radiating area of two chip units
The first dowel another part.Connected by first between the radiating area to two chip units in each chip unit group
Connect muscle in two times rib cutting when, can avoid generating excessive clast during rib cutting, result in the need for operator and suspend machine to internal big
The clast of amount is cleared up, and has very big security risk；It is difficult to the cutting of dowel at the same time it can also reduce rib cutting equipment
Degree.
In addition, due to the difference of lead frame, causing to be formed by when molding in new packaging method as shown in Fig. 6 to 8
Injecting glue road 9 is also different.Such as traditional lead frame, the injecting glue road 9 of molding may be provided at two neighboring chip unit it
Between.
And for lead frame provided by the utility model, such as the 2a-1 chip unit group and the 2a core
It is the first pre-determined distance between blade unit group, for example lead frame is placed in upper and lower mould by the first prepsetting gap 81 as shown in Figure 1
When in tool, injecting glue road 9 is formed in first prepsetting gap and upper/lower die.Correspondingly, the 2a chip unit group with
It is the second pre-determined distance between the 2a+1 chip unit group, since the first pre-determined distance is greater than the second pre-determined distance, will
The setting of injecting glue road 9 is formed by cavity in the first prepsetting gap 81 with upper/lower die.Due to the change in injecting glue road 9, In
When injecting glue, the quantity of molding material also changes, and the runner quantity of the shunting of molding material also changes.For example scheme
Shown in 6- Fig. 8, the molding material of injecting glue becomes 6 from 5, and the runner quantity that each molding material shunts is by original 6
Item becomes 4.In addition, corresponding adjustment, such as traditional molding material every has also been made for the weight of each molding material
3.8g, 5*3.8g can encapsulate 30*2=60 chip unit in total when a molding；And existing every 6.3g of molding material,
6*6.3g in total can be with 96*2=192 chip unit of molding when molding, it is evident that new lead frame in molding more
Supernumerary segment resource-saving.
During molding, the length of the runner of molding material also changes in mold, for example runner b is clearly than stream
Road a is longer, can cover more multiple rows of molding unit, more saving material.Due to different from the quantity of the adjacent chip unit in injecting glue road,
Therefore gum-injecting port 10 is shunted by 2 holes becomes 4 holes and shunts, after change each capsulation material can molding quantity by original 12 increases
To 32 etc..Likewise, the formation of the gum-injecting port 10 is also in the cooling fin of each chip unit and the first dowel (as schemed
The first dowel 41 in 1) between corresponding gap is set, will be in the gap when lead frame is arranged in upper/lower die
Position formed gum-injecting port 10.
Preferably, packaging method further include: wafer step of membrane sticking and wafer cutting are additionally provided with before pasting chip step
Step, wherein wafer step of membrane sticking are as follows: will be on bonding wafer to blue film；Wafer cutting step are as follows: along the Cutting Road on wafer
It is cut to multiple chips.
Further, packaging method provided by the utility model further includes Aging Step and baking procedure, and wherein aging walks
Suddenly are as follows: aging process is carried out to the lead frame after molding.For example the lead frame after molding is carried out at high temperature by high temperature
Reason may make molding material-epoxy resin fully reacting, preferably protection inside chip and circuit.In general, by lead frame
Frame is placed 8 hours or so under high temperature environment, enables to the chemical reaction of epoxy resin to get to 95% or more, then it is assumed that epoxy
Resin reaction is complete, and chemical form is firm.
It is further to the lead frame after plating to be toasted after the electroplating step by increasing baking procedure, it can be with
Further such that the metal layer of plating is preferably combined with lead frame, tin, zinc etc. are prevented because ABNORMAL STRESS grows golden palpus.Separately
It outside, in general for Aging Step and baking procedure, is by carrying out high-temperature process to lead frame, only it is handled
The differences such as time, temperature.
Above embodiment is only preferred embodiments of the present invention, cannot be protected with this to limit the utility model
Range, the variation of any unsubstantiality that those skilled in the art is done on the basis of the utility model and replacement belong to
In the utility model range claimed.
Claims (10)
1. the matrix frame of multi-pipe pin semiconductor product, which is characterized in that including frame and chip unit group, the core
Blade unit group includes two chip units, and the chip unit includes radiating area and pin area, and the radiating area is equipped with chip
The radiating area of supporting region, two chip units in same chip unit group is connected by the first dowel, long along the frame
Direction arrangement N row chip unit group is spent, N >=1 is connected with the second dowel is passed through between a line chip unit group；Every a line core
Blade unit group includes the first pin area and the second pin area, and the first pin area of the first row chip unit group and frame, which are fixed, to be connected
It connects, the second pin area of last line chip unit group is fixedly connected with frame；Second pin area of line n chip unit group with
First pin area of the (n+1)th row chip unit group is fixedly connected, n=1,2 ..., N；It wraps in the pin area of each chip unit
Several pins are included, pass through gear glue muscle connection between the adjacent pin of each chip unit.
2. the matrix frame of multi-pipe pin semiconductor product according to claim 1, which is characterized in that every row core
Blade unit group includes the chip unit group that quantity is 2A, wherein the 2a-1 chip unit group and the 2a chip unit group it
Between be the first pre-determined distance, between the 2a chip unit group and the 2a+1 chip unit group be the second pre-determined distance,
First pre-determined distance is greater than second pre-determined distance, a=1,2 ..., A；The 2a-1 chip unit group and the
It is connected between 2a chip unit group by third dowel, the 2a chip unit group and the 2a+1 chip unit group
Between by the 4th dowel connect.
3. the matrix frame of multi-pipe pin semiconductor product according to claim 2, which is characterized in that described adjacent two
The 5th dowel, the second pin area of the line n chip unit group and the (n+1)th row chip list are equipped between row chip unit group
First pin area of tuple passes through the 5th dowel (45) and is fixedly connected.
4. according to claim 1 to the matrix frame of 3 any multi-pipe pin semiconductor products, which is characterized in that institute
It states pin area to be generally aligned in the same plane with the frame, have between plane where the chip bearing area and the plane where frame
Preset height is poor；The thickness in the chip bearing area, pin area and frame is all the same.
5. the matrix frame of multi-pipe pin semiconductor product according to claim 4, which is characterized in that the pin area
Equipped with fixing pin and terminal pins, fixing pin is fixedly connected with chip bearing area, and the terminal pins are equipped with wire welding area；Draw
It is connected between the wire welding area of spool foot and the wire welding area of chip by lead.
6. the matrix frame of multi-pipe pin semiconductor product according to claim 5, which is characterized in that terminal pins
The cross section of wire welding area is greater than the pin cross section of the terminal pins.
7. the matrix frame of multi-pipe pin semiconductor product according to claim 5, which is characterized in that the fairlead
The wire welding area of foot is additionally provided with lock glue hole.
8. the matrix frame of multi-pipe pin semiconductor product according to claim 1, which is characterized in that the lead frame
Frame is copper lead frame, and the lead is copper lead.
9. the matrix frame of multi-pipe pin semiconductor product according to claim 1, which is characterized in that on the frame
Multiple location holes are additionally provided with, when packaged, lead frame is fixed on sealed in unit for lead frame for location hole.
10. the matrix frame of multi-pipe pin semiconductor product according to claim 9, which is characterized in that the positioning
Hole includes circular locating openings, rectangular location hole and oval location hole.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920099144.5U CN209571411U (en) | 2019-01-21 | 2019-01-21 | The matrix frame of multi-pipe pin semiconductor product |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920099144.5U CN209571411U (en) | 2019-01-21 | 2019-01-21 | The matrix frame of multi-pipe pin semiconductor product |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN209571411U true CN209571411U (en) | 2019-11-01 |
Family
ID=68332409
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201920099144.5U Active CN209571411U (en) | 2019-01-21 | 2019-01-21 | The matrix frame of multi-pipe pin semiconductor product |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN209571411U (en) |
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2019
- 2019-01-21 CN CN201920099144.5U patent/CN209571411U/en active Active
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