CN208636737U - The enhanced LDO circuit of simple and effective transient state - Google Patents
The enhanced LDO circuit of simple and effective transient state Download PDFInfo
- Publication number
- CN208636737U CN208636737U CN201821366112.9U CN201821366112U CN208636737U CN 208636737 U CN208636737 U CN 208636737U CN 201821366112 U CN201821366112 U CN 201821366112U CN 208636737 U CN208636737 U CN 208636737U
- Authority
- CN
- China
- Prior art keywords
- ldo circuit
- resistance
- resistor
- power tube
- error amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Continuous-Control Power Sources That Use Transistors (AREA)
Abstract
The utility model provides the enhanced LDO circuit of simple and effective transient state, the LDO circuit includes error amplifier, load capacitance, power tube, first resistor, second resistance, 3rd resistor and first switch, first switch one terminates output end vo ut, the other end of another termination 3rd resistor of first switch, 3rd resistor connects ground；Wherein, the input terminal of external reference voltage Vref put-into error amplifier, another input terminal connection first resistor and second resistance connected node of error amplifier；The enhanced LDO circuit of the transient state of the utility model, due to using the structure of the above-mentioned newly-increased switch of newly-increased resistance connection, beneficial effect obtained is, a resistance is increased newly in order to bias a foundation load electric current to power tube, the size of a newly-increased resistance is determined according to the size of power tube, the electric current for flowing through a newly-increased resistance is allowed to guarantee that power tube is still worked in external minimum load current in critical saturation region, to achieve the purpose that improve LDO circuit transient response speed.Meanwhile when the LDO circuit is in suspend mode, increases a switch newly and disconnect, there is no electric current to flow through on a newly-increased resistance, meet the needs of chip suspend mode low power consumption.
Description
Technical field
The utility model belongs to IC design technical field, is related to the enhanced LDO circuit of simple and effective transient state.
Background technique
Now, consumer electronics product increasingly becomes the necessity of people's life.And this electronic product such as sim
Card, bank card, UJKey etc. be unable to do without electric power management circuit, and the quality of electric power management circuit performance often determines that electronics produces
The service life of product and performance.Power management chip mentions various external power supplies (battery, alternating current) after variation for electronic product
For reliable and stable voltage.Other than reliable and stable basic demand, modern electronic product proposes more power supply chip
It is required that such as: low-power consumption, area is small, and high efficiency, speed is fast, high PSRR etc..
LDO(Low Dropout Regulator, linear voltage regulator) circuit, LDO circuit is one of power management chip,
Because its area is small, using simple, therefore it is more and more widely used in portable consumer electronics product.From basic principle
For, LDO circuit is the output resistance that itself is adjusted according to the situation of change of load, to guarantee that the voltage of output end is constant
It is constant.
Since market today competes very fierce, SIM card, bank card, the products such as UKey propose LDO circuit higher
It is required that.The LDO circuit for meeting system requirements is designed, needs to consider the trade-off relation of indices.Such as: designed LDO
Circuit wants small power consumption, and area is small, has enough load capacity, good stability and quick transient response etc..
Common LDO circuit structure, as shown in Figure 1, mainly there is reference voltage Vref, error amplifier Ae adjusts power tube
MP1 and sampling resistor R1 and sampling resistor R2 composition.It is general in actual chips that there are also over-voltage thermal-shutdown circuit, output ends
Indirect electric capacity of voltage regulation C1, Iload with ground are load currents.
Common LDO circuit constitutes a negative feedback closed loop system by resistance-feedback network.When LDO circuit output end voltage
When increase, feedback signal is provided by resistance-feedback network, error amplifier noninverting input voltage rises, and passes through and error
The reference voltage of amplifier inverting input is compared, the output signal of alignment error amplifier, increases the grid electricity of power tube
Pressure, reduces the output voltage of LDO circuit；Conversely, being provided when the decline of LDO circuit output end voltage by resistance-feedback network
Feedback signal, the decline of error amplifier noninverting input voltage, and pass through the reference voltage with error amplifier reverse input end
It is compared, the output signal of alignment error amplifier reduces the gate voltage of power tube, raises the output voltage of LDO circuit.
LDO circuit stabilizes the output voltage Vout's are as follows: Vout=(1+R1/R2) Vref.
In the traditional index of common LDO circuit, most important index is the degree of stability of output voltage, voltage accuracy, bears
Regulation and voltage regulation factor are carried, and modern electronic product also requires LDO circuit to have transient response speed as high as possible.
As shown in Fig. 2, being common LDO circuit transient response waveform schematic diagram.When common LDO circuit output end assigns
One load current steps to maximum output current from minimum (such as 1uA), and the transient response of output voltage is successively: output electricity
Transient state is pressed to decline Vdip, output voltage stabilization restores, and output voltage is constant.
When load current steps to maximum value from very little, loads and need to extract a large amount of electric currents from LDO circuit suddenly, if
When the electric current that LDO circuit provides is not enough to maintain load current, output voltage, which will be pulled low, generates a undershoot Vdip.Because
When load is the low current of this magnitude of 1uA, the very big power tube of size no longer works in saturation region, but works in subthreshold
It is worth area, speed is slow, in addition the bulky capacitor of power tube grid, the corresponding speed of loop is also relatively slow, and slew rate is lower, the grid of power tube
Pole tension fails to timely respond to, and load current, which is mainly discharged by the capacitor of output end, to be provided.Usually when output voltage transient state declines
When Vdip is more than the 10% of output voltage, the voltage that will lead to LDO circuit output is too low, causes system reset.
And the common method for improving LDO circuit transient response speed have it is following several: one, reduce power tube；Secondly, increase
The tail current of big error amplifier；Thirdly, increase LDO circuit output end and ground indirect capacitor.But the size of power tube
Generally there is a maximum load current ability, conduction voltage drop is traded off；The tail current for increasing error amplifier can cause the increase of power consumption；
The increase of area can be brought by increasing load capacitance, so, three of the above method is all undesirable.
Utility model content
In view of the above-mentioned deficiencies in the prior art, the purpose of this utility model is to propose a kind of simple and effective transient state
Enhanced LDO circuit increases one switch of resistance connection newly, and the enhanced LDO circuit of the transient state is in power tube load current minimum
Also it works in critical saturation region, to achieve the purpose that improve LDO circuit transient response speed.
In order to reach above-mentioned technical purpose, the technical scheme adopted by the utility model is
A kind of enhanced LDO circuit of simple and effective transient state, the LDO circuit include error amplifier, load capacitance, function
Rate pipe, first resistor, second resistance, 3rd resistor and first switch, wherein external reference voltage Vref put-into error amplifier
Input terminal, another input terminal connection first resistor and second resistance connected node of error amplifier；
The output end of the grid end connection error amplifier of power tube, the source of power tube connect power vd D, the leakage of power tube
One end of end connection first resistor, the drain terminal of power tube is also the output end of the LDO circuit；First resistor and second resistance string
Connection, the other end ground connection of second resistance, first resistor and second resistance form resistance-feedback network；Load capacitance one end connects institute
The output end of LDO circuit is stated, the other end of load capacitance connects ground；First switch one terminates the output end of the LDO circuit, the
The other end of another termination 3rd resistor of one switch, 3rd resistor connects ground；
When the LDO circuit is in operating mode, the LDO circuit constitutes a negative-feedback by resistance-feedback network and closes
Loop system provides feedback signal by resistance-feedback network, accidentally when the voltage of the output end vo ut of the LDO circuit increases
Poor amplifier noninverting input voltage rises, and by being compared with the reference voltage of error amplifier reverse input end, adjusts
The output signal of whole error amplifier increases the gate voltage of power tube, reduces the output voltage of the LDO circuit；Conversely, working as institute
When stating the output end Vout voltage decline of LDO circuit, feedback signal is provided by resistance-feedback network, error amplifier is defeated in the same direction
Enter voltage is held to decline, and by being compared with the reference voltage of error amplifier reverse input end, alignment error amplifier
Output signal reduces the gate voltage of power tube, improves the output voltage of the LDO circuit, at this point, first switch is closed, third
The electric current flowed through on resistance guarantees that power tube is still worked in minimum load current Iload in critical saturation region, without entering
Sub-threshold region improves the transient response speed of LDO circuit；
When the LDO circuit is in suspend mode, the negative-feedback that the LDO circuit closes resistance-feedback network composition is closed
Loop system, first switch disconnect, and no current flows through in 3rd resistor, and the LDO circuit enters dormant state.
The enhanced LDO circuit of the transient state of the utility model, due to using the above-mentioned newly-increased switch of newly-increased resistance connection
Structure, beneficial effect obtained is, increases a resistance newly to bias a foundation load electric current to power tube, increases an electricity newly
The size of resistance is determined according to the size of power tube, and the electric current for flowing through a newly-increased resistance is allowed to guarantee power tube in external minimum load electricity
It is still worked when stream in critical saturation region, to achieve the purpose that improve LDO circuit transient response speed.Meanwhile when the LDO electricity
When road is in suspend mode, increases a switch newly and disconnect, there is no electric current to flow through on a newly-increased resistance, meet chip suspend mode low power consumption
Demand.
The utility model is described further with reference to the accompanying drawings and detailed description.
Detailed description of the invention
Fig. 1 is common LDO circuit structure chart.
Fig. 2 is common LDO circuit transient response waveform schematic diagram.
Fig. 3 is the enhanced LDO circuit structure chart of novel transient state of the utility model specific implementation.
Fig. 4 is the enhanced LDO circuit transient response waveform schematic diagram of novel transient state of the utility model specific implementation.
Specific embodiment
With reference to the accompanying drawing, specific embodiment of the present utility model is described in detail, it is to be understood that this is practical
Novel protection scope is not limited by the specific implementation.
Referring to Fig. 3, for the LDO circuit structure chart of the utility model specific implementation.The novel enhanced LDO circuit packet of transient state
Error amplifier Ae, load capacitance C1, power tube MP1, first resistor R1, second resistance R2,3rd resistor R3 and first is included to open
Close S1, wherein the input terminal of external reference voltage Vref put-into error amplifier Ae, another input terminal of error amplifier Ae
Connect first resistor R1 and second resistance R2 connected node.
The output end of the grid end connection error amplifier Ae of power tube MP1, the source of power tube MP1 connect power vd D, function
One end of the drain terminal connection first resistor R1 of rate pipe MP1, the drain terminal of power tube MP1 is also the output end vo ut of the LDO circuit；
First resistor R1 connects with second resistance R2, the other end ground connection of second resistance R2, first resistor R1 and second resistance R2 composition
Resistance-feedback network；The one end load capacitance C1 connects the output end vo ut of the LDO circuit, the other end connection of load capacitance C1
Ground；First switch S1 mono- terminates the output end vo ut of the LDO circuit, another termination 3rd resistor R3 of first switch S1, the
The other end of three resistance R3 connects ground.
When the LDO circuit is in operating mode, the LDO circuit constitutes a negative-feedback by resistance-feedback network and closes
Loop system provides feedback signal by resistance-feedback network, accidentally when the voltage of the output end vo ut of the LDO circuit increases
Poor amplifier Ae noninverting input voltage rises, and by being compared with the reference voltage of error amplifier Ae reverse input end
Compared with the output signal of alignment error amplifier Ae increases the gate voltage of power tube MP1, reduces the output electricity of the LDO circuit
Pressure；Conversely, providing feedback signal, error by resistance-feedback network when the decline of the output end Vout voltage of the LDO circuit
The decline of amplifier Ae noninverting input voltage, and by being compared with the reference voltage of error amplifier Ae reverse input end,
The output signal of alignment error amplifier Ae, reduces the gate voltage of power tube, improves the output voltage of the LDO circuit, at this point,
First switch S1 is closed, and the electric current flowed through on 3rd resistor R3 guarantees that power tube still works in minimum load current Iload
The transient response speed of the LDO circuit is improved without entering sub-threshold region in critical saturation region.
When the LDO circuit is in suspend mode, the negative-feedback that the LDO circuit closes resistance-feedback network composition is closed
Loop system, first switch S1 are disconnected, and no current flows through on 3rd resistor R3, and the LDO circuit enters dormant state.
In the novel enhanced LDO circuit of transient state, when the LDO circuit is in operating mode, the LDO circuit passes through electricity
It hinders feedback network and constitutes a negative feedback closed loop system, increasing a resistance newly is 3rd resistor R3, and 3rd resistor R3 is in order to give power
The size that pipe MP1 biases foundation load an electric current Iload, 3rd resistor R3 is determined according to the size of power tube MP1, is allowed and is flowed through
The electric current of 3rd resistor R3 guarantees that power tube MP1 still works in external minimum load current Iload in critical saturation region.Together
When, grid width is the power tube MP1 of several hundred um, and the electric current on 3rd resistor R3 can generally be designed in several hundred uA, for defeated
Voltage is the LDO circuit of 1.5V or so out, and the size of 3rd resistor R3 is 3K ohms, and area occupied very little is this
The benefit of structure is to be equivalent to load current from the when load current Iload steps to maximum current from minimum (such as 1uA)
To maximum current, the undershoot Vdip of such output voltage can be improved, be equivalent to and improve for current step on three resistance R3
The transient response speed of the LDO circuit.Or power when being 1uA is can be understood as plus load current after 3rd resistor R3
Pipe is avoided into sub-threshold region, but is worked in critical saturation region, and the speed of the LDO circuit described in this way can be fast than before, phase
When in the transient response speed for improving the LDO circuit.
Moreover, wherein the effect of first switch S1 is closed the switch when the LDO circuit works normally, 3rd resistor R3
A bias current is provided for power tube MP1.When the LDO circuit works normally, general power consumption is more than ten or tens mA, the
Current design on three resistance R3 is several hundred uA, and power consumption influence can be ignored when working normally in this way on chip.When the LDO electricity
When road is in suspend mode, the LDO circuit closes the negative feedback closed loop system of resistance-feedback network composition, and first switch S1 is disconnected
It opens, no electric current flows through on 3rd resistor R3, meets the needs of chip suspend mode low power consumption.
It referring to fig. 4, is the enhanced LDO circuit transient response waveform signal of the novel transient state of the utility model specific implementation
Figure.When having identical jump using the back loading of this structure, the output end of the LDO circuit declines Vdip1, and with commonly
LDO circuit, when seeing the structure of Fig. 1, which declines Vdip.In the present invention, the LDO circuit it is defeated
Voltage 1.5V out, 3rd resistor R3 are 3K ohm, and when first switch S1 is closed, the electric current of 3rd resistor R3 is 500uA, power tube
Size be W/L=500um/0.5um, the load capacity of the LDO circuit is 12mA, it is desirable that when load current Iload change
When, the minimum 1.35V of LDO circuit output voltage.When load end assigns an electric current for stepping to from 1uA 12mA, institute
The output voltage for stating LDO circuit drops to 1.37V, has dropped Vdip1 equal to 130mv, meets system index requirement.And with common
LDO circuit, see the structure of Fig. 1, which drops to 1.30V, have dropped Vdip equal to 200mv,
It is unsatisfactory for system index requirement.The enhanced LDO circuit knot of transient state provided by the invention can be proved from theoretical and actual emulation
Structure can simply and effectively improve the transient response speed of the LDO circuit.
It should be noted that above embodiment only illustrates the basic ideas of the utility model in a schematic way, with this reality
Built-up circuit number, shape, device arrangement mode when with related built-up circuit in novel rather than according to actual implementation, connection
Mode is drawn.Kenel, quantity, connection type, device arrangement mode, the device parameters of each circuit can be random when its actual implementation
Change.
Embodiment described above is only the utility model preferred embodiment, cannot limit the utility model technology
The extension of scheme.All those skilled in the art's made any well-known techniques on the basis of technical solutions of the utility model that belongs to are repaired
Change, equivalent variations and it is obvious change etc., all should belong to the protection range of the utility model within.
Claims (1)
1. a kind of enhanced LDO circuit of simple and effective transient state, including it is characterized in that, the LDO circuit includes error amplification
Device, load capacitance, power tube, first resistor, second resistance, 3rd resistor and first switch, wherein external reference voltage Vref
Another input terminal connection first resistor of the input terminal of put-into error amplifier, error amplifier is connected section with second resistance
Point；
The output end of the grid end connection error amplifier of power tube, the source of power tube connect power vd D, and the drain terminal of power tube connects
One end of first resistor is connect, the drain terminal of power tube is also the output end of the LDO circuit；First resistor is connected with second resistance,
The other end of second resistance is grounded, and first resistor and second resistance form resistance-feedback network；Described in the connection of load capacitance one end
The other end of the output end of LDO circuit, load capacitance connects ground；First switch one terminates the output end of the LDO circuit, and first
The other end of another termination 3rd resistor of switch, 3rd resistor connects ground；
When the LDO circuit is in operating mode, the LDO circuit constitutes a negative feedback closed loop system by resistance-feedback network
System provides feedback signal by resistance-feedback network, error is put when the voltage of the output end vo ut of the LDO circuit increases
Big device noninverting input voltage rises, and by being compared with the reference voltage of error amplifier reverse input end, adjustment is missed
The output signal of poor amplifier increases the gate voltage of power tube, reduces the output voltage of the LDO circuit；Conversely, when described
When the output end Vout voltage decline of LDO circuit, feedback signal is provided by resistance-feedback network, error amplifier inputs in the same direction
Hold voltage decline, and by being compared with the reference voltage of error amplifier reverse input end, alignment error amplifier it is defeated
Signal out reduces the gate voltage of power tube, improves the output voltage of the LDO circuit, at this point, first switch is closed, third electricity
The electric current flowed through in resistance guarantees that power tube is still worked in minimum load current Iload in critical saturation region, sub- without entering
Threshold zone improves the transient response speed of LDO circuit；
When the LDO circuit is in suspend mode, the LDO circuit closes the negative feedback closed loop system of resistance-feedback network composition
System, first switch disconnect, and no current flows through in 3rd resistor, and the LDO circuit enters dormant state.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821366112.9U CN208636737U (en) | 2018-08-23 | 2018-08-23 | The enhanced LDO circuit of simple and effective transient state |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821366112.9U CN208636737U (en) | 2018-08-23 | 2018-08-23 | The enhanced LDO circuit of simple and effective transient state |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN208636737U true CN208636737U (en) | 2019-03-22 |
Family
ID=65743407
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201821366112.9U Active CN208636737U (en) | 2018-08-23 | 2018-08-23 | The enhanced LDO circuit of simple and effective transient state |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN208636737U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110858081A (en) * | 2018-08-23 | 2020-03-03 | 紫光同芯微电子有限公司 | Simple and effective transient enhancement type LDO circuit |
| CN112114611A (en) * | 2019-06-21 | 2020-12-22 | 圣邦微电子（北京）股份有限公司 | Circuit for improving transient response speed of voltage mode control loop |
-
2018
- 2018-08-23 CN CN201821366112.9U patent/CN208636737U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110858081A (en) * | 2018-08-23 | 2020-03-03 | 紫光同芯微电子有限公司 | Simple and effective transient enhancement type LDO circuit |
| CN112114611A (en) * | 2019-06-21 | 2020-12-22 | 圣邦微电子（北京）股份有限公司 | Circuit for improving transient response speed of voltage mode control loop |
| CN112114611B (en) * | 2019-06-21 | 2022-04-12 | 圣邦微电子（北京）股份有限公司 | Circuit for improving transient response speed of voltage mode control loop |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101847028B (en) | Dynamic compensation circuit with ultra-low power consumption and linear regulator with the same | |
| CN107102671B (en) | Low-power consumption fast transient response low-voltage difference adjustor | |
| CN103399607B (en) | The high PSR low pressure difference linear voltage regulator of integrated slew rate enhancing circuit | |
| CN208848104U (en) | A kind of low pressure difference linear voltage regulator of fast transient response | |
| CN110632972B (en) | Method and circuit for suppressing output voltage overshoot of LDO (low dropout regulator) | |
| CN208141256U (en) | A kind of LDO current-limiting protection circuit structure of new stable | |
| CN107024958B (en) | A kind of linear voltage-stabilizing circuit with fast load transient response | |
| CN112068627B (en) | Voltage output regulating module | |
| CN215599582U (en) | Buffer circuit for improving transient response capability of LDO (low dropout regulator) | |
| CN103412602A (en) | Non-capacitive low-dropout linear voltage regulator | |
| CN102411394A (en) | Linear voltage stabilizer with low pressure differential and Sink and Source current capabilities | |
| CN208636737U (en) | The enhanced LDO circuit of simple and effective transient state | |
| CN104615185B (en) | A kind of reference voltage source start-up circuit | |
| CN109101067A (en) | A kind of low pressure difference linear voltage regulator of dual power rail | |
| CN103389763A (en) | Low dropout regulator (LDO) and power supply rejection ratio (PSRR) improving method thereof | |
| CN208351364U (en) | A kind of linear voltage-stabilizing circuit | |
| CN110858081A (en) | Simple and effective transient enhancement type LDO circuit | |
| CN104950976B (en) | Voltage stabilizing circuit based on slew rate increasing | |
| CN108733118A (en) | A kind of high PSRR quick response LDO | |
| CN103399608B (en) | Low dropout regulator (LDO) integrated with slew rate intensifier circuit | |
| CN202711104U (en) | Low Dropout Regulator | |
| CN110647205B (en) | LDO (low dropout regulator) circuit without off-chip capacitor and power management system | |
| CN103760942B (en) | Be applicable to the transient state intensifier circuit of low pressure difference linear voltage regulator | |
| CN208188715U (en) | The LDO circuit of high PSRR quick response | |
| CN203595961U (en) | System of phase margin of dynamic compensation low dropout linear regulator |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |