CN208113030U - A kind of DMX512 decoder and the communication system using the decoder - Google Patents
A kind of DMX512 decoder and the communication system using the decoder Download PDFInfo
- Publication number
- CN208113030U CN208113030U CN201820639539.5U CN201820639539U CN208113030U CN 208113030 U CN208113030 U CN 208113030U CN 201820639539 U CN201820639539 U CN 201820639539U CN 208113030 U CN208113030 U CN 208113030U
- Authority
- CN
- China
- Prior art keywords
- signal
- decoder
- dmx
- address signal
- resistance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Selective Calling Equipment (AREA)
Abstract
The utility model discloses a kind of DMX512 decoder and using the communication system of the decoder, wherein, communication system uses special DMX512 decoder, so, former and later two decoder ontologies can be together in series along address signal by a conducting wire, it has substantive features and progress, be conducive to be sequentially connected in series between several decoder ontologies along address signal, convenient for realizing automation distribution from front to back when address is distributed, separately, each decoder ontology is connected in parallel on respectively between DMX+ signal wire and DMX- signal wire, so, DMX512 signal is timely received convenient for each decoder ontology.
Description
Technical field
The utility model relates to a kind of DMX512 decoder and using the communication system of the decoder.
Background technique
LED lamp is widely used in stage, and on the decoration of the buildings such as street, current LED lamp control system has
Using DMX512 protocol integrated test system mode, the expression way of the address of DMX512 decoder there are several types of：
A, toggle switch is used.Using 9 toggle switch indicate 512 data because 29 powers be equal to 512, it is specified that
Each one toggle switch of DMX512 decoder band, in this way can any setting address, the disadvantage is that must be through artificial one one
Address is configured to decoder aly, and needs corresponding table of the toggle switch with address, otherwise can not correctly be set
Set address.
B, address is indicated with charactron.Each one group of charactron of DMX512 decoder band, in addition key, to different ground
Location, settable different numerical value.Though this scheme is intuitive, higher cost, because being shown after decoder is once set address
Show and do not show, all, from DMX512 bus access according to when and do not show all, in other words, once set address,
Charactron can be out of use.
C, address is indicated with encoder.There is number on encoder, is transferred to corresponding data, then it represents that corresponding address, this
Kind of method is more similar with numeral method, is all that can intuitively see address value, and difference is that charactron needs power supply,
Encoder seems toggle switch, and the place than toggle switch benefit is directly to use digital representation, without seeing address form.Equally,
This method is also to need that address is manually arranged one by one, and efficiency does not change much.
D, with writing a yard device write address.In order to reduce cost, toggle switch is removed, charactron is removed, encoder is gone
Fall, using dedicated yard device of writing come write address, individual write address is carried out to each DMX512 decoder.This solves
Some problems of cost, but be identical having with above method, that is, it must manually, pair one by one
DMX512 decoder is operated, high labor cost, and low efficiency.
E, add a DMX512 sequential transducer.In plant produced DMX512 decoder, address is finished writing, and writes volume
Number, it is any to install regardless of sequence in engineering site installation, after being installed, sequence is moved towards by DMX512 signal, is write down
Then the number of corresponding decoder tells producer, by producer by the sequence of the decoder after this installation, write DMX512
In signal adapter, this converter is connect between DMX512 main controller and the 1st decoder, but goes out from DMX512 decoder
Factory is too many to the workload for working normally this process, and efficiency can not improve.
F, signal and address serial transmission.This scheme is that all decoders are together in series with signal wire, is being decoded
When device receives the data of DMX512 main controller, the data for belonging to itself are left, the data for belonging to other decoders later
It issues, each decoder is to work in this way.This scheme, though solving address allocation problem, from the beginning data successively pass
It is sent to finally, there is sizable delay here, for needing the occasion of quick response not applicable, is only applicable to change at a slow speed
Occasion.
Therefore, how to overcome above-mentioned defect, it has also become those skilled in the art's important topic urgently to be resolved.
Utility model content
The utility model overcomes the deficiency of above-mentioned technology, provides a kind of DMX512 decoder and using the decoder
Communication system.
To achieve the above object, the utility model uses following technical proposal：
A kind of DMX512 decoder includes decoder ontology 100, the decoder ontology 100 be equipped with controller 1,
DMX+ signal connection end 21, address signal input connector 3, is used for and the latter decoder ontology DMX- signal connection end 22
The address signal output connector 4 that 100 address signal input connector 3 connects and the power supply mould for decoder power supply
Block 5 is connected with DMX signal receiving module 6, the DMX between the DMX+ signal connection end 21 and DMX- signal connection end 22
Signal receiving module 6 is connected with the controller 1, the address signal input connector 3 and 1 address signal of controller
Address signal receiving module 7, the 1 address signal output pin of controller and the address signal are connected between input pin
Controlled address signal transmitting module 8 is connected between output connector 4, the DMX+ signal connection end 21 and power module 5 are negative
It is connected between the output end of pole for being grounded the controlled switch module 9 controlled or the DMX- signal connection end 22 and power module
The controlled switch module 9 of ground connection control, the switch control signal of the controlled switch module 9 are connected between 5 cathode output ends
Input terminal is connected with the 1 switch control signal output pin of controller.
A kind of DMX512 decoder as described above, the DMX signal receiving module 6 receive circuit using RS485 chip.
A kind of DMX512 decoder as described above, the address signal receiving module 7 use resistor voltage divider circuit, packet
Resistance R6 and resistance R8 are included, the one end the resistance R8 is connect with the address signal input connector 3, and the resistance R8 is another
End is connected with the one end the resistance R6,1 address signal input pin of the controller, the resistance R6 other end and the electricity
The connection of 5 cathode output end of source module.
A kind of DMX512 decoder as described above, the controlled address signal transmitting module 8 is using metal-oxide-semiconductor switch electricity
Road, when the input of controlled 8 control signal input no signal of address signal transmitting module, controlled address signal transmitting module 8 is
Switch off state comprising have resistance R4, resistance R5, resistance R7, PMOS tube Q2 and NMOS tube Q3, the resistance R4 mono-
End is connected with the one end the resistance R5 and is followed by 5 cathode output end of power module, the resistance R4 other end with it is described
The S of PMOS tube Q2 is extremely connected, and the pole D of the PMOS tube Q2 is connected with the address signal output connector 4, the resistance R5
The other end is connected with the pole D of the pole G of the PMOS tube Q2, NMOS tube Q3, the pole S of the NMOS tube Q3 and the power module
5 cathode output ends are connected, and the pole G of the NMOS tube Q3 is drawn by the resistance R7 and 1 address signal of controller output
Foot is connected.
A kind of DMX512 decoder as described above, the controlled switch module 9 includes resistance R3 and NMOS tube Q1, institute
The pole D for stating NMOS tube Q1 is connected with the DMX- signal connection end 22, the pole S of NMOS tube Q1 and 5 cathode of power module
Output end is connected, and the pole G of NMOS tube Q1 is connected with the one end the resistance R3, and the resistance R3 other end is as the controlled switch
The switch control signal input terminal of module 9 is connected with the switch control signal output pin of the controller 1.
A kind of communication system is also protected in this case, includes DMX512 main controller 200 and several decoder ontologies
100, the DMX512 main controller 200 leads to DMX+ signal wire 201 and DMX- signal wire 202, each decoder ontology outward
100 DMX+ signal connection end 21 is connect with DMX+ signal wire 201, DMX- signal connection end 22 is connect with DMX- signal wire 202,
The address signal in address signal output connector 4 and the latter decoder ontology 100 on current decoder ontology 100 inputs
Connecting pin 3 connects so that being sequentially connected in series between several decoder ontologies 100 along address signal.
Communication system as described above further includes having the total power switch for unifying power supply control for whole system.
Compared with prior art, the utility model has the beneficial effects that：
1, address signal receiving module and controlled address signal hair are connected separately on the controller of this case decoder ontology
Module is sent, a upper decoder ontology is received by address signal input connector, address signal receiving module convenient for controller
The address signal sent, and by controlled address signal transmitting module, address signal output connector to next decoder
Ontology sends address signal, convenient for being sequentially connected in series between the DMX512 decoder of front and back along address signal when specific implementation, in order to
It is sequentially allocated before and after the address of several DMX512 decoders, is conducive to the workload for reducing manual allocation address, there is essence
Property feature and progress；And it is connected between the DMX+ signal connection end and power module cathode output end for being grounded control
The controlled of ground connection control is connected between controlled switch module or the DMX- signal connection end and power module cathode output end
Switch module, in this way, convenient for making the DMX+ signal connection end of each decoder ontology in DMX512 communication system when distributing address
All controlled connection together or each DMX- signal connection end all controlled connections together, with address signal input connector cooperate
It is defeated with address signal in order to which address signal receiving module receives voltage waveform signal transmitted by a upper decoder ontology
Connecting pin cooperation is realized out in order to which controlled address signal transmitting module is to next decoder ontology transmission voltage waveform signal
The time-sharing multiplex of DMX+ signal connection end or DMX- signal connection end, is conducive to solve former and later two by a conducting wire
Code device ontology is together in series along address signal, has substantive features and progress.
2, this case address signal receiving module uses resistor voltage divider circuit, is conducive to the address signal receiving module for institute
State the higher level signal or be converted to containing miscellaneous burr level signal convenient for controller knowledge that address signal input connector receives
Other level signal has substantive features and progress convenient for the address signal communication between the decoder ontology of front and back,
3, the controlled address signal transmitting module of this case uses metal-oxide-semiconductor switching circuit, when the address signal of the controller is defeated
When pin does not issue signal out, controlled address signal transmitting module is switch off state, in order to after completing to distribute address
Make the connection of the separated address signal of front and back decoder ontology with enter normal operating conditions, avoid work normally when front and back
Influence between decoder ontology, has substantive features and progress.
4, this case communication system uses special DMX512 decoder, in this way, can be by front and back two by a conducting wire
A decoder ontology is together in series along address signal, has substantive features and progress, be conducive to several decoder ontologies it
Between be sequentially connected in series along address signal, convenient for when address is distributed realize from front to back automation distribution, in addition, each decoder ontology
It is connected in parallel between DMX+ signal wire and DMX- signal wire respectively, in this way, timely being received convenient for each decoder ontology
DMX512 signal.
Detailed description of the invention
Fig. 1 is the communication system architectures diagram of this case.
Fig. 2 is the decoder circuit configuration diagram of this case.
Specific embodiment
The utility model feature and other correlated characteristics are described in further detail by the following examples, in order to same
The understanding of industry technology personnel：
As shown in Fig. 1 Fig. 2, a kind of DMX512 decoder includes decoder ontology 100, on the decoder ontology 100
Equipped with controller 1, DMX+ signal connection end 21, DMX- signal connection end 22, address signal input connector 3, for it is latter
The address signal output connector 4 and be used for decoder that the address signal input connector 3 of a decoder ontology 100 connects
The power module 5 of power supply is connected with DMX signal and receives mould between the DMX+ signal connection end 21 and DMX- signal connection end 22
Block 6, the DMX signal receiving module 6 are connected with the controller 1, the address signal input connector 3 and the control
Be connected with address signal receiving module 7 between 1 address signal input pin of device, the 1 address signal output pin of controller with
Be connected with controlled address signal transmitting module 8 between the address signal output connector 4, the DMX+ signal connection end 21 with
The controlled switch module 9 for being grounded control or the DMX- signal connection end are connected between 5 cathode output end of power module
The controlled switch module 9 of ground connection control is connected between 22 and 5 cathode output end of power module, the controlled switch module 9
Switch control signal input terminal is connected with the 1 switch control signal output pin of controller.
As described above, be connected separately on the controller 1 of this case decoder ontology 100 address signal receiving module 7 and by
Address signal sending module 8 is controlled, is received convenient for controller 1 by address signal input connector 3, address signal receiving module 7
The address signal that a upper decoder ontology 100 is sent, and exported by controlled address signal transmitting module 8, address signal
Connecting pin 4 sends address signal to next decoder ontology 100, edge between the DMX512 decoder of front and back when convenient for being embodied
Address signal is sequentially connected in series, and in order to be sequentially allocated before and after the address of several DMX512 decoders, is conducive to reduce manual allocation
The workload of address, has substantive features and progress；And the DMX+ signal connection end 21 is exported with 5 cathode of power module
It is connected between end for being grounded the controlled switch module 9 controlled or the DMX- signal connection end 22 and 5 cathode of power module
The controlled switch module 9 of ground connection control is connected between output end, in this way, convenient for when distributing address, making DMX512 communication system
In system all controlled connections of DMX+ signal connection end 21 of each decoder ontology 100 together or each DMX- signal connection end 22 all by
Control links together, and cooperates with address signal input connector 3 in order to which address signal receiving module 7 receives a upper decoding
Voltage waveform signal transmitted by device ontology 100 cooperates with address signal output connector 4 in order to controlled address signal hair
It send module 8 to send voltage waveform signal to next decoder ontology 100, realizes DMX+ signal connection end 21 or DMX- signal
The time-sharing multiplex of connecting pin 22, being conducive to can be by former and later two decoder ontology 100 along address signal string by a conducting wire
Connection gets up, and has substantive features and progress.
As described above, when it is implemented, the DMX signal receiving module 6 receives circuit using RS485 chip.
As described above, when it is implemented, the address signal receiving module 7 uses resistor voltage divider circuit comprising there is electricity
R6 and resistance R8 is hindered, the one end the resistance R8 is connect with the address signal input connector 3, the resistance R8 other end and institute
State the one end resistance R6,1 address signal input pin of the controller is connected, the resistance R6 other end and the power module
The connection of 5 cathode output ends.
As described above, this case address signal receiving module 7 uses resistor voltage divider circuit, is conducive to the address signal and receives
Module 7 is converted to just by the higher level signal that the address signal input connector 3 receives or containing miscellaneous burr level signal
There is substance convenient for the address signal communication between front and back decoder ontology 100 in the level signal that controller 1 identifies
Feature and progress,
As described above, when it is implemented, the controlled address signal transmitting module 8 uses metal-oxide-semiconductor switching circuit, when controlled
When 8 control signal input of address signal sending module is inputted without no signal, controlled address signal transmitting module 8 is that switch disconnects
State comprising have resistance R4, resistance R5, resistance R7, PMOS tube Q2 and a NMOS tube Q3, the one end the resistance R4 with it is described
The one end resistance R5, which is connected, is followed by 5 cathode output end of power module, the S of the resistance R4 other end and the PMOS tube Q2
Extremely it is connected, the pole D of the PMOS tube Q2 is connected with the address signal output connector 4, the resistance R5 other end and institute
The pole D of the pole G, NMOS tube Q3 of stating PMOS tube Q2 is connected, and the pole S of the NMOS tube Q3 and 5 cathode of power module export
End is connected, and the pole G of the NMOS tube Q3 is connected by the resistance R7 with the 1 address signal output pin of controller.
As described above, the controlled address signal transmitting module 8 of this case uses metal-oxide-semiconductor switching circuit, when the ground of the controller 1
When location signal output pin does not issue signal, controlled address signal transmitting module 8 is switch off state, in order to complete to divide
Connection with the separated address signal for making front and back decoder ontology 100 behind address is avoided just with entering normal operating conditions
Often influence when work between front and back decoder ontology 100, has substantive features and progress.
As described above, when it is implemented, the controlled switch module 9 includes resistance R3 and NMOS tube Q1, the NMOS
The pole D of pipe Q1 is connected with the DMX- signal connection end 22, the pole S of NMOS tube Q1 and 5 cathode output end of power module
It is connected, the pole G of NMOS tube Q1 is connected with the one end the resistance R3, and the resistance R3 other end is as the controlled switch module 9
Switch control signal input terminal be connected with the switch control signal output pin of the controller 1.
It include DMX512 main controller 200 and several described as shown in Figure 1, this case also discloses a kind of communication system
Decoder ontology 100, the DMX512 main controller 200 lead to DMX+ signal wire 201 and DMX- signal wire 202 outward, each
The DMX+ signal connection end 21 of decoder ontology 100 connect with DMX+ signal wire 201, DMX- signal connection end 22 and DMX- signal
Line 202 connects, the ground in address signal output connector 4 and the latter decoder ontology 100 on current decoder ontology 100
Location signal input connector 3 connects so that being sequentially connected in series between several decoder ontologies 100 along address signal.
As described above, this case communication system uses special DMX512 decoder, in this way, can be incited somebody to action by a conducting wire
Former and later two decoder ontologies 100 are together in series along address signal, have substantive features and progress, and are conducive to several decodings
It is sequentially connected in series between device ontology 100 along address signal, convenient for realizing automation distribution from front to back when address is distributed, in addition,
Each decoder ontology 100 is connected in parallel on respectively between DMX+ signal wire 201 and DMX- signal wire 202, in this way, being convenient for each decoder
Ontology 100 timely receives DMX512 signal.
As described above, when it is implemented, this case communication system further includes having to unify the total of power supply control for whole system
Power switch, in this way, convenient for carrying out unified power supply control when specific implementation.
Address allocation procedure when being the specific implementation of this communication system below：This system is connected, then opens power supply, respectively
The controller 1 of a decoder ontology 100 carries out the timing of preset duration, and controls the controlled switch module 9 and connect and lead to
Controlled address signal transmitting module 8 is crossed to be sent out default test signal and receive signal by address signal receiving module 7；Respectively
The controller 1 of a decoder ontology 100 detects whether its address signal receiving module 7 receives default test in preset duration
Signal, if be not received by default test signal, which labeled as number one address and passes through controlled address for oneself
Signal transmitting module 8 is sent out lower No.1 address signal, then control address signal sending module 8 be not sent out signal and
It controls controlled switch module 9 to disconnect, if receiving default test signal, which enters the received waiting of address signal
State；When the controller 1 of some decoder ontology 100 receives the address signal of certain No.1 by address signal receiving module 7,
Oneself labeled as this number address and is then sent out lower No.1 address signal by controlled address signal transmitting module 8, so
Control address signal sending module 8 is not sent out signal afterwards and control controlled switch module 9 disconnects.
As described above, this case protection is a kind of DMX512 decoder and the communication system using the decoder, all with
The same or similar technical solution of this case should all be shown as falling into the protection scope of this case.
Claims (7)
1. a kind of DMX512 decoder, it is characterised in that include decoder ontology (100), on the decoder ontology (100)
Equipped with controller (1), DMX+ signal connection end (21), DMX- signal connection end (22), address signal input connector (3), use
The address signal output connector (4) that connect in the address signal input connector (3) with the latter decoder ontology (100),
And the power module (5) for decoder power supply, the DMX+ signal connection end (21) and DMX- signal connection end (22) it
Between be connected with DMX signal receiving module (6), the DMX signal receiving module (6) is connected with the controller (1), describedly
Address signal receiving module is connected between location signal input connector (3) and the controller (1) address signal input pin
(7), it is connected with controllably between controller (1) the address signal output pin and the address signal output connector (4)
Location signal transmitting module (8) is connected between the DMX+ signal connection end (21) and power module (5) cathode output end and is used for
It is grounded between the controlled switch module (9) or the DMX- signal connection end (22) and power module (5) cathode output end of control
Be connected with ground connection control controlled switch module (9), the switch control signal input terminal of the controlled switch module (9) with it is described
Controller (1) switch control signal output pin is connected.
2. a kind of DMX512 decoder according to claim 1, it is characterised in that the DMX signal receiving module (6) is adopted
Circuit is received with RS485 chip.
3. a kind of DMX512 decoder according to claim 1, it is characterised in that the address signal receiving module (7) is adopted
With resistor voltage divider circuit comprising have resistance R6 and resistance R8, the one end the resistance R8 and the address signal input connector
(3) it connecting, the resistance R8 other end is connected with the one end the resistance R6, the controller (1) address signal input pin,
The resistance R6 other end is connect with the power module (5) cathode output end.
4. a kind of DMX512 decoder according to claim 1, it is characterised in that the controlled address signal transmitting module
(8) metal-oxide-semiconductor switching circuit is used, it is controlled when the input of controlled address signal transmitting module (8) control signal input no signal
Address signal sending module (8) be switch off state comprising have resistance R4, resistance R5, resistance R7, PMOS tube Q2 and
NMOS tube Q3, the one end the resistance R4 is connected with the one end the resistance R5 is followed by the power module (5) cathode output end, institute
It states the resistance R4 other end to be extremely connected with the S of the PMOS tube Q2, the pole D of the PMOS tube Q2 and address signal output connect
End (4) is connected, and the resistance R5 other end is connected with the pole D of the pole G of the PMOS tube Q2, NMOS tube Q3, the NMOS
The pole S of pipe Q3 is connected with the power module (5) cathode output end, the pole G of the NMOS tube Q3 by the resistance R7 with
Controller (1) the address signal output pin is connected.
5. a kind of DMX512 decoder according to claim 1, it is characterised in that the controlled switch module (9) includes
Resistance R3 and NMOS tube Q1, the pole D of the NMOS tube Q1 are connected with the DMX- signal connection end (22), the S of NMOS tube Q1
Pole is connected with the power module (5) cathode output end, and the pole G of NMOS tube Q1 is connected with the one end the resistance R3, resistance
The R3 other end is as the switch control signal input terminal of the controlled switch module (9) and the switch control of the controller (1)
Signal output pin is connected.
6. a kind of communication system using decoder described in claim 1-5 any one, feature are including DMX512 master
Device (200) and several decoder ontologies (100) are controlled, the DMX512 main controller (200) leads to DMX+ signal outward
Line (201) and DMX- signal wire (202), the DMX+ signal connection end (21) and DMX+ signal wire of each decoder ontology (100)
(201) connection, DMX- signal connection end (22) are connect with DMX- signal wire (202), the address on current decoder ontology (100)
Signal output connector (4) is connect so that should with the address signal input connector (3) on the latter decoder ontology (100)
It is sequentially connected in series between several decoder ontologies (100) along address signal.
7. communication system according to claim 6, it is characterised in that further include having to unify power supply control for whole system
Total power switch.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820639539.5U CN208113030U (en) | 2018-04-28 | 2018-04-28 | A kind of DMX512 decoder and the communication system using the decoder |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820639539.5U CN208113030U (en) | 2018-04-28 | 2018-04-28 | A kind of DMX512 decoder and the communication system using the decoder |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN208113030U true CN208113030U (en) | 2018-11-16 |
Family
ID=64115066
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201820639539.5U Active CN208113030U (en) | 2018-04-28 | 2018-04-28 | A kind of DMX512 decoder and the communication system using the decoder |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN208113030U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108513405A (en) * | 2018-04-28 | 2018-09-07 | 周社吉 | A kind of DMX512 decoders and communication system and address distribution method |
-
2018
- 2018-04-28 CN CN201820639539.5U patent/CN208113030U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108513405A (en) * | 2018-04-28 | 2018-09-07 | 周社吉 | A kind of DMX512 decoders and communication system and address distribution method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105375552B (en) | A kind of power matching method of matrix form power distribution charging system | |
| CN107015507B (en) | Comprehensive expansion system of central controller | |
| CN107069953A (en) | A kind of monitoring system based on power bus information | |
| CN108462621B (en) | Method for communication equipment address allocation and equipment quantity statistics | |
| CN208113030U (en) | A kind of DMX512 decoder and the communication system using the decoder | |
| CN101324989A (en) | Automatic recognition technique of electrical energy meter in centralized meter reading system | |
| CN205334716U (en) | Wireless disjunctor flush mounting plate of switch | |
| CN107529263B (en) | A kind of lamps and lanterns address configuration method and device based on lamp control system | |
| CN104456861A (en) | Computer room air conditioner duty in-turn system and control method | |
| CN108513405A (en) | A kind of DMX512 decoders and communication system and address distribution method | |
| CN106569062A (en) | Satellite ground power supply and distribution test equipment generalization design method | |
| CN201178508Y (en) | Lamp control system | |
| CN204697177U (en) | A kind of automatic switching control circuit of multi-channel video monitor | |
| CN204992572U (en) | Modularization dc power distribution unit | |
| CN208581244U (en) | Gateway and the wisdom road lamp system for using the gateway | |
| CN208182396U (en) | A kind of third party's elevator control system | |
| CN213818248U (en) | Street lamp equipment based on power line carrier | |
| CN107072003B (en) | The real-time self-checking feedback system of efficient lamp control | |
| CN209118106U (en) | Driving pulse control circuit and control system | |
| CN202009518U (en) | Stage control system for DMX512 intelligent distribution isolation amplifier | |
| CN201796277U (en) | Sewage treatment control system | |
| CN102176147A (en) | Stage control system and method for digital multiplex (DMX) 512 intelligent distribution isolating amplifier | |
| CN207473385U (en) | It is a kind of to be used for two into one devices for going out analog quantity signal data acquisition | |
| CN205123768U (en) | DMX1000 standard digital interface communication control system | |
| CN204887000U (en) | Communication principal and subordinate station owner board based on cortex -M3 treater |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |