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CN206442299U - The integrated circuit and its DC-DC converting circuit of DC-DC controller - Google Patents

The integrated circuit and its DC-DC converting circuit of DC-DC controller Download PDF

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Publication number
CN206442299U
CN206442299U CN201621348122.0U CN201621348122U CN206442299U CN 206442299 U CN206442299 U CN 206442299U CN 201621348122 U CN201621348122 U CN 201621348122U CN 206442299 U CN206442299 U CN 206442299U
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China
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current
circuit
connects
reference voltage
current source
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CN201621348122.0U
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Inventor
张志廉
陈柏求
洪沛霝
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UPI Semiconductor Corp
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UPI Semiconductor Corp
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Priority to CN201621348122.0U priority Critical patent/CN206442299U/en
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Abstract

The utility model is related to the integrated circuit and its DC-DC converting circuit of a kind of DC-DC controller.The integrated circuit connection output stage, current sense network and decline resistance, and including current sensing circuit, the first current source, the second current source, the first reference voltage pin, the second reference voltage pin, feedback pin, error amplifier, time generation unit and correcting circuit.Current sensing circuit connects current sense network.First current source and the second current source mirror image are in sensing electric current.First reference voltage pin connects the first current source with declining one end of resistance.Second reference voltage pin connects the second current source with declining the other end of resistance.Error amplifier connects the second reference voltage pin and feedback pin.Time generation unit connects error amplifier and output stage.Correcting circuit connects the first reference voltage pin and the second reference voltage pin.The utility model can reduce or eliminate influence of the offset voltage for declining circuit to output voltage.

Description

The integrated circuit and its DC-DC converting circuit of DC-DC controller
Technical field
The utility model is related to a kind of DC-DC controller, and a kind of more particularly to collection of DC-DC controller Into circuit and its DC-DC converting circuit.
Background technology
In general, the power module of central processing unit (CPU) includes the drop of leggy (Multi-phase) on motherboard Pressure converter (buck converter).In order to which output voltage (core voltage for being supplied to central processing unit) can be in load The fast quick-recovery of energy is stable after change or electric voltage identification code (voltage identification definition, VID) change, The built-in decline circuit (droop circuit) of controller in buck converter is understood, to provide drop-out voltage (droop Voltage) into the feedback circuit of buck converter.Decline circuit and include current sensing circuit, it utilizes operational amplifier sense Output current is surveyed to obtain sensing electric current, so as to providing drop-out voltage.But the offset voltage in operational amplifier can cause to decline Voltage produces error, and then influences the control of output voltage and produce error.Prior art is by adjusting the increasing of operational amplifier Benefit, can drop to the offset voltage of operational amplifier 1 millivolt (mV) below.But remaining offset voltage is in the operation of controller Cheng Zhonghui is exaggerated, and drop-out voltage is produced error.Therefore, how to reduce or eliminate and decline the skew electricity that circuit is produced Pressure, for an important topic of the power module for designing central processing unit.
Utility model content
The utility model provides a kind of integrated circuit and its DC-DC converting circuit of DC-DC controller, can Reduction eliminates influence of the offset voltage for declining circuit to output voltage.
A kind of integrated circuit of DC-DC controller of the present utility model, connection output stage, current sense network with Decline resistance, and including current sensing circuit, the first current source, the second current source, the first reference voltage pin, the second reference Voltage pin, feedback pin, error amplifier, time generation unit and correcting circuit.Current sensing circuit connects current sense Network, to provide sensing electric current.First current source and the second current source mirror image are in sensing electric current.First reference voltage pin is connected First current source and the one end for declining resistance.Second reference voltage pin connects the second current source with declining the other end of resistance. Error amplifier connects the second reference voltage pin and feedback pin, and provides error signal.Time generation unit connects error Amplifier and output stage, and time signal is provided to output stage according to error signal.Correcting circuit connects the first reference voltage and connect Pin and the second reference voltage pin, are present in the ohmically bias of decline so that bias is less than preset value to reduce.
In an embodiment of the present utility model, the correcting circuit provides a correcting current to second reference voltage Pin.
In an embodiment of the present utility model, the correcting circuit includes:One comparator, its first input end connection institute State the first reference voltage pin, its second input and connect the second reference voltage pin, its output end and provide one and compare knot Really;One logic circuit, connects the output end of the comparator, and power supply adjustment signal is provided according to the comparative result;And One adjustable current source, connects the second reference voltage pin and the logic circuit, receives the power supply adjustment signal to carry For a correcting current to the second reference voltage pin.
In an embodiment of the present utility model, the correcting circuit also includes a clock pulse generator, connects the logic Circuit, and a clock signal is provided to the logic circuit.
In an embodiment of the present utility model, the adjustable current comes from an initialization phase of the control integrated circuit Between be adjusted, and during the initialization after there is provided the fixed correcting current.
In an embodiment of the present utility model, the current sensing circuit includes:One operational amplifier, its input connects Connect the current sense network;And a reference current source, it is connected to the output end of the operational amplifier and the electric current sense Between survey grid network, to provide the sensing electric current.
In an embodiment of the present utility model, the correcting circuit flows through the decline electricity by successive approximation method zero One drop-out current of resistance.
A kind of DC-DC converting circuit of the present utility model, including output stage, current sense network, decline resistance, Current sensing circuit, the first current source, the second current source, generating circuit from reference voltage, error amplifier, time generation unit and Correcting circuit.The current sense network connection output stage.Current sensing circuit connects current sense network, to provide sensing electricity Stream.First current source and the second current source mirror image are in sensing electric current.Generating circuit from reference voltage connects the first current source with declining One end of resistance.Error amplifier has first end, the second end and an output end, first end connection output stage, the second end connection the Two current sources and the other end for declining resistance, output end provide error signal.Time generation unit connects error amplifier and defeated Go out level, and time signal is provided to output stage according to error signal.Correcting circuit connection generating circuit from reference voltage is put with error Second end of big device, is present in the ohmically bias of decline so that bias is less than preset value to reduce.
In an embodiment of the present utility model, the correcting circuit provides a correcting current and declines the another of resistance to described One end.
In an embodiment of the present utility model, the correcting circuit includes:One comparator, its first input end connection institute The one end for declining resistance, its second input connection other end for declining resistance, its output end one comparative result of offer are provided; One logic circuit, connects the output end of the comparator, and power supply adjustment signal is provided according to the comparative result;And one can Current source is adjusted, the other end and the logic circuit for declining resistance is connected, receives the power supply adjustment signal to provide one Correcting current to it is described decline resistance the other end.
In an embodiment of the present utility model, the correcting circuit also includes a clock pulse generator, connects the logic Circuit, and a clock signal is provided to the logic circuit.
In an embodiment of the present utility model, the adjustable current comes from the initial of the DC-DC converting circuit Be adjusted during change, and during the initialization after there is provided the fixed correcting current.
In an embodiment of the present utility model, the current sensing circuit includes:One operational amplifier, its input connects Connect the current sense network;And a reference current source, it is connected to the output end of the operational amplifier and the electric current sense Between survey grid network, to provide the sensing electric current.
In an embodiment of the present utility model, the correcting circuit flows through the decline electricity by successive approximation method zero The drop-out current of resistance.
Based on above-mentioned, the DC-DC converting circuit of embodiment of the present utility model, correcting circuit is connected to decline electricity The two ends of resistance, decline resistance is flowed through to detect the ohmically bias of decline, and progressively be turned down according to the bias for declining resistance Drop-out current.Whereby, it may be such that the ohmically bias of decline is less than preset value, to reduce or eliminate the skew electricity for declining circuit Pressure.
For features described above of the present utility model and advantage can be become apparent, special embodiment below, and coordinate accompanying drawing It is described in detail below.
Brief description of the drawings
Fig. 1 is the system schematic of the DC-DC converting circuit according to an embodiment of the present utility model;
Fig. 2 is the system schematic of the DC-DC converting circuit according to another embodiment of the present utility model;
Fig. 3 is the waveform diagram of the DC-DC converting circuit according to an embodiment of the present utility model.
Description of reference numerals:
10、20:DC-DC converting circuit;
11、21:Output stage;
13、23:Current sense network;
15:Voltage feedback network;
100、200:The integrated circuit of DC-DC controller;
105、205:Decline circuit
110:Current sensing circuit;
120:Generating circuit from reference voltage;
130:Correcting circuit;
140:Time generation unit;
231:Logic circuit;
233:Clock pulse generator;
C1、Cout:Electric capacity;
CLK:Clock signal;
CMP1:Comparator;
CS1:First current source;
CS2:Second current source;
CSN:Second current detecting pin;
CSP:First current detecting pin;
CSR1、CSR2:Current source;
CSRB:Adjustable current source;
CSX:Reference current source;
DAC:First reference voltage pin;
DAP1:Error amplifier;
EAP:Second reference voltage pin;
EN:Enable signal;
FB:Feedback pin;
Icab:Correcting current;
Ics:Sense electric current;
Idrp:Drop-out current;
L1:Inductance;
M1、M2:Transistor;
OPA:Operational amplifier;
Pint:During initialization;
PWM1:Output control pin;
R1、Rcsn:Resistance;
RCP:Comparative result;
Rdrp:Decline resistance;
SC1、SC2:Current modifying signal;
SCR:Power supply adjusts signal;
SDF:Error signal;
SS1、SS2:Switching signal;
ST、ST1、ST2:Time signal;
SWR1、SWR2:Switch;
VBF1:Voltage buffer;
VDD:System high voltage;
Vdrp:Bias;
Vfb:Back voltage;
Vin:Input voltage;
Vout:Output voltage;
Vph:Phase voltage;
VSE1、VSE2:Sense voltage.
Embodiment
Fig. 1 is the system schematic of the DC-DC converting circuit according to an embodiment of the present utility model.It refer to Fig. 1, in the present embodiment, DC-DC converting circuit 10 include output stage 11, current sense network 13, voltage feedback network 15th, the integrated circuit 100 of DC-DC controller and decline resistance Rdrp.Integrated circuit 100 includes time generation unit 140th, error amplifier DAP1 and decline circuit 105, and be configured with output control pin PWM1, the first current detecting pin CSP, the second current detecting pin CSN, the first reference voltage pin DAC, the second reference voltage pin EAP and feedback pin FB. Declining circuit 105 includes current sensing circuit 110, generating circuit from reference voltage 120, correcting circuit 130, the first current source CS1 And the second current source CS2.
Current sensing circuit 110 sends a telegraph stream by the first current detecting pin CSP and the second current detecting pin CSN connections Sensor network 13, and there is current sensing circuit 110 reference current source CSX to sense electric current Ics to provide.Furthermore, it is understood that Current sensing circuit 110 can receive current sense network by the first current detecting pin CSP and the second current detecting pin CSN 13 sensing the voltage VSE1 and VSE2 provided, with according to sensing voltage VSE1 and VSE2 setting sensing electric current Ics.First current source CS1 and the second current source CS2 mirror images are in sensing electric current Ics.
First reference voltage pin DAC the first current sources of connection CS1, the one end for declining resistance Rdrp and reference voltage are produced Circuit 120, namely generating circuit from reference voltage 120 connect the first current source CS1 with declining resistance Rdrp one end.First reference Voltage pin DAC receives the reference voltage VR that generating circuit from reference voltage 120 is provided.Second reference voltage pin EAP connections Second current source CS2 and the other end for declining resistance Rdrp.First current source CS1 is connected to the ginsengs of system high voltage VDD and first Examine between voltage pin DAC.Second current source CS2 is connected between the second reference voltage pin EAP and ground voltage.
Correcting circuit 130 connects the first reference voltage pin DAC and the second reference voltage pin EAP, is flowed through down with being zeroed Resistance Rdrp drop-out current Idrp drops, reduction whereby is present in the bias Vdrp declined on resistance Rdrp so that bias Vdrp Less than preset value, above-mentioned preset value is, for example, 1 millivolt (mV), and the action of above-mentioned zero can drop drop-out current Idrp As little as feasible value.Error amplifier DAP1 negative input end (correspondence first end) connects feedback pin FB to receive back voltage Vfb, error amplifier DAP1 second reference voltage pin EAP of positive input terminal (correspondence the second end) connection (namely connections second Current source CS2 and the other end for declining resistance Rdrp), error amplifier DAP1 output end Connection Time generation unit 140 with Error signal SDF is provided to time generation unit 140.
Time generation unit 140 receives error signal SDF by output control pin PWM1 connections output stage 11, with Time signal ST is provided to output stage 11 according to error signal SDF.Output stage 11 even sockets current sense network 13, and receives Time signal ST and input voltage vin, to provide phase voltage Vph according to time signal ST and input voltage vin.Current sense The receiving phase voltage Vph of network 13, and provide output voltage Vout according to phase voltage Vph.Voltage feedback network 15 is connected Feedback pin FB, and output voltage Vout is received, to provide back voltage Vfb according to output voltage Vout.
In the present embodiment, correcting circuit 130 can provide correcting current Icab to the second reference voltage pin EAP, namely Decline the resistance Rdrp other end, to reduce the bias Vdrp on resistance Rdrp.Correcting circuit 130 can pass through successive approximation method Zero flows through the drop-out current Idrp for declining resistance Rdrp.Furthermore, it is understood that before drop-out current Idrp is not zeroed, namely bias Vdrp is not below before preset value, and the numerical value for the correcting current Icab that correcting circuit 130 is provided can be reduced with the time, and school The positive current Icab sense of current becomes according to bias Vdrp.In other words, when bias Vdrp be on the occasion of (also be positive voltage) and When numerical value is more than or equal to preset value, the correcting current Icab sense of current is from the second reference voltage pin EAP flow direction correction electricity Road 130;When bias Vdrp is negative value (being also negative voltage) and numerical value is more than or equal to preset value, correcting current Icab electric current Direction is to flow to the second reference voltage pin EAP from correcting circuit 130.When the numerical value for biasing Vdrp is less than preset value, no matter It is positive or negative to bias Vdrp, and correcting current Icab size of current and the sense of current is constant with regard to this holding.
Fig. 2 is the system schematic of the DC-DC converting circuit according to another embodiment of the present utility model.It please join According to Fig. 1 and Fig. 2, DC-DC converting circuit 20 is approximately identical to DC-DC converting circuit 10, and its main difference is The current sensing circuit 210 of the integrated circuit 200 of output stage 21, current sense network 23 and DC-DC controller and correction Circuit 230, same or analogous element then uses same or similar label.
In the present embodiment, output stage 21 include transistor M1 and M2, and time signal ST include time signal ST1 and ST2, namely output control pin PWM1 can essentially be two pins.Transistor M1 source electrode receives input voltage vin, brilliant Body pipe M1 grid receives time signal ST1, and transistor M1 drain electrode provides phase voltage Vph.Transistor M2 source electrode connection Transistor M1 drain electrode, transistor M2 grid receives time signal ST2, and transistor M2 drain electrode receives ground voltage.
Current sense network 23 includes inductance L1, resistance R1 and electric capacity C1.Inductance L1 one end receiving phase voltage Vph, The inductance L1 other end provides output voltage Vout.Resistance R1 and electric capacity C1 are connected in series in inductance L1 two ends, and electric capacity C1 two ends provide sensing voltage VSE1 and VSE2 respectively.
Current sensing circuit 210 includes operational amplifier OPA and reference current source CSX.Operational amplifier OPA positive input End senses voltage VSE1 by the first current detecting pin CSP connection current senses network 23 to receive, operational amplifier OPA's Negative input end senses voltage VSE2 by the second current detecting pin CSN connection current senses network 23 to receive.Reference current Source CSX is connected between operational amplifier OPA output end and current sense network 23, to provide sensing electric current Ics.
Correcting circuit 230 includes comparator CMP1, logic circuit 231, clock pulse generator 233 and adjustable current source CSRB. Comparator CMP1 positive input terminal (namely first input end) connects the first reference voltage pin DAC, and (namely connection declines resistance Rdrp one end), comparator CMP1 negative input end (namely second input) connect the second reference voltage pin EAP (namely Connection declines the resistance Rdrp other end), comparator CMP1 output end connects logic circuit 231 to provide comparative result RCP To logic circuit 231.Clock pulse generator 233 connects logic circuit 231, and provides clock signal CLK to logic circuit 231.
The connection comparator of logic circuit 231 CMP1 output end, clock pulse generator 233 and adjustable current source CSRB, with root Power supply adjustment signal SCR is provided according to comparative result RCP and clock signal CLK.Adjustable current source CSRB the second reference voltages of connection Pin EAP (namely connection declines the resistance Rdrp other end) and logic circuit 231, to receive power supply adjustment signal SCR, and Offer correcting current Icab to the second reference voltage pin EAP (namely the another of correcting current Icab to decline resistance Rdrp is provided One end).
Adjustable current source CSRB includes current source CSR1, CSR2 and switch SWR1, SWR2, and power supply adjustment signal SCR includes Current modifying signal SC1, SC2 and switching signal SS1, SS2.Current source CSR1 and switch SWR1 are connected in series in system high voltage Between VDD and the second reference voltage pin EAP, and current source CSR1 is controlled by current modifying signal SC1, and switch SWR1 is controlled In switching signal SS1.Current source CSR2 and switch SWR2 be connected in series in the second reference voltage pin EAP and ground voltage it Between, and current source CSR2 is controlled by current modifying signal SC2, and switch SWR2 is controlled by switching signal SS2.
In addition, DC-DC converting circuit 20 also includes electric capacity Cout, resistance Rcsn, voltage buffer VBF1.Electric capacity Cout is connected between output voltage Vout and ground voltage.Resistance Rcsn is connected to output voltage Vout and the second current detecting Between pin CSN.Voltage buffer VBF1 is connected between the reference voltage pin DAC of generating circuit from reference voltage 120 and first.
Fig. 3 is the waveform diagram of the DC-DC converting circuit according to an embodiment of the present utility model.It refer to Fig. 2 and Fig. 3, in the present embodiment, clock signal CLK are shown as two waveforms to illustrate, rather than two clock signals.When When the integrated circuit 200 of DC-DC controller starts, enable signal EN can be high voltage level, enter when declining circuit 205 When entering correction program, operational amplifier OPA offset voltage influences and generation bias Vdrp (is also on resistance Rdrp is declined Positive voltage).In Pint during initializing, correcting circuit 230 can bias Vdrp by correcting current Icab zeros, namely adjustable Current source CSRB can adjust correcting current Icab size of current and the sense of current during initializing.The Pint during initializing Afterwards, bias Vdrp has completed zero, namely correcting current Icab without adjusting again, therefore adjustable current source CSRB can provide fixation Correcting current Icab.
Furthermore, it is understood that when logic circuit 231 receives the pulse (being denoted as 1) of first clock signal, due to bias Vdrp is to be more than or equal to preset value on the occasion of (also be positive voltage) and numerical value, therefore the correcting current Icab sense of current is from the Two reference voltage pin EAP flow to correcting circuit 130, and correcting current Icab is set as into maximum, so that bias Vdrp becomes For negative value (namely negative voltage).When logic circuit 231 receives the pulse (being denoted as 2) of second clock signal, due to bias Vdrp is negative value (also be negative voltage) and numerical value still greater than equal to preset value, thus correcting current Icab the sense of current be from Correcting circuit 130 flows to the second reference voltage pin EAP, and correcting current Icab is set as into most Second Largest Value, so that bias Vdrp is changed on the occasion of (namely positive voltage) again.
When logic circuit 231 receives the pulse (being denoted as 3) of the 3rd clock signal, due to bias Vdrp be on the occasion of (also be positive voltage) and numerical value are still greater than equal to preset value, therefore the correcting current Icab sense of current is with reference to electricity from second Crimping pin EAP flows to correcting circuit 130, and correcting current Icab is set as into the third-largest value, so that bias Vdrp is changed into negative again It is worth (namely negative voltage), the respective action of its after pulse (as shown in 4-7) can refer to above-mentioned, then be repeated no more at this.
When logic circuit 231 receives the pulse (being denoted as 8) of the 8th clock signal, Vdrp numerical value is biased at this moment Start to be less than preset value, namely bias Vdrp has completed zero, no matter therefore bias Vdrp to be positive or negative, correcting current Icab's Size of current and the sense of current are constant with regard to this holding.
In the present embodiment, enable signal EN is that the integrated circuit 200 for representing DC-DC controller starts, with bias Vdrp zero is unrelated, therefore in embodiment of the present utility model, enable signal EN can be neglected.
In summary, the DC-DC converting circuit of embodiment of the present utility model, correcting circuit is connected to decline electricity The two ends of resistance, decline resistance is flowed through to detect the ohmically bias of decline, and progressively be turned down according to the bias for declining resistance Drop-out current.Whereby, it may be such that the ohmically bias of decline is less than preset value, to reduce or eliminate the skew electricity of operational amplifier Press the influence to output voltage.
Various embodiments above is only to illustrate the technical solution of the utility model, rather than its limitations;Although with reference to foregoing The utility model is described in detail each embodiment, it will be understood by those within the art that:It still can be with Technical scheme described in foregoing embodiments is modified, or which part or all technical characteristic are equally replaced Change;And these modifications or replacement, the essence of appropriate technical solution is departed from each embodiment technical scheme of the utility model Scope.

Claims (14)

1. a kind of integrated circuit of DC-DC controller, one output stage of connection, a current sense network and one decline resistance, Characterized in that, the integrated circuit includes:
One current sensing circuit, connects the current sense network, to provide a sensing electric current;
One first current source and one second current source, mirror image is in the sensing electric current;
One first reference voltage pin, connects one end of first current source and the decline resistance;
One second reference voltage pin, connects the other end of second current source and the decline resistance;
One feedback pin;
One error amplifier, connects the second reference voltage pin and the feedback pin, and provide an error signal;
One time generation unit, connects the error amplifier and the output stage, and provide for the moment according to the error signal Between signal to the output stage;And
One correcting circuit, connects the first reference voltage pin and the second reference voltage pin, is present in institute to reduce State the ohmically bias of decline so that the bias is less than preset value.
2. the integrated circuit of DC-DC controller according to claim 1, it is characterised in that the correcting circuit is carried For a correcting current to the second reference voltage pin.
3. the integrated circuit of DC-DC controller according to claim 1, it is characterised in that the correcting circuit bag Include:
One comparator, its first input end connects the first reference voltage pin, its second input connection second ginseng Examine voltage pin, its output end and one comparative result is provided;
One logic circuit, connects the output end of the comparator, and power supply adjustment signal is provided according to the comparative result;And
One adjustable current source, connects the second reference voltage pin and the logic circuit, receives the power supply adjustment signal To provide a correcting current to the second reference voltage pin.
4. the integrated circuit of DC-DC controller according to claim 3, it is characterised in that the correcting circuit is also Including a clock pulse generator, the logic circuit is connected, and provide a clock signal to the logic circuit.
5. the integrated circuit of DC-DC controller according to claim 3, it is characterised in that the adjustable current source In the DC-DC controller integrated circuit one initialization during be adjusted, and during the initialization after, The fixed correcting current is provided.
6. the integrated circuit of DC-DC controller according to claim 1, it is characterised in that the current sense electricity Road includes:
One operational amplifier, its input connects the current sense network;And
One reference current source, is connected between the output end of the operational amplifier and the current sense network, to provide State sensing electric current.
7. the integrated circuit of DC-DC controller according to claim 1, it is characterised in that the correcting circuit leads to Cross the drop-out current that successive approximation method zero flows through the decline resistance.
8. a kind of DC-DC converting circuit, it is characterised in that including:
One output stage;
One current sense network, connects the output stage;
One declines resistance;
One current sensing circuit, connects the current sense network, to provide a sensing electric current;
One first current source and one second current source, mirror image is in the sensing electric current;
One generating circuit from reference voltage, connects one end of first current source and the decline resistance;
One error amplifier, with a first end, one second end and an output end, the first end connects the output stage, institute The other end that the second end connects second current source and the decline resistance is stated, the output end provides an error signal;
One time generation unit, connects the error amplifier and the output stage, and the time is provided according to the error signal Signal is to the output stage;And
One correcting circuit, connects second end of the generating circuit from reference voltage and the error amplifier, is deposited with reducing It is the ohmically bias of decline so that the bias is less than preset value.
9. DC-DC converting circuit according to claim 8, it is characterised in that the correcting circuit provides one and corrected Electric current to it is described decline resistance the other end.
10. DC-DC converting circuit according to claim 8, it is characterised in that the correcting circuit includes:
One comparator, the described one end for declining resistance of its first input end connection, its second input connect the decline resistance The other end, its output end provide a comparative result;
One logic circuit, connects the output end of the comparator, and power supply adjustment signal is provided according to the comparative result;And
One adjustable current source, connects the other end and the logic circuit for declining resistance, receives the power supply adjustment signal To provide a correcting current to the other end of the decline resistance.
11. DC-DC converting circuit according to claim 10, it is characterised in that the correcting circuit also includes one Clock pulse generator, connects the logic circuit, and provide a clock signal to the logic circuit.
12. DC-DC converting circuit according to claim 10, it is characterised in that the adjustable current comes from described Be adjusted during the initialization of DC-DC converting circuit, and during the initialization after there is provided the fixed school Positive current.
13. DC-DC converting circuit according to claim 8, it is characterised in that the current sensing circuit includes:
One operational amplifier, its input connects the current sense network;And
One reference current source, is connected between the output end of the operational amplifier and the current sense network, to provide State sensing electric current.
14. DC-DC converting circuit according to claim 8, it is characterised in that the correcting circuit passes through gradually Approximatioss zero flows through the drop-out current of the decline resistance.
CN201621348122.0U 2016-12-09 2016-12-09 The integrated circuit and its DC-DC converting circuit of DC-DC controller Active CN206442299U (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110138208A (en) * 2018-02-02 2019-08-16 力智电子股份有限公司 DC-DC switching controller
CN110149047A (en) * 2018-02-12 2019-08-20 力智电子股份有限公司 DC-DC switching controller
CN110299834A (en) * 2018-03-23 2019-10-01 力智电子股份有限公司 Current mirror correcting circuit and current mirror bearing calibration

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110138208A (en) * 2018-02-02 2019-08-16 力智电子股份有限公司 DC-DC switching controller
CN110138208B (en) * 2018-02-02 2022-03-08 力智电子股份有限公司 DC-DC conversion controller
TWI798200B (en) * 2018-02-02 2023-04-11 力智電子股份有限公司 Dc-dc converting controller
CN110149047A (en) * 2018-02-12 2019-08-20 力智电子股份有限公司 DC-DC switching controller
CN110149047B (en) * 2018-02-12 2022-03-08 力智电子股份有限公司 DC-DC conversion controller
TWI782951B (en) * 2018-02-12 2022-11-11 力智電子股份有限公司 Dc-dc converting controller
CN110299834A (en) * 2018-03-23 2019-10-01 力智电子股份有限公司 Current mirror correcting circuit and current mirror bearing calibration
US10574141B2 (en) 2018-03-23 2020-02-25 Upi Semiconductor Corp Current mirror calibration circuit and current mirror calibration method

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