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CN206040624U - Image sensor chip package structure - Google Patents

Image sensor chip package structure Download PDF

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Publication number
CN206040624U
CN206040624U CN201621077065.7U CN201621077065U CN206040624U CN 206040624 U CN206040624 U CN 206040624U CN 201621077065 U CN201621077065 U CN 201621077065U CN 206040624 U CN206040624 U CN 206040624U
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CN
China
Prior art keywords
sensing chip
image sensing
face
light absorbing
transparent substrates
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Active
Application number
CN201621077065.7U
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Chinese (zh)
Inventor
王之奇
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China Wafer Level CSP Co Ltd
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China Wafer Level CSP Co Ltd
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Priority to CN201621077065.7U priority Critical patent/CN206040624U/en
Application granted granted Critical
Publication of CN206040624U publication Critical patent/CN206040624U/en
Priority to US15/711,414 priority patent/US20180090524A1/en
Priority to TW106132552A priority patent/TW201824528A/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/162Disposition
    • H01L2924/16235Connecting to a semiconductor or solid-state bodies, i.e. cap-to-chip

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  • Solid State Image Pick-Up Elements (AREA)

Abstract

The utility model provides an image sensor chip package structure, include: the image sensor chip has relative each other first face and second face, first face sets up thoughts light zone, the printing opacity base plate has first surface relative each other and second surface, the first surface covers extremely the first face of image sensor chip, image sensor chip package structure still has the light absorbing zone, the light absorbing zone covers the lateral wall of printing opacity base plate. Through at least forming the light absorbing zone on the lateral wall of image sensor chip package structure's printing opacity base plate, eliminate defects such as the bad and ghost of image sensor chip formation of image, improve the image quality of image sensor chip.

Description

Image sensing chip-packaging structure
Technical field
This utility model is related to technical field of semiconductors, more particularly to the encapsulation technology of image sensing chip.
Background technology
With the development of the shadow technologies such as shooting, image sensing chip is used as can be converted to telecommunications by the optical signal of reception Number functional chip, be usually used in the photographic head of electronic product, have the huge market demand.
At the same time, the encapsulation technology of image sensing chip also has tremendous development, now the image sensing chip of main flow Encapsulation technology is crystal wafer chip dimension encapsulation technology (Wafer Level Chip Size Packaging, WLCSP), is right Full wafer wafer cuts the technology for obtaining single finished product chip after being packaged and testing again.After the encapsulation of this kind of encapsulation technology Single finished product chip size and single crystallite dimension almost, have complied with that market is increasingly light to microelectronic product, little, short, thinning Require with low priceization.Crystal wafer chip dimension encapsulation technology is the trend of the focus in current encapsulation field and future development.
Image sensing chip is simultaneously provided with photosensitive area at which, in order in encapsulation process protect photosensitive area it is injury-free and Pollution, generally, on the wafer of image sensing chip, the one side with photosensitive area covers transparent substrates, and transparent substrates complete crystalline substance Circle level can continue to retain after encapsulating and cutting, and persistently protect image sensing core in follow-up operation and later use Piece.
Transparent substrates have light transmission, to facilitate the intake of the photosensitive area of image sensing chip light to external world, but by In the presence of transparent substrates, it is bad which have also been introduced some while image sensing chip is protected, it is common that light is entering There is optical reflection in its side wall after entering transparent substrates, cause to be imaged the phenomenons such as bad and ghost.It is this kind of bad to become this Art personnel bite technical problem to be solved.
Illustrate, with reference to Fig. 1, Fig. 1 is a kind of image sensing chip-packaging structure schematic diagram in prior art.Image is passed Sense chip encapsulating structure includes:Image sensing chip 10, with the first face relative to each other and the second face, first face sets It is equipped with photosensitive area 20 and the weld pad 21 positioned at 20 periphery of photosensitive area;Positioned at the through hole in 10 second face of image sensing chip, through hole Expose weld pad 21;Positioned at the insulating barrier 11 in 10 second face of through-hole side wall and image sensing chip;In through hole and extend to The metal wiring layer 12 in 10 second face of image sensing chip, metal wiring layer 12 are electrically connected with weld pad 21;Cover metal wiring layer 12 and the solder mask 13 in 10 second face of image sensing chip, there is on solder mask 13 perforate;In 13 perforate of solder mask and with The solder-bump 14 of the electrical connection of the metal wiring layer 12;Transparent substrates 30, which is covered to the first face of image sensing chip 10; Supporting construction 21 is arranged on transparent substrates 30, and is located between transparent substrates 30 and image sensing chip 10, supporting construction 21, Transparent substrates 30 and image sensing chip 10 are surrounded and form host cavity, and photosensitive area 20 is located at and houses intracavity.
During the use of above-mentioned image sensing chip, light I1 is incident to transparent substrates 30, some light I2 meetings The side wall 30s of transparent substrates 30 is exposed to, optical reflection phenomenon is produced, if reflection light is incident to the photosensitive area 20, just The imaging of image sensing chip can be interfered.Especially, if the incident angle of light I2 meets specified conditions, for example, When the transparent substrates 30 are glass, it is air outside glass, and the angle of incidence of the light I2 is more than the facing to air by glass During boundary angle, the light I2 can occur total reflection at the side wall 30s of the transparent substrates 30, and light I2 is described for total reflection Propagate in photopolymer substrate 30, and refract to photosensitive area 20, severe jamming can be caused to photosensitive area 20, make the imaging of image sensing chip Bad or generation ghost, reduces its image quality.
Additionally, as technology develops, image sensing chip integrated on wafer is more and more, single finished product chip packing-body Size it is less and less, also increasingly nearer, the above-mentioned interference phenomenon of the side wall of transparent substrates 30 and the distance at 20 edge of photosensitive area Also become apparent from.
Utility model content
The problem that this utility model is solved is by providing new image sensing chip-packaging structure, eliminating image sensing Chip is imaged the defects such as bad and ghost, improves the image quality of image sensing chip.
This utility model provides a kind of image sensing chip-packaging structure, including:Image sensing chip, with relative to each other The first face and the second face, first face is provided with photosensitive area;Transparent substrates, with each other relative first surface and Second surface, the first surface are covered to the first face of the image sensing chip;The image sensing chip-packaging structure Also there is light absorbing zone, the light absorbing zone covers the side wall of the transparent substrates.
Preferably, being provided between the transparent substrates and the image sensing chip makes to form propping up for interval between the two Support structure, the supporting construction, transparent substrates and image sensing chip surround to form host cavity, and the photosensitive area is located at described Intracavity is housed, the light absorbing zone covers the lateral wall of the supporting construction.
Preferably, also there is on the first face of the image sensing chip weld pad, the weld pad is located at the photosensitive area Periphery;There is on second face of the image sensing chip through hole, the through hole exposes the weld pad;It is provided with the through hole The metal wiring layer electrically connected with the weld pad, the metal wiring layer are extended on the second face of the image sensing chip; With the solder-bump electrically connected with the metal wiring layer on second face of the image sensing chip, the light absorbing zone covers It is placed on the side wall of the image sensing chip and the second face exposes the solder-bump.
Preferably, the material of the light absorbing zone is black glue.
The beneficial effects of the utility model are by least in the side wall of the transparent substrates of image sensing chip-packaging structure Upper formation light absorbing zone, eliminates image sensing chip and is imaged the defects such as bad and ghost, improve the imaging of image sensing chip Quality.
Description of the drawings
Fig. 1 is a kind of image sensing chip-packaging structure schematic diagram in prior art.
Fig. 2 is this utility model preferred embodiment image sensing chip-packaging structure schematic diagram.
Fig. 3 to Fig. 9 is the intermediate structure schematic diagram that formed in this utility model preferred embodiment encapsulation process.
Specific embodiment
Specific embodiment of the present utility model is described in detail below with reference to accompanying drawing.But these embodiments are simultaneously This utility model is not limited, structure, method or function that one of ordinary skill in the art is made according to these embodiments On conversion be all contained in protection domain of the present utility model.
It should be noted that the purpose for providing these accompanying drawings is to contribute to understanding embodiment of the present utility model, and Should not be construed as and improperly limit to of the present utility model.For the sake of becoming apparent from, shown in figure, size is not necessarily to scale, May make and amplify, reduce or other changes.Additionally, should the three dimensions comprising length, width and depth in actual fabrication Size.In addition, fisrt feature described below second feature it " on " structure can be formed including the first and second features For the embodiment of directly contact, it is also possible to be formed in the embodiment between the first and second features including other feature, so First and second features may not be directly contact.
Fig. 2 is refer to, is this utility model preferred embodiment image sensing chip-packaging structure schematic diagram, image sensing core Chip package includes:Image sensing chip 210, with the first face 210a relative to each other and the second face 210b, the first face 210a is provided with photosensitive area 211;Transparent substrates 330, with each other relative first surface 330a and second surface 330b, first Surface 330a is covered to the first face 210a;The first surface 330a has supporting construction 320, and supporting construction 320 is located at printing opacity Between substrate 330 and image sensing chip 210, and photosensitive area 211 is located at supporting construction 320, transparent substrates 330 and image and passes Sense chip 210 is surrounded within the host cavity for being formed.
Light absorbing zone 511 is provided with the side wall of transparent substrates 330, and light absorbing zone 511 can absorb and be incident upon printing opacity base Light on 330 side wall of plate, it is to avoid light on 330 side wall of transparent substrates occurs full transmitting and disturbs photosensitive area 211.
Further, light absorbing zone 511 covers the lateral wall of supporting construction 320, lifts image sensing chip-packaging structure Air-tightness.
First face 210 of image sensing chip 210 is provided with the weld pad 212 positioned at 211 periphery of photosensitive area, in the present embodiment In, it is provided with image sensing chip 210:Positioned at 210 second face 210b of image sensing chip in the first face 210a extensions Through hole, the position of through hole are corresponding with the position of weld pad 212, and through hole exposes weld pad 212;Positioned at image sensing chip 210 Insulating barrier 213 in two face 210b and through hole;Metal wiring layer 214 in through hole, metal wiring layer 214 and weld pad 212 Electrically connect and extend on 210 second face 210b of image sensing chip;Positioned at the resistance of 210 second face 210b sides of image sensing chip Layer 215, is provided with perforate on solder mask 215, aperture bottom exposes metal wiring layer 214;Welding in perforate is convex 216 are played, solder-bump 216 is electrically connected with metal wiring layer 214.So so that weld pad 212 is by metal wiring layer 214 and weldering Connect raised 216 and realize electrical connection, and electrically connected with other circuits of outside using solder-bump 216 and realize image sensing chip 210 With the electrical connection of outside other circuits.
Further, light absorbing zone 511 covers the side wall and the second face 210b of image sensing chip 210 and exposes welding Raised 216, further improve the air-tightness of image sensing chip-packaging structure.
Corresponding, this utility model embodiment provides image sensing chip packaging method, as shown in Figure 2 for being formed Image sensing chip-packaging structure.Fig. 3 to Fig. 9 is refer to, is to be formed in this utility model preferred embodiment encapsulation process Between structural representation.
First, with reference to Fig. 3 and Fig. 4, there is provided wafer 200, wherein, overlooking the structure diagrams of the Fig. 3 for wafer 200, Fig. 4 is Sectional views of the Fig. 3 along A-A1.
Wafer 200 has the first face 200a relative to each other and the second face 200b.Wafer 200 has many array arrangements Image sensing chip 210 and the Cutting Road region 220 between adjacent image sensing chip 210, in the envelope for completing wafer 200 After dress, cut along Cutting Road region 220, multiple image sensing chip packing-bodies can be formed.
Image sensing chip 210 has photosensitive area 211 and the weld pad 212 positioned at 211 periphery of photosensitive area.Photosensitive area 211 can To arrange including multiple photodiode arrays, for the optical signal for exposing to photosensitive area 211 is converted into the signal of telecommunication.Weld pad 212 input and output sides being connected with external circuit as device in photosensitive area 211.Image sensing chip 210 can also include Other functions device, this utility model are not restricted to this, as long as the semiconductor chip with sensitization function may be considered The image sensing chip of this utility model indication.
It should be noted that in the subsequent step of the method for packing of this utility model embodiment, for simple and clear See, only by shown in Fig. 3 along the sectional view in the A-A1 directions of wafer 200 as a example by illustrate, synchronously perform phase in other regions As processing step.
Then, with reference to Fig. 5, there is provided euphotic cover plate 300, euphotic cover plate 300 is covered in the of wafer 200 in subsequent technique Simultaneously 200a, for protecting to the photosensitive area 211 on wafer 200.
Due to needing light to reach photosensitive area 211 through euphotic cover plate 300, therefore, euphotic cover plate 300 adopts printing opacity material Material, with high light transmittance.Specifically, the material of euphotic cover plate 300 can for unorganic glass, lucite or other have spy Determine the light transmissive material of intensity.
Meanwhile, in order to ensure the intensity and light transmission of euphotic cover plate 300, the thickness selection to substrate also has certain Require, in the present embodiment, the thickness range of euphotic cover plate 300 is 50 μm~500 μm, for example, can be 400 μm.
Euphotic cover plate 300 includes each other relative first surface 300a and second surface 300b, two of euphotic cover plate 300 300a and 300b are smooth, smooth on surface, will not produce scattering, diffuse-reflectance etc. to incident ray.Euphotic cover plate 300 is follow-up complete Remain as the transparent substrates 330 of image sensing chip 210 into after encapsulating and cut.
Supporting construction 320, supporting construction 320 and euphotic cover plate 300 are formed in the first surface 300a of euphotic cover plate 300 First surface 300a forms the cavity of multiple array arrangements, each one photosensitive area 211 of cavity correspondence.
In the present embodiment, the material of supporting construction 320 is photoresists, by techniques such as spraying or spin coatings in euphotic cover The first surface 300a of plate 300 forms photosensitive plastic coating, then carries out figure by exposure imaging technique to the photosensitive plastic coating Shapeization forms supporting construction 320.In a further embodiment, the material of supporting construction 320 can also for silicon oxide, silicon nitride, The insulating dielectric materials such as silicon oxynitride, are formed by depositing operation, subsequently adopt photoetching and etching technics to be patterned to be formed Supporting construction 320.
Then, with reference to Fig. 6, by the first surface 300a of euphotic cover plate 300 and the first face 200a para-position pressures of wafer 200 Close, the cavity that supporting construction 320 is formed covers to form host cavity (sign), photosensitive area 211 with the first face 200a of wafer 200 Positioned at the collecting intracavity.
In the present embodiment, euphotic cover plate 300 and 200 para-position of wafer are pressed by adhesive layer (not shown).For example, can be with Adhesive layer is formed on the top surface of supporting construction 320, the adhesive layer is formed by silk screen printing or spin coating proceeding, then will The first surface 300a of euphotic cover plate 300 and the first face 200a para-position pressings of wafer 200, are combined by the adhesive layer.Institute State adhesive layer and can both realize bonding effect, insulation and sealing function can be played again.The adhesive layer can be viscous for macromolecule Connect material, such as polymeric material such as silica gel, epoxy resin, benzocyclobutene.
Then, with reference to Fig. 7, process is packaged to wafer 200.
First, wafer 200 is carried out from the second face 200b of wafer 200 it is thinning, in order to the etching of follow-up through hole, to crystalline substance The thinning of circle 200 can be using mechanical lapping, chemical mechanical milling tech etc.;
Then, wafer 200 is performed etching from the second face 200b of wafer 200, forms through hole (sign), the through hole Expose weld pad 212;
Then, insulating barrier 213 is formed on the second face 200b of wafer 200 and in the through hole, insulating barrier 213 can be with The second face 200b for wafer 200 provides electric insulation, can also provide electric exhausted for the substrate of the wafer 200 that the through hole exposes Edge, the material of insulating barrier 213 can be silicon oxide, silicon nitride, silicon oxynitride or insulation organic resin, according to insulating barrier 213 Material selection laser technology or exposure imaging technique or etching technics make insulating barrier 213 expose weld pad 212;
Then, the metal wiring layer that formation is electrically connected with weld pad 212 in the second face 200b and through hole of wafer 200 214, metal wiring layer 214 is extended on the second face 200b of wafer 200, metal wiring layer 214 through deposit metal films and To being formed after the etching of metallic film, such as RDL techniques;
Then, solder mask 215 of the formation with perforate (sign) on the second face of wafer 200, the perforate exposure Go out the surface of part metals wiring layer 214, the material of solder mask 215 can be the insulating cement with photobehavior;
Then, on the surface of solder mask 215 formed solder-bump 216, solder-bump 216 be located at the perforate in and with Metal wiring layer 214 is electrically connected, and solder-bump 216 can be the attachment structure such as soldered ball, metal column, material can for copper, aluminum, The metal materials such as gold, stannum or lead.
Then, Fig. 8 is refer to, cuts to form multiple by the image sensing chip-packaging structure of wafer scale using cutting technique Packaging body, each packaging body have an image sensing chip 210 and transparent substrates 330.
Fig. 9 is refer to, is the schematic diagram to form light absorbing zone 511.Multiple packaging bodies are fixed on support plate 500, and thoroughly As on support plate 500, the second surface 320b of transparent substrates 330 is fitted tightly over support plate to the second surface 320b of photopolymer substrate 330 On 500, it is to avoid in follow-up Shooting Technique, light absorbing material pollutes the second surface 320b of transparent substrates 330.
Light absorbing material 510 is surrounded by packaging body using Shooting Technique, by adjusting process and the injection of injection The control encirclement degree of the light absorbing material to packaging body such as amount, can only cause light absorbing material 510 to surround transparent substrates 330 Side wall, can be with further such that the lateral wall of light absorbing material encirclement supporting construction 320.In the present embodiment, light absorbing material The side wall of 510 cladding transparent substrates 330, the lateral wall of supporting construction 320, the side wall of image sensing chip 210 and image are passed Second face of sense chip 210 simultaneously only exposes solder-bump 216, facilitates follow-up solder-bump 216 to electrically connect with other circuits.
Subsequently, after treating 510 solidifying and setting of light absorbing material, using cutting technique packaging body is separated to each other so as to Light absorbing zone 511 is defined on packaging body, forms image sensing chip-packaging structure as shown in Figure 2.
The material of light absorbing zone 511 is light tight or the black organic material of low light transmission, i.e. black glue.So-called black glue is The black epoxy being usually used in semiconductor technology.Some black glues have photobehavior concurrently.
When black glue has photobehavior, light absorbing material 510 can also be covered solder-bump in Shooting Technique 216, solder-bump 216 is exposed by exposure imaging technique then, then performing cutting technique again will be each other by light absorbs The packaging body that material 510 is connected is separated.
It should be understood that, although this specification is been described by according to embodiment, but not each embodiment only includes one Individual independent technical scheme, this narrating mode of description is only that those skilled in the art will should say for clarity Bright book as an entirety, the technical scheme in each embodiment can also Jing it is appropriately combined, forming those skilled in the art can With the other embodiment for understanding.
Those listed above is a series of to describe the tool for being only for feasibility embodiment of the present utility model in detail Body illustrates that they are simultaneously not used to limit protection domain of the present utility model, all to be made without departing from this utility model skill spirit Equivalent implementations or change are should be included within protection domain of the present utility model.

Claims (4)

1. a kind of image sensing chip-packaging structure, including:
Image sensing chip, with the first face relative to each other and the second face, first face is provided with photosensitive area;
Transparent substrates, with each other relative first surface and the second surface, the first surface is covered to the image and is passed First face of sense chip;
It is characterized in that:
The image sensing chip-packaging structure also has light absorbing zone, and the light absorbing zone covers the side of the transparent substrates Wall.
2. image sensing chip-packaging structure according to claim 1, it is characterised in that:The transparent substrates and the shadow The supporting construction for forming interval between the two is made as being provided between sensing chip, the supporting construction, transparent substrates and shadow Host cavity to be formed as sensing chip is surrounded, the photosensitive area is located at the collecting intracavity, the light absorbing zone covers the support The lateral wall of structure.
3. image sensing chip-packaging structure according to claim 2, it is characterised in that:The of the image sensing chip Simultaneously go up, the weld pad is located at the periphery of the photosensitive area;Have on second face of the image sensing chip Through hole, the through hole expose the weld pad;The metal wiring layer electrically connected with the weld pad, the gold is provided with the through hole Category wiring layer is extended on the second face of the image sensing chip;On second face of the image sensing chip with it is described The solder-bump of metal wiring layer electrical connection, the light absorbing zone are covered in the side wall of the image sensing chip and the second face And expose the solder-bump.
4. image sensing chip-packaging structure according to claim 1, it is characterised in that:The material of the light absorbing zone is Black glue.
CN201621077065.7U 2016-09-26 2016-09-26 Image sensor chip package structure Active CN206040624U (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN201621077065.7U CN206040624U (en) 2016-09-26 2016-09-26 Image sensor chip package structure
US15/711,414 US20180090524A1 (en) 2016-09-26 2017-09-21 Image sensor package and method of packaging the same
TW106132552A TW201824528A (en) 2016-09-26 2017-09-22 An image sensor package and a method of packaging an image sensor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201621077065.7U CN206040624U (en) 2016-09-26 2016-09-26 Image sensor chip package structure

Publications (1)

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CN206040624U true CN206040624U (en) 2017-03-22

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106449546A (en) * 2016-09-26 2017-02-22 苏州晶方半导体科技股份有限公司 Image sensor chip packaging structure and packaging method thereof
CN107580170A (en) * 2017-11-02 2018-01-12 信利光电股份有限公司 A kind of camera module and its method for packing

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106449546A (en) * 2016-09-26 2017-02-22 苏州晶方半导体科技股份有限公司 Image sensor chip packaging structure and packaging method thereof
CN107580170A (en) * 2017-11-02 2018-01-12 信利光电股份有限公司 A kind of camera module and its method for packing

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