CN205722741U - A kind of image element circuit, array base palte, display floater and display device - Google Patents
A kind of image element circuit, array base palte, display floater and display device Download PDFInfo
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Abstract
The open a kind of image element circuit of embodiment of the present utility model, array base palte, display floater and display device, relate to Display Technique field, it is possible to increase the job stability of image element circuit, improve picture quality.This image element circuit includes: including: clamp voltage unit, driver element, energy-storage units and reference voltage end, described clamp voltage unit connects described reference voltage end and the first end of described energy-storage units, second end of described energy-storage units connects described driver element, and provides signal to described driver element；Wherein, described clamp voltage unit, it is used for forming bleeder circuit, to the first end dividing potential drop of energy-storage units in described image element circuit, or the current potential of the first end of energy-storage units in described image element circuit is pulled and clamper is at the level of described reference voltage end.Embodiment of the present utility model is used for display device manufacture.
Description
Technical field
Embodiment of the present utility model relates to Display Technique field, particularly relates to a kind of image element circuit, array base palte, display
Panel and display device.
Background technology
Mobile display end product AMOLED (Active Matrix Driving OLED, the active matrix of main flow at present
Drive Organic Light Emitting Diode) screen, drive array portion generally to use LTPS TFT (Low Temperature Poly-
Silicon Thin Film Transistor, low-temperature polysilicon film transistor) as basic driver device.Present stage LTPS
The feature of technology can cause the threshold voltage (V of different TFTth) there is certain discreteness.Owing to pixel OLED drives TFT directly to control
The driving electric current of OLED processed and brightness, therefore VthThe impact very important on picture quality of this discreteness.
In addition to process improving, use and there is VthThe image element circuit compensating function is to improve VthThe effective means of discreteness.?
In this circuit, when in image element circuit, OLED drives TFT work, the driving signal being carried in this TFT gate contains 2 kinds of one-tenth
Point, one is pixel OLED luminosity signal (Vdt), another kind is V based on TFT characteristicth(threshold voltage) compensates signal.
It is similar to TFT-LCD (TFT-liquid crystal display, Thin Film Transistor-LCD), generally comprises above-mentioned 2
Plant the driving signal of composition, kept by a holding capacitor within a frame period.Pixel intensity signal is by drive integrated circult
(DrIC) produce also write signal holding capacitor, and drive the V of TFTthCompensating signal, during by refreshing, short circuit drives the grid of TFT
Pole and drain electrode are implemented produce in a progressive way and write holding capacitor.The mode of holding capacitor is write according to both signals, as
Element circuit can be divided into two kinds of type of skills.
The driving signal sequence state diagram of this image element circuit that a kind of image element circuit provided such as Fig. 1 and Fig. 2 provide, is expert at
When signal refreshes, first pass through reseting stage (t1) and eliminate previous frame circuit state and CstThe impact of the signal of middle holding.?
In reseting stage, A point current potential is pulled to a relatively low current potential and is beneficial to VthThe write of (compensation) signal, puts T1 simultaneously and turns on shape
State enters the response speed of write phase (t2) to improve.The operation principle of the reseting stage of this image element circuit is not the most made at this in detail
Thin introduction.
At write phase (t2), pixel OLED drives TFT (T1) threshold voltage Vth(compensation) signal and pixel intensity signal
VdtIt is respectively written into signal holding capacitor CstA, B two ends.Wherein OLED drives power supply VddBe connected with T1 source electrode, the grid of T1 and
Drain after the T3 short circuit by conducting, be connected with the A end of holding capacitor.At power supply Vdd by T1 to CstIn A end charging process,
The T1 grid of short circuit and drain electrode, CstA terminal potential gradually approaches Vth(relatively for source electrode Vdd), it is ultimately written and is maintained at electric capacity
CstA end.Meanwhile, from the pixel intensity signal V of data wire (data line)dtWrite by write TFT (T4) and be maintained at
Electric capacity CstB end.
When entering glow phase (t3), write pulse (WT) controls T3, T4 cut-off, and luminous enabling pulse (EM) controls
T5, T6 turn on, and current potential is replaced in reference potential V by resetting TFT (T6) by B point current potentialref.This reset process is by electric capacity
CstCoupling, A terminal potential also occurs to change accordingly, i.e. by VthVariation is Vth+Vref-Vdt), drive TFT
(T1) conducting, drives pixel OLED luminous.This circuit contains the current potential weight of storage electric capacity reference edge (B end)
Circuits and current potential reset process, and glow phase need all the time this circuit work to keep stabilized driving.This circuit Vth(mend
Repay) signal produce process do not affected by luminance signal, there is the advantage in terms of compensation effect.But owing to comprising holding capacitor Cst
One end (B) reset process, need individually to reset TFT and corresponding sequencing contro；It addition, in replacement transformation process, B point wink
Between floating easily affect potential stability.
At present under technical conditions background, when display terminal use AMOLED mode need to show subtly two adjacent bright
During degree grade Ln, Ln+1, it is desirable to drive and also to have higher level of resolution, such as between the corresponding bright control signal of DrIC generation
Require Vdt (Ln+1)-Vdt (Ln) < 3mV.The DrIC of this voltage resolution needs higher cost.Along with OLED current efficiency
Lifting, and the demand to high grade picture, drive the higher requirement of resolution that costs reasonable can be caused to decline DrIC.For
This, by glow phase luminescence is enabled the whole screen brightness of signal (EM) pulsewidth modulation (PWM) technical controlling, reduce driving signal
Sensitivity, can be with relatively low DrIC driving voltage resolution, it is achieved finer brightness degree distribution.And above-mentioned existing
In the image element circuit that technology provides, when PWM control EM makes replacement TFT (T6) turn off, B point current potential floating.The B point current potential of floating
Easily affected by parasitic couplings factor and lost stable.When EM signal reopens replacement T6, the stability of A point current potential also can
Affected accordingly, cause the job stability of image element circuit to reduce, thus affect picture quality.
Utility model content
Embodiment of the present utility model provides a kind of image element circuit, array base palte, display floater and display device, it is possible to carry
The job stability of high image element circuit, improves picture quality.
First aspect, it is provided that a kind of image element circuit, including: clamp voltage unit, driver element, energy-storage units and reference electricity
Pressure side；
Described clamp voltage unit connects described reference voltage end and the first end of described energy-storage units, described energy-storage units
Second end connect described driver element, and to described driver element provide signal；
Wherein, described clamp voltage unit, it is used for forming bleeder circuit, in described image element circuit the first of energy-storage units
End dividing potential drop, or the current potential of the first end of energy-storage units in described image element circuit is pulled and clamper in described reference voltage end
Level.
Optionally, described clamp voltage unit includes clamp resistance, and the first end of described clamp resistance connects described reference
Voltage end, the second end of described clamp resistance connects one end of described energy-storage units.
Optionally, described clamp resistance can be made by any mode following:
Ion implanting low-temperature polysilicon film is formed；
Or, use the thin-film material with predetermined sheet resistance resistance to be formed；
Or, concurrently form with the active layer doped region of the transistor in image element circuit, wherein said transistor active
The doping particle implantation dosage of layer doped region is more than the doping particle implantation dosage in the resistance film region of described clamp resistance.
Optionally, also include: reset unit；
Described reset unit connects reseting controling end, the second end of described energy-storage units and resetting voltage end, for multiple
Under the control of position control end, the signal of described resetting voltage end is write the second end of described energy-storage units.
Optionally, also include: data write unit；
Described data write unit connects data signal end, data write controls end and the first end of described energy-storage units,
For the dividing potential drop of the signal of described data signal end being write described energy-storage units under the control that the write of described data controls end
The first end.
Optionally, also include: compensating unit；
Described compensating unit connects the write of described data and controls end, the second end of described energy-storage units, driving node, is used for
Under the control that the write of described data controls end, the level of the second end of described energy-storage units is pulled together with described driving node.
Optionally, also include: driver element；
Described driver element connects the first level terminal, the second end of energy-storage units and driving node, in described energy storage
To described driving node output drive signal under second end of unit and the control of described first level terminal.
Optionally, also include: luminescence unit；
Described luminescence unit connects LED control signal end, driving node and second electrical level end, in described luminous control
Signal end processed controls the lower driving signal receiving described driving node, and shows GTG under described driving signal controls.
Optionally, described clamp voltage unit is also connected with described LED control signal end, for believing in described light emitting control
Number end control under the first end of the level of described reference voltage end with described energy-storage units is pulled together.
Optionally, described reset unit includes transistor seconds, and the control end of described transistor seconds connects described reset
Controlling end, the first end of described transistor seconds connects described resetting voltage end, and the second end of described transistor seconds connects institute
State the second end of energy-storage units.
Optionally, described data write unit includes the 4th transistor, and the control end of described 4th transistor connects described
Data write controls end, and the first end of described 4th transistor connects described data signal end, the second of described 4th transistor
End connects the first end of described energy-storage units.
Optionally, described compensating unit includes third transistor, and the control end of described third transistor connects described data
Write controls end, and the first end of described third transistor connects described driving node, and the second end of described third transistor connects
Second end of described energy-storage units.
Optionally, described driver element includes the first transistor, and the control end of wherein said the first transistor connects described
Second end of energy-storage units, the first end of described the first transistor connects described first level terminal, the of described the first transistor
Two ends connect described driving node.
Optionally, described luminescence unit includes the 5th transistor and Organic Light Emitting Diode, wherein said 5th transistor
Control end connect LED control signal end, described 5th transistor first end connect driving node, described 5th transistor
Second end connect described Organic Light Emitting Diode the first pole, described Organic Light Emitting Diode second pole connect described second
Level terminal.
Optionally, described energy-storage units includes electric capacity, and the first pole of described electric capacity connects the second end of described energy-storage units,
Second pole of described electric capacity connects the first end of described energy-storage units.
Optionally, described clamp voltage unit includes clamp resistance and the 6th transistor, the first end of described clamp resistance
Connecting described reference voltage end, the second end of described clamp resistance connects the first end of described energy-storage units；Described 6th crystal
The control end of pipe connects described LED control signal end, and the first end of described 6th transistor connects described reference voltage end, institute
The second end stating the 6th transistor connects the first end of described energy-storage units.
Second aspect, it is provided that a kind of array base palte, including any pixel circuit of first aspect.
The third aspect, it is provided that a kind of display floater, including any pixel circuit of first aspect.
Optionally, when described clamping unit voltage cell includes clamp resistance,
Described clamp resistance meets following condition: Rc>>Rin；Wherein RcFor the internal resistance of described clamp resistance, described RinFor institute
State the circuit internal resistance before the first end of energy-storage units described in image element circuit；
And/or
Described clamp resistance meets following condition: Rc<<Tframe/(CpA+CpB)；Wherein RcFor the internal resistance of described clamp resistance,
TframeFrame period, CpAFor the parasitic capacitance of the second end of described energy-storage units, CpBParasitism for the second end of described energy-storage units
Electric capacity.
Fourth aspect, it is provided that a kind of display device, including: the display floater described in the third aspect.
Image element circuit, array base palte, display floater and the display device that embodiment of the present utility model provides, due to clamper
Voltage cell connects the first end of energy-storage units in reference voltage end and described image element circuit, in the process that image element circuit drives
In, clamp voltage unit can be to the first end dividing potential drop of energy-storage units in described image element circuit, or by described reference voltage end
Level write the first end of energy-storage units in described image element circuit, thus during avoiding driving, the first end of energy-storage units floats
Sky, improves the stability of the current potential of the first end of energy-storage units, improves the job stability of image element circuit, improves picture product
Matter.
Accompanying drawing explanation
In order to be illustrated more clearly that this utility model embodiment or technical scheme of the prior art, below will be to embodiment
Or the required accompanying drawing used is briefly described in description of the prior art, it should be apparent that, the accompanying drawing in describing below is only
It is embodiments more of the present utility model, for those of ordinary skill in the art, in the premise not paying creative work
Under, it is also possible to other accompanying drawing is obtained according to these accompanying drawings.
A kind of pixel-driving circuit structural representation that Fig. 1 provides for prior art；
Fig. 2 is the driver' s timing signal condition schematic diagram of pixel-driving circuit as shown in Figure 1；
A kind of pixel-driving circuit structural representation that Fig. 3 provides for this utility model embodiment；
A kind of pixel-driving circuit structural representation that Fig. 4 provides for another embodiment of this utility model；
A kind of pixel-driving circuit structural representation that Fig. 5 provides for the another embodiment of this utility model；
A kind of pixel-driving circuit structural representation that Fig. 6 provides for this utility model another embodiment；
The driver' s timing signal condition schematic diagram of a kind of pixel-driving circuit that Fig. 7 provides for this utility model embodiment.
Detailed description of the invention
Below in conjunction with the accompanying drawing in this utility model embodiment, the technical scheme in this utility model embodiment is carried out
Clearly and completely describe, it is clear that described embodiment is only a part of embodiment of this utility model rather than whole
Embodiment.Based on the embodiment in this utility model, those of ordinary skill in the art are not under making creative work premise
The every other embodiment obtained, broadly falls into the scope of this utility model protection.
The transistor used in all embodiments of this utility model can be all thin film transistor (TFT) or field effect transistor or other
The device that characteristic is identical, predominantly switchs crystalline substance according to the transistor that effect embodiment of the present utility model in circuit is used
Body pipe.The source electrode of the switching transistor owing to using here, drain electrode are symmetrical, so its source electrode, drain electrode can be exchanged.
In this utility model embodiment, for distinguishing transistor the two poles of the earth in addition to grid, wherein will be referred to as the first end by source electrode, drain electrode claims
It it is the second end.By the form in accompanying drawing specify the intermediate ends of transistor be grid, signal input part be that source electrode, signal output part are
Drain electrode.In addition the switching transistor that this utility model embodiment is used includes p-type switching transistor and N-type switching transistor two
Kind, wherein, p-type switching transistor turns on when grid is low level, ends when grid is high level, N-type switching transistor
For turning on when grid is high level, end when grid is low level；Driving transistor to include p-type and N-type, wherein p-type is driven
Dynamic transistor is low level (grid voltage is less than source voltage) at grid voltage, and the absolute value of the pressure reduction of gate-source is more than
Magnifying state or saturation it is in during threshold voltage；Wherein N-type drives the grid voltage of transistor to be high level (grid voltage
More than source voltage), and it is in magnifying state or saturation when the absolute value of the pressure reduction of gate-source is more than threshold voltage.
With reference to shown in Fig. 3, embodiment of the present utility model provides a kind of image element circuit, including: clamp voltage unit 11, drives
Moving cell 13, energy-storage units 12 and reference voltage end Vref；
Described clamp voltage unit 11 connects reference voltage end VrefWith in described image element circuit the first of energy-storage units 12
End, in described image element circuit, the second end of energy-storage units 12 provides signal to driver element 13；
Wherein, described clamp voltage unit 11, it is used for forming bleeder circuit, energy-storage units 11 in described image element circuit
First end dividing potential drop, or the current potential of the first end of energy-storage units in image element circuit 12 is pulled and clamper in described reference voltage end
VrefLevel.
Wherein optional, clamp voltage unit 11 includes clamp resistance Rc, clamp resistance RcFirst end connect reference voltage
End Vref, clamp resistance RcSecond end connect energy-storage units 11 one end.
Additionally, shown in reference Fig. 4, this image element circuit, also include: reset unit 14, compensating unit 15, data write unit
16 and luminescence unit 17；
Described reset unit 14 connects the second end a and resetting voltage end V of reseting controling end RST, energy-storage unitsin, it is used for
Under reseting controling end RST controls, the signal of described resetting voltage end Vin is write the second end a of described energy-storage units；
Described clamp voltage unit 11, is used for forming bleeder circuit, for energy-storage units 11 in described image element circuit
First end dividing potential drop, or the current potential of the first end of energy-storage units in image element circuit 12 is pulled and clamper in described reference voltage end
VrefLevel.Wherein, when clamp voltage unit 11 is used for the first end b dividing potential drop to energy-storage units, it is possible to will store up at image element circuit
First end b of energy unit obtains and writes the dividing potential drop of the signal of data signal end；
Described data write unit 16 connects data signal end DATA, data write controls end WT and the first of energy-storage units
End b, for writing energy-storage units by the dividing potential drop of the signal of data signal end DATA under the control that data write controls end WT
First end b；
Compensating unit 15 connect data write control end WT, energy-storage units the second end a, driving node c in data
Under the control of write control end WT, the level of the second end a of energy-storage units is pulled together with driving node c；
Energy-storage units 12 is for storing the voltage between the second end a of energy-storage units and the first end b of energy-storage units；
Driver element 13 connects the second end a and driving node c of the first level terminal V1, energy-storage units, at energy storage list
To driving node c output drive signal under the control of the second end a and the first level terminal V1 of unit；
Luminescence unit 17 connects LED control signal end EM, driving node c and second electrical level end V2, in light emitting control
Signal end EM controls the lower driving signal receiving driving node c, and shows GTG under driving signal to control.
The image element circuit that embodiment of the present utility model provides, owing to clamp voltage unit connects reference voltage end and described
First end of energy-storage units in image element circuit, during image element circuit drives, clamp voltage unit can be to described pixel
First end dividing potential drop of energy-storage units in circuit, or the level of described reference voltage end is write energy storage list in described image element circuit
First end of unit, thus the first end floating of energy-storage units during avoiding driving, improve the electricity of the first end of energy-storage units
The stability of position, improves the job stability of image element circuit, improves picture quality.
Concrete, with reference to providing a kind of image element circuit structure figure shown in Fig. 5, wherein,
Driver element 13 includes the first transistor T1, and wherein the end that controls of the first transistor T1 connects described energy-storage units
First end of the second end a, the first transistor T1 connects the first level terminal V1, and second end of the first transistor T1 connects driving node
c。
Reset unit 14 include transistor seconds T2, transistor seconds T2 control end connect reseting controling end RST, second
First end of transistor T2 connects resetting voltage end Vin, second end of transistor seconds T2 connects the second end a of energy-storage units.
Compensating unit 15 includes third transistor T3, and the control end of described third transistor T3 connects the write control of described data
End WT processed, the first end of third transistor T3 connects driving node c, and the second end of described third transistor T3 connects energy-storage units
The second end a.
Data write unit 16 includes that the control end of the 4th transistor T4, described 4th transistor T4 connects data write control
First end of end WT processed, the 4th transistor T4 connects data signal end DATA, and second end of the 4th transistor T4 connects energy storage list
First end b of unit.
Luminescence unit 17 includes the 5th transistor T5 and Organic Light Emitting Diode OLED, wherein said 5th transistor OLED
Control end connect first end of LED control signal end EM, described 5th transistor T5 and connect driving node c, described 5th brilliant
Second end of body pipe T5 connects first pole of described Organic Light Emitting Diode OLED, the second of described Organic Light Emitting Diode OLED
Pole connects described second electrical level end V2.
Energy-storage units 12 includes electric capacity Cst, described electric capacity CstFirst pole connect described energy-storage units the second end a, institute
State electric capacity CstSecond pole connect described energy-storage units the first end b.
Clamp voltage unit 11 includes clamp resistance Rc, clamp resistance RcFirst end connect described reference voltage end Vref,
Described clamp resistance RcSecond end connect described energy-storage units the first end b.
Additionally, also provide for a kind of image element circuit with reference to embodiment of the present utility model shown in Fig. 6, with the pixel shown in Fig. 3
Circuit is otherwise varied, and wherein clamp voltage unit 11 is also connected with described LED control signal end EM, in described light emitting control
By described reference voltage end V under the control of signal end EMrefThe first end b of level and described energy-storage units pull together.
Concrete, described clamp voltage unit 11 includes clamp resistance RcWith the 6th transistor T6, described clamp resistance Rc's
First end connects described reference voltage end Vref, described clamp resistance RcSecond end connect described energy-storage units the first end b；
The control end of described 6th transistor T6 connects first end of described LED control signal end EM, described 6th transistor T6 and connects
Reference voltage end Vref, second end of described 6th transistor T6 connects the first end b of described energy-storage units.
Additionally, in the above-mentioned image element circuit as shown in Fig. 5 or 6, clamp resistance RcCan by following any
Mode makes:
Ion implanting low temperature polycrystalline silicon (p-Si) thin film is formed；
Or, use the thin-film material with predetermined sheet resistance resistance to be formed；
Or, concurrently form with active layer doping (P+) district of the transistor in described image element circuit, wherein said crystal
The doping particle implantation dosage of pipe active layer doped region more than the doping particle in resistance film region of described clamp resistance
Injectant.
Wherein, conventional resistance manufacture method is to form resistance by ion implanting low-temperature polysilicon film.Due to resistance
The ion implantation dosage that makes all have with the hole doping ion implanting in routine LTPS TFT technique and the ion implanting of raceway groove
Difference, most straightforward approach is exactly individually to carry out photo (patterning processes) operation to form the figure of resistance film the most individually
It is set the ion implanting of dosage.Additionally, the figure being actually injected into region likely shares mask with other photo operations
(exposure) and other technical processs, implantation dosage is also possible to by half tone (half GTG) or grey tone (GTG) etc.
Technology local modulation.Such as, photo and injection process are formed in conventional P+ district, by half tone or grey tone skill
Art, synchronizes to form the figure possessing segment thickness PR (photoresist) in resistance film region.When hole doping injects, possess portion
The implantation dosage dividing the resistance film region of thickness PR can be less than hole doping injection region.In this way or additive method,
Clamp resistance R can be cut downcMake the additional process cost caused.Can certainly be with the thin film material with certain sheet resistance
Material forms clamp resistance.
Embodiment of the present utility model provides the driving method of a kind of image element circuit, the pixel provided for above-described embodiment
Circuit, comprises the steps:
Clamp voltage unit is the first end dividing potential drop of energy-storage units in image element circuit；
The level of the first end of energy-storage units in described image element circuit is drawn high by clamping unit and clamper is in reference voltage end
Level.
The driving method of the image element circuit that embodiment of the present utility model provides, owing to clamp voltage unit connects with reference to electricity
First end of energy-storage units in pressure side and described image element circuit, during image element circuit drives, clamp voltage unit can
To the first end dividing potential drop of energy-storage units in described image element circuit, or the level of described reference voltage end is write described pixel electricity
First end of energy-storage units in road, thus the first end floating of energy-storage units during avoiding driving, improve energy-storage units
The stability of the current potential of the first end, improves the job stability of image element circuit, improves picture quality.
Concrete, the driving method of the image element circuit that embodiment of the present utility model provides, also include:
First stage, the signal of resetting voltage end is write described storage under the signal of reseting controling end controls by reset unit
Second end of energy unit；
Second stage, data write unit passes through the signal of data signal end to storage under the control that data write controls end
First end charging of the energy-storage units that energy unit connects, the clamp voltage unit the first end dividing potential drop to energy-storage units, compensating unit
Being pulled together with driving node by the level of the second end of energy-storage units under the control that data write controls end, described energy-storage units is deposited
The threshold voltage of storage moving cell；
Phase III, the level of the first end of energy-storage units is pulled up to the level of reference voltage end by clamping unit, drives
Unit under the control of the first level terminal and the second end of energy-storage units to described driving node output drive signal, luminescence unit
Under LED control signal end controls, receive the driving signal of described driving node, and show ash under described driving signal controls
Rank.
Optionally, described reset unit includes transistor seconds,
In the described first stage, transistor seconds is in the conduction state under the signal of reseting controling end controls, the most multiple
The signal of position voltage end writes the second end of described energy-storage units.
Optionally, compensating unit includes third transistor, and in second stage, third transistor controls end in data write
Signal is in the conduction state under controlling, for being pulled together with driving node by the level of the second end of energy-storage units.
Optionally, described data write unit includes the 4th transistor, and in second stage, the 4th transistor writes in data
Control under the signal control of end in the conduction state, for energy storage list energy-storage units connected by the signal of data signal end
First end charging of unit.
Optionally, described luminescence unit includes the 5th transistor and Organic Light Emitting Diode,
In the phase III, the 5th transistor is in the conduction state under LED control signal end controls, and is used for receiving described
The driving signal of driving node, Organic Light Emitting Diode controls for the signal at described driving signal and described second electrical level end
Lower display GTG.
Optionally, described clamp voltage unit includes clamp resistance；
In second stage, clamp resistance is for the first end dividing potential drop to energy-storage units；
In the phase III, clamp resistance for being pulled up to the electricity of reference voltage end by the level of the first end of energy-storage units
Flat.
Optionally, described clamp voltage unit includes clamp resistance and the 6th transistor；
In second stage, clamp resistance is for the first end dividing potential drop to energy-storage units；
In the phase III, the 6th transistor is in the conduction state under the control of LED control signal end, for by clamper
Resistive short, and the level of the first end of energy-storage units is pulled up to the level of reference voltage end.
With reference to driving the signal sequence state diagram specific works to the application image element circuit as shown in Figure 5 shown in Fig. 7
Principle illustrates, and each transistor in Fig. 5 and 6 illustrates as a example by P-type transistor in the examples below, certainly brilliant
The type of body pipe is not the restriction of the application, only needs simply to replace switching signal, when using N-type transistor yet
The protection domain of the application should be belonged to.It is described as follows:
At t1 stage (reseting stage), RST be high level, WT be high level, EM be low level, T2 is controlled to be in by RST
Conducting state, is pulled to a node potential in initial potential Vint, in order to guarantee in the t2 stage (write phase), to driving transistor
(T1) charging of a node is normally carried out and writes threshold voltage (Vth) concordance.This t1 stage is refreshed by row signal, removes
In previous frame circuit state such as Fig. 5 (t3 ') and electric capacity CstThe impact of the signal of middle holding.
In t2 stage (write phase), RST be low level, WT be high level, EM be high level, T3 and T4 is by WT control
Pixel intensity signal in conducting state, data wire (DATA) passes through T4 to signal holding capacitor CstThe b node charging connected,
B node potential is that the pixel intensity signal Vdt driving IC (DrIC, drive integrated circult) to export is at charging circuit internal resistance (Rin) and
Clamp resistance (Rc) form series loop dividing potential drop V at b node 'dt.Meanwhile, electric capacity CstThe a node connected is produced by T1 charging
And write VthCompensate signal (VthThreshold voltage for T1), i.e. it is connected with V1 due to T1 source electrode, the voltage that T1 source electrode keeps is for driving
Galvanic electricity source Vdd, the drain electrode of T1, grid by conducting T3 short circuit and be connected to a node, a node potential in charging process gradually
Approach VthAnd write the preservation of a node.
When t3 stage (glow phase), RST be high level, WT be high level, EM be low level, T5 is controlled to be in by EM
Conducting state, owing to T4 ends, b node potential is by V 'dtIt is clamped resistance RcIt is pulled to VrefRear clamper, a node potential is also because of electricity
Hold CstGeneration same magnitude (V is followed in couplingref-V’dt) variation, T1 opens and drives OLED luminous, owing to carrying out in the t2 stage
Valve value compensation, in the impact of threshold voltage of the light emitting step T1 of t3 stage OLED.
Further, with reference to the image element circuit shown in Fig. 6, also include and RcT6 in parallel.Wherein T6 is by EM control, at t3
Stage is in the conduction state, in this scenario, and RcOnly T6 cut-off or State Transferring moment work, can avoid T6 turn off or
The risk of instability that State Transferring moment b node potential floating causes.When this external image element circuit enters glow phase t3, still
Replacement b node potential, R is pulled by T6cFunction is only limitted in T6 state conversion process, or plays Stabilization during T6 cut-off, keeps away
Exempt from b node floating.
In the display floater comprising above-mentioned image element circuit, determine based on following factor about clamp resistance Rc resistance:
Wherein, b node potential is that the pixel intensity signal Vdt driving IC (DrIC) to export is at charging circuit internal resistance (Rin) and
Clamp resistance (Rc) series loop that formed is in dividing potential drop V of b node 'dt, therefore V 'dtCan be affected by many factors.
First aspect, RinFor the circuit internal resistance before the first end of energy-storage units in image element circuit, i.e. RinFor DrIC to b
The resistance of node, including resistance on data wire, T4 conducting resistance.If DrIC T4 turn on before at data wire (data
Line) have input pixel intensity signal (V ondt), and on data wire, parasitic capacitance is much larger than picture element signal holding capacitor Cst
Time, VdtAblation process is effectively equivalent to data wire parasitic capacitance to electric capacity CstCharging, at this moment internal charging resistance RinMain by T4's
Conducting resistance is constituted.In view of RinAnd RcV ' can be caused in technologic discretenessdtUncertain, impact display (brightness) precision.
For making up this defect, R can setcDuring resistance, make Rc>>Rin, partial pressure potential can be close to driving source signal current potential, so
Just can suppress the impact of resistance discreteness.
Second aspect, excessive RcB node potential can be affected when entering glow phase again and be pulled to VrefAnd the week of clamper
Phase.When this cycle is at frame period (TframeWhen ratio shared by) can not be ignored, will be because of its discreteness impact display (brightness)
Precision.For guaranteeing to show (brightness) precision, it is desirable to RcPull the clamper cycle the shortest b node, (in terms of equivalent circuit, b point
When current potential pulls replacement, it is effectively equivalent to VrefPass through RcTo CpB、CstAnd CpAThe capacitance network charging constituted) at CstIt is much larger than
A point parasitic capacitance CpAParasitic capacitance C with b pointpB, network capacitance value approximates two parasitic capacitances CpB、CpASum.So, fill
Electrical time constant
τ≈Rc*(CpA+CpB)
As long as charge constant τ is much smaller than frame period Tframe, i.e.
Rc<<Tframe/(CpA+CpB)
Then because of RcThe replacement of b point current potential the impact of the time discrete of clamper that discreteness causes will be suppressed.
Different situations, as the factors such as different technological levels, screen size and resolution can affect the restriction meeting to Rc
Difference, needs to be optimized according to actual effect, balances above-mentioned both sides and limits.Embodiment of the present utility model provides
A kind of array base palte, any pixel circuit provided including above-described embodiment.Embodiment of the present utility model provides one display
Panel, any pixel circuit provided including above-described embodiment.
Embodiment of the present utility model provides a kind of display device, including above-mentioned display floater.Here display device
Can be: any tools such as Electronic Paper, mobile phone, panel computer, television set, display, notebook computer, DPF, navigator
There are product or the parts of display function.
The above, detailed description of the invention the most of the present utility model, but protection domain of the present utility model does not limit to
In this, any those familiar with the art, in the technical scope that this utility model discloses, can readily occur in change
Or replace, all should contain within protection domain of the present utility model.Therefore, protection domain of the present utility model should be with described power
The protection domain that profit requires is as the criterion.
Claims (20)
1. an image element circuit, it is characterised in that including: clamp voltage unit, driver element, energy-storage units and reference voltage
End；
Described clamp voltage unit connects described reference voltage end and the first end of described energy-storage units, the of described energy-storage units
Two ends connect described driver element, and provide signal to described driver element；
Wherein, described clamp voltage unit, it is used for forming bleeder circuit, in described image element circuit, the first end of energy-storage units divides
Pressure, or the current potential of the first end of energy-storage units in described image element circuit is pulled and clamper is at the electricity of described reference voltage end
Flat.
Image element circuit the most according to claim 1, it is characterised in that described clamp voltage unit includes clamp resistance, institute
The first end stating clamp resistance connects described reference voltage end, and the second end of described clamp resistance connects the one of described energy-storage units
End.
Image element circuit the most according to claim 2, it is characterised in that described clamp resistance can by following any
Mode makes:
Ion implanting low-temperature polysilicon film is formed；
Or, use the thin-film material with predetermined sheet resistance resistance to be formed；
Or, concurrently forming with the active layer doped region of the transistor in image element circuit, the active layer of wherein said transistor is mixed
The doping particle implantation dosage in miscellaneous region is more than the doping particle implantation dosage in the resistance film region of described clamp resistance.
Image element circuit the most according to claim 1, it is characterised in that also include: reset unit；
Described reset unit connects reseting controling end, the second end of described energy-storage units and resetting voltage end, in the control that resets
Under the control of end processed, the signal of described resetting voltage end is write the second end of described energy-storage units.
Image element circuit the most according to claim 1, it is characterised in that also include: data write unit；
Described data write unit connects data signal end, data write controls end and the first end of described energy-storage units, is used for
Under the control that the write of described data controls end, the dividing potential drop of the signal of described data signal end is write the of described energy-storage units
One end.
Image element circuit the most according to claim 1, it is characterised in that also include: compensating unit；
Described compensating unit connects data write and controls end, the second end of described energy-storage units, driving node, at described number
Control according to write to be pulled together with described driving node by the level of the second end of described energy-storage units under the control of end.
Image element circuit the most according to claim 1, it is characterised in that also include: driver element；
Described driver element connects the first level terminal, the second end of energy-storage units and driving node, at described energy-storage units
The second end and described first level terminal control under to described driving node output drive signal.
Image element circuit the most according to claim 7, it is characterised in that also include: luminescence unit；
Described luminescence unit connects LED control signal end, driving node and second electrical level end, for believing in described light emitting control
Number end controls the lower driving signal receiving described driving node, and shows GTG under described driving signal controls.
Image element circuit the most according to claim 1, it is characterised in that described clamp voltage unit is also connected with light emitting control letter
Number end, under the control of described LED control signal end by the of the level of described reference voltage end and described energy-storage units
One end pulls together.
Image element circuit the most according to claim 4, it is characterised in that described reset unit includes transistor seconds, described
The control end of transistor seconds connects described reseting controling end, and the first end of described transistor seconds connects described resetting voltage
End, the second end of described transistor seconds connects the second end of described energy-storage units.
11. image element circuits according to claim 5, it is characterised in that described data write unit includes the 4th transistor,
The control end of described 4th transistor connects the write of described data and controls end, and the first end of described 4th transistor connects described number
According to signal end, the second end of described 4th transistor connects the first end of described energy-storage units.
12. image element circuits according to claim 6, it is characterised in that described compensating unit includes third transistor, described
The control end of third transistor connects the write of described data and controls end, and the first end of described third transistor connects described driving joint
Point, the second end of described third transistor connects the second end of described energy-storage units.
13. image element circuits according to claim 7, it is characterised in that described driver element includes the first transistor, wherein
The end that controls of described the first transistor connects the second end of described energy-storage units, and the first end of described the first transistor connects described
First level terminal, the second end of described the first transistor connects described driving node.
14. image element circuits according to claim 8, it is characterised in that described luminescence unit includes the 5th transistor and has
Machine light emitting diode, the control end of wherein said 5th transistor connects LED control signal end, the of described 5th transistor
One end connect driving node, described 5th transistor second end connect described Organic Light Emitting Diode the first pole, described in have
Second pole of machine light emitting diode connects described second electrical level end.
15. image element circuits according to claim 1, it is characterised in that described energy-storage units includes electric capacity, described electric capacity
First pole connects the second end of described energy-storage units, and the second pole of described electric capacity connects the first end of described energy-storage units.
16. image element circuits according to claim 9, it is characterised in that described clamp voltage unit include clamp resistance and
6th transistor, the first end of described clamp resistance connects described reference voltage end, and the second end of described clamp resistance connects institute
State the first end of energy-storage units；The control end of described 6th transistor connects described LED control signal end, described 6th crystal
First end of pipe connects described reference voltage end, and the second end of described 6th transistor connects the first end of described energy-storage units.
17. 1 kinds of array base paltes, it is characterised in that include the image element circuit as described in any one of claim 1-16.
18. 1 kinds of display floaters, it is characterised in that include the image element circuit described in any one of claim 1-16.
19. display floaters according to claim 18, it is characterised in that described clamp voltage unit includes clamp resistance
Time,
Described clamp resistance meets following condition: Rc > > Rin；Wherein Rc is the internal resistance of described clamp resistance, and described Rin is described
Circuit internal resistance before first end of energy-storage units described in image element circuit；
And/or
Described clamp resistance meets following condition: Rc < < Tframe/ (CpA+CpB)；Wherein Rc is the internal resistance of described clamp resistance,
In the Tframe frame period, CpA is the parasitic capacitance of the second end of described energy-storage units, and CpB is the second end of described energy-storage units
Parasitic capacitance.
20. 1 kinds of display devices, it is characterised in that including: the display floater described in claim 18 or 19.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620281830.0U CN205722741U (en) | 2016-04-06 | 2016-04-06 | A kind of image element circuit, array base palte, display floater and display device |
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| CN201620281830.0U CN205722741U (en) | 2016-04-06 | 2016-04-06 | A kind of image element circuit, array base palte, display floater and display device |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105679250A (en) * | 2016-04-06 | 2016-06-15 | 京东方科技集团股份有限公司 | Pixel circuit and driving method thereof, array substrate, display panel and display device |
| CN106782324A (en) * | 2017-02-17 | 2017-05-31 | 京东方科技集团股份有限公司 | Image element circuit and its driving method, display device |
-
2016
- 2016-04-06 CN CN201620281830.0U patent/CN205722741U/en active Active
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105679250A (en) * | 2016-04-06 | 2016-06-15 | 京东方科技集团股份有限公司 | Pixel circuit and driving method thereof, array substrate, display panel and display device |
| WO2017173822A1 (en) * | 2016-04-06 | 2017-10-12 | Boe Technology Group Co., Ltd. | Pixel circuit and driving method, array substrate, display panel, and display device |
| CN105679250B (en) * | 2016-04-06 | 2019-01-18 | 京东方科技集团股份有限公司 | A kind of pixel circuit and its driving method, array substrate, display panel and display device |
| US10276100B2 (en) | 2016-04-06 | 2019-04-30 | Boe Technology Group Co., Ltd. | Pixel circuit and driving method, array substrate, display panel, and display device |
| CN106782324A (en) * | 2017-02-17 | 2017-05-31 | 京东方科技集团股份有限公司 | Image element circuit and its driving method, display device |
| WO2018149122A1 (en) * | 2017-02-17 | 2018-08-23 | 京东方科技集团股份有限公司 | Pixel circuit and driving method thereof, and display device |
| US10431156B2 (en) | 2017-02-17 | 2019-10-01 | Boe Technology Group Co., Ltd. | Pixel circuit and driving method thereof and display device |
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