CN204992755U - Be applied to uninterrupted power source's (UPS) static on -off control cabinet of novel dual supply - Google Patents
Be applied to uninterrupted power source's (UPS) static on -off control cabinet of novel dual supply Download PDFInfo
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- CN204992755U CN204992755U CN201520716816.4U CN201520716816U CN204992755U CN 204992755 U CN204992755 U CN 204992755U CN 201520716816 U CN201520716816 U CN 201520716816U CN 204992755 U CN204992755 U CN 204992755U
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Abstract
The utility model provides a be applied to uninterrupted power source's (UPS) static on -off control cabinet of novel dual supply, include: a control circuit arranged in the inner cavity of th, control circuit includes first NAND gate chip U1, second NAND gate chip U2, third NAND gate chip U3, first anticoincidence gate chip U4, second anticoincidence gate chip U5, resistance R4 and diode D4. A detection circuitry detects the high level, first NAND gate chip U1 truns into the high level to low level output, and through second NAND gate chip U2 output high level once more, the high level is received and second input ground connection receipt low level to first anticoincidence gate chip U4's first input end, first anticoincidence gate chip U4 output high level, make a switch circuit trigger the closure, the low level that detects was received to second anticoincidence gate chip U5's first input end receipt high level and second input between the 2nd detection circuitry, second anticoincidence gate chip U5 output high level, the 3rd NAND gate chip U3 truns into the high level to low level output, make the 2nd switch circuit receive the low level, thereby trigger the disconnection, the automatic switch -over of dual supply has been realized.
Description
Technical field
The utility model relates to a kind of novel duplicate-power static switch control cubicle being applied to uninterrupted power supply (ups) Unity.
Background technology
UPS(UninterruptiblePowerSystem/UninterruptiblePowerSuppl y, uninterrupted power supply) be machine room uninterrupted power supply, be the important ring maintaining normal operation in machine room.When power distribution cabinet breaks down, need UPS to be switched on power supply circuits as soon as possible, or UPS breaks down, mains-supplied can be switched at once, prevent device powers down from causing damage.Existing duplicate supply switch speed is difficult to ensure, makes the device powers down time longer, causes heavy losses.
Utility model content
The purpose of this utility model is the defect overcoming prior art, provides a kind of novel duplicate-power static switch control cubicle being applied to uninterrupted power supply (ups) Unity, when breaking down, can switch power supply rapidly, avoiding causing heavy losses.
The utility model is achieved in that a kind of novel duplicate-power static switch control cubicle being applied to uninterrupted power supply (ups) Unity, and it comprises:
First testing circuit, second testing circuit, first switching circuit, second switch circuit and control circuit, described control circuit respectively with described first testing circuit, described second testing circuit, described first switching circuit, described second switch circuit connects, described control circuit comprises the first NAND gate chip U1, second NAND gate chip U2, 3rd NAND gate chip U3, first XOR gate chip U4, second XOR gate chip U5, resistance R4 and diode D4, the input of described first NAND gate chip U1 is connected with the first testing circuit, the output of described first NAND gate chip U1 is connected with the input of described second NAND gate chip U2, and the input of described second NAND gate chip U2 is by resistance R4 ground connection, the output of described second NAND gate chip U2 respectively with the first input end of described first XOR gate chip U4, the input of described 3rd NAND gate chip U3 and the first input end of described second XOR gate chip U5 connect, second input end grounding of described first XOR gate chip U4, the output of described first XOR gate chip U4 is connected with described first switching circuit, second input of described second XOR gate chip U5 is connected with described second testing circuit, the output of described second XOR gate chip U5 is connected with described second switch circuit, the output of described 3rd NAND gate chip U3 is connected with the negative pole of diode D4, the positive pole of described diode D4 is connected with described second switch circuit.
In one embodiment, also comprise resistance R2, electric capacity C2 and diode D2, the output of described second NAND gate chip U2 is connected with the negative pole of described diode D2 and one end of described resistance R2 respectively, the positive pole of described diode D2 and the other end of described resistance R2 are connected with the first input end of described first XOR gate chip U4, and the other end of described resistance R2 is by electric capacity C2 ground connection.
In one embodiment, also comprise resistance R3, electric capacity C3 and diode D3, the output of described second NAND gate chip U2 connects respectively at the positive pole of described diode D3 and one end of described resistance R3, the negative pole of described diode D3 and the other end of described resistance R3 are connected with the first input end of described second XOR gate chip U5, and the other end of described resistance R3 is by electric capacity C3 ground connection.
In one embodiment, also comprise resistance R5, the output of described second XOR gate chip U5 is connected with described second switch circuit by resistance R5.
A kind of beneficial effect being applied to the novel duplicate-power static switch control cubicle of uninterrupted power supply (ups) Unity that the utility model provides is: the first testing circuit detects high level, first NAND gate chip U1 transfers high level to low level output, and again export high level through the second NAND gate chip U2, the first input end of the first XOR gate chip U4 receives high level and the second input end grounding receives low level, first XOR gate chip U4 exports high level, first switching circuit is triggered closed, the first input end of the second XOR gate chip U5 receives high level and the second input receives the low level detected between the second testing circuit, second XOR gate chip U5 exports high level, and high level is transferred to low level output by the 3rd NAND gate chip U3, second switch circuit is made finally to receive low level, thus trigger disconnection.The automatic switchover of duplicate supply is achieved with this.
Accompanying drawing explanation
In order to be illustrated more clearly in the utility model embodiment or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only embodiments more of the present utility model, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is a kind of novel duplicate-power static switch control cubicle schematic diagram being applied to uninterrupted power supply (ups) Unity of the utility model embodiment.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, be clearly and completely described the technical scheme in the utility model embodiment, obviously, described embodiment is only the utility model part embodiment, instead of whole embodiments.Based on the embodiment in the utility model, those of ordinary skill in the art are not making other embodiments all obtained under creative work prerequisite, all belong to the scope of the utility model protection.
As shown in Figure 1, a kind of novel duplicate-power static switch control cubicle being applied to uninterrupted power supply (ups) Unity of the utility model embodiment comprises:
First testing circuit, second testing circuit, first switching circuit, second switch circuit and control circuit, described control circuit respectively with described first testing circuit, described second testing circuit, described first switching circuit, described second switch circuit connects, described control circuit comprises the first NAND gate chip U1, second NAND gate chip U2, 3rd NAND gate chip U3, first XOR gate chip U4, second XOR gate chip U5, resistance R4 and diode D4, the input of described first NAND gate chip U1 is connected with the first testing circuit, the output of described first NAND gate chip U1 is connected with the input of described second NAND gate chip U2, and the input of described second NAND gate chip U2 is by resistance R4 ground connection, the output of described second NAND gate chip U2 respectively with the first input end of described first XOR gate chip U4, the input of described 3rd NAND gate chip U3 and the first input end of described second XOR gate chip U5 connect, second input end grounding of described first XOR gate chip U4, the output of described first XOR gate chip U4 is connected with described first switching circuit, second input of described second XOR gate chip U5 is connected with described second testing circuit, the output of described second XOR gate chip U5 is connected with described second switch circuit, the output of described 3rd NAND gate chip U3 is connected with the negative pole of diode D4, the positive pole of described diode D4 is connected with described second switch circuit.
Whether such as, described first testing circuit is main power detection circuit, and the second testing circuit is standby power detection circuit, be respectively used to detect main power supply and power normally for power supply, if power supply is normal, then exports high level, otherwise, output low level; Described first switching circuit is main electric switch, and for closing or disconnect the power supply of main electricity, described second switch circuit is standby electric switch, for the closed or standby electric power supply of disconnection.
When main electricity work, need to cut off standby power supply, the course of work is as follows: the first testing circuit detects high level, first NAND gate chip U1 transfers high level to low level output, and again export high level through the second NAND gate chip U2, the first input end of the first XOR gate chip U4 receives high level and the second input end grounding receives low level, first XOR gate chip U4 exports high level, first switching circuit is triggered closed, the first input end of the second XOR gate chip U5 receives high level and the second input receives the low level detected between the second testing circuit, second XOR gate chip U5 exports high level, and high level is transferred to low level output by the 3rd NAND gate chip U3, second switch circuit is made finally to receive low level, thus trigger disconnection.
When standby electricity work, need to cut off main power supply, the course of work is as follows: the first testing circuit detects low level, first NAND gate chip U1 transfers low level to high level output, and through the second NAND gate chip U2 output low level again, the first input end of the first XOR gate chip U4 and the second input termination receive low level respectively, thus output low level, first switch triggering is disconnected, the first input end of the second XOR gate chip U5 receives low level and the second input receives the high level detected between the second testing circuit, second XOR gate chip U5 exports high level, and low level is transferred to high level output by the 3rd NAND gate chip U3, second switch circuit is made finally to receive high level, thus trigger closed.
The automatic switchover of duplicate supply is achieved by said process.
Such as, the first NAND gate chip U1, the second NAND gate chip U2, the 3rd NAND gate chip U3 are respectively CD4093 chip, and the first XOR gate chip U4 and the second XOR gate chip U5 is respectively CD4030 chip.
In order to avoid main electricity and standby TURP change too fast, cause main electricity and standby electricity to work simultaneously, cause short circuit, in one embodiment, the utility model also comprises resistance R2, electric capacity C2, diode D2, resistance R3, electric capacity C3 and diode D3, the output of described second NAND gate chip U2 is connected with the negative pole of described diode D2 and one end of described resistance R2 respectively, the positive pole of described diode D2 and the other end of described resistance R2 are connected with the first input end of described first XOR gate chip U4, the other end of described resistance R2 is by electric capacity C2 ground connection, the output of described second NAND gate chip U2 connects respectively at the positive pole of described diode D3 and one end of described resistance R3, the negative pole of described diode D3 and the other end of described resistance R3 are connected with the first input end of described second XOR gate chip U5, the other end of described resistance R3 is by electric capacity C3 ground connection.
When main electricity work, when needing to cut off standby power supply, the high level that second NAND gate exports charges through electric capacity C2, until diode D2 is breakdown, thus make the first input end of the first XOR gate chip U4 receive high level, electric capacity C2 charges to the breakdown needs number millisecond of diode D2, postpone the high level output of the first XOR gate chip U4, second switch circuit triggers is made to disconnect latter several milliseconds, first switching circuit is just closed, avoid the situation that the first switching circuit and second switch circuit close simultaneously, avoid main electricity and standby electricity to power simultaneously, avoid short circuit to produce.In like manner, when standby electricity work, when needing to cut off main power supply, the low level that second NAND gate exports is charged through electric capacity C3, until diode D3 is by low level conducting, thus make the first input end of the second XOR gate chip U5 receive low level, electric capacity C3 charges to diode D3 conducting needs several milliseconds, be delayed the high level output of the second XOR gate chip U5, first switching circuit is triggered and disconnects latter several milliseconds, second switch circuit is just closed, avoids main electricity and standby electricity to power simultaneously, avoids short circuit and produce.
In one embodiment, also comprise resistance R5, the output of described second XOR gate chip U5 is connected with described second switch circuit by resistance R5.
The foregoing is only preferred embodiment of the present utility model; not in order to limit the utility model; all within spirit of the present utility model and principle, any amendment done, equivalent replacement, improvement etc., all should be included within protection range of the present utility model.
Claims (4)
1. one kind is applied to the novel duplicate-power static switch control cubicle of uninterrupted power supply (ups) Unity, it is characterized in that, comprise: the first testing circuit, second testing circuit, first switching circuit, second switch circuit and control circuit, described control circuit respectively with described first testing circuit, described second testing circuit, described first switching circuit, described second switch circuit connects, described control circuit comprises the first NAND gate chip U1, second NAND gate chip U2, 3rd NAND gate chip U3, first XOR gate chip U4, second XOR gate chip U5, resistance R4 and diode D4, the input of described first NAND gate chip U1 is connected with the first testing circuit, the output of described first NAND gate chip U1 is connected with the input of described second NAND gate chip U2, and the input of described second NAND gate chip U2 is by resistance R4 ground connection, the output of described second NAND gate chip U2 respectively with the first input end of described first XOR gate chip U4, the input of described 3rd NAND gate chip U3 and the first input end of described second XOR gate chip U5 connect, second input end grounding of described first XOR gate chip U4, the output of described first XOR gate chip U4 is connected with described first switching circuit, second input of described second XOR gate chip U5 is connected with described second testing circuit, the output of described second XOR gate chip U5 is connected with described second switch circuit, the output of described 3rd NAND gate chip U3 is connected with the negative pole of diode D4, the positive pole of described diode D4 is connected with described second switch circuit.
2. a kind of novel duplicate-power static switch control cubicle being applied to uninterrupted power supply (ups) Unity as claimed in claim 1, it is characterized in that: also comprise resistance R2, electric capacity C2 and diode D2, the output of described second NAND gate chip U2 is connected with the negative pole of described diode D2 and one end of described resistance R2 respectively, the positive pole of described diode D2 and the other end of described resistance R2 are connected with the first input end of described first XOR gate chip U4, and the other end of described resistance R2 is by electric capacity C2 ground connection.
3. a kind of novel duplicate-power static switch control cubicle being applied to uninterrupted power supply (ups) Unity as claimed in claim 1, it is characterized in that: also comprise resistance R3, electric capacity C3 and diode D3, the output of described second NAND gate chip U2 connects respectively at the positive pole of described diode D3 and one end of described resistance R3, the negative pole of described diode D3 and the other end of described resistance R3 are connected with the first input end of described second XOR gate chip U5, and the other end of described resistance R3 is by electric capacity C3 ground connection.
4. a kind of novel duplicate-power static switch control cubicle being applied to uninterrupted power supply (ups) Unity as claimed in claim 3, it is characterized in that: also comprise resistance R5, the output of described second XOR gate chip U5 is connected with described second switch circuit by resistance R5.
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CN201520716816.4U CN204992755U (en) | 2015-09-15 | 2015-09-15 | Be applied to uninterrupted power source's (UPS) static on -off control cabinet of novel dual supply |
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CN201520716816.4U CN204992755U (en) | 2015-09-15 | 2015-09-15 | Be applied to uninterrupted power source's (UPS) static on -off control cabinet of novel dual supply |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106532835A (en) * | 2016-12-06 | 2017-03-22 | 湖北大学 | Charging device and charger |
CN112269332A (en) * | 2020-09-29 | 2021-01-26 | 宇龙计算机通信科技(深圳)有限公司 | Microcontroller system circuit and electronic device |
-
2015
- 2015-09-15 CN CN201520716816.4U patent/CN204992755U/en not_active Expired - Fee Related
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106532835A (en) * | 2016-12-06 | 2017-03-22 | 湖北大学 | Charging device and charger |
CN106532835B (en) * | 2016-12-06 | 2019-04-09 | 湖北大学 | Charging unit and charger |
CN112269332A (en) * | 2020-09-29 | 2021-01-26 | 宇龙计算机通信科技(深圳)有限公司 | Microcontroller system circuit and electronic device |
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C14 | Grant of patent or utility model | ||
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CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160120 Termination date: 20200915 |
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CF01 | Termination of patent right due to non-payment of annual fee |