CN204287637U - Array substrate, display panel and display device - Google Patents
Array substrate, display panel and display device Download PDFInfo
- Publication number
- CN204287637U CN204287637U CN201420696337.6U CN201420696337U CN204287637U CN 204287637 U CN204287637 U CN 204287637U CN 201420696337 U CN201420696337 U CN 201420696337U CN 204287637 U CN204287637 U CN 204287637U
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- calibrating terminal
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- display panel
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- 239000000758 substrate Substances 0.000 title claims abstract description 18
- 230000002093 peripheral effect Effects 0.000 claims abstract description 7
- 238000005401 electroluminescence Methods 0.000 claims description 2
- 238000000034 method Methods 0.000 description 3
- 239000000523 sample Substances 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 230000000007 visual effect Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 1
- 210000005069 ears Anatomy 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000011056 performance test Methods 0.000 description 1
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Abstract
本实用新型公开了一种阵列基板，包括衬底，所述衬底具有显示区域和围绕所述显示区域的外围区域；设置在所述外围区域，所述焊盘测试区包括至少两个用于与外部连接端子电连接的测试端子，所述测试端子用于接收所述测试柔性电路板输出的测试信号，所述测试端子是条形的连接衬垫。本实用新型实施例还提供一种显示面板，包括如上所述的阵列基板，以及与所述显示基板相对设置的对向基板。本实用新型提供的条形测试端子的长、宽和间距比较小，并且与FPC pad相邻设置，能够减小VT pad在面板上的空间面板，从而能够实现窄边框。
The utility model discloses an array substrate, which comprises a substrate, the substrate has a display area and a peripheral area surrounding the display area; the pad test area includes at least two A test terminal electrically connected to the external connection terminal, the test terminal is used to receive the test signal output by the test flexible circuit board, and the test terminal is a strip-shaped connection pad. An embodiment of the present invention also provides a display panel, including the above-mentioned array substrate, and an opposite substrate disposed opposite to the display substrate. The strip test terminal provided by the utility model has relatively small length, width and spacing, and is arranged adjacent to the FPC pad, which can reduce the space panel of the VT pad on the panel, thereby realizing a narrow frame.
Description
Technical field
The utility model relates to flat panel display, particularly a kind of array base palte, and comprises the display panel of this array base palte, and comprises the display device of this display panel.
Background technology
Display panel is widely used in mobile phone, palm PC (Personal DigitalAssistant at present, etc. PDA) in portable type electronic product, such as: Thin Film Transistor-LCD (Thin Film Transistor-Liquid Crystal Display, TFT-LCD), organic light emitting diode display (Organic LightEmitting Diode, OLED), low temperature polycrystalline silicon (LowTemperature Poly-silicon, LTPS) display and plasma scope (PlasmaDisplay Panel, PDP) etc.Under the promotion of market competition, lighter, that display effect is more superior, price is lower display device receives more and more to be pursued.
In the technological process making thin-film transistor LCD device, prepare complete needs when display panel to test the performance of display panel, visual test pads (Visual Text pad is provided with above display panel, VT pad), carry out counter plate by the VT pad input test signal on counter plate and carry out performance test, this test mode is VT test, the method of what current VT test adopted is probe test, at the step place of panel design VT pad, by the voltage signal of probe input test picture.As shown in Figure 1, display panel 11 is provided with VT pad 12 and flexible PCB splicing ear 13 above, compared with flexible PCB splicing ear (FPC pad) 13, due to will probe test be adopted, the length of usual VT pad can be designed to 900 μm, wide is 600 μm, spacing between VT pad is 300 μm, such VT pad is very large, usually the white space outside panel step place flexible PCB splicing ear (FPC pad) and IC splicing ear (IC pad) can be arranged on, thus spatial area very large on panel can be occupied, be unfavorable for like this realizing narrow frame.
Summary of the invention
The utility model embodiment provides a kind of array base palte, and comprises the display panel of this array base palte, and comprises the display device of this display panel.
In view of this, the utility model embodiment provides a kind of array base palte, comprises substrate, and described substrate has viewing area and the outer peripheral areas around described viewing area;
Be arranged on described outer peripheral areas, described pad test section comprises at least two calibrating terminals for being electrically connected with external connection terminals, the test signal that described calibrating terminal exports for receiving described test flexible PCB, described calibrating terminal is the connection liner of bar shaped.
The utility model embodiment also provides a kind of display panel, comprises array base palte as above, and the subtend substrate be oppositely arranged with described display base plate.
The utility model embodiment also provides a kind of display device, comprises display panel as above and panel flexible PCB.
Length and width and the spacing of the bar shaped calibrating terminal that the utility model provides are smaller, and are disposed adjacent with FPC pad, can reduce the space panel of VT pad on panel, thus can realize narrow frame.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme in the utility model embodiment, below the accompanying drawing used required in describing embodiment is briefly described, apparently, accompanying drawing in the following describes is only embodiments more of the present utility model, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the schematic diagram of the display panel that prior art provides;
Fig. 2 is the schematic diagram of the array base palte that the utility model embodiment provides;
Fig. 3 is the structural representation of the calibrating terminal that the utility model embodiment provides.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, be clearly and completely described the technical scheme in the utility model embodiment, obviously, described embodiment is only the utility model part embodiment, instead of whole embodiments.Based on the embodiment in the utility model, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the utility model protection.
The utility model embodiment provides a kind of array base palte, comprises substrate 1, and described substrate has viewing area 2 and the outer peripheral areas 3 around described viewing area;
Pad test section 4 is arranged on described outer peripheral areas 3, described pad test section 4 comprises at least two calibrating terminals be electrically connected with external connection terminals 5, and at least two splicing ears 6 be electrically connected with panel flexible PCB, the test signal that described calibrating terminal 5 exports for receiving described test flexible PCB, the display that described splicing ear 6 exports for receiving described panel flexible PCB, described calibrating terminal and described splicing ear are the connection liners of bar shaped, and described calibrating terminal is disposed adjacent with described splicing ear.
As can be seen from Figure 2, described calibrating terminal 5 is arranged in order along described edges of substrate with described splicing ear 6, and Fig. 3 is the structural representation of the calibrating terminal that the utility model embodiment provides, as can be seen from Figure 3, the wide of described calibrating terminal 5 is a, and the length of described calibrating terminal is b, and the spacing between described calibrating terminal is c, wherein a+c >=120 μm, a >=60 μm, b >=700 μm, c >=40 μm, relatively preferably a is 80 μm, and c is 40 μm.
In embodiment of the present utility model, described calibrating terminal comprises the Gate Even calibrating terminal of the Data R calibrating terminal of reception first data-signal, the Data G calibrating terminal receiving the second data-signal, the DataB calibrating terminal receiving the 3rd data-signal, the COM calibrating terminal receiving common signal, the Switch calibrating terminal receiving test signal, the Gate Odd calibrating terminal receiving odd gates signal, reception even gate signal.
Wherein, described calibrating terminal also comprises the CKB calibrating terminal receiving the STV calibrating terminal of trigger pip, the CLK calibrating terminal of receive clock signal or receive reverse clock signal.
The embodiment of the present invention provides a kind of display panel, comprises array base palte as above, and the subtend substrate be oppositely arranged with described display base plate.Described display panel is for being circle, triangle, quadrilateral, pentagon, hexagon, heptagon or octagon.
The utility model provides a kind of display device, comprise display panel as above and panel flexible PCB, described display panel comprises odd gates signal wire, even gate signal wire, the first data signal line be electrically connected with red pixel, the second data signal line be electrically connected with green pixel, the 3rd data signal line and the common signal line that be electrically connected with blue pixel.Described odd gates signal wire is electrically connected with described Gate Odd calibrating terminal, described even gate signal wire is electrically connected with described Gate Even calibrating terminal, Data R calibrating terminal electrical connection described in described first data signal line, described second data-signal is electrically connected with described Data G calibrating terminal, described 3rd signal wire is electrically connected with described Data B calibrating terminal, and described common signal line is electrically connected with described COM calibrating terminal; These are only a kind of embodiment of the present utility model, embodiment of the present utility model is not limited to odd gates signal wire to be electrically connected with described Gate Odd calibrating terminal, and even gate signal wire is electrically connected this kind of test pattern with described Gate Even calibrating terminal.
Test flexible PCB is provided with the splicing ear corresponding with the calibrating terminal on display panel, described calibrating terminal is electrically connected with the splicing ear on test flexible PCB, and then time display panel is electrically connected with test flexible PCB, test flexible PCB provides detection signal to display panel, and then the performance of panel is judged by the display situation of display panel, after VT test terminates, test flexible PCB is separated with display panel; Functional when VT test result display panel, then bind panel flexible PCB and display panel, panel flexible PCB be electrically connected with display panel.
The splicing ear be electrically connected with described panel flexible PCB comprises the CKB splicing ear exporting the STV splicing ear of trigger pip, the CLK splicing ear of clock signal and export reverse clock signal; The STV splicing ear of described output trigger pip is electrically connected with the STV calibrating terminal of described reception trigger pip, the CLK splicing ear of described clock signal is electrically connected with the CLK calibrating terminal of described receive clock signal, and the CKB splicing ear of the reverse clock signal of described output is electrically connected with the CKB calibrating terminal of the reverse clock signal of described reception.In embodiment of the present utility model, receive the STV calibrating terminal of trigger pip, the CLK calibrating terminal of receive clock signal or receive reverse clock signal CKB calibrating terminal can first with test flexible PCB be electrically connected, after display panel is completed, display panel be electrically connected be separated with test flexible PCB, and the reception STV calibrating terminal of trigger pip, the CLK calibrating terminal of receive clock signal or the CKB calibrating terminal that receives reverse clock signal are electrically connected with panel flexible PCB.Namely the CKB calibrating terminal receiving the STV calibrating terminal of trigger pip, the CLK calibrating terminal of receive clock signal or receive reverse clock signal both may be used for panel test and also may be used for Display panel.
In the utility model embodiment, described display panel is organic electroluminescence display panel or display panels.
Length and width and the spacing of the bar shaped calibrating terminal that the utility model provides are smaller, and are disposed adjacent with FPC pad, can reduce the space panel of VT pad on panel, thus can realize narrow frame.
Above to a kind of array base palte that the utility model embodiment provides, and comprise the display panel of this array base palte, and the display device comprising this display panel is described in detail, apply specific case herein to set forth principle of the present utility model and embodiment, the explanation of above embodiment just understands method of the present utility model and core concept thereof for helping; Meanwhile, for one of ordinary skill in the art, according to thought of the present utility model, all will change in specific embodiments and applications, in sum, this description should not be construed as restriction of the present utility model.
Claims (10)
1. an array base palte, comprises substrate, and described substrate has viewing area and the outer peripheral areas around described viewing area;
Pad test section is arranged on described outer peripheral areas, described pad test section comprises at least two calibrating terminals for being electrically connected with external connection terminals, the test signal that described calibrating terminal exports for receiving described test flexible PCB, described calibrating terminal is the connection liner of bar shaped.
2. array base palte according to claim 1, it is characterized in that, described calibrating terminal is arranged in order along described edges of substrate, the wide of described calibrating terminal is a, and the length of described calibrating terminal is b, and the spacing between described calibrating terminal is c, wherein a+c >=120 μm, a >=60 μm, b >=700 μm, c >=40 μm.
3. array base palte according to claim 1, it is characterized in that, described calibrating terminal comprises the Gate Even calibrating terminal of the DataR calibrating terminal of reception first data-signal, the Data G calibrating terminal receiving the second data-signal, the DataB calibrating terminal receiving the 3rd data-signal, the COM calibrating terminal receiving common signal, the Switch calibrating terminal receiving test signal, the Gate Odd calibrating terminal receiving odd gates signal, reception even gate signal.
4. array base palte according to claim 3, is characterized in that, described calibrating terminal also comprises the CKB calibrating terminal receiving the STV calibrating terminal of trigger pip, the CLK calibrating terminal of receive clock signal or receive reverse clock signal.
5. a display panel, comprises the array base palte as described in any one of claim 1-5, and the subtend substrate be oppositely arranged with described display base plate.
6. display panel described according to claim 5, is characterized in that, described display panel is for being circle, triangle, quadrilateral, pentagon, hexagon, heptagon or octagon.
7. a display device, is characterized in that, comprises display panel according to claim 5 and panel flexible PCB.
8. display device according to claim 7, it is characterized in that, described display panel comprises odd gates signal wire, even gate signal wire, the first data signal line be electrically connected with red pixel, the second data signal line be electrically connected with green pixel, the 3rd data signal line and the common signal line be electrically connected with blue pixel, described odd gates signal wire is electrically connected with Gate Odd calibrating terminal, described even gate signal wire is electrically connected with Gate Even calibrating terminal, described first data signal line is electrically connected with Data R calibrating terminal, described second data-signal is electrically connected with Data G calibrating terminal, described 3rd signal wire is electrically connected with Data B calibrating terminal, described common signal line is electrically connected with COM calibrating terminal.
9. display device according to claim 7, it is characterized in that, the splicing ear be electrically connected with described panel flexible PCB comprises the CKB splicing ear exporting the STV splicing ear of trigger pip, the CLK splicing ear of clock signal and export reverse clock signal; The STV splicing ear of described output trigger pip is electrically connected with the STV calibrating terminal of described reception trigger pip, the CLK splicing ear of described clock signal is electrically connected with the CLK calibrating terminal of described receive clock signal, and the CKB splicing ear of the reverse clock signal of described output is electrically connected with the CKB calibrating terminal of the reverse clock signal of described reception.
10. display device according to claim 7, is characterized in that, described display panel is organic electroluminescence display panel or display panels.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420696337.6U CN204287637U (en) | 2014-11-19 | 2014-11-19 | Array substrate, display panel and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420696337.6U CN204287637U (en) | 2014-11-19 | 2014-11-19 | Array substrate, display panel and display device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204287637U true CN204287637U (en) | 2015-04-22 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201420696337.6U Expired - Lifetime CN204287637U (en) | 2014-11-19 | 2014-11-19 | Array substrate, display panel and display device |
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| CN (1) | CN204287637U (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104849881A (en) * | 2015-05-04 | 2015-08-19 | 上海天马微电子有限公司 | Display device and driving method thereof |
| CN106066560A (en) * | 2016-08-17 | 2016-11-02 | 武汉华星光电技术有限公司 | The test circuit of a kind of array base palte and liquid crystal display |
| CN106873222A (en) * | 2017-04-20 | 2017-06-20 | 武汉华星光电技术有限公司 | The display panel and display of a kind of narrow frame |
| CN107463014A (en) * | 2017-09-26 | 2017-12-12 | 武汉华星光电技术有限公司 | Array base palte and array base palte test structure |
| CN107527937A (en) * | 2016-06-21 | 2017-12-29 | 三星显示有限公司 | Display device and its manufacture method and the electronic equipment for including it |
| CN108399879A (en) * | 2018-03-27 | 2018-08-14 | 信利（惠州）智能显示有限公司 | The test circuit of organic light emitting display test device and organic light emitting display panel |
| CN108615493A (en) * | 2018-06-26 | 2018-10-02 | 上海中航光电子有限公司 | The test method and display device of a kind of display panel, display panel |
| CN109523943A (en) * | 2018-12-28 | 2019-03-26 | 厦门天马微电子有限公司 | Display panel and display device |
| CN111653225A (en) * | 2020-06-19 | 2020-09-11 | 上海天马有机发光显示技术有限公司 | Display module, crack detection method thereof and display device |
-
2014
- 2014-11-19 CN CN201420696337.6U patent/CN204287637U/en not_active Expired - Lifetime
Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104849881B (en) * | 2015-05-04 | 2018-04-13 | 上海天马微电子有限公司 | Display device and driving method thereof |
| CN104849881A (en) * | 2015-05-04 | 2015-08-19 | 上海天马微电子有限公司 | Display device and driving method thereof |
| CN107527937A (en) * | 2016-06-21 | 2017-12-29 | 三星显示有限公司 | Display device and its manufacture method and the electronic equipment for including it |
| US11997901B2 (en) | 2016-06-21 | 2024-05-28 | Samsung Display Co., Ltd. | Display apparatus having grooved terminals |
| US11605697B2 (en) | 2016-06-21 | 2023-03-14 | Samsung Display Co., Ltd. | Display apparatus having grooved terminals |
| CN106066560A (en) * | 2016-08-17 | 2016-11-02 | 武汉华星光电技术有限公司 | The test circuit of a kind of array base palte and liquid crystal display |
| CN106873222B (en) * | 2017-04-20 | 2020-08-04 | 武汉华星光电技术有限公司 | Display panel and display of narrow frame |
| CN106873222A (en) * | 2017-04-20 | 2017-06-20 | 武汉华星光电技术有限公司 | The display panel and display of a kind of narrow frame |
| WO2018192017A1 (en) * | 2017-04-20 | 2018-10-25 | 武汉华星光电技术有限公司 | Narrow-bezel display panel and display |
| CN107463014A (en) * | 2017-09-26 | 2017-12-12 | 武汉华星光电技术有限公司 | Array base palte and array base palte test structure |
| CN108399879A (en) * | 2018-03-27 | 2018-08-14 | 信利（惠州）智能显示有限公司 | The test circuit of organic light emitting display test device and organic light emitting display panel |
| CN108615493B (en) * | 2018-06-26 | 2021-06-15 | 上海中航光电子有限公司 | Display panel, test method of display panel and display device |
| CN108615493A (en) * | 2018-06-26 | 2018-10-02 | 上海中航光电子有限公司 | The test method and display device of a kind of display panel, display panel |
| CN109523943A (en) * | 2018-12-28 | 2019-03-26 | 厦门天马微电子有限公司 | Display panel and display device |
| CN111653225A (en) * | 2020-06-19 | 2020-09-11 | 上海天马有机发光显示技术有限公司 | Display module, crack detection method thereof and display device |
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| GR01 | Patent grant | ||
| CX01 | Expiry of patent term | ||
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Granted publication date: 20150422 |