CN1945811A - Method for producing active matrix organic LED panel - Google Patents
Method for producing active matrix organic LED panel Download PDFInfo
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- CN1945811A CN1945811A CN 200510113442 CN200510113442A CN1945811A CN 1945811 A CN1945811 A CN 1945811A CN 200510113442 CN200510113442 CN 200510113442 CN 200510113442 A CN200510113442 A CN 200510113442A CN 1945811 A CN1945811 A CN 1945811A
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Abstract
This invention provides a manufacturing method for an organic LED panel of an active matrix including: providing a base plate, forming a film transistor on the base plate, forming an interlaminar insulation layer to cover the transistor and the base plate, forming multiple through holes to the surfaces of the source and drain of the transistor, forming metal layers in the through holes to be connected with the source and drain, forming transparent electrodes on the surfaces of the metal layers connected to the drain, forming pixel electrode insulation layers to the transparent electrode and the interlaminar insulation layer and forming a LED on the transparent electrode.
Description
Technical field
The present invention relates to a kind of manufacture method of flat-panel screens, relate in particular to a kind of manufacture method with organic LED panel of low-temperature polysilicon film transistor.
Background technology
General low-temperature polysilicon film transistor (the low temperature polycrystalline siliconthin film transistor that makes, LTPS TFT) step of array need use nearly that six to nine road photomasks carry out photoetching process (photo-etching-process), five road photomasks far beyond general amorphous silicon film transistor (hydrogenatedamorphous silicon thin film transistor, α-Si:H TFT) are complicated and consuming time.In addition, at active matrix organic LED panel (active matrix organic light-emittingdiode, AMOLED) in the application, because complicated pixel circuit design framework, so must utilize low-temperature polysilicon film transistor to drive array makes, right its (pixel define layer PDL), more makes required photomask number increase to seven to ten roads because many one decks define the insulating barrier of pixel electrode light-emitting zone again.
See also Fig. 1, Fig. 1 is the structural representation of the thin-film transistor (TFT) that is applied in traditional organic LED panel.Prior art is when making organic LED panel 100, a glass substrate 102 is provided earlier, deposit a buffer insulation layer 104 and one deck amorphous silicon membrane (not shown) more in regular turn on glass substrate 102, and via quasi-molecule laser annealing (excimer laser annealing, ELA) etc. technology makes this amorphous silicon membrane crystallization again (recrystallize) become polysilicon membrane.Then utilize one first photomask to carry out first photoetching process, polysilicon membrane is etched required active layer (active layer) 106 patterns, deposit a gate insulator (gate insulator) 108 afterwards again and be covered in each active layer 106 and buffering insulating barrier 104 surfaces.
And then use second photoetching process of second photomask to etch gate metal 110 by a metal deposition process and.Can utilize gate metal 110 to shield subsequently as autoregistration (self-alignment), active layer 106 is carried out boron ion plasma injection technology, in the active layer 106 of gate metal 110 relative both sides, to form source electrode (source) 103 and drain electrode (drain) 105.Wherein, prior art is the needs of visual circuit design in addition, utilize the first above-mentioned photoetching process and second photoetching process and respectively at forming polysilicon bottom crown 107 and metal top crown 111 in each pixel region, and isolate with gate insulator 108, constitute storage capacitors (storage capacitance, Cst) 113.
Then deposit interbedded insulating layer (inter-layer dielectric, ILD) 112 be formed at glass substrate 102 tops, and cover grid metal 110, metal top crown 111 and gate insulator 108, utilize the 3rd photomask to carry out the 3rd photoetching process again, in order to remove the part interlayer insulating film 112 and the gate insulator 108 of source electrode 103 and drain electrode 105 tops, to define corresponding through hole (via hole) 115.And then carry out another metal deposition process, and and utilize the 4th photomask to carry out the 4th photoetching process, on through hole 115 surfaces, etching metal levels 114 such as holding wire, drain metal, and be electrically connected source electrode 103 and drain electrode 105 respectively.Passivation layer (the passivation layer) 116 that then deposits a planarization is on metal level 114 and interlayer insulating film 112, and utilize the 5th photomask to carry out the 5th photoetching process, to remove the part passivation layer 116 of metal level 114 tops that are electrically connected drain electrode 105.And then formation tin indium oxide (Indium Tin Oxide, ITO) transparent conductive film (not shown) is on passivation layer 116, and utilize the 6th photomask to carry out the 6th photoetching process, with the transparency electrode 118 that defines suitable size, carry out a depositing operation subsequently again and utilize the 7th photomask to carry out the 7th photoetching process to form pixel electrode insulating barrier (PDL) 120.Form the light-emitting diode (not shown) in transparency electrode 118 surfaces more at last, promptly finish organic LED panel 100 in the prior art.
In the prior art, must utilize seven road photomasks just can finish the making that aforementioned organic LED panel is applied to thin film transistor (TFT) array, not only complex steps, complex process, and the expensive and bit errors (misalignment) that caused of many photomask numbers, also seriously reduce production capacity and yield.Therefore how to reduce the photomask number when making, become one of important topic of two-d display panel field organic light emitting diode display exploitation.
Summary of the invention
The invention provides a kind of manufacture method of active matrix organic light-emitting diode, to address the above problem.
The invention provides a preferred embodiment, the manufacture method that relates to a kind of active matrix organic LED panel, comprise: substrate is provided, form thin-film transistor on substrate, form interlayer insulating film and be covered in thin-film transistor and substrate top, in interlayer insulating film, form source electrode and the drain surface of a plurality of through holes to thin-film transistor, in through hole, form metal level and be electrically connected source electrode and drain electrode respectively, form transparency electrode in layer on surface of metal, form the pixel electrode insulating barrier on transparency electrode and interlayer insulating film, and form light-emitting diode on transparency electrode.
The present invention omits the making of passivation layer, and transparency electrode directly is deposited on metal level and the interlayer insulating film, make the photomask decreased number to only needing five or six road photomasks, if metal level and transparency electrode are by forming with a photoetching process, then only need five road photomask numbers, because photomask number of the present invention is few than prior art, so the present invention can reach the purpose that reduces cost and simplify technology.
Description of drawings
Fig. 1 is the structural representation of the TFT of traditional organic LED panel.
Fig. 2 to Fig. 6 is the process schematic representation of active matrix organic LED panel of the present invention.
Fig. 7 is that the present invention utilizes same photomask to form the structural representation of second embodiment of transparency electrode and metal level.
The primary clustering symbol description
100,600 light-emitting-diode panels
102,202 glass substrates
103,203 source electrodes
104,204 insulating barriers
105,205 drain electrodes
106,206 active layers
107,207 polysilicon bottom crowns
108,208 gate insulators
110,210 gate metals
111,211 metal top crowns
112,212 interlayer insulating films
113,213 storage capacitors
114,214,718 metal levels
115,215 through holes
116 passivation layers
118,218,714 transparency electrodes
120,220 pixel electrode insulating barriers
222 light-emitting diodes
Embodiment
See also Fig. 2 to Fig. 6, Fig. 2 to Fig. 6 is the process schematic representation of active matrix organic LED panel of the present invention (AMOLED).As shown in Figure 2, at first provide a glass substrate 202 to be used as infrabasal plate, deposit one deck buffer insulation layer 204 and one deck amorphous silicon membrane (not shown) more in regular turn on glass substrate 202, and, make this amorphous silicon membrane (not shown) recrystallize into polysilicon membrane via annealing processs such as excimer laser.Then utilize one first photomask to carry out first photoetching process, polysilicon membrane is etched required active layer 206 patterns.Wherein, the present invention is the needs of visual circuit design also, utilize above-mentioned first photoetching process to form a polysilicon bottom crown 207 simultaneously in each pixel region.
Please refer to Fig. 3, subsequently at active layer 206 and buffering insulating barrier 204 surface deposition gate insulators 208.Deposit one first metallic film (not shown) then on gate insulator 208, and utilize second photomask to carry out second photoetching process, obtain metal patterns such as scan line (not shown), gate metal 210 and metal top crown 211 with etching.Wherein, polysilicon bottom crown 207 and metal top crown 211 by gate insulator 208 is isolated constitute a storage capacitors (Cst) 213.Can utilize gate metal 210 as the autoregistration shielding subsequently, active layer 206 is carried out boron ion plasma injection technology, in the active layer 206 of gate metal 210 relative both sides, to form source electrode 203 and drain electrode 205.Then utilize SOG technology again, the insulating material of silicon dioxide or sensing optical activity is evenly coated gate metal 210, metal top crown 211 and gate insulator 208 tops, to form the interlayer insulating film (ILD) 212 of one deck planarization in the spin coating mode.Also because in this step, so the present invention utilizes SOG technology can make the driving array of infrabasal plate have preferable planarization effect, and the ladder that helps follow-up organic material covers.
See also Fig. 4, then utilize the 3rd photomask to carry out the 3rd photoetching process, in order to remove the part interlayer insulating film 212 and the gate insulator 208 of source electrode 203 and drain electrode 205 tops, to form through hole 215 in source electrode 203 and drain electrode 205 tops.Please refer to Fig. 5, carry out another second deposit metal films technology then, and utilize the 4th photomask to carry out the 4th photoetching process, in order on through hole 215 surfaces, etching metal levels 214 such as holding wire, drain metal, and be electrically connected source electrode 203 and drain electrode 205 respectively.Above metal level 214 and interlayer insulating film 212, form tin indium oxide (ITO) or indium zinc oxide (indium zinc oxide afterwards again, transparent conductive film (not shown) such as IZO), and utilize the 5th photomask to carry out the 5th photoetching process, with the transparency electrode 218 that defines suitable size.
Then please refer to Fig. 6, utilize SOG technology spin coating silicon dioxide on metal level 214, transparency electrode 218 and interlayer insulating film 212 to form pixel electrode insulating barrier (PDL) 220, and utilize the 6th photomask to carry out the 6th photoetching process to form the pixel electrode insulating barrier 220 of suitable size.Form an Organic Light Emitting Diode 222 on transparency electrode 218 surfaces more at last, promptly finish the organic LED panel 600 among the present invention.Wherein, it should be noted that, the coverage of the transparency electrode 218 of present embodiment is greater than the metal level 214 that is electrically connected drain electrode 205, so therefore the light of Organic Light Emitting Diode 222 can form a bottom-emission (bottom emission) diode panel or upper and lower luminous organic LED panel simultaneously by upper and lower two directional divergences.
In addition, see also Fig. 7, Fig. 7 is that the present invention utilizes same photomask to form the structural representation of second embodiment of transparency electrode and metal level.The main difference of the embodiment of second embodiment and earlier figures 2 to Fig. 6 is after through hole 215 forms, the present invention is successive sedimentation layer of metal layer 714 and layer of transparent electrode 718 directly, and then utilize same the 4th photomask to carry out the 4th photoetching process, etching the upper and lower metal level 714 and the transparency electrodes 718 of piling up mutually and having identical patterns such as holding wire, drain metal simultaneously, and be electrically connected source electrode 203 and drain electrode 205 respectively.Because the areal extent of formed transparency electrode 718 of second embodiment and metal level 714 is the same big, not only because metal level 714 has preferable reflecting effect and itself but also fully by transparency electrode 718 covering that overlaps, so metal level 714 can reflect the light of light-emitting diode, and forms a top light emitting (top emission) diode panel.Utilize above-mentioned technology to form pixel electrode insulating barrier and light-emitting diode at last again.So second embodiment only needs five road photomasks.
Compared to prior art, because the making that the present invention omits passivation layer, and transparency electrode directly is deposited on metal level and the interlayer insulating film, make the photomask decreased number to only needing six road photomasks, and if metal level is formed by same photoetching process with transparency electrode, then only need five road photomask numbers, so photomask number of the present invention is few than prior art, so the present invention can reach the purpose that reduces cost and simplify technology.In addition, technology of the present invention also can be applicable in the technology of display panels of general low-temperature polysilicon film transistor (LTPS TFT) array, not only only needing five roads or six road photomasks to prepare finishes, but also can utilize the different of second metal level and transparency electrode relative position, and make reflective, transmission-type and semi-transparent semi-reflecting display panels respectively.
The above only is the preferred embodiments of the present invention, and all equalizations of doing according to claim of the present invention change and modify, and all should belong to covering scope of the present invention.
Claims (23)
1. the manufacture method of an active matrix organic LED panel, this manufacture method comprises:
One substrate is provided;
Form at least one thin-film transistor on this substrate;
Form interbedded insulating layer and be covered in this thin-film transistor and this substrate top;
In this interlayer insulating film, form source electrode and the drain surface of a plurality of through holes to this thin-film transistor;
In described a plurality of through holes, respectively form a metal level and be electrically connected this source electrode and this drain electrode respectively;
Form a transparency electrode in this layer on surface of metal that is electrically connected this drain electrode;
Form a pixel electrode insulating barrier on this transparency electrode and this interlayer insulating film; And
Form a light-emitting diode on this transparency electrode.
2. manufacture method as claimed in claim 1, wherein this substrate comprise a transparent glass substrate, a bendable plastic base and a metal substrate one of them.
3. manufacture method as claimed in claim 1, wherein this thin-film transistor is a low-temperature polysilicon film transistor, and the method that forms this low-temperature polysilicon film transistor also comprises:
Form a buffer insulation layer in this substrate surface;
Form an active layer in this buffer insulation layer surface;
Forming a gate insulator is covered on this active layer and this buffer insulation layer;
Form a gate metal in this gate insulator laminar surface, and this gate metal is positioned at this active layer central authorities; And
Utilize this gate metal to come that as the autoregistration shielding this active layer is carried out ion and inject, in this active layer of these relative both sides of gate metal, to form this source electrode and this drain electrode.
4. manufacture method as claimed in claim 3, the method that wherein forms this active layer also comprises:
In this buffer insulation layer surface deposition one amorphous silicon membrane;
This amorphous silicon membrane is carried out crystallization processes again and again, is a polysilicon membrane so that this amorphous silicon membrane changes into; And
This polysilicon membrane is carried out one first photoetching process, to form this active layer.
5. manufacture method as claimed in claim 3, the method that wherein forms this gate metal also comprises:
Form one first metallic film in this gate insulator laminar surface; And
This first metallic film is carried out one second photoetching process, to form this gate metal.
6. manufacture method as claimed in claim 1, wherein described a plurality of through holes of this interlayer insulating film utilize one the 3rd photoetching process to form.
7. manufacture method as claimed in claim 1, wherein this interlayer insulating film is finished by a spin coating silicon dioxide technology.
8. manufacture method as claimed in claim 1, wherein this interlayer insulating film is a sensing optical activity material.
9. manufacture method as claimed in claim 1, the method that wherein forms this metal level also comprises:
Form one second metallic film in this layer insulation laminar surface; And
This second metallic film is carried out one the 4th photoetching process, to form the described a plurality of metal levels that are electrically connected this source electrode and this drain electrode respectively.
10. manufacture method as claimed in claim 9, the method that wherein forms this transparency electrode and this pixel electrode insulating barrier also comprises:
Form a transparent conductive film in this interlayer insulating film and described a plurality of layer on surface of metal;
This transparent conductive film is carried out one the 5th photoetching process, to form this transparency electrode; And
Utilize a depositing operation and one the 6th photoetching process to form this pixel electrode insulating barrier.
11. manufacture method as claimed in claim 10, wherein this transparency electrode coverage is greater than this metal level that is electrically connected this drain electrode, so that this active matrix organic LED panel forms a bottom-emission diode panel or upper and lower luminous organic LED panel.
12. manufacture method as claimed in claim 10, wherein this pixel electrode insulating barrier is finished by a SOG technology.
13. the manufacture method of an active matrix organic LED panel, this manufacture method comprises:
One substrate is provided;
Form at least one thin-film transistor on this substrate;
Form interbedded insulating layer and be covered in this thin-film transistor and this substrate top;
In this interlayer insulating film, form of source electrode and the drain electrode of a plurality of through holes to this thin-film transistor;
Forming one respectively in described a plurality of through-hole surfaces upper and lowerly piles up mutually and has the metal level of identical patterns and transparency conducting layer and be electrically connected this source electrode and this drain electrode respectively;
Form a pixel electrode insulating barrier on this transparency conducting layer and this interlayer insulating film; And
Form a light-emitting diode on this transparency conducting layer that is electrically connected this drain electrode.
14. manufacture method as claimed in claim 13, wherein this thin-film transistor is a low-temperature polysilicon film transistor, and the method that forms this low-temperature polysilicon film transistor also comprises:
Form a buffer insulation layer in this substrate surface;
Form an active layer in this buffer insulation layer surface;
Forming a gate insulator is covered on this active layer and this buffer insulation layer;
Form a gate metal in this gate insulator laminar surface, and this gate metal is positioned at this active layer central authorities; And
Utilize this gate metal to come that as the autoregistration shielding this active layer is carried out ion and inject, in this active layer of these relative both sides of gate metal, to form this source electrode and this drain electrode.
15. manufacture method as claimed in claim 14, the method that wherein forms this active layer also comprises:
In this buffer insulation layer surface deposition one amorphous silicon membrane;
This amorphous silicon membrane is carried out crystallization processes again and again, is a polysilicon membrane so that this amorphous silicon membrane changes into; And
This polysilicon membrane is carried out one first photoetching process, to form this active layer.
16. manufacture method as claimed in claim 14, the method that wherein forms this gate metal also comprises:
Form one first metallic film in this gate insulator laminar surface; And
This first metallic film is carried out one second photoetching process, to form this gate metal.
17. manufacture method as claimed in claim 13, wherein described a plurality of through holes of this interlayer insulating film utilize one the 3rd photoetching process to form.
18. manufacture method as claimed in claim 13, wherein this interlayer insulating film is finished by a spin coating silicon dioxide technology.
19. manufacture method as claimed in claim 13, wherein this interlayer insulating film is a sensing optical activity material.
20. manufacture method as claimed in claim 13 wherein forms and upper and lowerly piles up mutually and have this metal level of identical patterns and the method for this transparency conducting layer also comprises:
Form one second metallic film and a transparent conductive film in regular turn in this layer insulation laminar surface; And
This transparent conductive film and this second metallic film are carried out one the 4th photoetching process.
21. manufacture method as claimed in claim 20, wherein this pixel electrode insulating barrier utilizes a depositing operation and one the 5th photoetching process to form.
22. manufacture method as claimed in claim 21, wherein this pixel electrode insulating barrier utilizes a spin coating silicon dioxide technology to finish.
23. manufacture method as claimed in claim 13, wherein this active matrix organic LED panel is a top light emitting diode panel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200510113442 CN1945811A (en) | 2005-10-09 | 2005-10-09 | Method for producing active matrix organic LED panel |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200510113442 CN1945811A (en) | 2005-10-09 | 2005-10-09 | Method for producing active matrix organic LED panel |
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| CN1945811A true CN1945811A (en) | 2007-04-11 |
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| CN 200510113442 Pending CN1945811A (en) | 2005-10-09 | 2005-10-09 | Method for producing active matrix organic LED panel |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102629611A (en) * | 2012-03-29 | 2012-08-08 | 京东方科技集团股份有限公司 | Display device, array substrate and manufacturing method thereof |
| CN102842587A (en) * | 2012-09-24 | 2012-12-26 | 京东方科技集团股份有限公司 | Array substrate, manufacturing method of array substrate and display device |
| CN103824862A (en) * | 2012-11-16 | 2014-05-28 | 群康科技(深圳)有限公司 | Thin-film transistor substrate and display |
| US9601584B2 (en) | 2012-11-16 | 2017-03-21 | Innolux Corporation | Thin-film transistor substrate |
| CN107424957A (en) * | 2017-06-16 | 2017-12-01 | 武汉华星光电半导体显示技术有限公司 | The preparation method of flexible TFT substrate |
-
2005
- 2005-10-09 CN CN 200510113442 patent/CN1945811A/en active Pending
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102629611A (en) * | 2012-03-29 | 2012-08-08 | 京东方科技集团股份有限公司 | Display device, array substrate and manufacturing method thereof |
| CN102629611B (en) * | 2012-03-29 | 2015-01-21 | 京东方科技集团股份有限公司 | Display device, array substrate and manufacturing method thereof |
| US9230995B2 (en) | 2012-03-29 | 2016-01-05 | Boe Technology Group Co., Ltd. | Array substrate, manufacturing method thereof and display device |
| CN102842587A (en) * | 2012-09-24 | 2012-12-26 | 京东方科技集团股份有限公司 | Array substrate, manufacturing method of array substrate and display device |
| CN102842587B (en) * | 2012-09-24 | 2016-11-16 | 京东方科技集团股份有限公司 | Array base palte and preparation method thereof, display device |
| CN103824862A (en) * | 2012-11-16 | 2014-05-28 | 群康科技(深圳)有限公司 | Thin-film transistor substrate and display |
| US9601584B2 (en) | 2012-11-16 | 2017-03-21 | Innolux Corporation | Thin-film transistor substrate |
| CN107424957A (en) * | 2017-06-16 | 2017-12-01 | 武汉华星光电半导体显示技术有限公司 | The preparation method of flexible TFT substrate |
| CN107424957B (en) * | 2017-06-16 | 2020-01-31 | 武汉华星光电半导体显示技术有限公司 | Manufacturing method of flexible TFT substrate |
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