CN1812368A - Method for transmitting message data by IP facsimile gateway - Google Patents

Abstract

This invention discloses a kind of method for IP gateway message data transmission. Internet is used to connect between public telephone switching networks of message sending end and message receiving end. Gateway is arranged between public telephone switching networks of message sending end and message receiving end in order to modulate-demodulate the data of public telephone switching networks and IP data packet. The said gateway contains DSP and CPU. DSP buffer stores a certain number of message data. When buffer store attains to the said number, DSP will transmit message data to pubic telephone switching network side; at the same time, when buffer area seizing rate is higher than upper bound threshold, DSP will switch off flow control switching and notify CPU to stop transmitting data. The data are temporarily buffer stored in CPU. When buffer area seizing rate is lower than lower bound threshold, DSP will switch on flow control switching and notify CPU to transmit data.

Description

The method of Fax over IP gateway transmitting message data

Technical field

The present invention relates to a kind of Internet traffic facsimile domain, especially a kind of method of Fax over IP gateway transmitting message data.

Background technology

Along with the maturation of popularizing of using of internet and technology, make traditional facsimile message be carried on that transmission becomes possibility on the internet, therefore, also arise at the historic moment based on the correlation technique of internet fax (Fax over IP).

Real-time Fax over IP has two kinds of implementations, and the one, with the voice mode transparent transmission, the 2nd, trunking scheme just meets the T.38 fax of agreement.Because the poor-performing of the anti-network harm of transparent transmission mode, and be not used more widely, so media gateway or Tandem Gateway are generally all supported T.38 fax.

T.38 mode is meant the agreement T.38 by ITU-T, facsimile machine send follow ITU-T T.30 the facsimile signal of agreement be converted into the T.38 facsimile message or the fax signaling that are fit to the transmission of IP bearer network and carry out transmission manner.T.38IP the real-time fax gateway is mainly finished the T.38 modulation of protocol processes and fax.T.38IP the basic thought of faxing is: at gateway T.38 the data that facsimile machine sends are carried out demodulation, the payload data of demodulation is broken into the T.38 IP bag of agreement regulation, mail to the other side's gateway by IP network.Recipient's T.38 gateway is according to the information characteristic of IP bag, and the payload data that will split out from the IP bag is modulated again and sent to PSTN side facsimile machine.As seen, what the IP real-time fax carried is fax signaling or message information mutual between terminal facsimile machine, what carry out between two terminal facsimile machine is real time communication, the fax flow process is followed T.30 agreement, this agreement has been stipulated six timers of T1-T6, the mutual time to the order in each stage of faxing, corresponding signaling and message data has been carried out standard, the overtime failure that all may cause fax of any timer.And have intrinsic time-delay, shake, packet loss in the present internet, and in addition, the modulation of gateway, packing are unpacked and have been increased processing delay, and these factors may make that all the success rate of IP real-time fax is very low.Fax is under non-ECM (ErrorCorrection Mode, error correction) pattern, and at data transfer phase, if owing to network jitter, delay invite IP side message data discontinuous, the machine data that will cause receiving faxes interrupts.The data interruption time is short, can make the Data Receiving mistake; The data interruption time is long, will cause facsimile machine to switch to the message after-stage owing to determining the carrier wave disappearance, and message just can not receive fully.Therefore, need a kind of method can reduce IP bag data delay, the reception that shake brings is unusual as far as possible.

On the other hand, realize that in the technology of gateway DSP (Digital Signal Process, digital signal processor) chip memory headroom is not very big usually, memory headroom usually is the bottleneck that gateway is supported multichannel fax specification.How to take with little memory headroom, realize having the gateway of good resistance network jitter delay performance, becoming T.38IP in real time, gateway needs the comprehensive key technology that solves.

Prior art often adopts following scheme to solve the problems referred to above.

Prior art one

Please refer to Fig. 2, be prior art one gateway structural representation.The message data stage during data interruption, is mail to PSTN (Public Switch Telephone Network, public switched telephone network (PSTN)) at the preceding zero insertion of EOL (End of Line, line end-of-data mark) by a line metadata cache.T.38 protocol processes and facsimile modulation/demodulation coexist and realize among a slice DSP.

T.38 the agreement support is G3 class facsimile machine, and G3 class facsimile machine is to carry out source encoding by agreement T.4.According to agreement T.4, for non-ECM data, the wired end mark EOL of the ending of every line data is correctly decoded not influence of data if insert 0 pair of continuous facsimile machine before EOL.In order to resist the network jitter of message transmissions stage, the page data that situations such as time-delay or packet loss cause is discontinuous, the fax flow process is interrupted, the specific embodiments of this scheme is: in the message transmissions stage, receive gateway the non-ECM message data that receives of IP layer side is taked buffer memory one line data receiver formula, when message data reception buffering area buffer memory is expired line data (promptly receiving EOL), beginning sends to the modulation of PSTN side, when sending to the EOL sign of line tail, whether the data in buffer amount has reached at least one line after earlier judging EOL, if do not have more than buffer memory one line, then should ending indicate the EOL delayed delivery, send full remainder certificate earlier, know that next line metadata cache finishes, just this EOL signal is sent; Not delayed delivery of the EOL of last line data (judging) by the ENMES sign.This method can be resisted network data and be interrupted, as: during next line data behind the buffer memory EOL, shake has taken place in network, and gateway can continue to send the zero insertion data to facsimile machine, thereby has guaranteed data transmission continuity on the PSTN link.

Please refer to Fig. 3, be the flow chart of prior art one zero insertion send mode: left side figure be gateway when sending to the EOL position, when not having at least one line data behind this EOL, do not send the EOL signal earlier, but zero insertion transmission before EOL, receive the data of IP side arrival simultaneously; Right figure expression finishes zero insertion and sends when buffer memory behind this EOL is expired line data, begins to send EOL data and follow-up data.

Though above-mentioned prior art one can guarantee data transmission continuity on the PSTN link, yet there are two shortcomings: the one, take a large amount of memory spaces of DSP.Non-ECM one line data length according to protocol code T.4 is fixing, and for the page of complexity, a longest line can reach 2000byte.This method of pressing the line buffer memory is used for data cached buffer size buffer memory one line length data at least; In addition, in order to prevent network forward direction jitter delay etc., memory headroom selects to preserve two line data usually, and under this caching mechanism, the memory headroom of DSP is maximum bottleneck.For 1 DSP, on Memory Allocation, the single channel fax needs the total memory headroom of memory headroom * port number=DSP, and the memory headroom that the single channel fax takies is big, must cause handling the T.38 number of active lanes decline of facsimile service, has increased the cost of gateway.

Prior art two

Please refer to Fig. 4, be the gateway structural representation of prior art two.The message data stage is by a line metadata cache, during data interruption before EOL zero insertion mail to PSTN.T.38 protocol processes and facsimile modulation/demodulation are realized at CPU and DSP respectively.T.38 in the protocol processes, T.38 state machine is (according to agreement T.38, follow the tracks of transmission course, the stage of communication of facsimile machine, determine the current state of gateway) can be according to the content of network and PSTN side signal, the mode and the speed of decision next step modulation that will carry out of fax or demodulation, and by message informing DSP, data processing module is according to the message content of CPU notice, set up the modulation or the demodulation of respective rate, be the reliable reception that guarantees that message issues, DSP replys response and gives CPU, and CPU just issues the data that data report for DSP or reception DSP then.Please refer to Fig. 5, for determining that the processing procedure that V.21 DP modulates is an example, the process of CPU and DSP interacting message with state machine T.38.The universal cpu memory headroom is bigger, and these scheme data realize on CPU, can alleviate the nervous problem of DSP internal memory, improve the T.38 Business Processing specification of gateway.But this interacting message can frequently carry out in the process of fax, has increased the processing delay of gateway a few tens of milliseconds on the one hand, brings the possibility of information or loss of data on the other hand.The increase of fax processing delay makes facsimile machine T1～T6 timer expiry probability increase, and IP real-time fax success rate reduces.

Summary of the invention

The DSP that the present invention is intended to propose a kind of practicality realizes T.38IP real-time fax gateway scheme, thereby can overcome at least a defective that exists in the prior art.

In view of above-mentioned purpose, technical scheme proposed by the invention is:

A kind of method of Fax over IP gateway transmitting message data, described gateway comprises digital signal processor and central processing unit, this method comprises:

A, when receiving gateway and receiving the message data that network side sends over, digital signal processor carries out the buffer memory of some to message data, when buffer memory reached described quantity, digital signal processor sent message data to the public switched telephone network (PSTN) side;

B, digital signal processor are when the public switched telephone network (PSTN) side sends message data, when occupancy is higher than upper limit threshold between buffer empty, digital signal processor closing flow control switch, the notice central processing unit no longer issues data, when occupancy is lower than lower threshold between buffer empty, digital signal processor is opened fluidic switch, and the notice central processing unit issues data;

Before message data was carried out buffer memory, digital signal processor found first line ED sign in the message data that receives in the steps A, and the data before the described line ED sign are emptied;

Step B comprises further whether the regular inquiry of described digital signal processor has sent the sign of end-of-page, if then finish the current page transmit stage and handle;

The flank speed that the data in buffer amount is supported by the duration and the fax of network jitter in the steps A is determined;

Described fluidic switch is a transformable marking variable that is provided with in order to describe the occupancy between buffer empty;

The upper limit threshold of described fluidic switch and lower threshold are determined by the duration of gateway packing, and are met the following conditions simultaneously:

Total amount between upper limit threshold=(data volume of total amount-n IP bag between buffer empty)/buffer empty;

Total amount between lower threshold=(data volume of total amount-m IP bag between buffer empty)/buffer empty;

Wherein n, m are the positive integer greater than zero, and m＞n.

The beneficial effect that the present invention produced is:

DSP proposed by the invention realizes T.38 gateway scheme, with as far as possible little memory headroom occupancy, well solved the message transmissions stage, the problem that makes the mistake or interrupt may be transmitted to the page to shake in message transmissions stage network delay, back under the non-ECM mode, and can resist network forward direction shake and cause loss of data, receive ground correctness and flow process reliability correctly thereby improve IP real-time fax message better; Simultaneously, can also effectively reduce the gateway processes inherent delay that gateway processes mechanism is brought, be a kind of low cost, high performance gateway implementation.

Description of drawings

Fig. 1 is the structural representation of real-time fax system T.38;

Fig. 2 shows the gateway structure chart of prior art one;

Fig. 3 shows the flow chart that prior art one zero insertion sends;

Fig. 4 shows the gateway structure chart of prior art two;

Fig. 5 shows the flow chart of prior art two CPU and DSP interacting message;

Fig. 6 shows buffer memory of the present invention and flow-control mechanism figure;

Fig. 7 shows buffer memory of the present invention and flow-control mechanism flow chart

Embodiment

Below in conjunction with drawings and the specific embodiments the present invention is further described.

Realization thought of the present invention is based on caching mechanism and flow-control mechanism, feasible T.38 protocol processes and facsimile data modulation coexist, and data handler (DSP) is middle to be realized, CPU only carries out user data and seals, tears open, and under forbidding, DSP sends a fax when wrapping, the bag of will faxing is stored in CPU, thereby improved the correctness that IP real-time fax message receives and the reliability of flow process better, and saved DSP and take up room, reduced the gateway cost.

Caching mechanism is meant that non-ECM message receives the stage for receiving gateway, causes the IP side joint civilian data interruption of receiving telegraph in order to prevent network delay, back to shake, packet loss, carry out buffer memory to message data and send.When each page message received, DSP carried out the buffer memory of some earlier to IP side message data, need the data in buffer amount to be set by present real network situation.Gateway begins to send message data to the modulation of PSTN side when buffer memory reaches this data volume.In order further to save the space, in every page of start of message (SOM) during metadata cache, find first EOL of this page or leaf, the data before this EOL are emptied.

Flow-control mechanism: wrap in generation forward direction shake on the network in order to resist IP, the IP side reaches a plurality of packets in short time, cause the data buffer zone full, cause data to overflow, this programme is carrying out when buffer memory sends this buffering area being increased flow-control mechanism to message data.A fluidic switch is set in order to occupancy between the expression buffer empty in DSP, the transformable status indicator that described fluidic switch just is provided with in order to describe the occupation rate between buffer empty, when if the occupancy of buffering area surpasses certain ratio, fluidic switch cuts out, if the occupancy of buffering area is lower than certain proportion, fluidic switch is opened.After the data that each processing cycle of DSP issues CPU write buffering area, the occupancy between the data query buffer empty, and according to occupancy close fluidic switch.When the occupancy of buffering area surpasses certain proportion, DSP closing flow control switch, and notify CPU no longer to issue data and give DSP, DSP continues to send data to the PSTN side.Each processing cycle of DSP sends data to PSTN, occupancy between the inquiry buffer empty, and the occupancy in buffering area is lower than certain ratio, and fluidic switch is opened, and notice CPU can issue data and give DSP.

The upper limit threshold a% of fluidic switch, the selection of lower threshold b% based on fax-rate, receive the packaging time length of the fax bag that gateway receives.The packaging time length of supposing to send gateway is 30ms, and when fax-rate is 14400bps (a v.17 agreement), receiving every bag data volume that gateway receives is 54bytes, just requires the DSP buffering area to have the 54bytes remaining space at least, could complete reception one bag data.In order to guarantee the reliable reception of DSP, when selecting the DSP remaining space can receive two bag data at least usually, allow CPU to issue data to data.

DSP receives the data of IP side earlier in the same processing cycle, sends to the PSTN modulation again.Bound threshold value principle and method are as follows:

Upper limit threshold:, judge the remaining space of DSP, at once so can select remaining space can receive the data of a packet at least because DSP is after the Data Receiving that a processing cycle issues CPU finishes.The DSP processing cycle afterwards receives before the packet it is to continue to send data to the PSTN side again, so when receiving data again, buffering area also can be vacated the space of an about packet data volume again.Therefore, the actual reception ability of buffering area is two packet datas.

Total amount between upper limit threshold a%=(data volume of total amount-n IP bag between buffer empty)/buffer empty; Lower threshold: because DSP be a processing cycle after the PSTN side sends data and finishes, judge the remaining space of buffering area, so select remaining space can receive the data of two packets at least.

Total amount between lower threshold b%=(data volume of total amount-m IP bag between buffer empty)/buffer empty;

Suppose that the buffer size that DSP is used to receive message data is 500bytes, gateway can receive the packet that maximum packaging time length is 50ms, supports that the highest fax-rate is 14400bps, and in this case, the data volume of each packet is 90bytes.Select n=1, during m=2, upper limit threshold a%=(500-90)/500=82%, lower threshold b%=(500-90 * 2)/500=64%; DSP receive one the bag data after, if the occupancy of buffering area greater than 82%, the closing flow control switch, the notice CPU no longer issue data; DSP a processing cycle after PSTN sends data, if the occupancy of buffering area less than 64%, and fluidic switch is current then opens fluidic switch for closing closed state, and notice CPU can issue data.

Please refer to Fig. 6, for memory headroom takies the relation of situation and buffer memory transmission and the schematic diagram that concerns that memory headroom takies situation and fluidic switch state: (1) is represented in the buffering area among Fig. 6, behind first EOL signal buffer memory the data of M bytes, beginning sends data to PSTN side modulation; (2) be illustrated in the process of PSTN side transmission data, if space occupancy＞a% in the buffering area, the closing flow path switch, DSP notice CPU no longer issues data; (3) under the expression fluidic switch closed condition, space occupancy＜b% opens fluidic switch in buffering area, and DSP notice CPU issues data.

When fax enters the message transmissions of non-ECM mode during the stage, CPU receives the message data of IP side, at first UDP (a kind of User Datagram Protocol) or TCP bag are unpacked, the IFP bag is buffered in the buffering area of CPU, handle the cycle at each DSP, inquiry receive message data the DSP buffering area the fluidic switch state, state is an open mode if DSP receives the buffering area fluidic switch, CPU gives DSP with data distributing, if switch is to close closed state, this processing cycle does not issue data and gives DSP, and every DSP processing cycle continues inquiry DSP and receives buffering area fluidic switch state, until fluidic switch is open mode, just issues data.

The message transmissions that enters non-ECM mode when fax is during the stage, and the processing procedure of DSP mainly comprises following step as shown in Figure 7:

Before the message data that the machine gateway reception IP network side of receiving faxes issues, in digital signal processor, open up a buffering area that receives message data, being used for that message data is carried out buffer memory sends, the flank speed that needs the data in buffer amount to be supported by the time and the fax of network jitter decides, suppose to be dithered as 100ms under the most abominable situation of network environment, the flank speed 14400bps that supports by common fax calculates, the corresponding 180bytes data volume of 100ms is the data in buffer amount, same, the size that is used for data cached buffering area is set at greater than data in buffer amount 180bytes and gets final product.

1, when every page data initial data buffer memory, digital signal processor finds first line ED in this page data to be identified at position in the buffering area, and the data that are positioned in the buffering area before this line ED sign are emptied;

2, digital signal processor carries out buffer memory to the message data of IP side joint receipts, and when buffer memory reached some, gateway began to send data to the modulation of PSTN side;

3, DSP receives and after buffering area writes data, calculates the space hold rate of buffering area, if occupancy has surpassed fluidic switch upper limit threshold a%, and switch is current for opening attitude, DSP closing flow control switch, and notify the CPU fluidic switch to close, forbid that simultaneously CPU issues data and gives DSP;

4, DSP after the PSTN side sends, calculates the space hold rate of buffering area from the buffering area sense data, if occupancy has been lower than fluidic switch lower threshold b%, and switch is current for closing closed state, and DSP opens fluidic switch, and notifies CPU to issue data simultaneously;

5, whether sent to the sign of end-of-page every a data processing cycle DSP inquiry, if, represent that then this page transmission finishes, finish page transmit stage and handle, if not, then repeating step 3.

The above is the preferred embodiments of the present invention only, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.Within the spirit and principles in the present invention all, any modification of being done, be equal to replacement, improvement etc., all should be included within the claim scope of the present invention.

Claims (6)

1, a kind of method of Fax over IP gateway transmitting message data, described gateway comprises digital signal processor and central processing unit, it is characterized in that this method comprises:

A, when receiving gateway and receiving the message data that network side sends over, digital signal processor carries out the buffer memory of some to message data, when buffer memory reached described quantity, digital signal processor sent message data to the public switched telephone network (PSTN) side;

B, digital signal processor are when the public switched telephone network (PSTN) side sends message data, when occupancy is higher than upper limit threshold between buffer empty, digital signal processor closing flow control switch, the notice central processing unit no longer issues data, when occupancy is lower than lower threshold between buffer empty, digital signal processor is opened fluidic switch, and the notice central processing unit issues data.

2, Fax over IP gateway according to claim 1 receives the method for message data, it is characterized in that, in the steps A before message data is carried out buffer memory, described digital signal processor finds first line ED sign in the message data that receives, and the data before the described line ED sign are emptied.

3, Fax over IP gateway according to claim 1 and 2 receives the method for message data, it is characterized in that, described step B comprises further whether the regular inquiry of described digital signal processor has sent the sign of end-of-page, if then finish the current page transmit stage and handle.

4, Fax over IP gateway according to claim 1 receives the method for message data, it is characterized in that, the flank speed that the data in buffer amount is supported by the duration and the fax of network jitter in the steps A is determined.

5, Fax over IP gateway according to claim 1 and 2 receives the method for message data, it is characterized in that described fluidic switch is a transformable marking variable that is provided with in order to describe the occupancy between buffer empty.

6, Fax over IP gateway according to claim 1 and 2 receives the method for message data, it is characterized in that, the upper limit threshold of described fluidic switch and lower threshold are determined by the duration of gateway packing, and meet the following conditions simultaneously:

Total amount between upper limit threshold=(data volume of total amount-n IP bag between buffer empty)/buffer empty;

Total amount between lower threshold=(data volume of total amount-m IP bag between buffer empty)/buffer empty;

Wherein n, m are the positive integer greater than zero, and m＞n.

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