CN1312868C - A multichannel testing method - Google Patents
A multichannel testing method Download PDFInfo
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- CN1312868C CN1312868C CNB2003101135173A CN200310113517A CN1312868C CN 1312868 C CN1312868 C CN 1312868C CN B2003101135173 A CNB2003101135173 A CN B2003101135173A CN 200310113517 A CN200310113517 A CN 200310113517A CN 1312868 C CN1312868 C CN 1312868C
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Abstract
The present invention relates to a multiple channel data test method. The method comprises the following processing process: parallel port wires or serial port wires of computers are connected to controlled base pins of related digital devices needing to carry out input control in a one-to-one corresponding method according to the performance parameters of digital devices to be tested; binary system digital information needed to be sent by parallel ports of computers under all of possible digital states of each channel are collected for forming data documents used for controlling the output information of parallel ports of computer; the data documents formed in the step 2 are inputted, related computer number sending software is run to carry out number sending setting of digital devices under each state by using parallel ports or serial ports of computers; response parameter numbers of each channel under each state are recorded in parallel. The test method of the present invention overcomes the defect of imperfect conventional sampling testing data and adopts all of possible digital states of multiple channels to simultaneously complete setting by using parallel ports of computers, and data records can be completed at any time in parallel.
Description
Technical field
The present invention relates to a kind of method of testing efficiently, relate in particular to single channel relevant in the communication field, the test of multichannel mass data with digital device.
Background technology
General communication field in test relevant with digital device and design, has mass data and requires test, to find out the response curve between each channel input signal to be measured and the output signal.Especially test with the curve of DAC (digital-to-analog converter) passage that device is relevant.Since input signal relevant with the multidigit binary system " 0 ", the permutation and combination of " 1 " signal, and the situation complexity of possible input signal is various.And the test of the best that general people wish is to spend the short time as far as possible, can thoroughly grasp the test data that the output under the whole possible input signal condition of this class passage responds again.
Present method of testing is a balance between the two.Response data to be measured is screened sampling, give up the part possibility, only the situation of part input signal is wherein carried out the test of output response data, channel characteristic is only drawn by this part test data results presumption, is difficult to draw full and accurate information comprehensively; Will spend long time, each possible digital state of each passage to be measured is carried out one by one the record that input and test output are set, this workload may be very huge and uninteresting.
It is 01133014 patent that existing patent has application number, and this patent applicant is a Mitsubishi Electric Corporation; The gloomy length of Ryoden Semiconductor System Engineering Corp. also; A hillside plot true two and a ship storehouse brightness man of virtue and ability, they have applied for that September 13 calendar year 2001 name is called the patent of " testing apparatus of semiconductor integrated circuit and the method for testing of semiconductor integrated circuit ", patent publication No. is 1354503.Also the method for testing with the D/A change-over circuit is relevant, it be a kind of can be with high accuracy, the testing apparatus at a high speed the mixed signal N-type semiconductor N integrated circuit with A/D and D/A change-over circuit tested.Testing auxiliary device is arranged near the circuitry testing substrate that tested semiconductor integrated circuit has been installed, in this testing auxiliary device, be provided with the A/D change-over circuit of tested semiconductor integrated circuit is supplied with analog test signal and its D/A change-over circuit is supplied with the data circuit, storage of digital test signal from the determination data memory of the test output of tested semiconductor integrated circuit, and analysis portion that the storage data of this determination data memory are analyzed.
This patent has solved in the test that contains the D/A change-over circuit, the supply of test of digital signal, and the storage of test data, and relevant analysis portion is provided.But this patent test of the just possible in a large number circuit that contains the D/A conversion provides relevant quick and accurate test thinking and method.
Summary of the invention
The present invention seeks to have the shortcoming that is difficult to obtain in the short time all full and accurate data in the channel plot measuring technology now the contradictory problems between test making time that exists in the solution prior art and test data are obtained comprehensively in order to overcome.
The step of a kind of highly effective testing method provided by the invention is as follows:
1. according to the performance parameter of tested digital device, computer parallel port or Serial Port Line are connected to correspondingly the controlled pin of the correlated digital device that need import control;
2. the binary digital information that computer parallel port under all possible digital state of each passage need be sent is collected, and forms the data file of control computer parallel port output information;
3. the data file of input step 2 formation is utilized computer parallel port or serial ports, and the operation correlation computer send several softwares to carry out sending of each state of digital device and counts setting;
4. and the response parameter numerical value to be measured of each each state of passage of line item.
Method of testing of the present invention has overcome the infull defective of conventional sample testing data, and each possible digital state is carried out test record.Break the normal procedure in the test, the point of these data of record is set behind a state or the passage surveys limitation, adopt all possible digital state of multichannel to utilize computer parallel port to finish setting simultaneously, data record can walk abreast at any time and finish.
Description of drawings
Fig. 1 is the connection block diagram of the employed hardware components of method of testing of the present invention.
Fig. 2 is the flow chart of method of testing of the present invention.
Fig. 3 is an embodiment of the invention schematic diagram.
Fig. 4 is the input control voltage figure of receive path 1,2,3,4 in the embodiment of the invention.
Fig. 5 is the input control voltage and the corresponding output voltage curve chart of receive path 1,2,3,4 in the embodiment of the invention.
Fig. 6 is the input control voltage and the corresponding output voltage curve chart of receive path 1,2,3,4 in the embodiment of the invention.
Fig. 7 is the input control voltage figure of transmission channel 1,2,3,4 in the embodiment of the invention.
Fig. 8 is the input control voltage enlarged drawing of transmission channel 1,2,3,4 in the embodiment of the invention.
Fig. 9 is the input control voltage and the output signal strength figure of transmission channel 1,2,3,4 in the embodiment of the invention.
Embodiment
Below in conjunction with accompanying drawing the enforcement of technical scheme being described in further detail is among this patent embodiment
As shown in Figure 1, hardware components is by to be measured, computer, and the dependence test instrument, the test record instrument is formed.
As shown in Figure 2, below be the treatment step of method of testing main flow of the present invention:
The first step, shown in frame 21, connected mode according to relevant channels designs information and test computer-chronograph parallel port line and passage to be measured, when providing arbitrary digital state (as j digital state) of the arbitrary passage of test (as i passage), the binary numeral that computer parallel port need send (as 00110011).
In second step, shown in frame 22, form input data file.Provide in the multichannel (as 4 passages), the binary digital information that the computer parallel port that (as each passage 125 digital states arranged) under all possible digital state need send forms the data file of control computer parallel port output information.
The order of information input can be selected one of following dual mode as required:
Mode one: the 1st kind of state of passage 1, the 2nd kind of state of passage 1 ... passage 1 last 1 one kinds of kind states; The 1st kind of state of passage 2, the 2nd kind of state of passage 2 ... passage 2 last 1 one kinds of kind states; , the 1st kind of state of last passage, the 2nd kind of state of last passage ... the last a kind of state of last passage.
Mode two: the 1st kind of state of passage 1, the 1st kind of state of passage 2 ..., the 1st kind of state of last passage; The 2nd kind of state of passage 1, the 2nd kind of state of passage 2 ... the 2nd kind of state of last passage; , passage 1 last 1 one kinds of kind states; Passage 2 last 1 one kinds of kind states; , the last a kind of state of last passage.
In the 3rd step, shown in frame 23,, computer parallel port or Serial Port Line are connected to correspondingly the controlled pin of the correlated digital device that need import control according to the data of relevant all correlated digital devices.
The 4th goes on foot, and shown in frame 24, imports the data file that above-mentioned second step forms, and utilizes computer parallel port or serial ports, and the operation correlation computer send several softwares to carry out sending of each state of digital device and counts setting.
The 5th step, shown in frame 25, and the response parameter numerical value to be measured of each each state of passage of line item.Can select the correlate meter floppy drive for use according to parameter characteristic to be measured, directly store test data; Or adjust the parallel port and send several softwares to send several speed, the hand-kept relevant test data.
Adopt the method for the invention, compared with prior art, obtained tangible progress, having reached the short time obtains the good result of all possible datas, save the test consumed time greatly, improved test job efficient effectively, be particularly useful for the test of multichannel big data quantity.
Be this patent embodiment as shown in Figure 3.One contains 4 tunnel emissions and 4 tunnel RF signal receiving and s ending unit that receive, and has 1 IC chip to provide this 8 tunnel control voltage that contains DAC device path, and we need understand under the different control voltages for 1,2,3,4 road paths that receive, the voltage swing of RSSI indication correspondence; For 5,6,7,8 road paths of emission, need to understand under difference control voltage the size of passage output radiofrequency signal value; The DAC device can make the value of control voltage change from 0V to 5V, and stepping is 1/255V.
Finish such test, the control voltage possibility on every road has 256 clocks, and 8 the tunnel have 256 * 8 kinds, spend the least possible time to finish test, and is as follows by the technical scheme of the present invention's test:
Utilize 3 input pins (CLK clock pin among the figure of the relevant IC of computer parallel port control, DATA data pins among the figure, LE enable pin among the figure), make 8 road output pins (U1-U8 among the figure) of IC press first U1 U2 again, U3..., the order of U8 is exported the 256 kinds of control in every road voltage successively, adjusts computer and send several time cycles, utilizes oscilloscope or universal instrument to note the dateout of each passage.Oblique line in the accompanying drawing 4 is exactly the input control voltage of the receive path 1 that oscillograph recording is got off in this example, and accompanying drawing 5 is input control voltage (oblique line rises among the figure) and corresponding output voltages (decline curve among the figure) of the receive path 1 that gets off of oscillograph recording.Receive path 2,3,4 measurement and passage 1 are similar.Accompanying drawing 6 is to use receive path 1,2,3,4 inputs and output relation curve chart of drawing according to above-mentioned test result.Accompanying drawing 7 is input control voltages of the transmission channel 5 that oscillograph recording is got off in this example, it shown in the accompanying drawing 8 effect after amplifying, for the accurate size of the radiofrequency signal of read-out channel output, be to increase progressively 1/255V from 0 to 5V so select control sequence not resemble the receive path at every turn; But according to 0V, 5
*128/255V, 5
*1/255V, 5
*129/255V, 5
*2/255V, 5
*130/255V, 5
*3/255V ..., 5
*127/255V, 5
*255/255V; Small one and large one ground send number at interval like this, can be clear that the variation of signal on frequency spectrograph, in time notes the size of radio frequency output signal under every kind of situation.Transmission channel 6,7,8 measurement and passage 5 are similar.Accompanying drawing 9 is exactly the signal strength values that the transmission channel 5,6,7,8 of surveying in this example is exported when different input control voltage.
Use said method to finish the test of 256 * 8 data points of this 8 paths, only need time a few minutes.Improved testing efficiency greatly, can make the response characteristic of the used possibility state of grasping whole passages in the short period of time, played a multiplier effect.
Claims (6)
1. a multi-channel data method of testing is characterized in that, described method comprises treatment step:
1), computer parallel port or Serial Port Line are connected to correspondingly the controlled pin of the correlated digital device that need import control according to the performance parameter of tested digital device;
The binary digital information that 2) computer parallel port under all possible digital state of each passage need be sent is collected, and forms the data file of control computer parallel port output information;
3) input step 2) data file that forms, utilize computer parallel port or serial ports, what the operation correlation computer sent that several softwares carry out each state of digital device send number setting;
4) and the response parameter numerical value to be measured of each each state of passage of line item.
2. multi-channel data method of testing according to claim 1 is characterized in that, in the described step 4), selects the correlate meter floppy drive for use according to parameter characteristic to be measured, directly store test data.
3. multi-channel data method of testing according to claim 1 is characterized in that, in the described step 4), adjusts the parallel port and send several softwares to send several speed, the hand-kept relevant test data.
4. according to the described multi-channel data method of testing of one of claim 1 to 3, it is characterized in that described step 2) in the form of data file can be in the following way:
The 1st kind of state of passage 1, the 2nd kind of state of passage 1 ... passage 1 last a kind of state; The 1st kind of state of passage 2, the 2nd kind of state of passage 2 ... passage 2 last a kind of states; , the 1st kind of state of last passage, the 2nd kind of state of last passage ... the last a kind of state of last passage.
5. according to the described multi-channel data method of testing of one of claim 1 to 3, it is characterized in that described step 2) in the form of data file can be in the following way:
The 1st kind of state of passage 1, the 1st kind of state of passage 2 ..., the 1st kind of state of last passage; The 2nd kind of state of passage 1, the 2nd kind of state of passage 2 ... the 2nd kind of state of last passage; , passage 1 last a kind of state; Passage 2 last a kind of states; , the last a kind of state of last passage.
6. according to the described multi-channel data method of testing of one of claim 1 to 3, it is characterized in that described step 2) in the form of data file can adopt state to carry out small one and large one mode at interval to passage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2003101135173A CN1312868C (en) | 2003-11-13 | 2003-11-13 | A multichannel testing method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2003101135173A CN1312868C (en) | 2003-11-13 | 2003-11-13 | A multichannel testing method |
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| CN1545229A CN1545229A (en) | 2004-11-10 |
| CN1312868C true CN1312868C (en) | 2007-04-25 |
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| CNB2003101135173A Expired - Fee Related CN1312868C (en) | 2003-11-13 | 2003-11-13 | A multichannel testing method |
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Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100392420C (en) * | 2005-03-17 | 2008-06-04 | 上海华虹集成电路有限责任公司 | Multi-channel analyzer of non-contact applied chip |
| CN100428181C (en) * | 2005-12-22 | 2008-10-22 | 联想(北京)有限公司 | Detecting method for computer parallel port and detecting method for parallel port dataline |
| CN104808134A (en) * | 2015-04-18 | 2015-07-29 | 南通金泰科技有限公司 | Multi-channel chip test system |
| CN109597296B (en) * | 2018-10-19 | 2024-08-23 | 珠海经济特区南森科技有限公司 | Automobile clock aging detection system and method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5875198A (en) * | 1996-08-08 | 1999-02-23 | Advantest Corporation | Semiconductor device testing apparatus |
| CN1290079A (en) * | 1999-09-24 | 2001-04-04 | 特克特朗尼克公司 | Intrustment with multi-channel telecommunication time scales testing and measuring capacibility |
| KR20020052515A (en) * | 2000-12-26 | 2002-07-04 | 박종섭 | System function verification apparatus and method using evaluation board in multi channel |
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2003
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5875198A (en) * | 1996-08-08 | 1999-02-23 | Advantest Corporation | Semiconductor device testing apparatus |
| CN1290079A (en) * | 1999-09-24 | 2001-04-04 | 特克特朗尼克公司 | Intrustment with multi-channel telecommunication time scales testing and measuring capacibility |
| KR20020052515A (en) * | 2000-12-26 | 2002-07-04 | 박종섭 | System function verification apparatus and method using evaluation board in multi channel |
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| CN1545229A (en) | 2004-11-10 |
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Granted publication date: 20070425 Termination date: 20131113 |