CN113905512B - Circuit board with boss and manufacturing method thereof - Google Patents
Circuit board with boss and manufacturing method thereof Download PDFInfo
- Publication number
- CN113905512B CN113905512B CN202111276902.4A CN202111276902A CN113905512B CN 113905512 B CN113905512 B CN 113905512B CN 202111276902 A CN202111276902 A CN 202111276902A CN 113905512 B CN113905512 B CN 113905512B
- Authority
- CN
- China
- Prior art keywords
- boss
- circuit board
- layer
- metallization layer
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
- H05K1/113—Via provided in pad; Pad over filled via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The application discloses circuit board with boss, including the circuit board base member, the blind hole is seted up to the dielectric layer that is located the top layer, the boss has in the blind hole, the prepreg layer that the boss utilizes to be located the blind hole bottom surface realizes being fixed with the lamination of circuit board base plate, and set up the through-hole that runs through boss and circuit board base member in the blind hole, the inner wall of through-hole has the inner wall metallization layer, and the inner wall metallization layer connects the bottom surface metallization layer that is located circuit board base member bottom surface and the top surface metallization layer that is located the boss top surface simultaneously at least, bottom surface metallization layer, inner wall metallization layer and top surface metallization layer are used for realizing the bottom surface of circuit board base member and the board level interconnection between other circuit boards that are located above the circuit board, can accomplish the miniaturization with the product, moreover make circuit design more nimble, the processing mode is simpler, can realize the perpendicular interconnection of the different layers of PCB board, there is not elasticity problem, life is also longer. The application also discloses a manufacturing method of the circuit board with the boss.
Description
Technical Field
The invention belongs to the technical field of printed circuit board processing, and particularly relates to a circuit board with a boss and a manufacturing method thereof.
Background
The multi-layer circuit board is used as a part of the whole machine, and generally cannot form the whole system, different board-level circuits must be interconnected in various ways to transmit electric signals, and the interconnection between the board-level circuits can be performed in various ways, such as pin connection, button connection, cable connection, and the like. Specifically, in the existing electronic system equipment, signal and power transmission among all functional modules or units mainly adopt interconnection modes such as cable connection, surface Mount Technology (SMT) or Ball Grid Array (BGA), and the like, while in the radio frequency microwave system, because of more signal channels and higher requirements for high-frequency transmission, the high-frequency signal transmission among all functional modules almost completely depends on rigid cables, high-frequency connectors and the like, so that the radio frequency microwave system structure is large in size, occupies more space, has complex interconnection relationship of complex radio frequency microwave systems, is mutually coiled, and brings difficulty to miniaturization and maintenance of the system.
At present, in the board-level vertical interconnection of a radio frequency system, a common use is a hair button technology, which is a welding-free vertical interconnection technology, and is easy to maintain, compared with the traditional board-level interconnection mode, the assembly space is reduced, and the working procedure is reduced, but when the technology is used, the hair buttons are required to be installed in a hole-shaped cavity, because friction and extrusion exist, the elasticity of the technology is easy to influence the service life of the technology, the manufacturing diameter of the hair buttons is not small enough, the distance between different hair buttons is relatively large, the miniaturization of the system is also not facilitated, the hair buttons are connected surface to surface, all the connecting positions are required to be positioned on the same plane, the manufacturing is not flexible enough, the processing mode is also very complex, and in order to ensure the reliability of products, the connector is required to be manufactured together with an insulator for the system, and the insulating material is used as the support of the hair buttons, so that the fixing and protecting functions are achieved.
Disclosure of Invention
In order to solve the problems, the invention provides the circuit board with the boss and the manufacturing method thereof, which can miniaturize the product, lead the circuit design to be more flexible, lead the processing mode to be simpler, realize the vertical interconnection of different layers of the PCB, have no elasticity problem and have longer service life.
The invention provides a circuit board with a boss, which comprises a circuit board substrate, wherein the circuit board substrate is provided with a plurality of medium layers which are sequentially laminated, adjacent medium layers are connected by utilizing a prepreg layer, the medium layer positioned on the top layer is provided with a blind hole, the blind hole is internally provided with the boss, the boss is laminated and fixed with the circuit board substrate by utilizing the prepreg layer positioned on the bottom surface of the blind hole, the blind hole is internally provided with a through hole penetrating through the boss and the circuit board substrate, the inner wall of the through hole is provided with an inner wall metallization layer, the inner wall metallization layer is at least simultaneously connected with the bottom surface metallization layer positioned on the bottom surface of the circuit board substrate and the top surface metallization layer positioned on the top surface of the boss, and the bottom surface metallization layer, the inner wall metallization layer and the top surface metallization layer are used for realizing board-level interconnection between the bottom surface of the circuit board substrate and other circuit boards positioned on the circuit board.
Preferably, in the circuit board with the boss, a bonding pad is further provided at a position of the top surface metallization layer on the top surface of the boss, and the bonding pad is used for bonding connection with the other circuit board.
Preferably, in the circuit board with the boss, the inner wall metallization layer is further connected with a metallization layer positioned on the surface of the medium layer in the middle.
Preferably, in the circuit board with the boss, the boss is made of a high Tg plate.
The invention provides a manufacturing method of a circuit board with a boss, the circuit board comprises a circuit board substrate, the circuit board substrate is provided with a plurality of medium layers which are sequentially laminated, adjacent medium layers are connected by utilizing a prepreg layer, and the manufacturing method comprises the following steps:
a blind hole is formed in the dielectric layer of the circuit board substrate, which is positioned on the top layer, and the prepreg layer is exposed;
placing the boss into the blind hole and laminating, and fixing the boss and the circuit board substrate by using the prepreg layer;
a through hole penetrating through the boss and the circuit board substrate is formed in the blind hole;
and manufacturing an inner wall metallization layer on the inner wall of the through hole, and manufacturing a circuit pattern on the surface of the circuit board substrate, so that the inner wall metallization layer is at least connected with a bottom surface metallization layer positioned on the bottom surface of the circuit board substrate and a top surface metallization layer positioned on the top surface of the boss at the same time, wherein the bottom surface metallization layer, the inner wall metallization layer and the top surface metallization layer are used for realizing board-level interconnection between the bottom surface of the circuit board substrate and other circuit boards positioned on the circuit board.
Preferably, in the method for manufacturing a circuit board with a boss, the manufacturing an inner wall metallization layer on the inner wall of the through hole, and manufacturing a circuit pattern on the surface of the circuit board substrate includes:
depositing chemical copper in the through hole, and increasing the copper thickness to 10 micrometers by using an electroplating mode;
coating negative adhesive on the surface of the circuit board substrate and pre-baking;
manufacturing a corresponding first male piece according to a circuit pattern to be manufactured, grooving at a position corresponding to the first male piece and the boss, manufacturing a light-transmitting medium piece with the same height as the boss, arranging a groove matched with the boss in size at a position corresponding to the boss on the light-transmitting medium piece, and manufacturing a second male piece with the boss surface pattern;
aligning and stacking the first positive plate, the light-transmitting medium plate and the second positive plate on the surface of the circuit board substrate in sequence, exposing, taking down the first positive plate, the light-transmitting medium plate and the second positive plate for developing, and then hardening according to the curing condition of negative glue;
copper is electroplated with glue, so that the thickness of the inner wall metallization layer is more than 25 microns, and then tin is electroplated with glue;
removing the cured negative adhesive;
removing the copper layer at the position without tin layer coverage by acid etching to obtain the circuit pattern;
and removing the tin layer to expose the copper surface.
Preferably, in the method for manufacturing a circuit board with a boss, before the boss is placed in the blind hole, the method further includes:
chamfering is carried out on four corners of the boss by using a milling machine or an engraving machine, and then the boss is scribed by using a scribing machine.
Preferably, in the method for manufacturing a circuit board with a boss, the step of placing the boss into the blind hole and laminating the boss, and the step of fixing the boss and the circuit board substrate by using the prepreg layer includes:
placing an auxiliary lamination plate on the surface of the circuit board substrate, wherein the auxiliary lamination plate is provided with through grooves matched with the boss in position and size, and the through grooves are at least 50 micrometers larger than the boss in all directions of a horizontal plane;
and laminating and fixing the boss on the circuit board substrate by using a laminating machine.
Preferably, in the method for manufacturing a circuit board with a boss, a numerical control drilling machine is used for performing numerical control drilling, and a through hole penetrating through the boss and the circuit board substrate is formed in the blind hole.
Preferably, in the method for manufacturing a circuit board with a boss, the method further includes:
and manufacturing a bonding pad at the position of the top surface metallization layer on the top surface of the boss, wherein the bonding pad is used for bonding connection with other circuit boards.
As can be seen from the above description, the circuit board with the boss provided by the invention comprises a circuit board substrate, wherein the circuit board substrate is provided with a plurality of medium layers which are sequentially laminated, the adjacent medium layers are connected by utilizing a prepreg layer, the medium layer positioned on the top layer is provided with a blind hole, the blind hole is internally provided with the boss, the boss is fixedly laminated with the circuit board substrate by utilizing the prepreg layer positioned on the bottom surface of the blind hole, the blind hole is internally provided with a through hole penetrating through the boss and the circuit board substrate, the inner wall of the through hole is provided with an inner wall metallization layer, the inner wall metallization layer is at least connected with the bottom surface metallization layer positioned on the bottom surface of the circuit board substrate and the top surface metallization layer positioned on the top surface of the boss at the same time, and the bottom surface metallization layer and the top surface metallization layer are used for realizing plate-level interconnection between the bottom surface of the circuit board substrate and other circuit boards positioned on the top surface. The manufacturing method of the circuit board with the boss provided by the invention has the same advantages and is not repeated here.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present invention, and that other drawings can be obtained according to the provided drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic view of an embodiment of a circuit board with a boss according to the present invention;
fig. 2 is a schematic diagram of connection between a circuit board with a boss and another PCB provided in this embodiment;
fig. 3 is a schematic diagram of an embodiment of a method for manufacturing a circuit board with a boss according to the present invention;
FIG. 4 is a schematic view of a boss and multi-layer board stack;
FIG. 5 is a schematic view of a boss after chamfering four corners;
FIG. 6 is a schematic diagram of boss lamination using an auxiliary lamination;
FIG. 7 is a schematic diagram before lamination;
FIG. 8 is a schematic view after the through holes are opened;
FIG. 9 is a schematic diagram of steps in the fabrication of a circuit pattern of a circuit board having a bump;
FIG. 10 is a schematic diagram of a first step of fabricating a circuit pattern on a surface of a circuit board substrate;
FIG. 11 is a schematic diagram of a second step of fabricating a circuit pattern on the surface of the circuit board substrate;
FIG. 12 is a schematic diagram of a third step of fabricating a circuit pattern on a surface of a circuit board substrate;
FIG. 13 is a schematic diagram of a fourth step of fabricating a circuit pattern on a surface of a circuit board substrate;
FIG. 14 is a schematic diagram of a fifth step of fabricating a circuit pattern on a surface of a circuit board substrate;
FIG. 15 is a schematic diagram of a sixth step of fabricating a circuit pattern on a surface of a circuit board substrate;
FIG. 16 is a schematic diagram of a seventh step of fabricating a circuit pattern on a surface of a circuit board substrate;
fig. 17 is a schematic view of an eighth step of fabricating a circuit pattern on the surface of the circuit board substrate.
Detailed Description
The invention provides the circuit board with the boss and the manufacturing method thereof, which can miniaturize the product, lead the circuit design to be more flexible, lead the processing mode to be simpler, realize the vertical interconnection of different layers of the PCB, have no elasticity problem and have longer service life.
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
An embodiment of a circuit board with a boss provided by the present invention is shown in fig. 1, fig. 1 is a schematic diagram of an embodiment of a circuit board with a boss provided by the present invention, the circuit board with a boss includes a circuit board substrate 1, the circuit board substrate 1 has multiple dielectric layers 101, 102, 103 stacked in sequence, adjacent dielectric layers are connected by prepreg layers 104 and 105, it should be noted that only these layers are described herein, but may actually include other numbers of dielectric layers and prepreg layers, where the dielectric layer 101 on the top layer is provided with a blind hole, the size of the blind hole may be larger than the size of the boss to be placed in all directions, for example, may be 50 micrometers larger, the blind hole has a boss 2 therein, the boss 2 is laminated and fixed with the circuit board substrate 1 by using the prepreg layer 104 on the bottom surface of the blind hole, that is, the boss 2 and the prepreg layer 104 of the circuit board substrate 1 may be pressed together by pressing, and the through hole 3 penetrating the boss 2 and the circuit board substrate 1 is formed in the blind hole, where the through hole 3 may be formed by, but not limited to, using a numerical control drilling method, the inner wall of the through hole 3 has an inner wall metallization layer 401, and the inner wall metallization layer 401 may be formed by, but not limited to, using a copper plating process, and the inner wall metallization layer 401 is connected to at least the bottom metallization layer 402 located at the bottom surface of the circuit board substrate and the top surface metallization layer 403 located at the top surface of the boss, the bottom surface metallization layer 402, the inner wall metallization layer 401 and the top surface metallization layer 403 are used to realize board-level interconnection between the bottom surface of the circuit board substrate 1 and other circuit boards located on the circuit board, so that the connection manner can form a more stable electrical signal connection, various disadvantages of the button used in the prior art are avoided.
It should be noted that, in this embodiment, the boss 2 is mainly processed on the circuit board, and then the signal connection between different circuit boards is completed through the metallized through holes on the boss 2, this boss 2 can be used as a part of the circuit board to extend, and can be made of PCB materials with thickness meeting the requirements, the height of the protruding front surface can be above 1mm, the manufactured through holes can be ensured to extend into the circuit board, and the vertical interconnection between different circuit board layers is realized by connecting the metallized layer on the top surface and the metallized layer on the bottom surface by metallizing the inner wall of this through hole, so that the design is more flexible.
As can be seen from the above description, the circuit board with the boss provided by the invention comprises a circuit board substrate, the circuit board substrate is provided with the sequentially laminated multi-layer dielectric layers, the adjacent dielectric layers are connected by using the prepreg layer, the dielectric layer at the top layer is provided with the blind hole, the blind hole is internally provided with the boss, the boss is fixedly laminated with the circuit board substrate by using the prepreg layer at the bottom surface of the blind hole, the blind hole is internally provided with the through hole penetrating through the boss and the circuit board substrate, the inner wall of the through hole is provided with the inner wall metallization layer, the inner wall metallization layer is at least connected with the bottom surface metallization layer at the bottom surface of the circuit board substrate and the top surface metallization layer at the top surface of the boss at the same time, and the bottom surface metallization layer, the inner wall metallization layer and the top surface metallization layer are used for realizing board-level interconnection between the bottom surface of the circuit board substrate and other circuit boards at the top surface of the circuit board.
In a specific embodiment of the circuit board with a boss described above, referring to fig. 2, fig. 2 is a schematic diagram of connection between the circuit board with a boss and another PCB board provided in this embodiment, a pad (not shown in the figure) is further provided at a position of the top surface metallization layer 403 on the top surface of the boss 2, and the pad is used for bonding connection with other circuit boards 6, and may be bonded connection by using the wire 5 shown in fig. 2. That is, the bonding pad can be used for connecting electric signals with the corresponding position of the other PCB, so that the connection between the two PCBs is realized.
In another embodiment of the above-mentioned circuit board with the boss, with continued reference to fig. 1, the inner wall metallization layer 401 may be further connected with the metallization layer 404 located on the surface of the intermediate dielectric layer 102, that is, the inner wall metallization layer 401 may be used to connect any one or more of the metallization layers on the surface of the dielectric layer according to actual needs, so as to achieve electrical connection between different circuit layers.
In yet another embodiment of the above circuit board with the boss, boss 2 may be a boss made of a high Tg sheet material, where Tg refers to the glass transition temperature, which is the glass transition temperature of the sheet material when heated at high temperature, and the high Tg sheet material is typically a sheet material with a glass transition temperature greater than 170 degrees, where FR4 with a high Tg may be selected, but not limited to, or a ceramic filled Rogers 4350B material.
Fig. 3 is a schematic diagram of an embodiment of a method for manufacturing a circuit board with a boss, where the circuit board includes a circuit board substrate, and the circuit board substrate includes sequentially stacked dielectric layers, and adjacent dielectric layers are connected by using prepreg layers, and the method includes the following steps:
s1: a blind hole is formed in a dielectric layer of the circuit board substrate, which is positioned on the top layer, so that a prepreg layer is exposed;
specifically, referring to fig. 4, fig. 4 is a schematic diagram of a lamination of a boss and a multi-layer board, it can be seen that only the dielectric layer 101 on the top layer is provided with blind holes, and the underlying prepreg layer 104 is exposed, and the prepreg layer 104 is used to be fixed with the boss 2.
S2: placing the boss into the blind hole and laminating, and fixing the boss and the circuit board substrate by utilizing the prepreg layer;
specifically, the boss can be made of a high Tg double-sided copper-clad dielectric material with the thickness of more than 1.5 mm. The manufacturing method specifically comprises the steps of firstly etching a copper-clad layer on the bottom surface to be clean, chamfering the four corners of the boss by using a milling machine or a engraving machine, then scribing the boss by using a scribing machine, when the area of the boss is required to be smaller, forming the boss by using the milling machine and the engraving machine, wherein the appearance of the boss cannot meet the technological requirements, machining by using a grinding wheel scribing machine, firstly machining the chamfer at four corners of the boss by using the milling machine or the engraving machine, and as shown in fig. 5, reserving at least the scribing cutter block scribing distance between each boss unit in typesetting, ensuring that the scribing effect is better at more than 2mm, and then scribing the boss in the X direction and the Y direction by using the scribing machine, so that the boss with four corners being chamfer and regular size can be obtained.
Then, put into the blind hole with the boss, because there is great difference in height with the multiply wood, consequently can not direct pressfitting, consequently, this step can adopt following scheme: referring to fig. 6, fig. 6 is a schematic view of boss lamination by using an auxiliary lamination, in which the auxiliary lamination 7 is made of a high Tg material, and the thickness of the auxiliary lamination 7 is less than or equal to the height of the boss higher than the front surface of the multilayer board, but the smaller height cannot exceed 50 μm, and cannot be thicker than the height of the boss 2 higher than the front surface of the multilayer board, the auxiliary lamination 7 is placed on the surface of the circuit board substrate 1, a through groove matching with the position and the size of the boss 2 is formed in the auxiliary lamination 7, the through groove can be at least 50 μm larger than the boss in each direction of the horizontal plane, as shown in fig. 7, the schematic view before lamination is shown in fig. 7, and then the through grooves are placed in a laminating machine, the boss 2 is laminated and fixed on the circuit board substrate 1 by using the laminating machine according to selected prepreg lamination parameters, after lamination of the multilayer board is completed, since no prepreg is connected between the auxiliary lamination 7 and the main body of the multilayer board, the auxiliary lamination 7 can be taken down after the lamination process is completed, hot water and cold water can be soaked in the process, and the auxiliary lamination 7 can be taken down more easily.
S3: a through hole penetrating through the boss and the circuit board substrate is formed in the blind hole;
it should be noted that, after the lamination of the boss is completed, the auxiliary lamination plate does not need to be taken down immediately, the boss and the auxiliary lamination plate can be taken together as a whole to form the through hole, the through hole can be formed in a numerical control drilling mode, as shown in fig. 8, fig. 8 is a schematic diagram after the through hole is formed, the auxiliary lamination plate can be taken down, and then the subsequent steps are performed.
S4: and manufacturing an inner wall metallization layer on the inner wall of the through hole, and manufacturing a circuit pattern on the surface of the circuit board substrate, so that the inner wall metallization layer is at least connected with a bottom surface metallization layer positioned on the bottom surface of the circuit board substrate and a top surface metallization layer positioned on the top surface of the boss at the same time, wherein the bottom surface metallization layer, the inner wall metallization layer and the top surface metallization layer are used for realizing board-level interconnection between the bottom surface of the circuit board substrate and other circuit boards positioned on the circuit board.
It should be noted that the final result obtained in this step is shown in fig. 1.
Through the description, the manufacturing method is not connected by adopting the button wool for board-level interconnection like the prior art, but is connected by adopting the metallization layer, so that the defect of a button wool connection mode is avoided, the product can be miniaturized, the circuit design is more flexible, the processing mode is simpler, the vertical interconnection of different layers of the PCB can be realized, the elasticity problem does not exist, and the service life is longer.
Because the level difference exists on the surface of the circuit board due to the existence of the boss, the dry film and the film cannot be used for manufacturing the surface pattern in a conventional manner, and therefore, a specific embodiment of a manufacturing method of the circuit board with the boss is also provided, as shown in fig. 9, fig. 9 is a schematic diagram of steps for manufacturing the circuit pattern of the circuit board with the boss, an inner wall metallization layer is manufactured on the inner wall of the through hole, and the steps for manufacturing the circuit pattern on the surface of the circuit board substrate can specifically comprise the following substeps:
s41: depositing chemical copper in the through hole, and increasing the copper thickness to 10 micrometers by using an electroplating mode;
referring to fig. 10, fig. 10 is a schematic diagram of a first step of fabricating a circuit pattern on a surface of a circuit board substrate, in which a copper deposition process is performed in a via hole according to a conventional multi-layer board fabrication process, a layer of chemical copper 1001 is deposited in the via hole, and then the thickness of the chemical copper is increased to 10 μm by electroplating, and in addition, a copper layer 1002 is also provided at other positions, and of course, the thickness of the chemical copper may be finely adjusted, which is not limited thereto.
S42: coating negative adhesive on the surface of the circuit board substrate and pre-baking;
referring to fig. 11, fig. 11 is a schematic diagram of a second step of manufacturing a circuit pattern on the surface of the circuit board substrate, specifically, the surface of the circuit board substrate may be coated with a negative photoresist using a photoresist sprayer to obtain a negative photoresist layer 111, and the negative photoresist layer is prebaked after the coating is completed.
S43: manufacturing a corresponding first male piece according to a circuit pattern to be manufactured, grooving at a position corresponding to a boss of the first male piece, manufacturing a light-transmitting medium piece with the same height as the boss, arranging a groove matched with the boss in size at a position corresponding to the boss on the light-transmitting medium piece, and manufacturing a second male piece with a boss surface pattern;
referring to fig. 12, fig. 12 is a schematic diagram of a third step of manufacturing a circuit pattern on the surface of the circuit board substrate, specifically, a corresponding first male tab 121 may be manufactured according to the pattern designed on the surface, a slot is formed in the first male tab 121 corresponding to the boss position, then a transparent medium sheet 122 having the same height as the boss 2 is manufactured, the transparent medium sheet 122 may be, but not limited to, a transparent glass sheet or a transparent plastic sheet, the slot is also formed in the boss position, the transparent medium sheet 122 can compensate the height difference between the boss and the surface of the circuit board substrate, and then a second male tab 123 having the boss surface pattern is manufactured, and the part of the second male tab 123 corresponding to the other positions of the boss is in a transparent state.
S44: aligning and stacking the first positive plate, the light-transmitting medium plate and the second positive plate on the surface of the circuit board substrate in sequence, exposing, taking down the first positive plate, the light-transmitting medium plate and the second positive plate for developing, and then hardening according to the curing condition of the negative adhesive;
referring to fig. 13, fig. 13 is a schematic diagram of a fourth step of fabricating a circuit pattern on the surface of the circuit board substrate, and sequentially performing exposure development and hardening processes by using this stacking method.
S45: copper is electroplated with glue, so that the thickness of the inner wall metallization layer is more than 25 micrometers, and then tin is electroplated with glue;
referring to fig. 14, fig. 14 is a schematic diagram of a fifth step of fabricating a circuit pattern on the surface of the circuit board substrate, specifically, firstly, copper is electroplated with glue, so that the thickness of the obtained copper layer 141 is larger than 25 μm on average, then electroplating is stopped, and then tin is electroplated with glue, so that the formed tin layer 142 can protect the circuit pattern, and in addition, at this time, a negative glue 143 remains on the surface of the copper layer 141 without the tin layer.
S46: removing the cured negative adhesive;
referring to fig. 15, fig. 15 is a schematic view showing a sixth step of patterning the surface of the substrate of the circuit board, and it can be seen that the copper layer 141 and the tin layer 142 remain after the negative photoresist is removed.
S47: removing the copper layer at the position without tin layer coverage by acid etching to obtain a circuit pattern;
referring to fig. 16, fig. 16 is a schematic view of a seventh step of patterning the surface of the circuit board substrate, where only the tin layer 142 and the underlying copper layer 141 are left, and other copper layers not protected by the tin layer are removed.
S48: and removing the tin layer to expose the copper surface.
Referring to fig. 17, fig. 17 is a schematic diagram of an eighth step of fabricating a circuit pattern on the surface of the circuit board substrate, specifically, a tin stripping solution may be used to remove the electroplated tin layer and expose the copper surface, and only the copper layer 141 remains at this time, which completes the fabrication of the circuit pattern.
In a specific embodiment of the above method for manufacturing a circuit board with a boss, the method may further include the following steps: and manufacturing a bonding pad at the position of the top surface metallization layer on the top surface of the boss, wherein the bonding pad is used for bonding connection with other circuit boards.
In summary, the boss is adopted as the interconnection method between board-level circuits, compared with the existing button wool or other interconnection methods, the area occupied by the boss is smaller, the miniaturization of products is facilitated, new interconnection parts such as buttons wool and cables are not required to be purchased, the boss can complete interconnection between different layers of the multi-layer board through the metallized holes, and interconnection interfaces of other interconnection modes are required to be on the surface of a graph, so that the design is more flexible.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. The utility model provides a circuit board with boss, includes the circuit board base member, the circuit board base member has the multilayer dielectric layer of laminating in proper order, and is adjacent utilize the prepreg layer to connect between the dielectric layer, its characterized in that is located the blind hole is seted up to the dielectric layer on top layer, have the boss in the blind hole, the boss utilize the prepreg layer that is located the blind hole bottom surface realize with the lamination of circuit board base member is fixed, just set up in the blind hole and run through the boss with the through-hole of circuit board base member, the inner wall of through-hole has the inner wall metallization layer, just the inner wall metallization layer is at least simultaneously connected and is located the bottom surface metallization layer of circuit board base member bottom surface and be located the top surface metallization layer of boss top surface, the bottom surface metallization layer inner wall metallization layer with the top surface metallization layer is used for realizing the bottom surface of circuit board base member with be located the board between the other circuit board on the circuit board the board level interconnect.
2. The circuit board with boss of claim 1 wherein the top surface metallization layer of the boss top surface is further provided with a bonding pad for bonding with the other circuit board.
3. The circuit board with boss of claim 1 wherein the inner wall metallization layer is further connected with a metallization layer on the surface of the intermediate dielectric layer.
4. The circuit board with boss of claim 1 wherein the boss is a boss made from a high Tg sheet material.
5. The manufacturing method of the circuit board with the boss comprises a circuit board substrate, wherein the circuit board substrate is provided with a plurality of medium layers which are sequentially stacked, and adjacent medium layers are connected by utilizing a prepreg layer, and the manufacturing method is characterized by comprising the following steps:
a blind hole is formed in the dielectric layer of the circuit board substrate, which is positioned on the top layer, and the prepreg layer is exposed;
placing the boss into the blind hole and laminating, and fixing the boss and the circuit board substrate by using the prepreg layer;
a through hole penetrating through the boss and the circuit board substrate is formed in the blind hole;
and manufacturing an inner wall metallization layer on the inner wall of the through hole, and manufacturing a circuit pattern on the surface of the circuit board substrate, so that the inner wall metallization layer is at least connected with a bottom surface metallization layer positioned on the bottom surface of the circuit board substrate and a top surface metallization layer positioned on the top surface of the boss at the same time, wherein the bottom surface metallization layer, the inner wall metallization layer and the top surface metallization layer are used for realizing board-level interconnection between the bottom surface of the circuit board substrate and other circuit boards positioned on the circuit board.
6. The method of manufacturing a circuit board with a boss according to claim 5, wherein the manufacturing an inner wall metallization layer on the inner wall of the through hole, and the manufacturing a circuit pattern on the surface of the circuit board substrate comprises:
depositing chemical copper in the through hole, and increasing the copper thickness to 10 micrometers by using an electroplating mode;
coating negative adhesive on the surface of the circuit board substrate and pre-baking;
manufacturing a corresponding first male piece according to a circuit pattern to be manufactured, grooving at a position corresponding to the first male piece and the boss, manufacturing a light-transmitting medium piece with the same height as the boss, arranging a groove matched with the boss in size at a position corresponding to the boss on the light-transmitting medium piece, and manufacturing a second male piece with the boss surface pattern;
aligning and stacking the first positive plate, the light-transmitting medium plate and the second positive plate on the surface of the circuit board substrate in sequence, exposing, taking down the first positive plate, the light-transmitting medium plate and the second positive plate for developing, and then hardening according to the curing condition of negative glue;
copper is electroplated with glue, so that the thickness of the inner wall metallization layer is more than 25 microns, and then tin is electroplated with glue;
removing the cured negative adhesive;
removing the copper layer at the position without tin layer coverage by acid etching to obtain the circuit pattern;
and removing the tin layer to expose the copper surface.
7. The method of manufacturing a circuit board with a boss as recited in claim 5, further comprising, prior to said placing the boss into the blind hole:
chamfering is carried out on four corners of the boss by using a milling machine or an engraving machine, and then the boss is scribed by using a scribing machine.
8. The method of manufacturing a circuit board with a boss as claimed in claim 5, wherein said placing and laminating the boss in the blind hole, and said fixing the boss to the circuit board substrate by using the prepreg layer comprises:
placing an auxiliary lamination plate on the surface of the circuit board substrate, wherein the auxiliary lamination plate is provided with through grooves matched with the boss in position and size, and the through grooves are at least 50 micrometers larger than the boss in all directions of a horizontal plane;
and laminating and fixing the boss on the circuit board substrate by using a laminating machine.
9. The method of manufacturing a circuit board with bosses according to claim 5, wherein numerical control drilling is performed by a numerical control drilling machine, and through holes penetrating through the bosses and the circuit board substrate are formed in the blind holes.
10. The method of manufacturing a circuit board with a boss as defined in claim 5, further comprising:
and manufacturing a bonding pad at the position of the top surface metallization layer on the top surface of the boss, wherein the bonding pad is used for bonding connection with other circuit boards.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111276902.4A CN113905512B (en) | 2021-10-29 | 2021-10-29 | Circuit board with boss and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111276902.4A CN113905512B (en) | 2021-10-29 | 2021-10-29 | Circuit board with boss and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113905512A CN113905512A (en) | 2022-01-07 |
| CN113905512B true CN113905512B (en) | 2023-05-16 |
Family
ID=79027095
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111276902.4A Active CN113905512B (en) | 2021-10-29 | 2021-10-29 | Circuit board with boss and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113905512B (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001111233A (en) * | 1999-10-07 | 2001-04-20 | Mitsubishi Gas Chem Co Inc | Flip-chip mounting high-density multilayer printed interconnection board |
| US7145238B1 (en) * | 2004-05-05 | 2006-12-05 | Amkor Technology, Inc. | Semiconductor package and substrate having multi-level vias |
| CN105722302A (en) * | 2014-12-04 | 2016-06-29 | 深南电路有限公司 | Circuit board with embedded boss metal base, and machining method for circuit board |
| CN106505062A (en) * | 2015-09-03 | 2017-03-15 | 钰桥半导体股份有限公司 | Interconnection substrates, its manufacture method and vertical stacks stacked semiconductor subassembly |
| CN111029326A (en) * | 2018-10-09 | 2020-04-17 | 西安邮电大学 | Convex point interconnection structure based on LCP process |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050206007A1 (en) * | 2004-03-18 | 2005-09-22 | Lei Li | Structure and method for contact pads having a recessed bondable metal plug over of copper-metallized integrated circuits |
-
2021
- 2021-10-29 CN CN202111276902.4A patent/CN113905512B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001111233A (en) * | 1999-10-07 | 2001-04-20 | Mitsubishi Gas Chem Co Inc | Flip-chip mounting high-density multilayer printed interconnection board |
| US7145238B1 (en) * | 2004-05-05 | 2006-12-05 | Amkor Technology, Inc. | Semiconductor package and substrate having multi-level vias |
| CN105722302A (en) * | 2014-12-04 | 2016-06-29 | 深南电路有限公司 | Circuit board with embedded boss metal base, and machining method for circuit board |
| CN106505062A (en) * | 2015-09-03 | 2017-03-15 | 钰桥半导体股份有限公司 | Interconnection substrates, its manufacture method and vertical stacks stacked semiconductor subassembly |
| CN111029326A (en) * | 2018-10-09 | 2020-04-17 | 西安邮电大学 | Convex point interconnection structure based on LCP process |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113905512A (en) | 2022-01-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR101969174B1 (en) | Wiring board and method for manufacturing the same | |
| KR20140033177A (en) | Method for manufacturing rigid-flexible printed circuit board and the rigid-flexible printed circuit board | |
| KR20040061409A (en) | Two-sided PCB without via hole and the manufacturing method thereof | |
| US10292279B2 (en) | Disconnect cavity by plating resist process and structure | |
| US7278205B2 (en) | Multilayer printed wiring board and production method therefor | |
| JP5075568B2 (en) | Shielded circuit wiring board and method for manufacturing the same | |
| CN113905512B (en) | Circuit board with boss and manufacturing method thereof | |
| TWI778356B (en) | Rigid-flexible circuit board and method of manufacturing the same | |
| JP4363947B2 (en) | Multilayer wiring circuit board and method for manufacturing the same | |
| US6586687B2 (en) | Printed wiring board with high density inner layer structure | |
| CN112543560A (en) | Circuit board and manufacturing method thereof | |
| KR20130031592A (en) | Method for manuracturing printed circuit board with via and fine pitch circuit and printed circuit board by the same method | |
| CN116507048A (en) | Circuit board forming method and circuit board | |
| CN115484759A (en) | Multi-order optical module HDI board and processing method thereof | |
| KR100567095B1 (en) | method for manufacturing the rigid-flexible substrate having the micro via hole | |
| KR100674305B1 (en) | Printed circuit board and manufacturing method thereof | |
| US20070029109A1 (en) | Multilayer printed wiring board and production method therefor | |
| TWI442844B (en) | Embedded flex circuit board and method of fabricating the same | |
| KR20060042723A (en) | Method for manufacturing rigid-flexible printed circuit board | |
| KR20100095742A (en) | Manufacturing method for embedded pcb, and embedded pcb structure using the same | |
| KR20030071391A (en) | Method for creating bump and making printed circuit board using the said bump | |
| CN110708864B (en) | Printed circuit board containing heat dissipation medium and preparation method thereof | |
| KR100704927B1 (en) | Pcb using paste bump and method of manufacturing thereof | |
| KR20000058240A (en) | Manufacturing method for blind via hole of multi-layer printed circuit board | |
| CN114521055A (en) | Embedded circuit board and manufacturing method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |