CN113838764A

CN113838764A - Electronic information transmission device convenient to installation

Info

Publication number: CN113838764A
Application number: CN202110917449.4A
Authority: CN
Inventors: 王结虎; 赵修美
Original assignee: Individual
Current assignee: Individual
Priority date: 2021-08-11
Filing date: 2021-08-11
Publication date: 2021-12-24

Abstract

The invention relates to an electronic information transmission device convenient to install and a preparation method thereof. A plurality of first grooves which are arranged in parallel are formed on the non-active surface of a first semiconductor die, a first bump is arranged between every two adjacent first grooves, and a plurality of second grooves arranged in parallel are formed on the non-active surface of the second semiconductor die, a second protrusion is arranged between two adjacent second grooves, further in the step of bonding, each of the first projections is caused to be fitted into the corresponding second groove, and each of the second projections is caused to be fitted into the corresponding first groove, an annular trench may then be formed on the side where the first semiconductor die and the second semiconductor die are bonded, and then form the metal heat-dissipating component in the annular ditch groove, the setting of above-mentioned structure can improve the bonding steadiness of first semiconductor die and second semiconductor die, is convenient for the formation of metal heat-dissipating component, and then improves electronic information transmission device's job stabilization nature.

Description

Electronic information transmission device convenient to installation

Technical Field

The invention relates to the field of semiconductor packaging, in particular to an electronic information transmission device convenient to install.

Background

In the conventional electronic information transmission device, stacked semiconductor chips are required as functional elements, and in the conventional semiconductor chip stacking structure, a conductive pad of one semiconductor chip is generally directly bonded to a conductive pad of another semiconductor chip, and then electrical extraction is performed. The conventional semiconductor chip stacking structure has low bonding strength and is not beneficial to heat dissipation of the chip, and when the semiconductor chip stacking structure is assembled into an electronic information transmission device, the semiconductor chip stacking structure is easy to peel off and damage, so that the semiconductor chip stacking structure is inconvenient to install.

Disclosure of Invention

The present invention is directed to overcoming the above-mentioned deficiencies of the prior art and providing an electronic information transmission device that is easy to install.

In order to achieve the above object, the present invention provides a method for manufacturing an electronic information transmission device, which is convenient to install, and comprises the following steps:

step (1): providing a first carrier substrate on which a first semiconductor die is disposed, the first semiconductor die comprising an active face and a non-active face opposite the active face, wherein the active face of the first semiconductor die faces the first carrier substrate.

Step (2): and etching the non-active surface of the first semiconductor die to form a plurality of first grooves which are arranged in parallel, wherein a first bulge is arranged between every two adjacent first grooves.

And (3): a first bonding layer is then conformally formed over the non-active side of the first semiconductor die.

And (4): providing a second carrier substrate on which a second semiconductor die is disposed, the second semiconductor die comprising an active face and a non-active face opposite the active face, wherein the active face of the second semiconductor die faces the second carrier substrate.

And (5): and etching the non-active surface of the second semiconductor tube core to form a plurality of second grooves which are arranged in parallel, wherein a second bulge is arranged between every two adjacent second grooves, the first grooves and the second bulges are correspondingly arranged, and the second grooves and the first bulges are correspondingly arranged.

And (6): a second bonding layer is then conformally formed on the non-active side of the second semiconductor die.

And (7): the inactive face of the second semiconductor die is then bonded to the inactive face of the first semiconductor die such that each of the first bumps is embedded in a respective second recess and such that each of the second bumps is embedded in a respective first recess, followed by removal of the second carrier substrate.

And (8): a first sacrificial layer is then formed on the first carrier substrate, the first sacrificial layer covering only a portion of the first semiconductor die, and an annular trench is then formed on a side where the first semiconductor die and the second semiconductor die are bonded.

And (9): and then forming a metal heat dissipation member, wherein the metal heat dissipation member fills the annular groove and protrudes out of the side surface of the bonding position of the first semiconductor die and the second semiconductor die.

Step (10): then removing the first sacrificial layer, then forming a molding compound layer which wraps the first and second semiconductor dies and the metal heat dissipation member is exposed from the side surface of the molding compound layer, and then removing the first carrier substrate to obtain the packaging module.

Step (11): providing a circuit substrate, arranging a plurality of packaging modules prepared in the step (10) on the circuit substrate, forming a packaging layer, wherein the packaging layer wraps the packaging modules, forming a plurality of third grooves and a plurality of fourth grooves in the packaging layer, wherein each third groove exposes the metal heat dissipation members in the packaging modules adjacent to the third groove, depositing a metal material in the third grooves to form heat conduction blocks, and depositing a metal material in the fourth grooves to form conductive blocks.

Step (12): a re-routing layer is then formed on the encapsulation layer that electrically routes each of the conductive bumps and the second semiconductor die in each of the encapsulation modules.

Preferably, in the step (1) and the step (4), the first carrier substrate and the second carrier substrate each include one of a ceramic substrate, a single-crystal silicon substrate, a polycrystalline silicon substrate, a tempered glass substrate, a sapphire substrate, a copper substrate, an aluminum substrate, or a stainless steel substrate, and an adhesion layer is provided on the first carrier substrate and the second carrier substrate before the first semiconductor die and the second semiconductor die are provided on the first carrier substrate and the second carrier substrate, respectively.

Preferably, in the step (2) and the step (5), the non-active surfaces of the first and second semiconductor dies are subjected to wet etching treatment or dry etching treatment, wherein the width of the first groove is 3 to 8 micrometers greater than the width of the second protrusion, the depth of the first groove is 2 to 5 micrometers greater than the height of the second protrusion, and the width of the second groove is 3 to 8 micrometers greater than the width of the first protrusion.

Preferably, in the step (3) and the step (6), the material of the first and second bonding layers is an organic bonding material or a metal bonding material.

Preferably, in the step (8), a ratio of the thickness of the first sacrificial layer to the thickness of the first semiconductor die is 0.2 to 0.4, the annular groove is formed by a laser etching process or a mechanical cutting process, and a height of the annular groove is greater than a depth of the first groove.

Preferably, in the step (9), a ratio of a width of a portion of the metal heat dissipation member protruding from a side surface where the first and second semiconductor die are bonded to a width of the metal heat dissipation member is 0.2 to 0.5.

Preferably, in the step (10), the molding compound layer includes an epoxy resin.

Preferably, in the step (12), a conductive solder ball is provided on the re-wiring layer.

The invention provides an electronic information transmission device convenient to install, which is formed by adopting the preparation method.

The invention has the beneficial effects that:

in the manufacturing process of the packaging module, the inactive surface of the first semiconductor die is etched to form a plurality of first grooves arranged in parallel and a plurality of corresponding first bulges arranged in parallel, and the inactive surface of the second semiconductor die is etched to form a plurality of second grooves arranged in parallel and a plurality of corresponding second bulges arranged in parallel, wherein the first grooves and the second bulges are correspondingly arranged, and the second grooves and the first bulges are correspondingly arranged. The arrangement of the structure can improve the bonding firmness of the first semiconductor die and the second semiconductor die by enabling each first bump to be embedded into the corresponding second groove and each second bump to be embedded into the corresponding first groove in the bonding process of the first semiconductor die and the second semiconductor die. And because of the arrangement of the structure, an annular groove can be formed on the side surface of the bonding position of the first semiconductor die and the second semiconductor die, and because the bonding stability of the first semiconductor die and the second semiconductor die is strong, the first semiconductor die and the second semiconductor die can not be peeled off from each other even if the annular groove is formed, a metal heat dissipation member can be formed in the annular groove, and the first semiconductor die, the second semiconductor die and the metal heat dissipation member are wrapped by a molding compound layer to obtain a single packaging module, the packaging module is convenient to mount on a circuit substrate, an electronic information transmission device convenient to mount can be obtained, and because of the existence of the metal heat dissipation member and the heat conduction block, the heat can be dissipated quickly, and the stability of the electronic information transmission device can be improved, thereby prolonging the service life of the device.

Drawings

Fig. 1-10 illustrate cross-sectional schematic views of various stages in the manufacture of a manufacturing process for forming an electronic information transfer device for ease of installation in accordance with one embodiment of the present invention.

Detailed Description

The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.

As shown in fig. 1 to 10, the present embodiment provides a method for manufacturing an electronic information transmission device that is easy to install, including the following steps:

in a specific embodiment, as shown in fig. 1, a first carrier substrate 100 is provided, a first semiconductor die 101 is disposed on the first carrier substrate 100, the first semiconductor die 101 including an active face and a non-active face opposite the active face, wherein the active face of the first semiconductor die 101 faces the first carrier substrate.

In the step (1), the first carrier substrate 100 includes one of a ceramic substrate, a monocrystalline silicon substrate, a polycrystalline silicon substrate, a tempered glass substrate, a sapphire substrate, a copper substrate, an aluminum substrate, or a stainless steel substrate, and an adhesion layer is respectively disposed on the first carrier substrate 100 before the first semiconductor die is disposed on the first carrier substrate 100.

In a specific embodiment, the first carrier substrate 100 may be a transparent tempered glass substrate, and then the adhesion layer may lose adhesion under ultraviolet irradiation, and then in the process of setting the first semiconductor die 101, the adhesion layer is first set on the first carrier substrate 100, and then the first semiconductor die 101 is bonded by using the adhesion layer, and then when the adhesion layer and the first semiconductor die 101 need to be peeled off in a subsequent manufacturing process, first ultraviolet light penetrates through the transparent tempered glass substrate to irradiate the adhesion layer, so that the adhesion of the adhesion layer is reduced, and then the peeling difficulty may be reduced, and further the first semiconductor die 101 may be prevented from being damaged.

In a specific embodiment, as shown in fig. 2, step (2) is followed: etching the non-active surface of the first semiconductor die 101 to form a plurality of first grooves 102 arranged in parallel, wherein a first protrusion 103 is arranged between every two adjacent first grooves 102.

In the step (2), a wet etching process or a dry etching process is performed on the non-active surface of the first semiconductor die 101 to form the first recess 102 and the first protrusion 103.

In a specific embodiment, a photoresist mask may be used to perform a wet etch process on the non-active surface of the first semiconductor die 101 to form the first recess 102 and the first protrusion 103.

In a specific embodiment, as shown in fig. 2, step (3) is followed: a first bonding layer (not shown) is then conformally formed over the non-active side of the first semiconductor die 101.

In the step (3), the material of the first bonding layer is an organic bonding material or a metal bonding material.

In a more specific embodiment, the first bonding layer may be formed by spin coating, spray coating, physical vapor deposition, or chemical vapor deposition, and further, the first bonding layer may be an organic bonding layer or a low temperature metal bonding material.

In a specific embodiment, as shown in fig. 3, step (4): providing a second carrier substrate 200, disposing a second semiconductor die 201 on the second carrier substrate 200, the second semiconductor die 201 comprising an active face and a non-active face opposite to the active face, wherein the active face of the second semiconductor die 201 faces the second carrier substrate 200.

Wherein, in the step (4), the second carrier substrate 200 includes one of a ceramic substrate, a single crystal silicon substrate, a polycrystalline silicon substrate, a tempered glass substrate, a sapphire substrate, a copper substrate, an aluminum substrate, or a stainless steel substrate, and before a second semiconductor die is disposed on the second carrier substrate 200, an adhesion layer is disposed on the second carrier substrate 200, respectively.

In a specific embodiment, the second carrier substrate 200 may also be a transparent tempered glass substrate, and the adhesion layer may lose adhesion under ultraviolet light irradiation, and in the process of setting the second semiconductor die 201, the adhesion layer is first set on the second carrier substrate 200, and then the second semiconductor die 201 is bonded by the adhesion layer, and further when the adhesion layer and the second semiconductor die 201 need to be peeled off in a subsequent preparation process, the adhesion layer is first irradiated by ultraviolet light penetrating through the transparent tempered glass substrate, so that the adhesion of the adhesion layer is reduced, and then the peeling difficulty may be reduced, and further the second semiconductor die 201 may be prevented from being damaged.

As shown in fig. 4, in step (5): etching the non-active surface of the second semiconductor die 201 to form a plurality of second grooves 202 arranged in parallel, wherein a second protrusion 203 is disposed between two adjacent second grooves 202, the first groove 102 is disposed corresponding to the second protrusion 203, and the second groove 202 is disposed corresponding to the first protrusion 103.

Wherein, in a specific embodiment, the width of the first groove 102 is 3-8 microns larger than the width of the second protrusion 203, the depth of the first groove 102 is 2-5 microns larger than the height of the second protrusion 203, and the width of the second groove 202 is 3-8 microns larger than the width of the first protrusion 103.

In a more preferred embodiment, the width of the first groove 102 is 5, 6 or 7 microns greater than the width of the second protrusion 203, the depth of the first groove 102 is 3 or 4 microns greater than the height of the second protrusion 203, and the width of the second groove 202 is 4, 5, 7 or 7 microns greater than the width of the first protrusion 103.

As shown in fig. 4, in step (6): a second bonding layer (not shown) is then formed conformally over the non-active side of the second semiconductor die 201.

In the step (6), the material of the first bonding layer is an organic bonding material or a metal bonding material.

As shown in fig. 5, in step (7): the inactive face of the second semiconductor die 201 is then bonded to the inactive face of the first semiconductor die 101, so that each of the first bumps 103 is embedded in a respective second recess 202 and so that each of the second bumps 203 is embedded in a respective first recess 102, followed by removal of the second carrier substrate 200.

In a specific embodiment, the first bonding layer and the second bonding layer are well bonded together by heating or light irradiation, so as to improve the bonding strength of the first and second semiconductor dies 101 and 201.

As shown in fig. 6, in step (8): a first sacrificial layer 301 is then formed on the first carrier substrate 100, the first sacrificial layer 301 covering only a portion of the first semiconductor die 101, and an annular trench 302 is then formed on the side of the first semiconductor die 101 and the second semiconductor die bond site 201.

In the step (8), a ratio of the thickness of the first sacrificial layer 301 to the thickness of the first semiconductor die 101 is 0.2 to 0.4, the annular groove 302 is formed by a laser etching process or a mechanical cutting process, and a height of the annular groove 302 is greater than a depth of the first groove 102.

In a preferred embodiment, the ratio of the thickness of the first sacrificial layer 301 to the thickness of the first semiconductor die 101 is 0.3, the first sacrificial layer 301 can improve the stability of the first semiconductor die 101, thereby facilitating the formation of the annular groove 302, and the first semiconductor die 101 and the second semiconductor die 201 can be bonded firmly without peeling off each other even if the annular groove 302 is formed, thereby preventing the first semiconductor die 101 and the second semiconductor die 201 from peeling off each other.

In a specific embodiment, the first sacrificial layer 301 may be an inorganic material such as silicon oxide, silicon nitride, or silicon oxynitride, or an organic material such as epoxy, silicone, PET, PP, or the like.

As shown in fig. 7, in step (9): a metal heat spreader 303 is then formed, wherein the metal heat spreader 303 fills the annular trench 302 and protrudes beyond the side where the first and second semiconductor dies 101/201 are bonded.

In the step (9), a ratio of a width of a portion of the metal heat dissipation member 303 protruding from a side where the first and second semiconductor dies 101/201 are bonded to a width of the metal heat dissipation member is 0.2-0.5.

In a specific embodiment, the material of the metal heat dissipation member 303 may be copper or aluminum, and is further formed by electroplating, electroless plating, or physical vapor deposition. In a more specific embodiment, the metal heat dissipation member 303 may be formed by an etching-back process after depositing metal copper through an electroplating process.

In a preferred embodiment, the ratio of the width of the portion of the metal heat dissipation member 303 protruding from the side where the first and second semiconductor dies 101/201 are bonded to the width of the metal heat dissipation member is 0.3 or 0.4, and by optimizing the ratio of the width of the portion of the metal heat dissipation member 303 protruding from the side where the first and second semiconductor dies 101/201 are bonded to the width of the metal heat dissipation member, on one hand, sufficient heat dissipation performance of the metal heat dissipation member 303 can be ensured, and on the other hand, the metal heat dissipation member 303 is prevented from being easily peeled off from the first and second semiconductor dies 101/201 due to the excessively large metal heat dissipation member 303.

As shown in fig. 8, in step (10): the first sacrificial layer 301 is then removed, followed by forming a molding compound layer 401, the molding compound layer 401 encapsulating the first and second semiconductor dies 101/201 with the metal heat dissipation member 303 exposed from the sides of the molding compound layer 401, followed by removing the first carrier substrate 100 to obtain a package module 500.

In a specific embodiment, the first sacrificial layer 301 is removed by wet etching or dry etching, and the molding compound layer 401 is formed by an injection molding process, and more specifically, the molding compound layer 401 includes an epoxy resin.

As shown in fig. 9, in step (11): next, providing a circuit substrate 600, disposing a plurality of the package modules 500 prepared in step (10) on the circuit substrate 600, next, forming an encapsulation layer 601, wherein the encapsulation layer 601 wraps a plurality of the package modules 500, next, forming a plurality of third grooves 602 and a plurality of fourth grooves 603 in the encapsulation layer 601, wherein each of the third grooves 602 exposes the metal heat dissipation members 303 in the package modules 500 adjacent to the third grooves 602, next, depositing a metal material in the third grooves 602 to form heat conduction blocks 701, and depositing a metal material in the fourth grooves 603 to form conductive blocks 702.

In a more specific embodiment, a plurality of the package modules 500 are disposed in the circuit substrate 600 such that the first semiconductor die 101 in each of the package modules 500 is electrically connected to the circuit substrate 600.

In a specific embodiment, the encapsulation layer 601 is formed by an injection molding process, and more specifically, the encapsulation layer 601 includes an epoxy resin.

In a specific embodiment, a plurality of third grooves 602 and a plurality of fourth grooves 603 are formed in the encapsulation layer 601 by a laser ablation process or by using a knife cutting process.

In a specific embodiment, the heat conduction block 701 is formed in the third groove 602 by a copper electroplating process, and the conductive block 702 is formed in the fourth groove 603 by a copper electroplating process.

As shown in fig. 10, in step (12): next, a redistribution layer 801 is formed on the packaging layer 601, the redistribution layer 801 electrically leads out each of the conductive bumps 701 and the second semiconductor die 201 in each of the packaging modules 500, and conductive solder balls 901 are disposed on the redistribution layer 801.

In a more specific embodiment, the redistribution layer 801 includes a metal wiring structure 802 and a dielectric layer 803, the metal wiring structure 802 is embedded in the dielectric layer 803, and further, the redistribution layer 801 further includes a heat conduction member 804 electrically and thermally isolated from the metal wiring structure 802, and the heat conduction block 701 contacts the heat conduction member 804, so that heat extraction is facilitated, and the heat extraction path does not affect the stability of electrical connection.

In a specific embodiment, the metal wiring structure 802 is made of one or a combination of copper, aluminum, silver, titanium, nickel, and palladium, the dielectric layer is made of an inorganic material such as aluminum oxide, silicon nitride, silicon oxynitride, and zirconium oxide, and the heat conducting member 804 is made of copper or aluminum.

As shown in fig. 10, the present invention provides an electronic information transmission device which is easy to install and is formed by the above-mentioned manufacturing method.

In another preferred embodiment, the present invention provides a method for manufacturing an electronic information transmission device, which comprises the following steps:

In a preferred technical solution, in the step (1) and the step (4), the first carrier substrate and the second carrier substrate each include one of a ceramic substrate, a single-crystal silicon substrate, a polycrystalline silicon substrate, a tempered glass substrate, a sapphire substrate, a copper substrate, an aluminum substrate, or a stainless steel substrate, and before the first and second carrier substrates are provided with the first and second semiconductor dies, an adhesion layer is provided on the first and second carrier substrates, respectively.

In a preferred technical solution, in the step (2) and the step (5), a wet etching process or a dry etching process is performed on the non-active surfaces of the first and second semiconductor dies, a width of the first groove is 3 to 8 micrometers greater than a width of the second protrusion, a depth of the first groove is 2 to 5 micrometers greater than a height of the second protrusion, and a width of the second groove is 3 to 8 micrometers greater than a width of the first protrusion.

In a preferred technical solution, in the step (3) and the step (6), the first bonding layer and the second bonding layer are made of an organic bonding material or a metal bonding material.

In a preferred technical solution, in the step (8), a ratio of a thickness of the first sacrificial layer to a thickness of the first semiconductor die is 0.2 to 0.4, the annular groove is formed by a laser etching process or a mechanical cutting process, and a height of the annular groove is greater than a depth of the first groove.

In a preferred embodiment, in the step (9), a ratio of a width of a portion of the metal heat dissipation member protruding from a side surface where the first and second semiconductor die are bonded to a width of the metal heat dissipation member is 0.2 to 0.5.

In a preferred embodiment, in the step (10), the molding compound layer includes an epoxy resin.

In a preferred embodiment, in the step (12), a conductive solder ball is disposed on the rewiring layer.

In other technical schemes, the invention provides an electronic information transmission device convenient to mount, which is formed by adopting the preparation method.

The invention has the beneficial effects that:

The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.

Claims

1. A preparation method of an electronic information transmission device convenient to install is characterized in that: the method comprises the following steps:

step (1): providing a first carrier substrate on which a first semiconductor die is disposed, the first semiconductor die comprising an active face and a non-active face opposite the active face, wherein the active face of the first semiconductor die faces the first carrier substrate;

step (2): etching the non-active surface of the first semiconductor tube core to form a plurality of first grooves which are arranged in parallel, wherein a first bulge is arranged between every two adjacent first grooves;

and (3): then forming a first bonding layer conformally on the non-active surface of the first semiconductor die;

and (4): providing a second carrier substrate on which a second semiconductor die is disposed, the second semiconductor die comprising an active face and a non-active face opposite the active face, wherein the active face of the second semiconductor die faces the second carrier substrate;

and (5): etching the non-active surface of the second semiconductor tube core to form a plurality of second grooves which are arranged in parallel, wherein a second bulge is arranged between every two adjacent second grooves, the first grooves and the second bulges are correspondingly arranged, and the second grooves and the first bulges are correspondingly arranged;

and (6): then forming a second bonding layer conformally on the non-active surface of the second semiconductor die;

and (7): then bonding the inactive face of the second semiconductor die to the inactive face of the first semiconductor die such that each of the first bumps is embedded in a corresponding second recess and such that each of the second bumps is embedded in a corresponding first recess, followed by removing the second carrier substrate;

and (8): then forming a first sacrificial layer on the first carrier substrate, wherein the first sacrificial layer only covers a part of the first semiconductor die, and then forming an annular groove on the side where the first semiconductor die and the second semiconductor die are bonded;

and (9): then forming a metal heat dissipation member, wherein the metal heat dissipation member fills the annular groove and protrudes out of the side surface of the bonding position of the first semiconductor tube core and the second semiconductor tube core;

step (10): then removing the first sacrificial layer, then forming a molding compound layer, wherein the molding compound layer wraps the first semiconductor die and the second semiconductor die, the metal heat dissipation member is exposed from the side face of the molding compound layer, and then removing the first bearing substrate to obtain a packaging module;

step (11): providing a circuit substrate, arranging a plurality of packaging modules prepared in the step (10) on the circuit substrate, forming a packaging layer, wherein the packaging layer wraps the packaging modules, forming a plurality of third grooves and a plurality of fourth grooves in the packaging layer, wherein each third groove exposes the metal heat dissipation member in the packaging module adjacent to the third groove, depositing a metal material in the third grooves to form heat conduction blocks, and depositing a metal material in the fourth grooves to form conductive blocks;

2. A method of manufacturing an electronic information transfer device easy to install according to claim 1, characterized in that: in the step (1) and the step (4), the first carrier substrate and the second carrier substrate each include one of a ceramic substrate, a single crystal silicon substrate, a polycrystalline silicon substrate, a tempered glass substrate, a sapphire substrate, a copper substrate, an aluminum substrate, or a stainless steel substrate, and an adhesion layer is provided on the first carrier substrate and the second carrier substrate, respectively, before the first semiconductor die and the second semiconductor die are provided on the first carrier substrate and the second carrier substrate, respectively.

3. A method of manufacturing an electronic information transfer device easy to install according to claim 1, characterized in that: in the step (2) and the step (5), the non-active surfaces of the first and second semiconductor dies are subjected to wet etching treatment or dry etching treatment, the width of the first groove is 3-8 micrometers greater than the width of the second protrusion, the depth of the first groove is 2-5 micrometers greater than the height of the second protrusion, and the width of the second groove is 3-8 micrometers greater than the width of the first protrusion.

4. A method of manufacturing an electronic information transfer device easy to install according to claim 1, characterized in that: in the step (3) and the step (6), the material of the first bonding layer and the second bonding layer is an organic bonding material or a metal bonding material.

5. A method of manufacturing an electronic information transfer device easy to install according to claim 1, characterized in that: in the step (8), a ratio of the thickness of the first sacrificial layer to the thickness of the first semiconductor die is 0.2-0.4, the annular groove is formed through a laser etching process or a mechanical cutting process, and the height of the annular groove is greater than the depth of the first groove.

6. A method of manufacturing an electronic information transfer device easy to install according to claim 1, characterized in that: in the step (9), a ratio of a width of a portion of the metal heat dissipation member protruding from a side surface where the first and second semiconductor die are bonded to a width of the metal heat dissipation member is 0.2 to 0.5.

7. A method of manufacturing an electronic information transfer device easy to install according to claim 1, characterized in that: in the step (10), the molding compound layer includes an epoxy resin.

8. A method of manufacturing an electronic information transfer device easy to install according to claim 1, characterized in that: in the step (12), conductive solder balls are provided on the re-wiring layer.

9. An electronic information transmission device which is easy to install, characterized by being formed by the manufacturing method of any one of claims 1 to 8.