CN113765349B

CN113765349B - Accelerated discharge device

Info

Publication number: CN113765349B
Application number: CN202010488706.2A
Authority: CN
Inventors: 詹子增
Original assignee: Acer Inc
Current assignee: Acer Inc
Priority date: 2020-06-02
Filing date: 2020-06-02
Publication date: 2023-05-09
Anticipated expiration: 2040-06-02
Also published as: CN113765349A

Abstract

An accelerated discharge device comprising: a first parallel inductance element, a second parallel inductance element, a first capacitor, a noise suppression element, a unidirectional element, a first discharge circuit, a second discharge circuit, a first switch, and a second switch. The first parallel inductor element generates a first control potential according to a first input potential. The second parallel inductor generates a second control potential according to a second input potential. The first switch selectively couples the first parallel inductor element to ground through the second discharge circuit according to a first control potential. The second switch selectively couples the second parallel inductor element to the ground through the second discharging circuit according to a second control potential.

Description

Accelerated discharge device

Technical Field

The invention relates to an accelerated discharge device, in particular to an accelerated discharge device which can meet the specification of the International electrotechnical Commission.

Background

The international electrotechnical commission (International Electrotechnical Commission, IEC) has established a second version of the totally new security standard, IEC 62368-1, which will be forced to take effect on month 12 and 20 of 2020, and replace the current IEC 60950 standard.

According to the specifications of the second version of IEC 62368-1, if the external input power to the device is removed under normal conditions, the input potential of the device must be discharged to 60V within 2 seconds; conversely, if the external input power to the device is removed under abnormal conditions, the input potential of the device must be discharged to 120V within 2 seconds. However, conventional power supplies often fail to meet the above specifications. In view of this, a completely new solution has to be proposed to overcome the drawbacks faced by the prior art.

Disclosure of Invention

In a preferred embodiment, the present invention proposes an accelerated discharge device comprising: a first parallel inductor element for generating a first control potential according to a first input potential; a second parallel inductor element for generating a second control potential according to a second input potential; a first capacitor coupled between the first parallel inductor element and the second parallel inductor element; a noise suppression element for reducing mutual interference between the first parallel inductance element and the second parallel inductance element; a unidirectional element for limiting the first control potential and the second control potential in a single transmission direction; a first discharge circuit coupled between the first parallel inductor element and the second parallel inductor element; a second discharge circuit; a first switch selectively coupling the first parallel inductor element to ground via the second discharge circuit according to the first control potential; and a second switch selectively coupling the second parallel inductor element to the ground via the second discharge circuit according to the second control potential.

Drawings

Fig. 1 is a schematic view showing an accelerated discharge device according to an embodiment of the invention.

Fig. 2 is a schematic diagram showing an accelerated discharge device according to an embodiment of the invention.

Fig. 3 is a waveform diagram showing a first input potential of the accelerated discharging device in the power-off test mode according to an embodiment of the invention.

Fig. 4 is a waveform diagram showing a first input potential of the accelerated discharging device in the power-off test mode according to an embodiment of the invention.

Wherein reference numerals are as follows:

100, 200: accelerated discharge device

110, 210: first parallel inductance element

120, 220: second parallel inductance element

130, 230: noise suppression element

140, 240: unidirectional element

150, 250: first discharge circuit

160, 260: first switcher

170, 270: second switcher

180, 280: second discharging circuit

199, 299: ground earth

290: bridge rectifier

C1: first capacitor

C2: second capacitor

D1: first diode

D2: second diode

D3: third diode

D4: fourth diode

D5: fifth diode

D6: sixth diode

D7: seventh diode

D8: eighth diode

L1: first inductor

L2: second inductor

L3: third inductor

L4: fourth inductor

M1: first transistor

M2: second transistor

N1: first node

N2: second node

And N3: third node

N4: fourth node

N5: fifth node

N6: sixth node

N7: seventh node

N8: eighth node

N9: ninth node

N10: tenth node

NIN1: first input node

NIN2: second input node

R1: first resistor

R2: second resistor

R3: third resistor

R4: fourth resistor

T1: first discharge time

T2: second discharge time

VIN1: a first input potential

VIN2: a second input potential

VC1: a first control potential

VC2: second control potential

VSS: ground potential

Detailed Description

The following detailed description of the invention refers to the accompanying drawings, which illustrate specific embodiments of the invention.

Certain terms are used throughout the description and claims to refer to particular components. Those of ordinary skill in the art will appreciate that a hardware manufacturer may refer to the same element by different names. The description and claims do not take the form of an element differentiated by name, but rather by functional differences. In the following description and in the claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "include, but not limited to. The term "substantially" means that within an acceptable error range, a person skilled in the art can solve the technical problem within a certain error range, and achieve the basic technical effect. In addition, the term "coupled" as used herein includes any direct or indirect electrical connection. Accordingly, if a first device couples to a second device, that connection may be through a direct electrical connection, or through an indirect electrical connection via other devices and connections.

Fig. 1 is a schematic diagram showing an accelerated discharge device 100 according to an embodiment of the invention. For example, the accelerated discharging device 100 can be applied to a power supply, but is not limited thereto. As shown in fig. 1, the accelerated discharge device 100 includes: a first capacitor C1, a first parallel inductance element 110, a second parallel inductance element 120, a noise suppression element 130, a unidirectional element 140, a first discharge circuit 150, a first switch 160, a second switch 170, and a second discharge circuit 180. It should be noted that although not shown in fig. 1, the accelerated discharge device 100 may further include other elements, such as: a voltage stabilizer or (and) a negative feedback circuit.

The first parallel inductor 110 generates a first control voltage VC1 according to a first input voltage VIN 1. The second parallel inductor 120 generates a second control voltage VC2 according to a second input voltage VIN 2. The first input potential VIN1 and the second input potential VIN2 can both be from an external input power source, wherein an ac voltage with any frequency and any amplitude can be formed between the first input potential VIN1 and the second input potential VIN 2. For example, the frequency of the ac voltage may be about 50Hz or 60Hz, and the square root of the ac voltage may be about 90V to 264V, but is not limited thereto. The first capacitor C1 is coupled between the first parallel inductor element 110 and the second parallel inductor element 120. The noise suppression element 130 is configured to reduce interference between the first parallel inductance element 110 and the second parallel inductance element 120. The unidirectional element 140 is used for limiting the first control potential VC1 and the second control potential VC2 in a single transmission direction. The first discharging circuit 150 is coupled between the first parallel inductor element 110 and the second parallel inductor element 120. The first switch 160 selectively couples the first parallel inductor element 110 to the ground 199 via the second discharging circuit 180 according to the first control potential VC1. The earth 199 may refer to the earth, or any ground path coupled to the earth, which is not an internal element of the accelerated discharge device 100. For example, if the first control voltage VC1 is at a high logic level (e.g., logic "1"), the first switch 160 couples the first parallel inductor element 110 to the ground 199 via the second discharging circuit 180 (i.e., the first switch 160 may approximate a short circuit path); conversely, if the first control voltage VC1 is at a low logic level (e.g., logic "0"), the first switch 160 does not couple the first shunt inductor 110 to the ground 199 via the second discharging circuit 180 (i.e., the first switch 160 may approximate an open path). The second switch 170 selectively couples the second shunt inductor 120 to the ground 199 through the second discharging circuit 180 according to the second control potential VC2. For example, if the second control voltage VC2 is at a high logic level, the second switch 170 couples the second shunt inductive element 120 to the ground 199 via the second discharging circuit 180 (i.e., the second switch 170 may approximate a short circuit path); conversely, if the second control voltage VC2 is at a low logic level, the second switch 170 does not couple the second shunt inductor 120 to the ground 199 via the second discharging circuit 180 (i.e., the second switch 170 approximates an open path). According to the practical measurement result, the design method can greatly increase the overall discharge speed of the accelerated discharge device 100 when the external input power source is removed (or the first input potential VIN1 and the second input potential VIN2 are both disappeared), so as to meet the specification of the second version of IEC 62368-1.

The following embodiments will describe the detailed structure and operation of the accelerated discharge device 100. It is to be understood that the drawings and descriptions are proffered by way of example only and are not intended to limit the scope of the invention.

Fig. 2 is a schematic diagram showing an accelerated discharge device 200 according to an embodiment of the invention. In the embodiment of fig. 2, the accelerated discharging device 200 has a first input node NIN1 and a second input node NIN2, and includes a first capacitor C1, a first parallel inductance element 210, a second parallel inductance element 220, a noise suppression element 230, a unidirectional element 240, a first discharging circuit 250, a first switch 260, a second switch 270, and a second discharging circuit 280. The first input node NIN1 and the second input node NIN2 of the accelerating discharge device 200 can respectively receive a first input potential VIN1 and a second input potential VIN2 from an external input power source, wherein an ac voltage with any frequency and any amplitude can be formed between the first input potential VIN1 and the second input potential VIN 2.

The first end of the first capacitor C1 is coupled to the first input node NIN1, and the second end of the first capacitor C1 is coupled to the second input node NIN2.

The first parallel inductance element 210 includes a first inductor L1 and a second inductor L2. The first end of the first inductor L1 is coupled to the first input node NIN1, and the second end of the first inductor L1 is coupled to a first node N1 to output a first control potential VC1. The first end of the second inductor L2 is coupled to the first input node NIN1, and the second end of the second inductor L2 is coupled to the first node N1.

The second parallel inductor element 220 includes a third inductor L3 and a fourth inductor L4. The first end of the third inductor L3 is coupled to the second input node NIN2, and the second end of the third inductor L3 is coupled to a second node N2 to output a second control potential VC2. The first end of the fourth inductor L4 is coupled to the second input node NIN2, and the second end of the fourth inductor L4 is coupled to the second node N2. In some embodiments, the third inductor L3 is formed on the same core as the second inductor L2 such that both the third inductor L3 and the second inductor L2 are coupled to each other.

The noise suppression element 230 includes a first diode D1 and a second diode D2. The anode of the first diode D1 is coupled to the first input node NIN1, and the cathode of the first diode D1 is coupled to a third node N3. The anode of the second diode D2 is coupled to the second input node NIN2, and the cathode of the second diode D2 is coupled to the third node N3. In some embodiments, the noise suppression element 230 may be used to prevent voltage noise or current noise from being transferred between the second inductor L2 and the third inductor L3, even if both are formed on the same core.

Unidirectional element 240 includes a third diode D3 and a fourth diode D4. The anode of the third diode D3 is coupled to the first node N1 to receive the first control potential VC1, and the cathode of the third diode D3 is coupled to a fourth node N4. The anode of the fourth diode D4 is coupled to the second node N2 to receive the second control potential VC2, and the cathode of the fourth diode D4 is coupled to a fifth node N5. In some embodiments, the third diode D3 may limit the first control potential VC1 to be transferred from the first node N1 to the fourth node N4 only, and the fourth diode D4 may limit the second control potential VC2 to be transferred from the second node N2 to the fifth node N5 only. That is, the unidirectional element 240 can avoid the first control potential VC1 and the second control potential VC2 from accidentally recharging the first parallel inductor element 210 and the second parallel inductor element 220.

The first discharge circuit 250 includes a first resistor R1 and a second resistor R2. The first end of the first resistor R1 is coupled to the first node N1, and the second end of the first resistor R1 is coupled to a sixth node N6. The first end of the second resistor R2 is coupled to the second node N2, and the second end of the second resistor R2 is coupled to the sixth node N6.

The first switch 260 includes a first transistor M1. The first transistor M1 may be an N-type mosfet. The control terminal of the first transistor M1 is coupled to the fourth node N4 (indirectly receiving the first control potential VC 1), the first terminal of the first transistor M1 is coupled to a seventh node N7, and the second terminal of the first transistor M1 is coupled to the first node N1. In some embodiments, if the first control potential VC1 is at a high logic level, the first transistor M1 is enabled; conversely, if the first control potential VC1 is at a low logic level, the first transistor M1 is disabled.

The second switch 270 includes a second transistor M2. The second transistor M2 may be an nmos field effect transistor. The control terminal of the second transistor M2 is coupled to the fifth node N5 (indirectly receiving the second control potential VC 2), the first terminal of the second transistor M2 is coupled to an eighth node N8, and the second terminal of the second transistor M2 is coupled to the second node N2. In some embodiments, if the second control potential VC2 is at a high logic level, the second transistor M2 is enabled; conversely, if the second control potential VC2 is at a low logic level, the second transistor M2 is disabled.

The second discharging circuit 280 includes a second capacitor C2, a third resistor R3, and a fourth resistor R4. The first terminal of the second capacitor C2 is coupled to the seventh node N7, and the second terminal of the second capacitor C2 is coupled to the eighth node N8. The first end of the third resistor R3 is coupled to the seventh node N7, and the second end of the third resistor R3 is coupled to a ninth node N9. The ninth node N9 may also be coupled to ground 299. The earth 299 may refer to the earth, or any ground path coupled to the earth, which is not an internal element of the accelerated discharge device 200. The first end of the fourth resistor R4 is coupled to the eighth node N8, and the second end of the fourth resistor R4 is coupled to the ninth node N9.

In some embodiments, the accelerated discharge device 200 further includes a bridge rectifier 290. The bridge rectifier 290 includes a fifth diode D5, a sixth diode D6, a seventh diode D7, and an eighth diode D8. The anode of the fifth diode D5 is coupled to a ground potential VSS (e.g., 0V), and the cathode of the fifth diode D5 is coupled to the first node N1. The anode of the sixth diode D6 is coupled to the ground potential VSS, and the cathode of the sixth diode D6 is coupled to the second node N2. The anode of the seventh diode D7 is coupled to the first node N1, and the cathode of the seventh diode D7 is coupled to a tenth node N10. The anode of the eighth diode D8 is coupled to the second node N2, and the cathode of the eighth diode D8 is coupled to the tenth node N10. It should be noted that the bridge rectifier 290 is only an optional component, and may be removed from the accelerated discharge device 200 in other embodiments. In addition, if the bridge rectifier 290 is omitted, the first node N1 or (and) the second node N2 may also be directly or indirectly coupled to the ground potential VSS.

In some embodiments, the principle of operation of the accelerated discharge device 200 may be as follows. In an initial mode, the accelerated discharge device 200 has not received the first input potential VIN1 and the second input potential VIN2, so the first transistor M1 and the second transistor M2 are both in a disabled state. In a normal operation mode, the accelerated discharging device 200 has received the first input voltage VIN1 and the second input voltage VIN2, so that the first capacitor C1 starts to store energy, the first shunt inductor 210 and the second shunt inductor 220 each form a current path, and the first transistor M1 and the second transistor M2 are alternately enabled. In detail, if the first input potential VIN1 is positive (i.e., higher than the ground potential VSS), a part of the energy on the first capacitor C1 is discharged to the ground potential VSS through the first discharging circuit 250, and another part of the energy on the first capacitor C1 is discharged to the ground 299 through the enabled first transistor M1 and the second discharging circuit 280. Conversely, if the second input potential VIN2 is positive, a portion of the energy on the first capacitor C1 is discharged to the ground potential VSS via the first discharging circuit 250, and another portion of the energy on the first capacitor C1 is discharged to the ground 299 via the enabled second transistor M2 and the second discharging circuit 280. In a power-off test mode, the corresponding external input power is removed (or the first input voltage VIN1 and the second input voltage VIN2 are both lost), and the energy stored in the first capacitor C1 can still be released through the discharging path. It should be noted that, since the first parallel inductor element 210, the second parallel inductor element 220, the first discharging circuit 250, and the second discharging circuit 280 are used together, the overall discharging time of the accelerated discharging device 200 can be greatly shortened.

Fig. 3 is a waveform diagram showing a first input potential VIN1 of the accelerated discharge device 200 in the power-off test mode according to an embodiment of the present invention. If the external input power is removed under normal conditions, a first discharge time T1, which is taken for the first input voltage VIN1 (or the second input voltage VIN 2) to drop from a high voltage level (e.g., ac voltage 264V or dc voltage 370V) to 60V, is about 1.315 seconds, which is less than 2 seconds as specified in the second version of IEC 62368-1.

Fig. 4 is a waveform diagram showing a first input potential VIN1 of the accelerated discharge device 200 in the power-off test mode according to an embodiment of the present invention. If the external input power source is removed under abnormal conditions (i.e., any element of the accelerated discharge device 200 is set to be open or short), a second discharge time T2 taken for the first input potential VIN1 (or the second input potential VIN 2) to drop from a high potential level (e.g., ac voltage 264V or dc voltage 370V) to 120V is about 0.79 seconds, which is also less than 2 seconds as specified in the second version of IEC 62368-1.

In some embodiments, the component parameters of the accelerated discharge device 200 may be as follows. The capacitance value of the first capacitor C1 may be between 0.327 μf and 0.333 μf, preferably 0.33 μf. The capacitance value of the second capacitor C2 may be between 0.99 μf and 1.01 μf, preferably 1 μf. The inductance value of the first inductor L1 may be between 6.31mH and 6.97mH, preferably 6.64mH. The inductance value of the second inductor L2 may be between 6.31mH and 6.97mH, preferably 6.64mH. The inductance value of the third inductor L3 may be between 6.31mH and 6.97mH, preferably 6.64mH. The inductance value of the fourth inductor L4 may be between 6.31mH and 6.97mH, preferably 6.64mH. The resistance value of the first resistor R1 may be between 1.317mΩ and 1.343mΩ, preferably 1.33mΩ. The resistance value of the second resistor R2 may be between 1.317mΩ and 1.343mΩ, preferably 1.33mΩ. The resistance value of the third resistor R3 may be between 198kΩ and 202kΩ, preferably 200kΩ. The resistance value of the fourth resistor R4 may be between 198kΩ and 202kΩ, preferably 200kΩ. The above parameter ranges are derived from the results of a number of experiments, which helps to minimize the overall discharge time of the accelerated discharge device 200.

The invention provides a novel accelerated discharge device, which comprises a parallel inductance element and a double discharge circuit. According to the actual measurement result, the whole discharge time of the accelerated discharge device with the design can be greatly shortened, and the accelerated discharge device can meet the specification of the second version of IEC 62368-1 no matter under normal or abnormal conditions, so that the accelerated discharge device is very suitable for being applied to various electronic devices.

It should be noted that the above-mentioned potential, current, resistance, inductance, capacitance, and other parameters are not limitations of the present invention. The designer can adjust these settings according to different needs. The accelerated discharge device of the present invention is not limited to the state illustrated in fig. 1 to 4. The present invention may include only any one or more features of any one or more of the embodiments of fig. 1-4. In other words, not all of the illustrated features need be implemented in the accelerated discharge device of the present invention. Although the embodiments of the present invention are exemplified by using mosfet, the present invention is not limited thereto, and those skilled in the art can use other kinds of transistors, such as: junction field effect transistors, or fin field effect transistors, and the like, without affecting the effect of the present invention.

Ordinal numbers such as "first," "second," "third," and the like in the description and in the claims are used for distinguishing between two different elements having the same name and not necessarily for describing a sequential order.

While the invention has been described with reference to the preferred embodiments, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

1. An accelerated discharge device comprising:

a first parallel inductor element for generating a first control potential according to a first input potential;

a second parallel inductor element for generating a second control potential according to a second input potential;

a first capacitor coupled between the first parallel inductor element and the second parallel inductor element;

a noise suppression element for reducing mutual interference between the first parallel inductance element and the second parallel inductance element;

a unidirectional element for limiting the first control potential and the second control potential in a single transmission direction;

a first discharge circuit coupled between the first parallel inductor element and the second parallel inductor element;

a second discharge circuit;

a first switch selectively coupling the first parallel inductor element to ground via the second discharge circuit according to the first control potential; and

and a second switch selectively coupling the second parallel inductor element to the ground via the second discharge circuit according to the second control potential.

2. The accelerated discharge device of claim 1, wherein the first parallel inductor element comprises:

a first inductor having a first end and a second end, wherein the first end of the first inductor is coupled to a first input node to receive the first input potential, and the second end of the first inductor is coupled to a first node to output the first control potential; and

a second inductor having a first end and a second end, wherein the first end of the second inductor is coupled to the first input node and the second end of the second inductor is coupled to the first node.

3. The accelerated discharge device of claim 2, wherein the second parallel inductor element comprises:

a third inductor having a first end and a second end, wherein the first end of the third inductor is coupled to a second input node to receive the second input potential, and the second end of the third inductor is coupled to a second node to output the second control potential; and

a fourth inductor having a first end and a second end, wherein the first end of the fourth inductor is coupled to the second input node and the second end of the fourth inductor is coupled to the second node;

the first capacitor has a first end and a second end, the first end of the first capacitor is coupled to the first input node, and the second end of the first capacitor is coupled to the second input node.

4. The accelerated discharge device of claim 3, wherein the noise suppression element comprises:

a first diode having an anode and a cathode, wherein the anode of the first diode is coupled to the first input node and the cathode of the first diode is coupled to a third node; and

a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to the second input node and the cathode of the second diode is coupled to the third node.

5. The accelerated discharge device of claim 3, wherein the unidirectional element comprises:

a third diode having an anode and a cathode, wherein the anode of the third diode is coupled to the first node to receive the first control potential, and the cathode of the third diode is coupled to a fourth node; and

a fourth diode having an anode and a cathode, wherein the anode of the fourth diode is coupled to the second node to receive the second control potential, and the cathode of the fourth diode is coupled to a fifth node.

6. The accelerated discharge device of claim 3, wherein the first discharge circuit comprises:

a first resistor having a first end and a second end, wherein the first end of the first resistor is coupled to the first node and the second end of the first resistor is coupled to a sixth node; and

a second resistor having a first end and a second end, wherein the first end of the second resistor is coupled to the second node and the second end of the second resistor is coupled to the sixth node.

7. The accelerated discharge device of claim 5, wherein the first switch comprises:

the first transistor is provided with a control end, a first end and a second end, wherein the control end of the first transistor is coupled to the fourth node, the first end of the first transistor is coupled to a seventh node, and the second end of the first transistor is coupled to the first node.

8. The accelerated discharge device of claim 7, wherein the second switch comprises:

the second transistor is provided with a control end, a first end and a second end, wherein the control end of the second transistor is coupled to the fifth node, the first end of the second transistor is coupled to an eighth node, and the second end of the second transistor is coupled to the second node.

9. The accelerated discharge device of claim 8, wherein the second discharge circuit comprises:

a second capacitor having a first end and a second end, wherein the first end of the second capacitor is coupled to the seventh node, and the second end of the second capacitor is coupled to the eighth node;

a third resistor having a first end and a second end, wherein the first end of the third resistor is coupled to the seventh node and the second end of the third resistor is coupled to a ninth node; and

a fourth resistor having a first end and a second end, wherein the first end of the fourth resistor is coupled to the eighth node and the second end of the fourth resistor is coupled to the ninth node;

wherein the ninth node is further coupled to the ground.

10. The accelerated discharge device of claim 3, further comprising a bridge rectifier, wherein the bridge rectifier comprises:

a fifth diode having an anode and a cathode, wherein the anode of the fifth diode is coupled to a ground potential and the cathode of the fifth diode is coupled to the first node;

a sixth diode having an anode and a cathode, wherein the anode of the sixth diode is coupled to the ground potential and the cathode of the sixth diode is coupled to the second node;

a seventh diode having an anode and a cathode, wherein the anode of the seventh diode is coupled to the first node and the cathode of the seventh diode is coupled to a tenth node; and

an eighth diode having an anode and a cathode, wherein the anode of the eighth diode is coupled to the second node and the cathode of the eighth diode is coupled to the tenth node.