CN113725390B

CN113725390B - Display substrate, preparation method thereof and display device

Info

Publication number: CN113725390B
Application number: CN202111005700.6A
Authority: CN
Inventors: 赵梦; 关峰; 吕杨; 杜建华; 李超; 吴昊; 王超璐; 袁广才
Original assignee: BOE Technology Group Co Ltd
Current assignee: BOE Technology Group Co Ltd
Priority date: 2021-08-30
Filing date: 2021-08-30
Publication date: 2024-07-12
Anticipated expiration: 2041-08-30
Also published as: CN113725390A

Abstract

The embodiment of the invention discloses a display substrate, a preparation method thereof and a display device, relates to the technical field of display, and is used for improving the resolution and yield of the display substrate. The preparation method comprises the following steps: providing a back plate; obtaining a pixel defining layer by using a photoetching process; forming a stacked sacrificial layer and a photoresist layer, wherein the photoresist layer is provided with a plurality of second openings, and the orthographic projection of the first opening on the backboard is positioned in the orthographic projection range of the second opening on the backboard; sequentially forming a light-emitting film, a first functional film and a packaging film on one side of the photoresist layer, which is far away from the backboard; and stripping the sacrificial layer, removing the sacrificial layer, the photoresist layer, the light-emitting film, the first functional film and the packaging film, wherein the parts of the photoresist layer, the side surface of the back plate, which is far away from the photoresist layer, remain the parts of the light-emitting film, the first functional film and the packaging film, which are positioned in the second opening. The display substrate, the preparation method thereof and the display device are used for image display.

Description

Display substrate, preparation method thereof and display device

Technical Field

The invention relates to the technical field of display, in particular to a display substrate, a preparation method thereof and a display device.

Background

Organic LIGHT EMITTING Diode (OLED) has been widely used in the display field because of its advantages of self-luminescence, low driving voltage, high luminous efficiency, fast response speed, flexible display, and the like.

Disclosure of Invention

The embodiment of the invention aims to provide a display substrate, a preparation method thereof and a display device, which are used for improving the resolution and yield of the display substrate.

In order to achieve the above purpose, the embodiment of the invention provides the following technical scheme:

In one aspect, the embodiment of the invention provides a preparation method of a display substrate. The preparation method comprises the following steps: a back plate is provided. And forming a pixel definition film on one side of the backboard, and performing patterning treatment on the pixel definition film by utilizing a photoetching process to form a plurality of first openings so as to obtain a pixel definition layer. And forming a laminated sacrificial layer and a photoresist layer on one side of the pixel defining layer away from the backboard, wherein the photoresist layer is provided with a plurality of second openings, the orthographic projection of the first openings on the backboard is positioned in the orthographic projection range of the second openings on the backboard, and the orthographic projection of the sacrificial layer on the backboard is overlapped with the orthographic projection range of the photoresist layer on the backboard or is positioned in the orthographic projection range of the photoresist layer on the backboard. And forming a light-emitting film, a first functional film and a packaging film on one side of the photoresist layer, which is far away from the backboard, in sequence. And stripping the sacrificial layer, and removing the sacrificial layer, the photoresist layer, the luminescent film, the first functional film and the packaging film, wherein the parts of the luminescent film, the first functional film and the packaging film, which are positioned on one side surface of the photoresist layer and are far away from the back plate, remain the parts of the luminescent film, the first functional film and the packaging film, which are positioned in the second opening.

According to the preparation method of the display substrate provided by some embodiments of the present invention, on the one hand, the pixel defining layer with the plurality of first openings is prepared by a photolithography process, so that the size of the plurality of first openings can be less than 1 μm, and further, when the photoresist layer with the second opening exposing at least the first opening and the sacrificial layer are used, a stripping process is implemented, so that the size of the light emitting region of the formed OLED can be less than 1 μm while the portions of the light emitting film, the first functional film and the encapsulation film located in the second opening are reserved. Compared with the OLED formed by adopting the FMM technology, the OLED light-emitting area size is about 12 mu m, the display substrate has the advantages that the number of sub-pixels which can be formed in a unit-size pixel area can be remarkably increased, and the PPI of the display substrate is further increased. On the other hand, by forming the encapsulation film made of an inorganic material after forming the light emitting film and the first functional film, the light emitting film and the first functional film can be protected, and the performance of the light emitting film and the first functional film is ensured not to be affected by other chemicals in the subsequent process, thereby preventing the light emitting film and the first functional film from being failed and improving the yield of the display substrate.

In some embodiments, forming the stacked sacrificial layer and photoresist layer includes: a sacrificial film and a photoresist film are sequentially formed on a side of the pixel defining layer away from the back plate. And exposing and developing the photoresist film to form a plurality of second openings to obtain the photoresist layer. And developing the sacrificial film to form the sacrificial layer. In the case that the orthographic projection of the sacrificial layer on the back plate is within the orthographic projection range of the photoresist layer on the back plate, the portions of the sacrificial layer close to the second openings are retracted relative to the photoresist layer.

In some embodiments, the display substrate has a display region and a peripheral region located beside the display region. The display substrate includes a common voltage signal line located at the peripheral region. The part of the first functional film positioned in the second opening forms a first functional part, and a plurality of first functional parts form a first functional layer; the part of the packaging film positioned in the second opening forms a packaging part, and a plurality of packaging parts form a first packaging layer. The preparation method further comprises the following steps: and removing at least a part of the first encapsulation layer, which is positioned in the peripheral area, and exposing at least a part of the first functional layer. And forming a second functional layer at least in the peripheral area. The second functional layer is in electrical contact with the common voltage signal line and in electrical contact with the first functional layer.

In some embodiments, the method of making further comprises: forming a second packaging layer on one side of the second functional layer far away from the backboard; the second encapsulation layer covers the second functional layer.

In some embodiments, the second opening includes a pixel region and a routing region connected. At least a portion of the pixel region is located in the first opening. The wiring region extends to the peripheral region. The removing at least a portion of the first encapsulation layer located in the peripheral region includes: and removing the part of the first packaging layer, which is positioned in the peripheral area, and exposing a part of the first functional layer. The forming a second functional layer at least in the peripheral region includes: and forming the second functional layer in the peripheral area. The second functional layer covers an exposed portion of the first functional layer and at least a portion of the common voltage signal line.

In some embodiments, the orthographic projection portions of the trace areas in the at least two second openings formed at different times on the back plate overlap.

In some embodiments, the second openings are arranged in an array; the removing at least a portion of the first encapsulation layer located in the peripheral region, exposing at least a portion of the first functional layer, includes: and removing the whole first packaging layer to expose the first functional layer. The forming a second functional layer at least in the peripheral region includes: in the peripheral region and the display region, a second functional layer is formed on a side of the first functional layer away from the back plate, and the second functional layer covers the first functional layer and at least a portion of the common voltage signal line.

In some embodiments, the first functional layer has a high etch selectivity compared to the first encapsulation layer.

In some embodiments, the display substrate has a plurality of sub-pixels to be formed; the plurality of sub-pixels to be formed at least includes: a plurality of first color sub-pixels to be formed, a plurality of second color sub-pixels to be formed, and a plurality of third color sub-pixels to be formed. The preparation method comprises the following steps: and repeating the steps to sequentially prepare the plurality of first-color sub-pixels to be formed, the plurality of second-color sub-pixels to be formed and the plurality of third-color sub-pixels to be formed.

In another aspect, an embodiment of the present invention provides a display substrate. The display substrate includes: a back plate; a pixel defining layer disposed on one side of the back plate and having a plurality of first openings; the pixel defining layer is formed through a photoetching process; and a light emitting unit and a first functional unit which are provided at least in the first opening and are laminated in this order; the light emitting portion and the first functional portion are formed by peeling.

The above display substrate has the same advantages and technical effects as the preparation method of the display substrate provided in some embodiments, and will not be described in detail herein.

In some embodiments, the display substrate has a display area and a peripheral area beside the display area, and the plurality of first functional parts form a first functional layer, and the display substrate further includes: a common voltage signal line located in the peripheral region; the second functional layer is arranged on one side of the public voltage signal line and the first functional layer away from the backboard and is at least positioned in the peripheral area, wherein the second functional layer is electrically contacted with the public voltage signal line and the first functional layer; and an encapsulation layer covering the light emitting portion, the first functional portion, and the second functional portion.

In some embodiments, the first functional portion includes a first sub-functional portion located at least within the first opening, and a second sub-functional portion connected to the first sub-functional portion and extending to the peripheral region. The second functional layer is located in the peripheral area. The encapsulation layer includes a first encapsulation layer and a second encapsulation layer. The first packaging layer covers the part of the first functional layer located in the display area, and the second packaging layer covers the part of the second sub-functional part extending to the peripheral area and the second functional layer.

In some embodiments, the orthographic projection shape of the second sub-functional portion on the back plate is L-shaped.

In some embodiments, the common voltage signal lines are respectively located at opposite sides of the display substrate. At least one second sub-function extends to one of the opposite sides. At least one second sub-function extends to the other of the opposite sides.

In some embodiments, at least two of the second sub-functional portions are symmetrical about a center line of the display substrate.

In some embodiments, the orthographic projection portions of at least two of the second sub-functions on the back plate overlap.

In some embodiments, the plurality of first functional parts are arranged in an array. The second functional layer is located in the display area and the peripheral area. The encapsulation layer covers the second functional layer. The packaging layer is a whole film layer.

In some embodiments, the resolution of the display substrate is greater than 600PPI.

In yet another aspect, an embodiment of the present invention provides a display device. The display device comprising a display substrate according to any of the embodiments above.

The array substrate included in the display device has the same structure and beneficial technical effects as those of the array substrate provided in some embodiments, and will not be described herein.

Drawings

In order to more clearly illustrate the technical solutions of the present invention, the drawings that are required to be used in some embodiments of the present invention will be briefly described below, and it is apparent that the drawings in the following description are only drawings of some embodiments of the present invention, and other drawings may be obtained according to these drawings to those of ordinary skill in the art. Furthermore, the drawings in the following description may be regarded as schematic illustrations, and are not limiting of the actual size of the product, the actual flow of the method, etc. according to the embodiments of the present invention.

FIG. 1 is a flow chart of a method of fabricating a display substrate according to some embodiments of the invention;

FIG. 2 is a flow chart of another method for manufacturing a display substrate according to some embodiments of the invention;

FIG. 3 is a flowchart of S400 in the flowchart of the method for manufacturing the display substrate shown in FIG. 1;

Fig. 4 is a flowchart of S800 and S900 in the flowchart of the manufacturing method of the display substrate shown in fig. 2;

fig. 5 is another flowchart of S800 and S900 in the flowchart of the manufacturing method of the display substrate shown in fig. 2;

FIGS. 6 a-6 s are diagrams illustrating steps for fabricating a display substrate according to some embodiments of the invention;

FIGS. 7 a-7 e are diagrams illustrating steps for preparing a display substrate according to another embodiment of the present invention;

FIGS. 8 a-8 d are diagrams illustrating steps for preparing a display substrate according to still another embodiment of the present invention;

FIG. 9 is a block diagram of a display substrate according to some embodiments of the invention;

FIG. 10 is a cross-sectional view of the display substrate of FIG. 9 taken along the direction A-A';

FIG. 11 is a block diagram of another display substrate according to some embodiments of the invention;

FIG. 12 is a cross-sectional view of the display substrate of FIG. 11 taken along the direction B-B';

fig. 13 is a block diagram of a display device according to some embodiments of the invention.

Detailed Description

The following description of the embodiments of the present disclosure will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present disclosure. All other embodiments obtained by one of ordinary skill in the art based on the embodiments provided by the present disclosure are within the scope of the present disclosure.

Throughout the specification and claims, the term "comprising" is to be interpreted as an open, inclusive meaning, i.e. "comprising, but not limited to, unless the context requires otherwise. In the description of the present specification, the terms "one embodiment," "some embodiments," "example embodiments," "examples," or "some examples," etc., are intended to indicate that a particular feature, structure, material, or characteristic associated with the embodiment or example is included in at least one embodiment or example of the present disclosure. The schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments or examples.

The terms "first" and "second" are used below for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the embodiments of the present disclosure, unless otherwise indicated, the meaning of "a plurality" is two or more.

In describing some embodiments, the expression "connected" and its derivatives may be used. For example, the term "connected" may be used in describing some embodiments to indicate that two or more elements are in direct physical or electrical contact with each other. The embodiments disclosed herein are not necessarily limited to the disclosure herein.

At least one of "A, B and C" has the same meaning as at least one of "A, B or C" and includes the following combinations of A, B and C: a alone, B alone, C alone, a combination of a and B, a combination of a and C, a combination of B and C, and a combination of A, B and C.

"A and/or B" includes the following three combinations: only a, only B, and combinations of a and B.

In addition, the use of "based on" is intended to be open and inclusive in that a process, step, calculation, or other action "based on" one or more of the stated conditions or values may be based on additional conditions or beyond the stated values in practice.

As used herein, "about" or "approximately" includes the stated values as well as average values within an acceptable deviation range of the particular values as determined by one of ordinary skill in the art in view of the measurement in question and the errors associated with the measurement of the particular quantity (i.e., limitations of the measurement system).

Exemplary embodiments are described herein with reference to cross-sectional and/or plan views as idealized exemplary figures. In the drawings, the thickness of layers and regions are exaggerated for clarity. Thus, variations from the shape of the drawings due to, for example, manufacturing techniques and/or tolerances, are to be expected. Thus, the exemplary embodiments should not be construed as limited to the shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of example embodiments.

At present, a film layer such as a light-emitting layer of an OLED is generally prepared by an evaporation process. In the process of vapor deposition of the light-emitting layer and other film layers, a fine metal mask plate (FINE METAL MASK, abbreviated as FMM) technology is used. The FMM technology refers to punching a thin metal film to form an FMM, then aligning the FMM with an OLED display substrate to be formed, and sequentially evaporating materials of film layers such as a light emitting layer to corresponding positions through holes in the FMM.

Due to the large size of the OLED display substrate and the problems of the mesh opening, shadow effect, alignment accuracy and the like faced by the FMM technology, the minimum size of the hole of the FMM is about 12 μm, and accordingly, when the FMM technology is applied, the minimum size of the light emitting area of the formed OLED is about 12 μm, which results in that the resolution of the sub-pixels in the OLED display substrate is difficult to reach a high level, wherein the ultimate resolution thereof is about 600PPI (Pixels Per Inch, the number of sub-pixels per inch). The application range of the OLED display substrate is correspondingly limited due to the limitation of the FMM technology on the resolution of the OLED display substrate.

Based on this, some embodiments of the present invention provide a method for manufacturing a display substrate 100, as shown in fig. 1, including: s100 to S600.

S100: as shown in fig. 6a, a back plate 1 is provided.

Illustratively, the back plate 1 includes a substrate, a pixel circuit layer disposed on one side of the substrate, a flat layer, and an anode layer.

The structure of the substrate comprises a plurality of structures, and the structure can be selected and arranged according to actual needs.

For example, the substrate may be a rigid substrate. The rigid substrate may be, for example, a glass substrate or a PMMA (Polymethyl methacrylate ) substrate. In this case, the display substrate 100 may be a rigid display substrate.

As another example, the substrate may be a flexible substrate. The flexible substrate may be, for example, a PET (Polyethylene terephthalate ) substrate, a PEN (Polyethylene naphthalate two formic acid glycol ester, polyethylene naphthalate) substrate, or a PI (Polyimide) substrate. In this case, the display substrate 100 may be a flexible display substrate.

The pixel circuit layer may include a plurality of pixel circuits, for example. Wherein each pixel circuit includes a plurality of thin film transistors. The thin film transistor may include, for example: and the active layer, the grid electrode and the source-drain electrode layer are sequentially laminated, wherein the source-drain electrode layer comprises a source electrode and a drain electrode which are arranged on the same layer.

Illustratively, the anode layer includes a plurality of anodes independent of each other, each anode being electrically connected to one of the pixel circuits through the planar layer.

S200: as shown in fig. 6b, a pixel defining film is formed on one side of the back plate 1.

For example, in the case where the pixel defining film is made of an inorganic material, the pixel defining film having a certain thickness may be deposited on one side of the back plate 1 by PVD (Physical Vapor Deposition ) or PECVD (PLASMA ENHANCED CHEMICAL Vapor Deposition) method.

For example, in the case where the pixel defining film is made of an organic material, the pixel defining film having a certain thickness may be formed on one side of the back plate 1 using a coating process.

Illustratively, the pixel defining film overlies the anode layer.

S300: as shown in fig. 6c, the pixel defining film is patterned by using a photolithography process to form a plurality of first openings G1, thereby obtaining a pixel defining layer 2.

For example, in the case where the pixel defining film is made of an inorganic material, the above-described photolithography process may include: coating photoresist on a pixel defining film, then arranging a mask plate on one side of the photoresist far away from a substrate, exposing and developing the photoresist through the mask plate, removing the exposed part in the photoresist, and reserving the unexposed part in the photoresist so as to form patterned photoresist; and then etching the pixel defining film by taking the patterned photoresist as a mask, and removing the part of the pixel defining film which is not blocked by the patterned photoresist to form a plurality of first openings G1, thereby obtaining the pixel defining layer 2. Finally, the array substrate to be formed can be placed into stripping liquid, and the patterned photoresist layer is dissolved and stripped.

For example, in the case where the pixel defining film is made of an organic material, the above-described photolithography process may include: and arranging a mask plate on one side of the pixel defining film far away from the backboard 1, exposing and developing the pixel defining film through the mask plate, removing the exposed part in the pixel defining film, and reserving the unexposed part in the pixel defining film to form a plurality of first openings G1 to obtain the pixel defining layer 2.

In the photolithography process, the exposure size at the time of exposure may be 1 μm or less, so that the size of the first opening G1 formed by the photolithography process may be 1 μm or less.

It will be appreciated by those skilled in the art that the light emitting area of the OLED corresponds to the area of the first opening G1 described above. Wherein one first opening G1 may correspond to one anode.

S400: as shown in fig. 6f, a stacked sacrificial layer 3 and photoresist layer 4 are formed on the side of the pixel defining layer 2 remote from the back plate 1. The photoresist layer 4 has a plurality of second openings G2, and the orthographic projection of the first openings G1 on the back plate 1 is located in the orthographic projection range of the second openings G2 on the back plate 1. The front projection of the sacrificial layer 3 on the back plate 1 coincides with the front projection range of the photoresist layer 4 on the back plate 1 or is located within the front projection range of the photoresist layer 4 on the back plate 1.

For example, a LOR (Lift-off resist) adhesive may be used as the sacrificial layer 3, and a material of the LOR adhesive may be, for example, a fluorine-containing photoresist having no influence on the characteristics of the light emitting material.

For example, one second opening G2 may correspond to one first opening G1.

The number of the second openings G2 is smaller than or equal to the number of the first openings G1. In the case where the number of the second openings G2 is smaller than the number of the first openings G1, the method for manufacturing the display substrate 100 may refer to the following description, and will not be repeated here.

By making the orthographic projection of the first opening G1 on the back plate 1 be within the orthographic projection range of the second opening G2 on the back plate 1, the second opening G2 can be made to expose at least the first opening G1, so that other film layers (for example, light emitting film) formed in the subsequent process can be ensured, and at least the first opening G1 can be covered.

By overlapping the front projection of the sacrificial layer 3 on the back plate 1 with the front projection range of the photoresist layer 4 on the back plate 1, or being located in the front projection range of the photoresist layer 4 on the back plate 1, the material of the sacrificial layer 3 is not contained in the area of the second opening G2, so that the characteristics of other film layers formed in the area of the second opening G2 in the subsequent process are prevented from being influenced by the material of the sacrificial layer 3, and the film layers are ensured to have better flatness and structural stability.

In some examples, as shown in fig. 3, S400 includes: s410 to S430.

S410: as shown in fig. 6d, a sacrificial film and a photoresist film are sequentially formed on the side of the pixel defining layer 2 remote from the back plate 1.

For example, a sacrificial film and a photoresist film having a certain thickness may be sequentially formed using a coating process. The coating process may include, for example, a coating process, a spot coating process, and the like.

S420: as shown in fig. 6e, the photoresist film is exposed and developed to form a plurality of second openings G2, thereby obtaining a photoresist layer 4.

For the above process, reference may be made specifically to S300, which is a photolithography process in the case where the pixel defining film is made of an organic material, and will not be described herein.

S430: as shown in fig. 6f, the sacrificial film is developed to form the sacrificial layer 3. In the case where the orthographic projection of the sacrifice layer 3 on the back plate 1 is within the orthographic projection range of the photoresist layer 4 on the back plate 1, the portions of the sacrifice layer 3 near the plurality of second openings G2 are retracted with respect to the photoresist layer 4.

For example, the sacrificial film may be developed in a developer that is generally compatible with the material of the sacrificial film, the sacrificial film may be removed without affecting other film layers, and the thickness of the sacrificial film and the development time for developing the sacrificial film may be controlled as desired to control the amount of removal of the sacrificial film.

For example, in the case where the material of the sacrificial film is LOR glue, the developer is LOR developer matching the LOR glue.

It will be appreciated that the developing solution will first remove the sacrificial film exposed in the area of the second opening G2, and stop developing when the sacrificial film exposed in the area of the second opening G2 is removed, so that the front projection of the sacrificial layer 3 on the back plate 1 coincides with the front projection range of the photoresist layer 4 on the back plate 1.

If the developing process is continued, the developing solution starts to remove the sacrificial film located on the side, close to the back plate 1, of the photoresist layer 4, by controlling a proper developing time, the orthographic projection of the sacrificial layer 3 on the back plate 1 can be located in the orthographic projection range of the photoresist layer 4 on the back plate 1, and the portions, close to the plurality of second openings G2, of the sacrificial layer 3 are retracted relative to the photoresist layer 4, so that a structure similar to a T-shaped column is formed. Wherein the longer the development time, the larger the set-back distance, and the smaller the thickness of the sacrificial film, the larger the set-back distance, with the fixed development time. The setback distance can be selected and set according to actual needs.

Under the condition that the orthographic projection of the sacrificial layer 3 on the backboard 1 is positioned in the orthographic projection range of the photoresist layer 4 on the backboard 1, when other film layers are formed in the subsequent process, the film layers in the area of the second opening G2 and the film layers outside the area of the second opening G2 can be disconnected, and by controlling the thickness and the development time of the sacrificial film, a proper retraction distance is formed, so that the disconnection between the film layers in the area of the second opening G2 and the film layers outside the area of the second opening G2 can be further ensured.

S500: as shown in fig. 6g, a light emitting film, a first functional film, and a packaging film are sequentially formed on the side of the photoresist layer 4 away from the back plate 1.

For example, an OPEN MASK process may be used to sequentially form a light-emitting film, a first functional film, and a packaging film having a certain thickness by vapor deposition. Wherein, as shown in fig. 6G, the portion of the light emitting film, the first functional film, and the encapsulation film located inside the second opening G2 and the portion located outside the second opening G2 are, for example, disconnected.

It should be noted that, in the present invention, only three film layers of the light emitting film, the first functional film and the packaging film are formed on the side of the photoresist layer 4 away from the back plate 1 in sequence, but the number and the kind of the film layers are not limited, and those skilled in the art may set other film layers according to actual needs. For example, a CPL (CAPPING LAYER ) film may be formed between the first functional film and the encapsulation film to form a CPL layer in a subsequent process, improving the light extraction efficiency of the OLED; for another example, at least one of an electron injection film, an electron transport film, and a hole blocking film may be formed between the first functional film and the light emitting film to form at least one of an electron injection layer, an electron transport layer, and a hole blocking layer in a subsequent process, thereby improving the light emitting efficiency of the OLED; for another example, at least one of an electron blocking film, a hole transporting film, and a hole injecting film may be formed on a side of the light emitting film near the back plate 1 to form at least one of an electron blocking layer, a hole transporting layer, and a hole injecting layer in a subsequent process, thereby improving the light emitting efficiency of the OLED.

S600: as shown in fig. 6h and 6i, the sacrificial layer 3 is stripped, and the sacrificial layer 3, the photoresist layer 4, and portions of the light-emitting film, the first functional film, and the packaging film located on the surface of the photoresist layer 4 on the side away from the back plate 1 are removed, so that portions of the light-emitting film, the first functional film, and the packaging film located in the second opening G2 remain.

For example, a portion of the sacrificial layer 3 on the side close to the pixel defining layer 2 may be dissolved by a developing solution, so that the remaining portion of the sacrificial layer 3, the photoresist layer 4, and the portion of the light-emitting film, the first functional film, and the encapsulation film on the side surface of the photoresist layer 4 away from the back plate 1 are separated from the pixel defining layer 2, and then the photoresist layer 4 and the portion of the light-emitting film, the first functional film, and the encapsulation film on the side surface of the photoresist layer 4 away from the back plate 1 are peeled off while the remaining sacrificial layer 3 is peeled off. After the peeling is completed, the portion of the light emitting film, the first functional film, and the encapsulation film located in the second opening G2 remains.

Since the second openings G2 expose at least the corresponding first openings G1, the portions of the light emitting film, the first functional film, and the encapsulation film that remain within the second openings G2 after the sacrificial layer 3 is peeled off may cover at least the first openings G1. Since the size of the first opening G1 may be 1 μm or less, the size of the light emitting region of the OLED may be 1 μm or less. Therefore, compared with the size of the light emitting region of the OLED formed by adopting the FMM technology, the size of the light emitting region of each OLED formed by the technical scheme of the present invention can reach less than 1 μm, so that more OLEDs (i.e., more sub-pixels) can be formed in the pixel region of unit size, i.e., PPI of the display substrate can be improved.

The materials of the encapsulation film formed in S500 include: inorganic materials such as silicon oxide, silicon nitride and silicon oxynitride. By forming the encapsulation film on the side of the light emitting film and the first functional film away from the back plate 1, the light emitting film and the first functional film can be protected by the encapsulation film, and the performance of the light emitting film and the first functional film is ensured not to be affected by other chemicals in the subsequent process (e.g., S600), thereby preventing the light emitting film and the first functional film from being failed and improving the yield of the display substrate 100.

In this way, according to the method for manufacturing the display substrate 100 provided in some embodiments of the present invention, on the one hand, the pixel defining layer 2 having the plurality of first openings G1 is manufactured through a photolithography process, so that the size of the plurality of first openings G1 can be less than 1 μm, and further, when the photoresist layer having the second openings G2 exposing at least the first openings G1 and the sacrificial layer are used, a lift-off process is implemented, so as to preserve the portions of the light emitting film, the first functional film and the encapsulation film located in the second openings G2, the size of the light emitting region of the formed OLED can be less than 1 μm. Compared with the OLED formed by adopting the FMM technology, the OLED light-emitting area size is about 12 mu m, the display substrate has the advantages that the number of sub-pixels which can be formed in a unit-size pixel area can be remarkably increased, and the PPI of the display substrate is further increased. On the other hand, by forming the encapsulation film made of an inorganic material after forming the light emitting film and the first functional film, the light emitting film and the first functional film can be protected, and the performance of the light emitting film and the first functional film is ensured not to be affected by other chemicals in the subsequent process, thereby preventing the light emitting film and the first functional film from being failed and improving the yield of the display substrate 100.

In some examples, the display substrate 100 has a plurality of sub-pixels to be formed, the plurality of sub-pixels to be formed including at least: a plurality of first color sub-pixels to be formed, a plurality of second color sub-pixels to be formed, and a plurality of third color sub-pixels to be formed.

Illustratively, the plurality of sub-pixels to be formed include: a plurality of first color sub-pixels to be formed, a plurality of second color sub-pixels to be formed, and a plurality of third color sub-pixels to be formed. Wherein the first color, the second color and the third color are red, green and blue, respectively.

Illustratively, the plurality of sub-pixels to be formed include: a plurality of first color sub-pixels to be formed, a plurality of second color sub-pixels to be formed, a plurality of third color sub-pixels to be formed, and a plurality of fourth color sub-pixels to be formed. Wherein the first color, the second color, the third color and the fourth color are red, green, blue and white, respectively.

In the following, taking the example that the plurality of sub-pixels to be formed include a plurality of sub-pixels to be formed in a first color, a plurality of sub-pixels to be formed in a second color, and a plurality of sub-pixels to be formed in a third color, a preparation method of the display substrate is schematically described.

Illustratively, the above-described method of preparation further includes S700.

S700: as shown in fig. 6j to 6S, a plurality of sub-pixels to be formed in a first color, a plurality of sub-pixels to be formed in a second color, and a plurality of sub-pixels to be formed in a third color are sequentially prepared by repeating the steps S400 to S600.

For example, as shown in fig. 6d to 6i, using the above steps S400 to S600, a plurality of sub-pixels to be formed in the first color may be prepared. In S400, the number of the plurality of second openings G2 of the photoresist layer 4 is smaller than the number of the plurality of first openings G1 of the pixel defining layer 2. The number of the plurality of second openings G2 of the photoresist layer 4 is, for example, one third of the number of the plurality of first openings G1 of the pixel defining layer 2.

As shown in fig. 6j to 6n, after repeating the above steps S400 to S600 for the first time, a plurality of sub-pixels to be formed in the second color may be prepared. In S400 of the first repetition, the number of the plurality of second openings G2 of the photoresist layer 4 is smaller than the number of the plurality of first openings G1 of the pixel defining layer 2. The number of the plurality of second openings G2 of the photoresist layer 4 is, for example, one third of the number of the plurality of first openings G1 of the pixel defining layer 2.

As shown in fig. 6o to 6S, after repeating the above steps S400 to S600 for the second time, a plurality of sub-pixels to be formed in the third color may be prepared. In S400 of the second repetition, the number of the plurality of second openings G2 of the photoresist layer 4 is smaller than the number of the plurality of first openings G1 of the pixel defining layer 2. The number of the plurality of second openings G2 of the photoresist layer 4 is, for example, one third of the number of the plurality of first openings G1 of the pixel defining layer 2.

It should be noted that, in the case that the plurality of sub-pixels to be formed includes sub-pixels to be formed of more colors, the above steps S400 to S600 may be continuously repeated to prepare a plurality of sub-pixels to be formed of other colors. At this time, the number of the plurality of second openings G2 provided in the photoresist layer 4 may be selected and set according to actual needs each time the photoresist layer 4 is formed.

It should be understood by those skilled in the art that by controlling the opening positions of the plurality of second openings G2 in S400, the opening positions of the plurality of second openings G2 are made to correspond to the forming positions of the sub-pixels to be formed in a certain color, and thus, the typesetting of the sub-pixels to be formed in the certain color can be completed through the subsequent steps. Therefore, the preparation methods of the display substrate provided in the embodiments of the present invention are not limited to specific typesetting methods of the sub-pixels with multiple colors, and those skilled in the art can design the typesetting methods of the sub-pixels with multiple colors according to actual needs.

It should be noted that, in each repetition of step S500, the encapsulation film is formed on the side of the light emitting film and the first functional film away from the back plate 1, so that the light emitting film and the first functional film can be protected by the encapsulation film during the repetition of steps S400 to S600, so that the light emitting film and the first functional film are prevented from being corroded by other chemicals, thereby preventing the failure of the light emitting film and the first functional film, and improving the yield of the display substrate 100.

In some examples, as shown in fig. 7a, the display substrate 100 has a display area AA and a peripheral area SS beside the display area AA. The display substrate 100 includes a common voltage signal line 5 located at a peripheral region SS. As shown in fig. 6s, the portion of the plurality of first functional films located in the second opening G2 constitutes the first functional portion 31, the plurality of first functional portions 31 constitutes the first functional layer 6, and the portion of the plurality of packaging films located in the second opening G2 constitutes the first packaging layer 7. As shown in fig. 2, the preparation method further includes: s800 to S900.

S800: as shown in fig. 7c or 8b, at least a portion of the first encapsulation layer 7 located in the peripheral region SS is removed, exposing at least a portion of the first functional layer 6.

For example, as shown in fig. 7c, only a portion of the first functional layer 6 located at the peripheral region SS may be exposed, and at this time, only a portion of the first encapsulation layer 7 located at the peripheral region SS may be removed.

For example, as shown in fig. 8b, the whole of the first functional layer 6 may be exposed, and at this time, the entire first encapsulation layer 7 may be removed.

For example, the first encapsulation layer 7 may be etched away using an etching process.

S900: as shown in fig. 7d or fig. 8c, the second functional layer 8 is formed at least in the peripheral region SS; the second functional layer 8 is in electrical contact with the common voltage signal line 5 and with the first functional layer 6.

For example, a mask plate may be used to form a second functional layer by vapor deposition in a region corresponding to the exposed portion of the first functional layer 6, and the second functional layer 8 may be electrically contacted with the common voltage signal line 5, so that a voltage signal may be transmitted to the second functional layer 8 through the common voltage signal line 5.

The specific structure of the second opening G2 is not limited in the present invention, and may be selected according to actual needs.

In some examples, as shown in fig. 7a to 7e, the second opening G2 includes a pixel area M and a routing area N connected to each other, at least a portion of the pixel area M is located in the first opening G1, and the routing area N extends to the peripheral area SS. At this time, the second opening G2 exposes not only the first opening G1 but also a portion of the pixel defining layer 2.

Based on this, as shown in fig. 4, the above S800 may include S810 and S900 may include S910.

S810: as shown in fig. 7b and 7c, a portion of the first encapsulation layer 7 located at the peripheral region SS is removed, exposing a portion of the first functional layer 6.

Illustratively, the materials of the first functional layer 6 include: indium tin oxide, aluminum, silver, magnesium-silver alloy, aluminum-lithium alloy, and the like.

At this time, a layer of photoresist may be coated on a side of the first encapsulation layer 7 away from the back plate 1, after exposure and development, a portion of the photoresist corresponding to a portion of the first encapsulation layer 7 located in the peripheral region SS is removed, so as to form a patterned photoresist, and then the patterned photoresist is used as a mask plate to etch the first encapsulation layer 7, so as to remove a portion of the first encapsulation layer 7 located in the peripheral region SS, and expose a portion of the first functional layer 6.

It should be noted that, in the process of etching the first encapsulation layer 7, since the portion of the first functional layer 6 located in the peripheral area SS is exposed, the etching process may affect the transmittance of the portion of the first functional layer 6 located in the peripheral area SS, but since the etched area is located in the peripheral area SS away from the display area AA, the transmittance reduction does not affect the light emitting performance of the display area AA.

S910: as shown in fig. 7d, the second functional layer 8 is formed in the peripheral region SS. The second functional layer 8 covers the exposed portion of the first functional layer 6 and at least a portion of the common voltage signal line 5.

The second functional layer 8 may be formed of the same material as the first functional layer 6 described above, for example.

For example, the second functional layer 8 may be formed by vapor deposition in the peripheral region SS by an OPEN MASK process.

In this example, the first functional layer 6 may be, for example, a cathode, and the second functional layer 8 may be a connection. By covering the exposed portion of the first functional layer 6 and at least a portion of the common voltage signal line 5 with the second functional layer 8, the first functional layer 6 can be brought into electrical contact with the common voltage signal line 5 through the second functional layer 8, whereby the common voltage signal can be supplied to the first functional layer 6 through the common voltage signal line 5 and the second functional layer 8 in order.

The arrangement mode of the routing area N in the second opening G2 is not limited, and the routing area N can be selected and arranged according to actual needs.

The orthographic projection of the trace area N in the second openings G2 on the back plate 1 is L-shaped.

For example, the orthographic projections of the trace areas N in the plurality of second openings G2 on the back plate 1 do not overlap.

For example, the orthographic projection portions of the trace areas N in at least two second openings G2 formed at different times on the back plate 1 overlap. Thus, the film layers formed in the wiring area N later can be mutually covered, so that the space is saved.

It should be noted that, the at least two second openings G2 formed in the above-mentioned different times means that, in the case where the number of second openings G2 is smaller than the number of first openings G1, the at least two second openings G2 formed in step S400 are repeated differently.

It should be noted that the film layer subsequently formed in the second opening G2 may include a plurality of stacked film layers, and the orthographic projection shapes of the plurality of film layers on the back plate 1 may be the same, for example.

It should be noted that the routing regions N in the different second openings G2 may partially overlap each other, but need to be separated at a position close to the common voltage signal line 5 located in the peripheral region SS, that is, at a position close to the common voltage signal line 5 located in the peripheral region SS, the orthographic projections of the routing regions N in the different second openings G2 on the back plane 1 do not overlap, so that it is ensured that the first functional layers 6 formed in the different second openings G2 may all be in electrical contact with the common voltage signal line 5 located in the peripheral region SS in a subsequent process.

In some examples, as shown in fig. 8a, the second openings G2 are arranged in an array, and at this time, the second openings G2 are in a block shape, for example, to expose the first openings G1 and the portion of the pixel defining layer 2 located at the periphery of the first openings G1.

Based on this, as shown in fig. 5, the above S800 may include S810', and S900 may include S910'.

S810': as shown in fig. 8b, the entire first encapsulation layer 7 is removed, exposing the first functional layer 6.

For example, the first functional layer 6 may act as an etch stop layer, and the first functional layer 6 has a high etch selectivity compared to the first encapsulation layer 7.

For example, in the case where the material of the first encapsulation layer 7 is an inorganic material such as silicon oxide, silicon nitride, or silicon oxynitride, the material of the first functional layer 6 may be Indium Tin Oxide (ITO), for example.

For example, an etching process may be used to etch away the entirety of the first encapsulation layer 7 and expose the entirety of the first functional layer 6.

It should be noted that, in the whole etching process of the first encapsulation layer 7, since the first functional layer 6 has a high etching selectivity compared with the first encapsulation layer 7, the first functional layer 6 can be prevented from being etched while the first encapsulation layer 7 is etched, and the light emitting portion 31 located on the side of the first functional layer 6 close to the back plate 1 can be protected from being etched by using the first functional layer 6, so that the performance of the light emitting portion 31 is prevented from being damaged, and the yield of the display substrate 100 is improved.

S910': as shown in fig. 8c, in the peripheral area SS and the display area AA, the side of the first functional layer 6 away from the back plate 1 forms a second functional layer 8. The second functional layer 8 covers at least a portion of the common voltage signal line 5.

Illustratively, the materials of the second functional layer 8 include: indium Tin Oxide (ITO), aluminum, silver, magnesium silver alloy, aluminum lithium alloy, and the like.

For example, the second functional layer 8 may be formed by vapor deposition on the entire surface of the first functional layer 6 on the side away from the back plate 1.

The second functional layer 8 may serve as a cathode, and the second functional layer 8 and the common voltage signal line 5 are brought into electrical contact by making the second functional layer 8 cover at least a portion of the common voltage signal line 5, so that the common voltage signal may be supplied to the second functional layer 8 through the common voltage signal line 5.

In the case where the first functional layer 6 is made of a material having transparent and conductive properties (for example, indium tin oxide ITO), the etching stopper layer may be used as an electron transport layer, which plays a role in transporting electrons, and improves the light emitting efficiency of the OLED.

It should be noted that, after step S900, the preparation of the cathode is completed. In this case, the anode, the light-emitting portion 31, and the cathode may constitute, for example, a light-emitting device.

In some examples, as shown in fig. 2, the above preparation method further includes step S1000.

S1000: as shown in fig. 7e or fig. 8d, a second encapsulation layer 9 is formed on the side of the second functional layer 8 away from the back plate 1, and the second encapsulation layer 9 covers the second functional layer 8.

Illustratively, as shown in fig. 7e, in the case where S800 includes S810 and S900 includes S910, by forming the second encapsulation layer 9 on the side of the second functional layer 8 away from the back plate 1, it is possible to avoid water and/or oxygen from attacking the second functional layer 8, and thus, the first functional layer 6 in electrical contact with the second functional layer 8, to disable the light emitting device.

Illustratively, as shown in fig. 8d, in the case where S800 includes S810', S900 includes S910', by forming the second encapsulation layer 9 on the side of the second functional layer 8 away from the back plate 1, it is possible to avoid water and/or oxygen from attacking the second functional layer 8, and to disable the light emitting device.

Some embodiments of the present invention provide a display substrate 100, as shown in fig. 9 or 11, the display substrate 100 includes: a back plate 1; a pixel defining layer 2 disposed at one side of the back plate 1 and having a plurality of first openings G1, wherein the pixel defining layer 2 is formed through a photolithography process; and a light emitting section 21 and a first functional section 31 which are provided at least in the first opening G1 and are laminated in this order, the light emitting section 21 and the first functional section 31 being formed by peeling.

In some examples, the structure of the back plate 1 may be the structure mentioned in the above embodiments, and will not be described herein.

For example, the light emitting portion 21 and the first functional portion 31 may be both located in the first opening G1, or may be partially overlapped on a side of the pixel defining layer 2 away from the back plate 1.

The display substrate 100 has the same advantages as the preparation method of the display substrate 100 described in some embodiments, and will not be described here.

In some examples, as shown in fig. 9 to 12, the display substrate 100 has a display area AA and a peripheral area SS beside the display area AA. The plurality of first functional units 31 constitute the first functional layer 6. The display substrate 100 further includes a common voltage signal line 5 located in the peripheral area SS, and a second functional layer 8 disposed on a side of the common voltage signal line 5 and the first functional layer 6 away from the back plate and located at least in the peripheral area SS; and a sealing layer 30 covering the light emitting section 21, the first functional section 31, and the second functional layer 8. Wherein the second functional layer 8 is in electrical contact with the common voltage signal line 5 and with the first functional layer 6.

The shape of the display area AA may include various shapes, which are not limited in the present invention, and may be specifically set according to actual needs. The display area AA may be in any one of an oval shape, a trapezoid shape, and a rectangle shape, for example.

The above-mentioned positional relationship between the peripheral area SS and the display area AA is not unique, for example, the peripheral area SS may be located at one side of the display area AA, at both sides of the display area AA, at three sides of the display area AA, or around the display area AA.

As shown in fig. 9 and 11, the present invention schematically illustrates the structure of the display substrate 100 taking a case where the display area AA is rectangular in shape and the peripheral area SS is disposed around the display area AA.

The invention does not limit the number of the common voltage signal lines 5, and can be selected and set according to actual needs. For example, the number of the common voltage signal lines 5 may be one or two.

The invention does not limit the shape and arrangement mode of the common voltage signal line 5, and can be selected and set according to actual needs.

By way of example, in the case where the number of common voltage signal lines 5 is one, the shape of the common voltage signal line 5 may be, for example, a bar shape or a C shape. In the case where the shape of the common voltage signal line 5 is a bar shape, one common voltage signal line 5 may be distributed on either side of the display substrate 100. In the case where the common voltage signal lines 5 are C-shaped, one common voltage signal line 5 may surround a portion of the display area AA, and the opening direction thereof may be directed to either side of the display substrate 100.

For example, in the case where the number of the common voltage signal lines 5 is two, the shape of the common voltage signal lines 5 may be, for example, a bar shape, and in this case, the two common voltage signal lines 5 may be, for example, distributed on opposite sides of the display substrate 100 or the two common voltage signal lines 5 may be distributed on the same side of the display substrate 100.

Based on the above structure, the first functional layer 6 can be electrically contacted with the common voltage signal line 5 through the second functional layer 8, so that the common voltage signal can be transmitted through the common voltage signal line 5, the second functional layer 8 and the first functional layer 6 in sequence. Furthermore, by having the encapsulation layer 30 cover the second functional layer 8, water and/or oxygen is prevented from attacking the second functional layer 8 and thus the first functional layer 6 in electrical contact with the second functional layer 8.

The shape of the first functional layer 6 is not limited, and the first functional layer can be selected and set according to actual needs.

In one example, as shown in fig. 11 and 12, the plurality of first functional units 31 are arranged in an array, the second functional layer 8 is located in the display area AA and the peripheral area SS, the encapsulation layer 30 covers the second functional layer 8, and the encapsulation layer 30 is a whole film layer.

The first functional parts 31 are, for example, block-shaped and are provided independently of each other.

The first functional layer 6 may serve as an electron input layer and the second functional layer 8 may serve as a cathode, for example. At this time, the cathode is located in the display area AA and the peripheral area SS, and a portion thereof located in the display area AA may directly cover and directly make electrical contact with the plurality of first functional portions included in the first functional layer 6, and a portion thereof located in the peripheral area SS may directly make electrical contact with the common voltage signal line 5 located in the peripheral area SS.

By having the encapsulation layer 30 cover the second functional layer 8, water and/or oxygen attack of the second functional layer 8 can be avoided, disabling the OLED.

In another example, as shown in fig. 9 and 10, the first functional portion 31 includes at least a first sub-functional portion 311 located within the first opening G1, and a second sub-functional portion 312 connected to the first sub-functional portion 311 and extending to the peripheral region SS. The second functional layer 8 is located in the peripheral region SS. The encapsulation layer 30 includes a first encapsulation layer 7 and a second encapsulation layer 9, wherein the first encapsulation layer 7 covers a portion of the first functional layer 6 located in the display area AA, and the second encapsulation layer 9 covers a portion of the second sub-functional portion 312 extending to the peripheral area SS and the second functional layer 8.

The manner in which the second sub-functional portion 312 extends to the peripheral area SS is not limited in the present invention, and may be selected and set according to actual needs.

The orthographic projection shape of the second sub-functional portion 312 on the back plate 1 is linear, and extends to the peripheral area SS in a linear direction.

The second sub-functional portion 312 is L-shaped in front projection on the back plate 1, and extends to the peripheral area SS along the folding line.

At this time, the specific direction of the fold line is not limited, and the fold line can be selected and set according to actual needs. As shown in fig. 9, the extending direction of the common voltage signal line 5 is the second direction Y, and the direction perpendicular to the extending direction of the common voltage signal line 5 is the first direction X. Illustratively, the fold line direction may be: firstly along the positive direction of the second direction Y and then along the positive direction of the first direction X; or along the reverse direction of the second direction Y and then along the forward direction of the first direction X; or along the positive direction of the second direction Y and then along the reverse direction of the first direction X; or first in the opposite direction of the second direction Y and then in the opposite direction of the first direction X.

For example, the first functional layer 6 may serve as a cathode and the second functional layer 8 may serve as a connection. At this time, the first functional layer 6 may make electrical contact with the common voltage signal line 5 located at the peripheral region SS through the second functional layer 8.

For example, the second functional layer 8 may be located on a side of the first encapsulation layer 8 away from the back plate 1, and the second encapsulation layer 9 is located on a side of the second functional layer 8 away from the back plate 1.

Through the cooperation of the first encapsulation layer 7 and the second encapsulation layer 9, the first functional layer 6 and the second functional layer 8 can be completely encapsulated, so that water and/or oxygen can be prevented from eroding the second functional layer 8, and further eroding the first functional layer 6 electrically contacted with the second functional layer 8, and the light-emitting device is disabled.

The number of the common voltage signal lines 5 is two, and the second sub-functional portions 312 are rectangular and distributed on opposite sides of the display substrate 100, and the orthographic projection shape of the second sub-functional portions 312 on the back plate 1 is schematically illustrated as an L-shape.

Illustratively, the orthographic projection of at least two second sub-functions 312 on the back plate 1 partially overlaps. For the description herein, reference may be made to the above description about the overlapping orthographic projection portions of the trace areas N in the at least two second openings G2 formed at different times on the back plane 1, which is not repeated herein.

Illustratively, the common voltage signal lines 5 are respectively located at opposite sides of the display substrate 100. Wherein at least one second sub-functional portion 312 extends to one of the opposite sides and at least one second sub-functional portion 312 extends to the other of the opposite sides.

Illustratively, one second sub-functional part 312 extends to one of the opposite sides or a plurality of second sub-functional parts 312 extends to one of the opposite sides.

Illustratively, one second sub-functional part 312 extends to the other of the opposite sides or a plurality of second sub-functional parts 312 extends to the other of the opposite sides.

By providing the common voltage signal lines 5 on opposite sides of the display substrate 100, one end of the second sub-functional portion 312 can follow the principle of nearby routing in the process of extending to the peripheral area SS, so that routing can be saved and distribution of routing is facilitated.

Illustratively, as shown in fig. 9, at least two second sub-functional portions 312 are symmetrical about a center line L of the display substrate 100.

Illustratively, the two second sub-functional portions 312 are symmetrical about a center line L of the display substrate 100.

Illustratively, the plurality of second sub-functional portions 312 are symmetrical about a center line L of the display substrate 100.

As shown in fig. 9, the center line is a straight line passing through the midpoint of the display substrate 100 and parallel to the second direction Y, for example.

Thus, the layout of the wiring on the display substrate 100 is simplified, and the process is simplified, thereby improving the yield of the display substrate.

In some examples, the resolution of the display substrate 100 is greater than 600PPI.

For example, the resolution of the display substrate 100 may be 600PPI, 800PPI, 1000PPI, 2000PPI, 3000PPI, etc.

In some embodiments, a display device 1000 is provided, the display device 1000 comprising a display substrate 100 as described in any of the embodiments above.

The display substrate 100 included in the display device 1000 has the same structure and beneficial effects as those of the display substrate 100 provided in some embodiments described above, and since some embodiments described above have already been described in detail, the detailed description of the structure and beneficial effects of the display substrate 100 is omitted here.

In some examples, as shown in fig. 13, display device 1000 may be any device that displays both motion (e.g., video) and stationary (e.g., still image) and whether text or image. More particularly, it is contemplated that the embodiments may be implemented in or associated with a variety of electronic devices such as, but not limited to, mobile telephones, wireless devices, personal data assistants (Personal DIGITAL ASSISTANT, PDA for short), hand-held or portable computers, global positioning system (Global Positioning System) receivers/navigators, cameras, moving picture experts group (Moving Picture Experts Group 4, MP 4) video players, video cameras, game consoles, wrist watches, clocks, calculators, television monitors, computer monitors, automotive displays (e.g., odometer display, etc.), navigators, cockpit controls and/or displays, displays of camera views (e.g., display of a rear view camera in a vehicle), electronic billboards or signs, projectors, architectural structures, packaging, and aesthetic structures (e.g., display of images on a piece of jewelry), and the like.

The foregoing is merely a specific embodiment of the disclosure, but the protection scope of the disclosure is not limited thereto, and any person skilled in the art who is skilled in the art will recognize that changes or substitutions are within the technical scope of the disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims

1. A method for manufacturing a display substrate, the method comprising:

s100, providing a backboard;

s200, forming a pixel defining film on one side of the backboard;

s300, performing patterning treatment on the pixel definition film by utilizing a photoetching process to form a plurality of first openings so as to obtain a pixel definition layer;

S400, forming a stacked sacrificial layer and photoresist layer on one side of the pixel defining layer away from the backboard; the photoresist layer is provided with a plurality of second openings, and the orthographic projection of the first openings on the backboard is positioned in the orthographic projection range of the second openings on the backboard; the orthographic projection of the sacrificial layer on the backboard coincides with the orthographic projection range of the photoresist layer on the backboard, or is positioned in the orthographic projection range of the photoresist layer on the backboard;

s500, sequentially forming a light-emitting film, a first functional film and a packaging film on one side of the photoresist layer, which is far away from the backboard;

S600, stripping the sacrificial layer, and removing the sacrificial layer, the photoresist layer, the light-emitting film, the first functional film and the packaging film, wherein the parts of the photoresist layer, the first functional film and the packaging film, which are positioned on the surface of one side of the photoresist layer, which is far away from the back plate, remain the parts of the light-emitting film, the first functional film and the packaging film, which are positioned in the second opening;

The display substrate is provided with a display area and a peripheral area positioned beside the display area; the display substrate comprises a common voltage signal line positioned in the peripheral area; the second opening comprises a pixel area and a wiring area which are connected with each other; at least a part of the pixel area is positioned in the first opening; the wiring area extends to the peripheral area;

Orthographic projection parts of the wiring areas in at least two second openings formed at different times on the backboard are overlapped; the orthographic projections of the wiring areas in the different second openings on the backboard are not overlapped at the position close to the position of the common voltage signal line;

The part of the first functional film positioned in the second opening forms a first functional part, and a plurality of first functional parts form a first functional layer; the part of the packaging film positioned in the second opening forms a packaging part, and a plurality of packaging parts form a first packaging layer;

the preparation method further comprises the following steps:

Removing at least a portion of the first encapsulation layer located in the peripheral region, exposing at least a portion of the first functional layer;

Forming a second functional layer at least in the peripheral region; the second functional layer is in electrical contact with the common voltage signal line and in electrical contact with the first functional layer;

the second functional layer covers at least a portion of the first functional layer and at least a portion of the common voltage signal line.

2. The method of manufacturing of claim 1, wherein forming the stacked sacrificial layer and photoresist layer comprises:

forming a sacrificial film and a photoresist film in sequence on one side of the pixel defining layer away from the backboard;

Exposing and developing the photoresist film to form a plurality of second openings to obtain the photoresist layer;

Developing the sacrificial film to form the sacrificial layer; in the case that the orthographic projection of the sacrificial layer on the back plate is within the orthographic projection range of the photoresist layer on the back plate, the portions of the sacrificial layer close to the second openings are retracted relative to the photoresist layer.

3. The method of manufacturing according to claim 1, characterized in that the method of manufacturing further comprises:

forming a second packaging layer on one side of the second functional layer far away from the backboard; the second encapsulation layer covers the second functional layer.

4. The method for manufacturing a semiconductor device according to any one of claims 1 to 3, wherein the removing at least a portion of the first encapsulation layer located in the peripheral region includes:

removing the part of the first packaging layer, which is positioned in the peripheral area, and exposing a part of the first functional layer;

the forming a second functional layer at least in the peripheral region includes:

forming the second functional layer in the peripheral region; the second functional layer covers an exposed portion of the first functional layer and at least a portion of the common voltage signal line.

5. The method for preparing a plastic film according to any one of claims 1 to 3, wherein the second openings are arranged in an array;

The removing at least a portion of the first encapsulation layer located in the peripheral region, exposing at least a portion of the first functional layer, includes:

Removing the whole first packaging layer to expose the first functional layer;

Forming a second functional layer on one side of the first functional layer, which is far away from the backboard, in the peripheral area and the display area; the second functional layer covers at least a portion of the first functional layer and the common voltage signal line.

6. The method of claim 5, wherein the first functional layer has a high etch selectivity compared to the first encapsulation layer.

7. The method of claim 1, wherein the display substrate has a plurality of sub-pixels to be formed; the plurality of sub-pixels to be formed at least includes: a plurality of first color sub-pixels to be formed, a plurality of second color sub-pixels to be formed, and a plurality of third color sub-pixels to be formed;

The preparation method comprises the following steps: and (3) adopting the steps S400-S600 and repeating the steps S400-S600, and sequentially preparing the plurality of sub-pixels to be formed in the first color, the plurality of sub-pixels to be formed in the second color and the plurality of sub-pixels to be formed in the third color.

8. The display substrate is characterized by comprising a display area and a peripheral area positioned beside the display area; the display substrate includes:

A back plate;

A pixel defining layer disposed on one side of the back plate and having a plurality of first openings; the pixel defining layer is formed through a photoetching process; and

A light emitting unit and a first functional unit which are provided at least in the first opening and are stacked in this order; the light emitting part and the first functional part are formed by stripping; the first functional part comprises a first sub-functional part at least positioned in the first opening, and a second sub-functional part which is connected with the first sub-functional part and extends to the peripheral area;

The plurality of first functional parts form a first functional layer;

the display substrate further includes:

A common voltage signal line located in the peripheral region; at least two orthographic projections of the second sub-functional parts on the backboard are overlapped, and orthographic projections of different second sub-functional parts on the backboard are not overlapped at a position close to the common voltage signal line;

the second functional layer is arranged on one side of the public voltage signal line, which is far away from the backboard, and is positioned in the peripheral area; the second functional layer is in electrical contact with the common voltage signal line and in electrical contact with the first functional layer; and

And an encapsulation layer covering the light emitting part, the first functional part and the second functional layer.

9. The display substrate of claim 8, wherein the second functional layer is located in the peripheral region;

The packaging layer comprises a first packaging layer and a second packaging layer; the first packaging layer covers the part of the first functional layer located in the display area, and the second packaging layer covers the part of the second sub-functional part extending to the peripheral area and the second functional layer.

10. The display substrate according to claim 9, wherein the orthographic projection shape of the second sub-functional portion on the back plate is L-shaped.

11. The display substrate according to claim 9, wherein the common voltage signal lines are respectively located at opposite sides of the display substrate;

at least one second sub-function portion extends to one of the opposite sides;

At least one second sub-function extends to the other of the opposite sides.

12. The display substrate according to claim 11, wherein at least two of the second sub-functional portions are symmetrical about a center line of the display substrate.

13. The display substrate according to claim 8, wherein a plurality of the first functional portions are arranged in an array;

the second functional layer is positioned in the display area and the peripheral area;

The packaging layer is a whole film layer.

14. The display substrate of claim 8, wherein the resolution of the display substrate is greater than 600PPI.

15. A display device, characterized in that the display device comprises: the display substrate according to any one of claims 8 to 14.