CN113643897A - Method for manufacturing ceramic capacitor and ceramic capacitor - Google Patents
Method for manufacturing ceramic capacitor and ceramic capacitor Download PDFInfo
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- CN113643897A CN113643897A CN202110808874.XA CN202110808874A CN113643897A CN 113643897 A CN113643897 A CN 113643897A CN 202110808874 A CN202110808874 A CN 202110808874A CN 113643897 A CN113643897 A CN 113643897A
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- 239000003985 ceramic capacitor Substances 0.000 title claims abstract description 190
- 238000000034 method Methods 0.000 title claims abstract description 89
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 29
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims abstract description 174
- 238000007639 printing Methods 0.000 claims abstract description 22
- 238000012360 testing method Methods 0.000 claims abstract description 19
- 238000009713 electroplating Methods 0.000 claims abstract description 10
- 229910000679 solder Inorganic materials 0.000 claims description 24
- 238000005259 measurement Methods 0.000 claims description 5
- 239000003990 capacitor Substances 0.000 abstract description 30
- 230000008569 process Effects 0.000 abstract description 25
- 238000003860 storage Methods 0.000 abstract description 16
- 238000003466 welding Methods 0.000 abstract description 16
- 238000005336 cracking Methods 0.000 abstract description 4
- 229910052718 tin Inorganic materials 0.000 description 154
- 238000010586 diagram Methods 0.000 description 16
- 238000005476 soldering Methods 0.000 description 11
- 230000000694 effects Effects 0.000 description 7
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 7
- 208000037656 Respiratory Sounds Diseases 0.000 description 4
- 238000009954 braiding Methods 0.000 description 4
- 238000004590 computer program Methods 0.000 description 4
- 238000007747 plating Methods 0.000 description 4
- 230000006870 function Effects 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 239000000919 ceramic Substances 0.000 description 2
- 230000009194 climbing Effects 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 208000010392 Bone Fractures Diseases 0.000 description 1
- 206010011376 Crepitations Diseases 0.000 description 1
- 206010017076 Fracture Diseases 0.000 description 1
- 238000000498 ball milling Methods 0.000 description 1
- 229910002113 barium titanate Inorganic materials 0.000 description 1
- JRPBQTZRNDNNOP-UHFFFAOYSA-N barium titanate Chemical compound [Ba+2].[Ba+2].[O-][Ti]([O-])([O-])[O-] JRPBQTZRNDNNOP-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 230000014509 gene expression Effects 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/228—Terminals
- H01G4/232—Terminals electrically connecting two or more layers of a stacked or rolled capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/018—Dielectrics
- H01G4/06—Solid dielectrics
- H01G4/08—Inorganic dielectrics
- H01G4/12—Ceramic dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/228—Terminals
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Inorganic Chemistry (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Ceramic Capacitors (AREA)
Abstract
The invention discloses a method, a system, equipment and a storage medium for manufacturing a ceramic capacitor, wherein the method comprises the following steps: printing a tin resistance layer on the side surface of the terminal of the ceramic capacitor after electroplating, and setting the lowest position of the tin resistance layer to be superposed with the bottom surface of the electrode layer of the bottommost layer of the ceramic capacitor; and testing and taping the ceramic capacitor printed with the tin-resistant layer. According to the invention, the tin-resistant layer is arranged on the ceramic capacitor package, so that the appearance of a capacitor welding spot is effectively controlled, the cracking risk of the ceramic capacitor caused by mechanical stress in the plate-level application process is reduced, the plate-level noise caused by capacitor squeal is reduced, and the flexibility of plate-level layout is improved.
Description
Technical Field
The present invention relates to the field of ceramic capacitors, and more particularly, to a method, a system, a computer device and a readable medium for manufacturing a ceramic capacitor.
Background
Since the advent of ceramic capacitors, ceramic capacitors have become one of the most widely used devices in electronic products due to their advantages of large capacity range, small size, suitability for surface mounting applications, high safety, and the like. The ceramic capacitor is formed by sintering barium titanate as a main ceramic medium and metal electrodes stacked inside, and electroplating is carried out at the end head to lead out an external electrode. Fig. 2 is a schematic structural diagram of a ceramic capacitor, and as shown in fig. 2, an external electrode is divided into three plating layers, a Cu layer is connected with an internal electrode in parallel, a Ni layer serves to protect the Cu layer from corrosion and serves as an intermediate medium of Cu and Sn, and the Sn layer serves as a welding surface.
Due to the characteristics of the ceramic material, the ceramic capacitor has low mechanical strength and is easy to crack in the plate-level application process. Fig. 3 shows is the schematic diagram that ceramic capacitor became invalid, as shown in fig. 3, ceramic capacitor passes through soldering tin and circuit board is fixed, when the circuit board upwards takes place to bend, the circuit board upper surface receives tensile stress, soldering tin pulls the electric capacity and stretches to the outside, when exceeding ceramic capacitor body intensity, ceramic capacitor body becomes to break off, 45 oblique crackles appear, when the crackle extends to electrode layer department, electric leakage or short circuit between the layer just can appear, electric leakage or short circuit failure mode just appear in ceramic capacitor this moment, and then lead to circuit function to become invalid. Therefore, the ceramic capacitor needs to be far away from the layout of a stress source when being applied at a board level, so that the application flexibility is influenced, and the reliable application of the high-capacity, high-voltage and large-size ceramic capacitor is particularly greatly limited.
In addition, due to the piezoelectric property of the ceramic capacitor, a capacitor squeal phenomenon occurs in an alternating voltage or voltage drop application scene, and user experience is greatly influenced. Fig. 4 shows a schematic diagram of a capacitor squeal, and as shown in fig. 4, when a high-frequency signal is applied to a ceramic capacitor, due to a piezoelectric effect, an electrode layer inside the ceramic capacitor microscopically vibrates in a direction perpendicular to a polar plate, and since the ceramic capacitor is fixed on a circuit board through solder, the circuit board is driven to deform and vibrate, and a human ear can hear a "squeal" sound. Therefore, the problem of capacitance squeal is to suppress or offset the deformation of the circuit board caused by the piezoelectric effect of the capacitance.
According to the principle, the ceramic capacitor mechanical crack is caused by overlarge circuit board deformation, the capacitor squeal is caused by the fact that the circuit board is driven to deform by the capacitance piezoelectric effect, the ceramic capacitor and the circuit board are mutually influenced, and the ceramic capacitor mechanical crack and the capacitor squeal are structurally fixed through soldering tin, so that the problems of the ceramic capacitor mechanical crack and the capacitor squeal are solved, and the problem of interface interconnection between the ceramic capacitor and the circuit board is solved.
Fig. 5 shows a welding structure of a ceramic capacitor in the prior art, as shown in fig. 5, two side faces of the ceramic capacitor are respectively welded with an L-shaped bracket by using a welding tin and then welded on a circuit board as a whole, the capacitor < -welding tin < - > bracket < -welding tin < - > circuit board forms an interconnection path, and the bracket is used as a medium of the interconnection path and also used as a medium for releasing mechanical stress and physical vibration between the ceramic capacitor and the circuit board. However, the prior art scheme introduces an additional structural member, increases the size and steeply increases the cost.
Disclosure of Invention
In view of this, an object of the embodiments of the present invention is to provide a method, a system, a computer device, and a computer readable storage medium for manufacturing a ceramic capacitor, in which a tin-blocking layer is disposed on a ceramic capacitor package, so as to achieve effective control of a solder joint morphology of a capacitor, improve mechanical strength of the ceramic capacitor in board level application without adding an additional structural component, reduce a cracking risk of the ceramic capacitor due to mechanical stress in the board level application process, reduce board level noise caused by capacitor squeal, and facilitate improvement of flexibility of board level layout.
In view of the above objects, an aspect of the embodiments of the present invention provides a method of fabricating a ceramic capacitor, including the steps of: printing a tin resistance layer on the side surface of the terminal of the ceramic capacitor after electroplating, and setting the lowest position of the tin resistance layer to be superposed with the bottom surface of the electrode layer of the bottommost layer of the ceramic capacitor; and testing and taping the ceramic capacitor printed with the tin-resistant layer.
In some embodiments, the method further comprises: and setting the highest position of the tin resistance layer to coincide with the upper surface of the ceramic capacitor.
In some embodiments, the testing and taping of the ceramic capacitor with the printed tin-blocking layer further comprises: and determining the lower surface of the ceramic capacitor, performing point measurement on the lower surface, and placing the ceramic capacitor in a fixed direction for taping.
In some embodiments, the method further comprises: and printing a second tin resistance layer on the side surface of the terminal of the ceramic capacitor, wherein the second tin resistance layer and the tin resistance layer are arranged in parallel and have the same width.
In some embodiments, the method further comprises: and arranging the highest position of the second tin-resistant layer to coincide with the top surface of the electrode layer at the topmost layer of the ceramic capacitor.
In some embodiments, the method further comprises: and printing a third tin resistance layer on the side surface of the terminal of the ceramic capacitor, wherein the third tin resistance layer is vertical to the tin resistance layer.
In some embodiments, the method further comprises: and printing a fourth tin resistance layer on the side surface of the terminal of the ceramic capacitor, wherein the fourth tin resistance layer and the third tin resistance layer are arranged in parallel and have the same width.
In some embodiments, the method further comprises: and respectively arranging the third tin-resistant layer and the fourth tin-resistant layer to be closest to the edge of the terminal and coincide with the edge of the side face of the electrode layer of the ceramic capacitor.
In some embodiments, the method further comprises: extending the third and fourth solder resist layers toward the upper and lower surfaces of the terminal, respectively.
In another aspect of the embodiments of the present invention, there is provided a ceramic capacitor fabricated by any one of the above methods.
The invention has the following beneficial technical effects: through set up tin blocking layer on ceramic capacitor encapsulation, realize the effective control to electric capacity solder joint appearance, under the prerequisite that does not increase extra structure, improve ceramic capacitor's mechanical strength when board level application, reduce ceramic capacitor because the fracture risk that mechanical stress caused in the board level application, reduce the board level noise that the electric capacity was made a whistle and is aroused, also be favorable to promoting the flexibility of board level overall arrangement simultaneously.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other embodiments can be obtained by using the drawings without creative efforts.
FIG. 1 is a schematic diagram of an embodiment of a method for fabricating a ceramic capacitor according to the present invention;
FIG. 2 is a schematic structural diagram of a ceramic capacitor;
FIG. 3 is a schematic diagram of ceramic capacitor failure;
FIG. 4 is a schematic diagram of capacitive howling;
FIG. 5 is a prior art welding structure of a ceramic capacitor;
FIG. 6 is a schematic diagram of a process for fabricating a ceramic capacitor;
FIG. 7 is an embodiment of a ceramic capacitor fabricated according to a method of fabricating a ceramic capacitor provided by the present invention;
FIG. 8 is a schematic diagram of the welding of a ceramic capacitor according to the present invention;
fig. 9 is another embodiment of a ceramic capacitor manufactured according to the method of manufacturing a ceramic capacitor provided in the present invention;
FIG. 10 is a schematic diagram of a hardware configuration of an embodiment of a computer apparatus for fabricating a ceramic capacitor according to the present invention;
FIG. 11 is a schematic diagram of an embodiment of a computer storage medium for fabricating a ceramic capacitor according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.
It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are used for distinguishing two entities with the same name but different names or different parameters, and it should be noted that "first" and "second" are merely for convenience of description and should not be construed as limitations of the embodiments of the present invention, and they are not described in any more detail in the following embodiments.
In a first aspect of embodiments of the present invention, embodiments of a method of fabricating a ceramic capacitor are presented. Fig. 1 is a schematic diagram illustrating an embodiment of a method for fabricating a ceramic capacitor according to the present invention.
As shown in fig. 1, the embodiment of the present invention includes the following steps:
s1, printing a tin resistance layer on the side surface of the plated terminal of the ceramic capacitor, and arranging the lowest position of the tin resistance layer to be overlapped with the bottom surface of the electrode layer of the bottommost layer of the ceramic capacitor; and
and S2, testing and braiding the ceramic capacitor printed with the tin-resistant layer.
Fig. 6 is a schematic flow chart of a method for manufacturing a ceramic capacitor according to the present invention, which can be implemented by referring to the conventional process of manufacturing a ceramic capacitor, wherein the process may be different from the conventional process of manufacturing a ceramic capacitor, such as the process of electroplating, testing, and braiding, for example, the process of graying in fig. 6.
After the processes of material mixing, ball milling, slurry mixing, flow edge, printing, laminating, cutting, glue discharging, roasting, chamfering, end sealing, end burning and the like, the terminal of the ceramic capacitor is electroplated. The embodiment of the invention comprises two modes of arranging the tin resistance layer, the first mode is that in the electroplating process, after the nickel plating of the terminal is finished, the tin plating is carried out on the weldable region, the tin plating is not carried out on the solder resisting region (namely, the tin resistance layer), and an oxide film is formed after the nickel exposed region is oxidized, so that the wettability is reduced, and the tin resistance effect is realized; the second is that the electroplating process is normally carried out, and after electroplating, a tin-resistant layer, such as ink, is printed on the side surface of the capacitor, and tin is exposed on the lower surface of the capacitor.
In some embodiments, the method further comprises: and setting the highest position of the tin resistance layer to coincide with the upper surface of the ceramic capacitor.
Fig. 7 shows an embodiment of a ceramic capacitor manufactured by the method for manufacturing a ceramic capacitor according to the present invention, and as shown in fig. 7, the side surface of the terminal of the ceramic capacitor is a solder resist except for a lower portion thereof which is a solderable area. The highest position of the tin resistance layer coincides with the upper surface of the ceramic capacitor, and the lowest position of the tin resistance layer coincides with the bottom surface of the electrode layer of the bottommost layer of the ceramic capacitor, namely, the parts marked with gray in figure 7 are all tin resistance layers.
In some embodiments, the testing and taping of the ceramic capacitor with the printed tin-blocking layer further comprises: and determining the lower surface of the ceramic capacitor, performing point measurement on the lower surface, and placing the ceramic capacitor in a fixed direction for taping. In the testing process, the lower surface of the capacitor is point-tested, so that the influence of the nickel layer oxide film is avoided; in the braiding process, the capacitor is placed in a fixed direction and then braiding is carried out.
Fig. 8 is a schematic diagram illustrating the welding of the ceramic capacitor according to the present invention. As shown in fig. 8, only the bottom of the ceramic capacitor and the lower portion of the side solder resist layer were soldered.
In some embodiments, the method further comprises: and printing a second tin resistance layer on the side surface of the terminal of the ceramic capacitor, wherein the second tin resistance layer and the tin resistance layer are arranged in parallel and have the same width.
Fig. 9 shows another embodiment of a ceramic capacitor manufactured according to the method for manufacturing a ceramic capacitor provided by the present invention. As shown in fig. 9, a second tin-resistant layer 2 is disposed on a side surface of the terminal of the ceramic capacitor in parallel with the tin-resistant layer 1, the second tin-resistant layer 2 has the same width as the tin-resistant layer 1, a weldable region is formed between the second tin-resistant layer 2 and the tin-resistant layer 1, and both the lower portion of the tin-resistant layer 1 and the upper portion of the second tin-resistant layer 2 are weldable regions.
In some embodiments, the method further comprises: and arranging the highest position of the second tin-resistant layer to coincide with the top surface of the electrode layer at the topmost layer of the ceramic capacitor.
The lowest position of the tin-resisting layer 1 coincides with the bottom surface of the electrode layer of the bottommost layer of the ceramic capacitor, and the highest position of the second tin-resisting layer 2 coincides with the top surface of the electrode layer of the topmost layer of the ceramic capacitor, so that the upper surface and the lower surface of the ceramic capacitor can be symmetrically arranged without distinguishing, and the influence on a braid and a test process can be eliminated.
In some embodiments, the method further comprises: and printing a third tin resistance layer on the side surface of the terminal of the ceramic capacitor, wherein the third tin resistance layer is vertical to the tin resistance layer.
And a third tin-resistant layer 3 is printed on the side surface of the terminal of the ceramic capacitor, and the third tin-resistant layer 3 is arranged perpendicular to the tin-resistant layer 1, so that the influence of capacitor squeal can be further reduced.
In some embodiments, the method further comprises: and printing a fourth tin resistance layer on the side surface of the terminal of the ceramic capacitor, wherein the fourth tin resistance layer and the third tin resistance layer are arranged in parallel and have the same width.
And a fourth tin-resistant layer 4 parallel to the third tin-resistant layer 3 is printed on the side surface of the terminal of the ceramic capacitor, and the width of the fourth tin-resistant layer 4 is the same as that of the third tin-resistant layer 3. The third tin-resistant layer 3 and the fourth tin-resistant layer 4 are arranged on the same side. In certain embodiments, the width of the tin-resistant layer 1, the second tin-resistant layer 2, the third tin-resistant layer 3, and the fourth tin-resistant layer 4 are all the same.
In some embodiments, the method further comprises: and respectively arranging the third tin-resistant layer and the fourth tin-resistant layer to be closest to the edge of the terminal and coincide with the edge of the side face of the electrode layer of the ceramic capacitor.
For example, from the right view, the edge of the third tin-resistant layer 3 closest to the terminal on the left coincides with the left edge of the electrode layer of the ceramic capacitor, and the edge of the fourth tin-resistant layer 4 closest to the terminal on the right coincides with the right edge of the electrode layer of the ceramic capacitor, so that the upper surface and the lower surface of the ceramic capacitor do not need to be distinguished due to the symmetrical arrangement, and the influence on the braid and the test process can be eliminated.
In some embodiments, the method further comprises: extending the third and fourth solder resist layers toward the upper and lower surfaces of the terminal, respectively.
For example, the third solder resist layer 3 and the fourth solder resist layer 4 extend to the upper and lower surfaces of the terminal, respectively, so that solder resist regions can be provided on the upper and lower surfaces of the terminal, respectively, thereby further reducing the influence of the capacitor squeal.
In some embodiments, the third tin-resistant layer 3 and the fourth tin-resistant layer 4 may be configured to have the same width as the upper surface and the lower surface of the terminal, so that the symmetrical configuration may eliminate the need to distinguish the upper surface and the lower surface of the ceramic capacitor, and the influence on the taping and testing process may be eliminated.
According to the embodiment of the invention, the tin-resistant layer is arranged on the ceramic capacitor package, so that the appearance of the capacitor welding spot is effectively controlled, the cracking risk of the ceramic capacitor caused by mechanical stress in the plate-level application process is reduced, the plate-level noise caused by capacitor squeal is reduced, and the flexibility of plate-level layout is improved.
It should be particularly noted that the steps in the embodiments of the method for fabricating a ceramic capacitor described above can be mutually intersected, replaced, added, or deleted, and therefore, the method for fabricating a ceramic capacitor should also fall within the scope of the present invention, and should not limit the scope of the present invention to the embodiments.
In view of the above objects, a second aspect of the embodiments of the present invention provides a ceramic capacitor fabricated by any one of the above methods.
According to the embodiment of the invention, the solder mask area is arranged on the side surface of the capacitor terminal so as to prevent the soldering tin from continuously climbing in the welding process. The bottom of the capacitor is arranged to be a solderable area to provide a soldering interface with a circuit board, the top of the capacitor is not required, and the height of the solderable area is more than or equal to 0 and less than or equal to the height of the bottommost electrode layer from a bottom soldering surface. When the height of the solderable region is equal to the height of the bottommost electrode layer from the bottom soldering surface, the solderable region is the structure shown in fig. 7, the shape of the soldering point after the capacitor is soldered to the circuit board is shown in fig. 8, and the highest position of the soldering tin does not exceed the bottommost electrode layer. When the height of the solderable region is 0, the solderable region represents that the solder has no side climbing, and only the bottom of the capacitor is soldered with the circuit board.
The principle of improving the mechanical cracks and the capacitor squeal of the ceramic capacitor by setting the solder mask area to control the solder morphology is explained as follows: through setting up the solder mask, compare in directly carrying out the electric capacity welding, soldering tin height after the welding reduces, and when the circuit board atress warp, electric capacity welding end position moment diminishes, and the electric capacity is more difficult cracked, even if still appear the crackle, the crackle also only appears in the bottom dielectric layer, is difficult to touch the electrode layer, still can guarantee electric capacity normal work. For the capacitor squeal, vibration comes from the electrode layer, the ceramic medium does not actively vibrate, and the bottommost electrode layer is higher than the soldering tin, so that the up-and-down vibration of the electrode layer is more difficult to drive the circuit board to vibrate, and further the influence of the capacitor squeal is reduced.
In the embodiment of the invention, the highest position of the tin resistance layer is superposed with the upper surface of the ceramic capacitor.
Fig. 7 shows an embodiment of a ceramic capacitor manufactured by the method for manufacturing a ceramic capacitor according to the present invention, and as shown in fig. 7, the side surface of the terminal of the ceramic capacitor is a solder resist except for a lower portion thereof which is a solderable area. The highest position of the tin resistance layer coincides with the upper surface of the ceramic capacitor, and the lowest position of the tin resistance layer coincides with the bottom surface of the electrode layer of the bottommost layer of the ceramic capacitor, namely, the parts marked with gray in figure 7 are all tin resistance layers.
Fig. 8 is a schematic diagram illustrating the welding of the ceramic capacitor according to the present invention. As shown in fig. 8, only the bottom of the ceramic capacitor and the lower portion of the side solder resist layer were soldered.
In the embodiment of the invention, a second tin resistance layer is arranged on the side surface of the terminal of the ceramic capacitor, and the second tin resistance layer and the tin resistance layer are arranged in parallel and have the same width.
Fig. 9 shows another embodiment of a ceramic capacitor manufactured according to the method for manufacturing a ceramic capacitor provided by the present invention. As shown in fig. 9, a second tin-resistant layer 2 is disposed on a side surface of the terminal of the ceramic capacitor in parallel with the tin-resistant layer 1, the second tin-resistant layer 2 has the same width as the tin-resistant layer 1, a weldable region is formed between the second tin-resistant layer 2 and the tin-resistant layer 1, and both the lower portion of the tin-resistant layer 1 and the upper portion of the second tin-resistant layer 2 are weldable regions.
In the embodiment of the invention, the highest position of the second tin-resistant layer is coincided with the top surface of the electrode layer at the topmost layer of the ceramic capacitor.
The lowest position of the tin-resisting layer 1 coincides with the bottom surface of the electrode layer of the bottommost layer of the ceramic capacitor, and the highest position of the second tin-resisting layer 2 coincides with the top surface of the electrode layer of the topmost layer of the ceramic capacitor, so that the upper surface and the lower surface of the ceramic capacitor can be symmetrically arranged without distinguishing, and the influence on a braid and a test process can be eliminated.
In the embodiment of the invention, a third tin-resistant layer is printed on the side surface of the terminal of the ceramic capacitor, and the third tin-resistant layer is perpendicular to the tin-resistant layer.
And a third tin-resistant layer 3 is printed on the side surface of the terminal of the ceramic capacitor, and the third tin-resistant layer 3 is arranged perpendicular to the tin-resistant layer 1, so that the influence of capacitor squeal can be further reduced.
In the embodiment of the invention, a fourth tin-resistant layer is printed on the side surface of the terminal of the ceramic capacitor, and the fourth tin-resistant layer and the third tin-resistant layer are arranged in parallel and have the same width.
And a fourth tin-resistant layer 4 parallel to the third tin-resistant layer 3 is printed on the side surface of the terminal of the ceramic capacitor, and the width of the fourth tin-resistant layer 4 is the same as that of the third tin-resistant layer 3. The third tin-resistant layer 3 and the fourth tin-resistant layer 4 are arranged on the same side. In certain embodiments, the width of the tin-resistant layer 1, the second tin-resistant layer 2, the third tin-resistant layer 3, and the fourth tin-resistant layer 4 are all the same.
In the embodiment of the invention, the edges of the third tin-resistant layer and the fourth tin-resistant layer, which are closest to the terminal, are overlapped with the side edges of the electrode layer of the ceramic capacitor.
For example, from the right view, the edge of the third tin-resistant layer 3 closest to the terminal on the left coincides with the left edge of the electrode layer of the ceramic capacitor, and the edge of the fourth tin-resistant layer 4 closest to the terminal on the right coincides with the right edge of the electrode layer of the ceramic capacitor, so that the upper surface and the lower surface of the ceramic capacitor do not need to be distinguished due to the symmetrical arrangement, and the influence on the braid and the test process can be eliminated.
In the embodiment of the invention, the third tin-resistant layer and the fourth tin-resistant layer extend to the upper surface and the lower surface of the terminal.
For example, the third solder resist layer 3 and the fourth solder resist layer 4 extend to the upper and lower surfaces of the terminal, respectively, so that solder resist regions can be provided on the upper and lower surfaces of the terminal, respectively, thereby further reducing the influence of the capacitor squeal.
In the embodiment of the invention, the widths of the parts of the third tin-resisting layer 3 and the fourth tin-resisting layer 4 extending to the upper surface and the lower surface of the terminal are the same, so that the symmetrical arrangement can eliminate the need of distinguishing the upper surface and the lower surface of the ceramic capacitor and eliminate the influence on the braid and the test process.
According to the embodiment of the invention, the tin-resistant layer is arranged on the ceramic capacitor package, so that the appearance of a capacitor welding spot is effectively controlled, the mechanical strength of the ceramic capacitor in board level application is improved on the premise of not increasing additional structural members, the cracking risk of the ceramic capacitor in the board level application process caused by mechanical stress is reduced, the board level noise caused by capacitor squeal is reduced, and meanwhile, the flexibility of board level layout is favorably improved.
Fig. 10 is a schematic diagram of a hardware structure of an embodiment of the computer apparatus for manufacturing a ceramic capacitor according to the present invention.
Taking the apparatus shown in fig. 10 as an example, the apparatus includes a processor 201 and a memory 202, and may further include: an input device 203 and an output device 204.
The processor 201, the memory 202, the input device 203 and the output device 204 may be connected by a bus or other means, and the bus connection is exemplified in fig. 10.
The memory 202, which is a non-volatile computer-readable storage medium, may be used to store non-volatile software programs, non-volatile computer-executable programs, and modules, such as program instructions/modules corresponding to the method of fabricating a ceramic capacitor in the embodiments of the present application. The processor 201 executes various functional applications of the server and data processing by executing the nonvolatile software program, instructions and modules stored in the memory 202, that is, implements the method for manufacturing the ceramic capacitor of the above method embodiment.
The memory 202 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data region may store data created according to the use of the method of fabricating the ceramic capacitor, and the like. Further, the memory 202 may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid state storage device. In some embodiments, memory 202 may optionally include memory located remotely from processor 201, which may be connected to local modules via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The input device 203 may receive information such as a user name and a password that are input. The output device 204 may include a display device such as a display screen.
One or more program instructions/modules corresponding to the method of fabricating the ceramic capacitor are stored in the memory 202 and, when executed by the processor 201, perform the method of fabricating the ceramic capacitor, the method of fabricating the ceramic capacitor comprising the steps of: printing a tin resistance layer on the side surface of the terminal of the ceramic capacitor after electroplating, and setting the lowest position of the tin resistance layer to be superposed with the bottom surface of the electrode layer of the bottommost layer of the ceramic capacitor; and testing and taping the ceramic capacitor printed with the tin-resistant layer.
In some embodiments, the method further comprises: and setting the highest position of the tin resistance layer to coincide with the upper surface of the ceramic capacitor.
In some embodiments, the testing and taping of the ceramic capacitor with the printed tin-blocking layer further comprises: and determining the lower surface of the ceramic capacitor, performing point measurement on the lower surface, and placing the ceramic capacitor in a fixed direction for taping.
In some embodiments, the method further comprises: and printing a second tin resistance layer on the side surface of the terminal of the ceramic capacitor, wherein the second tin resistance layer and the tin resistance layer are arranged in parallel and have the same width.
In some embodiments, the method further comprises: and arranging the highest position of the second tin-resistant layer to coincide with the top surface of the electrode layer at the topmost layer of the ceramic capacitor.
In some embodiments, the method further comprises: and printing a third tin resistance layer on the side surface of the terminal of the ceramic capacitor, wherein the third tin resistance layer is vertical to the tin resistance layer.
In some embodiments, the method further comprises: and printing a fourth tin resistance layer on the side surface of the terminal of the ceramic capacitor, wherein the fourth tin resistance layer and the third tin resistance layer are arranged in parallel and have the same width.
In some embodiments, the method further comprises: and respectively arranging the third tin-resistant layer and the fourth tin-resistant layer to be closest to the edge of the terminal and coincide with the edge of the side face of the electrode layer of the ceramic capacitor.
In some embodiments, the method further comprises: extending the third and fourth solder resist layers toward the upper and lower surfaces of the terminal, respectively.
Any embodiment of a computer apparatus for performing the method of fabricating a ceramic capacitor as described above may achieve the same or similar effects as any corresponding embodiment of the method described above.
The invention also provides a computer readable storage medium storing a computer program which, when executed by a processor, performs the method as above.
Fig. 11 is a schematic diagram of an embodiment of the computer storage medium for manufacturing a ceramic capacitor according to the present invention. Taking the computer storage medium shown in fig. 11 as an example, the computer-readable storage medium 3 stores a computer program 31 that is executed by a processor to execute a method of manufacturing a ceramic capacitor.
The method for manufacturing the ceramic capacitor comprises the following steps: printing a tin resistance layer on the side surface of the terminal of the ceramic capacitor after electroplating, and setting the lowest position of the tin resistance layer to be superposed with the bottom surface of the electrode layer of the bottommost layer of the ceramic capacitor; and testing and taping the ceramic capacitor printed with the tin-resistant layer.
In some embodiments, the method further comprises: and setting the highest position of the tin resistance layer to coincide with the upper surface of the ceramic capacitor.
In some embodiments, the testing and taping of the ceramic capacitor with the printed tin-blocking layer further comprises: and determining the lower surface of the ceramic capacitor, performing point measurement on the lower surface, and placing the ceramic capacitor in a fixed direction for taping.
In some embodiments, the method further comprises: and printing a second tin resistance layer on the side surface of the terminal of the ceramic capacitor, wherein the second tin resistance layer and the tin resistance layer are arranged in parallel and have the same width.
In some embodiments, the method further comprises: and arranging the highest position of the second tin-resistant layer to coincide with the top surface of the electrode layer at the topmost layer of the ceramic capacitor.
In some embodiments, the method further comprises: and printing a third tin resistance layer on the side surface of the terminal of the ceramic capacitor, wherein the third tin resistance layer is vertical to the tin resistance layer.
In some embodiments, the method further comprises: and printing a fourth tin resistance layer on the side surface of the terminal of the ceramic capacitor, wherein the fourth tin resistance layer and the third tin resistance layer are arranged in parallel and have the same width.
In some embodiments, the method further comprises: and respectively arranging the third tin-resistant layer and the fourth tin-resistant layer to be closest to the edge of the terminal and coincide with the edge of the side face of the electrode layer of the ceramic capacitor.
In some embodiments, the method further comprises: extending the third and fourth solder resist layers toward the upper and lower surfaces of the terminal, respectively.
Finally, it should be noted that, as one of ordinary skill in the art can appreciate that all or part of the processes of the methods of the above embodiments can be implemented by a computer program to instruct related hardware, and the program of the method for manufacturing a ceramic capacitor can be stored in a computer readable storage medium, and when executed, the program can include the processes of the embodiments of the methods as described above. The storage medium of the program may be a magnetic disk, an optical disk, a Read Only Memory (ROM), a Random Access Memory (RAM), or the like. The embodiments of the computer program may achieve the same or similar effects as any of the above-described method embodiments.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
It should be understood that, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.
The numbers of the embodiments disclosed in the embodiments of the present invention are merely for description, and do not represent the merits of the embodiments.
It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program instructing relevant hardware, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of the embodiments of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.
Claims (10)
1. A method of making a ceramic capacitor, comprising the steps of:
printing a tin resistance layer on the side surface of the terminal of the ceramic capacitor after electroplating, and setting the lowest position of the tin resistance layer to be superposed with the bottom surface of the electrode layer of the bottommost layer of the ceramic capacitor; and
and testing and taping the ceramic capacitor printed with the tin-resistant layer.
2. The method of claim 1, further comprising:
and setting the highest position of the tin resistance layer to coincide with the upper surface of the ceramic capacitor.
3. The method of claim 2, wherein testing and taping the ceramic capacitor printed with the tin-resistant layer further comprises:
and determining the lower surface of the ceramic capacitor, performing point measurement on the lower surface, and placing the ceramic capacitor in a fixed direction for taping.
4. The method of claim 1, further comprising:
and printing a second tin resistance layer on the side surface of the terminal of the ceramic capacitor, wherein the second tin resistance layer and the tin resistance layer are arranged in parallel and have the same width.
5. The method of claim 4, further comprising:
and arranging the highest position of the second tin-resistant layer to coincide with the top surface of the electrode layer at the topmost layer of the ceramic capacitor.
6. The method of claim 5, further comprising:
and printing a third tin resistance layer on the side surface of the terminal of the ceramic capacitor, wherein the third tin resistance layer is vertical to the tin resistance layer.
7. The method of claim 6, further comprising:
and printing a fourth tin resistance layer on the side surface of the terminal of the ceramic capacitor, wherein the fourth tin resistance layer and the third tin resistance layer are arranged in parallel and have the same width.
8. The method of claim 7, further comprising:
and respectively arranging the third tin-resistant layer and the fourth tin-resistant layer to be closest to the edge of the terminal and coincide with the edge of the side face of the electrode layer of the ceramic capacitor.
9. The method of claim 8, further comprising:
extending the third and fourth solder resist layers toward the upper and lower surfaces of the terminal, respectively.
10. A ceramic capacitor produced using the method of any one of claims 1 to 9.
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| JPH1167588A (en) * | 1997-08-18 | 1999-03-09 | Tdk Corp | Manufacture of cr compound electronic component |
| CN103915254A (en) * | 2013-01-02 | 2014-07-09 | 三星电机株式会社 | Multilayer ceramic capacitor and mounting board therefor |
| CN104465090A (en) * | 2013-09-25 | 2015-03-25 | 株式会社村田制作所 | Electronic component and method for manufacturing the same |
| US9818547B1 (en) * | 2016-07-05 | 2017-11-14 | Samsung Electro-Mechanics Co., Ltd. | Multilayer ceramic electronic component and board having the same |
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| JPH1167588A (en) * | 1997-08-18 | 1999-03-09 | Tdk Corp | Manufacture of cr compound electronic component |
| CN103915254A (en) * | 2013-01-02 | 2014-07-09 | 三星电机株式会社 | Multilayer ceramic capacitor and mounting board therefor |
| CN104465090A (en) * | 2013-09-25 | 2015-03-25 | 株式会社村田制作所 | Electronic component and method for manufacturing the same |
| US9818547B1 (en) * | 2016-07-05 | 2017-11-14 | Samsung Electro-Mechanics Co., Ltd. | Multilayer ceramic electronic component and board having the same |
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