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CN113608879B - Reconfigurable simulator or test equipment architecture design method - Google Patents

Reconfigurable simulator or test equipment architecture design method Download PDF

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Publication number
CN113608879B
CN113608879B CN202110995741.8A CN202110995741A CN113608879B CN 113608879 B CN113608879 B CN 113608879B CN 202110995741 A CN202110995741 A CN 202110995741A CN 113608879 B CN113608879 B CN 113608879B
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simulator
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CN113608879A (en
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徐荣
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Beijing Yizhilian Technology Co ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/30Creation or generation of source code
    • G06F8/36Software reuse
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/20Software design
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/70Software maintenance or management
    • G06F8/71Version control; Configuration management
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/70Software maintenance or management
    • G06F8/72Code refactoring
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061Partitioning or combining of resources
    • G06F9/5077Logical partitioning of resources; Management or configuration of virtualized resources

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  • Software Systems (AREA)
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  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Stored Programmes (AREA)

Abstract

The invention discloses a reconfigurable simulator or test equipment architecture design method, which relates to the technical field of simulation test and divides simulator equipment or test equipment into a server and a terminal; the invention provides the simulator equipment or the test equipment with good reusability and simple reconstruction, and because the functional requirements of the simulator equipment or the test equipment are approximately similar to the same user, the number of the modules and the protocol message formats are often different in different application scenes, the simulator equipment or the test equipment is split into a plurality of model modules, each model module can be split into a plurality of model modules according to the requirements, the user can flexibly reconstruct according to the different application scenes, the reconstruction process only needs to configure engineering, and the code or the recompilation program is not required to be rewritten, so that the user can reconstruct the system according to the application scenes by himself without depending on professional developers, and the problem of poor reusability of the simulator equipment or the test equipment is solved.

Description

Reconfigurable simulator or test equipment architecture design method
Technical Field
The invention relates to the technical field of simulation test, in particular to a reconfigurable simulator or test equipment architecture design method.
Background
The traditional simulator device or test device is designed independently according to specific functional design, and development mode of separating development and application is generally adopted, and the flow of developing and application is generally as follows: the developer is responsible for 1) functional design; 2) Professional developers write C or C++ codes; 3) Downloading a program; 4) Compiling codes; 5) Program running and debugging; the application personnel generally do not have development and debugging capabilities, and are only responsible for running programs which are debugged by the development personnel.
In recent years, some tool software reduces the workload of code writing links, such as labview, simulink and the like, by a graphical programming mode, but still needs to recompile the whole program and download the whole program to equipment for running and debugging and the like. The main disadvantages of this development are: 1. the reusability of simulator equipment or test equipment is poor, each equipment is designed according to a specific function, the development of the equipment requires the development, debugging and deployment experience of the professional C, C ++, a user generally does not have secondary development capability, once the equipment is developed, the application is difficult to change, and huge resource waste is caused; 2. the difficulty of controlling the application state of the equipment is high, the equipment generally adopts development modes of development and application separation, the program version control of each equipment is only maintained by a developer in the development stage, and a user cannot control the program state and manage the version according to the application requirements; 3. the design and the use are difficult under the multi-equipment joint application scene, a plurality of sets of simulator equipment or test equipment are often needed to be jointly applied in the complex scene, a single-machine design mode is adopted in the traditional design mode, each single design is difficult to jointly debug, a unified control and data acquisition mode is lacked, and the system integration and the application flow are complex.
Disclosure of Invention
The invention provides a reconfigurable simulator or test equipment architecture design method, which solves the technical problems of poor reusability, difficult state control and version management and difficult design and use in a multi-equipment combined application scene.
In order to solve the technical problems, the invention provides a reconfigurable simulator or test equipment architecture design method, which divides simulator equipment or test equipment into a server and a terminal, and comprises the following steps:
step S1, a server is responsible for storing a model module required for constructing simulator equipment or test equipment;
step S2, establishing simulator equipment or test equipment configuration engineering for finishing data transfer relation among model modules, module parameter values, module port initial values, execution sequences, protocol message formats, operation time length, operation modes, data communication periods, operation terminal selection, CPU operation resource allocation and other engineering configuration information;
s3, downloading engineering configuration files to one or more terminals;
s4, the terminal is in charge of receiving engineering configuration files downloaded by the server;
s5, reading operation time length, operation mode, operation terminal selection, CPU operation resource allocation and the like in the configuration information to perform initialization setting on the engineering, reading parameter value configuration of the model modules, and performing initialization setting on each model module
S6, reading the data connection relation from the configuration information to generate a model module Mn connection relation matrix C Mn ,n∈[1,N];
Step S7, selecting a model module meeting the above conditions as a starting point module M1 by taking the minimum number of input ports as a main condition and the minimum number of input ports as a secondary condition;
step S8, traversing the data connection relation graph by using a graph traversing algorithm with the model module M1 as a starting point, and marking the model modules as M1, M2, … and MN in sequence according to the access sequence;
s9, reading project start time from the configuration information, and setting current project execution time for all model modules;
s10, reading initial values of ports of all modules from configuration information, and assigning the initial values to VI;
s11, extracting a sub-vector VI from the model module input vector VI M1 Output vector VO of calculation model module M1 M1
Step S12, updating the model module input vector vi=vi+vo M1 C M1
Step S13, repeating the step S11 and the step S12, and completing calculation of the model modules M2 to MN according to the method of M1;
s14, reading parameter subscription configuration and parameter storage configuration from the configuration information, and publishing or storing the output port value of the specified model module as a local file through a network according to the configuration;
step S15, reading an engineering operation period from the configuration information, wherein the current engineering execution time + = the engineering operation period;
step S16, repeating the steps S11 to S15 until receiving the engineering ending instruction.
The S1 model module comprises a functional model module, a protocol message model module, a hardware interface model module and an interpretation functional model, wherein the functional model module comprises model modules with standard simulation interfaces such as FMU, S-Function and the like, the hardware interface model module comprises special hardware interface model modules such as IO, bus, communication and graphic accelerator cards, and the interpretation functional model module comprises an interpretation model written manually, an interpretation model generated based on data training and the like.
The configuration project in the S2 comprises one or more model modules and project configuration information.
The configuration engineering in S2 includes data transfer relation, module parameter value, module port initial value, execution sequence, protocol message format, etc. of each model module.
The "minimum" in S7 is the number of output ports—the number of input ports.
Further, the terminal provides an external service interface, and can query the execution state of the terminal, project operation information, control the project operation state, perform data input intervention on any model module port and the like in the operation process.
Compared with the related art, the reconfigurable simulator or test equipment architecture design method provided by the invention has the following beneficial effects:
the invention provides the simulator equipment or the test equipment with good reusability and simple reconstruction, and because the functional requirements of the simulator equipment or the test equipment are approximately similar to the same user, the number of the modules and the protocol message formats are often different in different application scenes, the simulator equipment or the test equipment is split into a plurality of model modules, each model module can be split into a plurality of model modules according to the requirements, the user can flexibly reconstruct according to the different application scenes, the reconstruction process only needs to configure engineering, and the code or the recompilation program is not required to be rewritten, so that the user can reconstruct the system according to the application scenes by himself without depending on professional developers, and the problem of poor reusability of the simulator equipment or the test equipment is solved.
The invention provides the technical state control which is convenient for users, the system adopts the model modularization design idea, the users can independently carry out version control and state management on each model module, and can also carry out integral version control on the engineering, thereby not only realizing flexible reconstruction in the application process, but also ensuring the traceability of engineering implementation; meanwhile, the user can utilize the server model management function to continuously accumulate and perfect each model module, so that the knowledge accumulation of the user is facilitated, and the problem of high difficulty in controlling the application state of simulator equipment or test equipment is solved.
The invention is convenient for realizing the unified deployment of the multiple terminals and the joint application of the multiple terminals. Due to the adoption of the server and terminal architecture, unified engineering deployment of multiple terminals can be realized through a network; meanwhile, a plurality of terminals can be jointly configured in the same engineering for completing the same large-scale complex tasks, and the problem that the simulator equipment or the test equipment is difficult to design and use in a joint application scene is solved.
Drawings
FIG. 1 is a schematic diagram of the overall steps of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the invention; all other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
According to an embodiment of the present invention, a reconfigurable simulator or test equipment architecture design method is provided.
As shown in fig. 1, a reconfigurable simulator or test equipment architecture design method divides a simulator or test equipment into a server and a terminal, and includes the following steps:
step S1, a server is responsible for storing a model module required for constructing simulator equipment or test equipment;
step S2, establishing simulator equipment or test equipment configuration engineering for finishing data transfer relation among model modules, module parameter values, module port initial values, execution sequences, protocol message formats, operation time length, operation modes, data communication periods, operation terminal selection, CPU operation resource allocation and other engineering configuration information;
s3, downloading engineering configuration files to one or more terminals;
s4, the terminal is in charge of receiving engineering configuration files downloaded by the server;
s5, reading operation time length, operation mode, operation terminal selection, CPU operation resource allocation and the like in the configuration information to perform initialization setting on the engineering, reading parameter value configuration of the model modules, and performing initialization setting on each model module
S6, reading the data connection relation from the configuration information to generate a model module Mn connection relation matrix C Mn ,n∈[1,N];
Step S7, selecting a model module meeting the above conditions as a starting point module M1 by taking the minimum number of input ports as a main condition and the minimum number of input ports as a secondary condition;
step S8, traversing the data connection relation graph by using a graph traversing algorithm with the model module M1 as a starting point, and marking the model modules as M1, M2, … and MN in sequence according to the access sequence;
s9, reading project start time from the configuration information, and setting current project execution time for all model modules;
s10, reading initial values of ports of all modules from configuration information, and assigning the initial values to VI;
s11, extracting a sub-vector VI from the model module input vector VI M1 Output vector VO of calculation model module M1 M1
Step S12, updating the model module input vector vi=vi+vo M1 C M1
Step S13, repeating the step S11 and the step S12, and completing calculation of the model modules M2 to MN according to the method of M1;
s14, reading parameter subscription configuration and parameter storage configuration from the configuration information, and publishing or storing the output port value of the specified model module as a local file through a network according to the configuration;
step S15, reading an engineering operation period from the configuration information, wherein the current engineering execution time + = the engineering operation period;
step S16, repeating the steps S11 to S15 until receiving the engineering ending instruction.
In addition, the S1 model module comprises a functional model module, a protocol message model module, a hardware interface model module and an interpretation functional model, wherein the functional model module comprises model modules with standard simulation interfaces such as FMU, S-Function and the like, the hardware interface model module comprises special hardware interface model modules such as IO (input output) types, bus types, communication types, graphic accelerator cards and the like, and the interpretation functional model module comprises an interpretation model written manually, an interpretation model generated based on data training and the like.
In addition, the configuration project in S2 includes one or more model modules and project configuration information.
In addition, the configuration engineering in S2 includes data transfer relation, module parameter value, module port initial value, execution sequence, protocol message format, etc. of each model module.
In addition, "least" in S7 is the number of output ports—the number of input ports.
In addition, the model module included in the operation engineering organized in S5 outputs the operation process data or the result data through the designated hardware at one time or at designated time intervals.
Further, the terminal provides an external service interface, and can query the execution state of the terminal, project operation information, control the project operation state, perform data input intervention on any model module port and the like in the operation process.
Specifically, the server is responsible for storing a model module required for constructing simulator equipment or test equipment, and completing the generation and downloading of engineering configuration files, and the specific steps are as follows:
1. selecting a model module (comprising a functional model module, a protocol message model module, a hardware interface model module, an interpretation functional model module and the like) which is required to be selected for engineering;
2. configuring engineering configuration information such as data transfer relation, module parameter values, module port initial values, data communication periods, protocol message formats and the like among the model modules;
3. configuring engineering configuration information such as operation time length, operation mode, engineering starting time, operation terminal selection, CPU operation resource allocation and the like;
4. generating an engineering configuration file (comprising a model module(s) and engineering configuration information), 5. Downloading the engineering configuration file to 1 or more terminals.
Specifically, the terminal is responsible for receiving and completing the operation and process control of the project according to the configuration file, and the specific steps are as follows: 1. receiving an engineering configuration file downloaded from a server side;
2. waiting for an engineering start instruction, and executing the following steps after receiving the engineering start instruction;
3. reading operation time length, operation mode, operation terminal selection, CPU operation resource allocation and the like from configuration information to perform initialization setting on projects, reading model module parameter value configuration, module port initial value and the like to perform initialization setting on each model module;
4. the engineering is provided with N model modules which are respectively represented as M1, M2, …, mn, … and MN, each model module is provided with a plurality of input ports and output ports, the input ports of the model module Mn are provided with IMn, and each input port can be represented asi∈[1,IMn]Its input port value can be expressed as vector +.>The input port values of all model modules may be represented as vector vi= [ VI M1 ,VI M2 ,…,VI MN ]The method comprises the steps of carrying out a first treatment on the surface of the The module Mn has a total of OMn output ports, each of which can be expressed as +.>i∈[1,OMn]Its output ports can be expressed as vectors
5. Is provided withRepresenting the connection between the output port of model module Ma and the input port of model module Mb, a, b E [1, N ]]Wherein->Output port of representation model Module Ma +.>Input port to the model Module Mb +.>Whether there is a connection, if there is a connection->No connection is->Matrix->Representing a connection relation matrix between the output ports of the model module Mn and the input ports of all the model modules;
6. reading the data connection relation from the configuration information to generate a connection relation matrix C of the model module Mn Mn ,n∈[1,N];
7. Taking the least input port number as a main condition and the least output port number-input port number as a secondary condition, selecting one model module meeting the above conditions as a starting module M1;
8. traversing the connection relation diagram of each model module by a depth priority algorithm or a breadth priority algorithm according to the model connection relation in the configuration information, and marking each model module as M1, M2, … and MN in sequence according to the access sequence;
9. reading project start time from the configuration information, and setting current project execution time for all model modules;
10. reading the initial value of each module port from the configuration information, and assigning the initial value to VI;
11. extracting sub-vector VI from model module input vector VI M1 Output vector VO of calculation model module M1 M1 If the module is a protocol message module, the module is packed or unpacked according to the protocol message format in the configuration information, if the module is a hardware module, the module is input or output through a designated hardware channel, if the module is an interpretation module, the module input data is interpreted and analyzed, and the interpretation result is issued through a network channel
12. Updating the model module input vector vi=vi+vo M1 C M1
13, inquiring whether an input port injection instruction is received, if so, updating an input vector VI according to the port value of the model module appointed in the instruction, and if not, skipping the step;
14. repeating the step 11 and the step 13, and completing calculation of the model modules M2 to MN according to the method of M1;
14. reading parameter subscription configuration and parameter storage configuration from the configuration information, and publishing or storing the output port value of the specified model module as a local file through a network according to the configuration;
15. reading parameter subscription configuration and parameter storage configuration from the configuration information, and publishing or storing the output port value of the specified model module as a local file through a network according to the configuration;
16. reading the engineering operation period from the configuration information, wherein the current engineering execution time + =engineering operation period
17. Repeating the steps 11 to 16 until an engineering ending instruction is received;
in summary, the method has the following advantages:
1. the simulator equipment or the test equipment has good reusability and simple reconstruction. Because the functional requirements of simulator equipment or test equipment are approximately similar to the same user, the number of modules and protocol message formats are often only different in different application scenes, so that the simulator equipment or test equipment is split into a plurality of model modules (such as a functional model module, a protocol message model module, a hardware interface model module, an interpretation functional model module and the like), each model module can be split into a plurality of model modules according to the requirements, the user can flexibly reconstruct according to the different application scenes, the reconstruction process only needs to configure engineering, and the user does not need to re-write codes or re-compile programs, so that the user can reconstruct the system according to the application scenes without depending on professional developers.
2. The user can conveniently control the technical state. The system adopts the model modularization design concept, so that a user can independently carry out version control and state management on each model module and can also carry out overall version control on the engineering, thereby not only realizing flexible reconstruction in the application process, but also ensuring the traceability of engineering implementation; meanwhile, the user can utilize the server model management function to continuously accumulate and perfect each model module, so that knowledge accumulation of the user is facilitated.
3. The method is convenient for realizing unified deployment of multiple terminals and joint application of the multiple terminals. Due to the adoption of the server and terminal architecture, unified engineering deployment of multiple terminals can be realized through a network; meanwhile, a plurality of terminals can be jointly configured in the same project to finish the same large-scale complex task.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or simulator or testing device that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or simulator or testing device.
Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made therein without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.

Claims (7)

1. A reconfigurable simulator or test equipment architecture design method is characterized in that the simulator or test equipment is divided into a server and a terminal, and comprises the following steps:
step S1, a server is responsible for storing a model module required for constructing simulator equipment or test equipment;
step S2, establishing simulator equipment or test equipment configuration engineering for finishing data transfer relation among model modules, module parameter values, module port initial values, execution sequences, protocol message formats, operation time length, operation modes, data communication periods, operation terminal selection, CPU operation resource allocation and other engineering configuration information;
s3, downloading engineering configuration files to one or more terminals;
s4, the terminal is in charge of receiving engineering configuration files downloaded by the server;
s5, reading operation time length, operation mode, operation terminal selection, CPU operation resource allocation and the like in the configuration information to perform initialization setting on the engineering, reading parameter value configuration of the model modules, and performing initialization setting on each model module
S6, reading the data connection relation from the configuration information to generate a model module Mn connection relation matrix C Mn ,n∈[1,N];
Step S7, selecting a model module meeting the above conditions as a starting point module M1 by taking the minimum number of input ports as a main condition and the minimum number of input ports as a secondary condition;
step S8, traversing the data connection relation graph by using a graph traversing algorithm with the model module M1 as a starting point, and marking the model modules as M1, M2, … and MN in sequence according to the access sequence;
s9, reading project start time from the configuration information, and setting current project execution time for all model modules;
s10, reading initial values of ports of all modules from configuration information, and assigning the initial values to VI;
s11, extracting a sub-vector VI from the model module input vector VI M1 Output vector VO of calculation model module M1 M1
Step S12, updating the input vector of the model module
Step S13, repeating the step S11 and the step S12, and completing calculation of the model modules M2 to MN according to the method of M1;
s14, reading parameter subscription configuration and parameter storage configuration from the configuration information, and publishing or storing the output port value of the specified model module as a local file through a network according to the configuration;
step S15, reading an engineering operation period from the configuration information, wherein the current engineering execution time + = the engineering operation period;
step S16, repeating the steps S11 to S15 until receiving the engineering ending instruction.
2. The reconfigurable simulator or test equipment architecture design method according to claim 1, wherein the S1 model module comprises a functional model module, a protocol message model module, a hardware interface model module and an interpretation functional model, the functional model module comprises model modules with standard simulation interfaces such as FMU, S-Function, the hardware interface model module comprises special hardware interface model modules such as IO, bus, communication and graphic accelerator cards, and the interpretation functional model module comprises an interpretation model written manually, an interpretation model generated based on data training, and the like.
3. The reconfigurable simulator or test equipment architecture design method of claim 1, wherein the configuration project in S2 comprises one or more model modules and project configuration information.
4. The method according to claim 1, wherein the configuration engineering in S2 includes data transfer relation, module parameter values, module port initial values, execution sequence, protocol message format, etc. of each model module.
5. The method of claim 1, wherein the "least" in S7 is the number of output ports-the number of input ports.
6. A reconfigurable simulator or test equipment architecture design method according to claim 1, wherein the model modules included in the operation engineering organized in S5 output operation process data or result data through specified hardware at one time or at specified time intervals.
7. The method for designing a reconfigurable simulator or test equipment architecture according to claim 1, wherein the terminal provides an external service interface, and is capable of inquiring the execution state of the terminal, engineering operation information, controlling the engineering operation state, performing data input intervention on any model module port, and the like during operation.
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