CN113593428A - Display panel and electronic device - Google Patents
Display panel and electronic device Download PDFInfo
- Publication number
- CN113593428A CN113593428A CN202110820229.XA CN202110820229A CN113593428A CN 113593428 A CN113593428 A CN 113593428A CN 202110820229 A CN202110820229 A CN 202110820229A CN 113593428 A CN113593428 A CN 113593428A
- Authority
- CN
- China
- Prior art keywords
- light emitting
- emitting chip
- protrusion
- display panel
- edge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims abstract description 22
- 239000011159 matrix material Substances 0.000 claims description 3
- 230000007423 decrease Effects 0.000 claims description 2
- 230000003247 decreasing effect Effects 0.000 claims description 2
- 230000000694 effects Effects 0.000 abstract description 8
- 239000010410 layer Substances 0.000 description 10
- 238000004519 manufacturing process Methods 0.000 description 5
- 230000009286 beneficial effect Effects 0.000 description 3
- 239000004697 Polyetherimide Substances 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 239000012044 organic layer Substances 0.000 description 2
- 229920001230 polyarylate Polymers 0.000 description 2
- 229920001601 polyetherimide Polymers 0.000 description 2
- 229920000139 polyethylene terephthalate Polymers 0.000 description 2
- 239000005020 polyethylene terephthalate Substances 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 229920012266 Poly(ether sulfone) PES Polymers 0.000 description 1
- 230000003190 augmentative effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229920003023 plastic Polymers 0.000 description 1
- 239000004417 polycarbonate Substances 0.000 description 1
- 229920000515 polycarbonate Polymers 0.000 description 1
- 239000011112 polyethylene naphthalate Substances 0.000 description 1
- -1 polyethylene terephthalate Polymers 0.000 description 1
- 238000009877 rendering Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The application provides a display panel and an electronic device. The display panel includes a substrate, a first bonding pad, a first light emitting chip, and a second light emitting chip. The first bonding pad is disposed on the substrate. The first light emitting chip and the second light emitting chip are connected to the same first bonding pad. This application binds the pad through making the luminescent chip sharing, reduces the quantity of binding the pad, can reduce the area that binds the pad and occupy on the base plate, and the space of practicing thrift out can be used for setting up drive circuit to improve drive circuit's design degree of freedom, be convenient for optimize drive circuit, improve the display effect.
Description
Technical Field
The application relates to the technical field of display, in particular to a display panel and an electronic device.
Background
Compared with conventional Liquid Crystal Displays (LCDs) and Organic Light-emitting diodes (OLEDs), Micro Light-emitting Diode (Micro-LED) displays and submillimeter Light-emitting Diode (Mini-LED) displays have the advantages of fast response, high color gamut, high resolution, low energy consumption, high contrast, high color rendering performance, and the like, and have recently become hot spots for various large panel manufacturers.
In a conventional Mini-LED display panel, in order to mount a light emitting chip on a substrate, a bonding pad is provided on the substrate corresponding to the light emitting chip. The existence of the bonding pad squeezes the space of the driving circuit, which is not beneficial to the optimization of the driving circuit.
Disclosure of Invention
The application aims to provide a display panel and an electronic device which can compress the occupied space of a binding pad.
The application provides a display panel, it includes:
a substrate;
a first bonding pad disposed on the substrate;
the first light-emitting chip and the second light-emitting chip are connected to the same first binding pad.
In an embodiment, the display panel includes at least one pixel, the pixel includes the first light emitting chip, the second light emitting chip, and a third light emitting chip, the first light emitting chip, the second light emitting chip, and the third light emitting chip are all provided with a first pin, and the first pins of the first light emitting chip, the second light emitting chip, and the third light emitting chip are all connected to the same first bonding pad.
In one embodiment, orthographic projections of the first light emitting chip, the second light emitting chip and the third light emitting chip on the first bonding pad are arranged with the first bonding pad as a center.
In one embodiment, the first light emitting chip includes a first protrusion, the second light emitting chip includes a second protrusion, the third light emitting chip includes a third protrusion, the first protrusion and the second protrusion are disposed opposite to each other and form a gap, the third protrusion extends into the gap, and the widths of the first protrusion, the second protrusion and the third protrusion are all gradually reduced from a side away from the first bonding pad to a side close to the first bonding pad.
In one embodiment, the third light emitting chip further includes a fourth protrusion protruding into a gap between the first protrusion and the second protrusion of the pixel adjacent to the third light emitting chip, and a width of the fourth protrusion gradually decreases from a side away from the first bonding pad toward a side close to the first bonding pad.
In one embodiment, the first light emitting chip has a first side and a second side, the first side intersects the second side, the second light emitting chip has a third side and a fourth side, the third side intersects the fourth side, the third light emitting chip has a fifth side and a sixth side, the fifth side is connected to the sixth side, the first side is parallel and adjacent to the fifth side, the second side is parallel and adjacent to the fourth side, and the third side is parallel and adjacent to the sixth side.
In one embodiment, the at least one pixel is arranged in a matrix, in each of the pixels, the first light emitting chips and the second light emitting chips are arranged at intervals along a first direction, the third light emitting chips are arranged at intervals along a second direction perpendicular to the first direction, and the third light emitting chips are arranged corresponding to the intervals between the first light emitting chips and the second light emitting chips.
In one embodiment, the pixel includes a first pixel and a second pixel, the first pixel and the second pixel are alternately arranged at intervals along a first direction, the first pixel and the second pixel are both arranged at intervals along a second direction perpendicular to the first direction, in the first pixel, the first light emitting chip and the second light emitting chip are arranged at intervals along the first direction, and the third light emitting chip is arranged on a first side of the first light emitting chip and the second light emitting chip; in the second pixel, the first light emitting chip and the second light emitting chip are arranged at an interval along the first direction, and the third light emitting chip is arranged on a second side of the first light emitting chip and the second light emitting chip opposite to the first side.
In one embodiment, the display panel further includes second bonding pads, the first light emitting chip, the second light emitting chip and the third light emitting chip are respectively connected to different second bonding pads, the first bonding pad is configured to provide a first potential, the first potential is a ground potential, the second bonding pad is configured to provide a second potential, and the first potential is lower than the second potential.
The present application also provides an electronic device comprising the display panel as described in any one of the above.
This application binds the pad through making the luminescent chip sharing, reduces the quantity of binding the pad, can reduce the area that binds the pad and occupy on the base plate, and the space of practicing thrift out can be used for setting up drive circuit to improve drive circuit's design degree of freedom, be convenient for optimize drive circuit, improve the display effect. The binding pads are shared, so that the arrangement of the binding pads is integrated, the distance between the corresponding light-emitting chips is reduced, the size of the light-emitting chips in the pixels can be designed to be larger, the manufacturing difficulty of the light-emitting chips can be reduced, and the binding yield of the light-emitting chips is improved.
Drawings
In order to more clearly illustrate the technical solutions in the present application, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an embodiment of an electronic device according to the present application.
Fig. 2 is a partial sectional view of the display panel of fig. 1 taken along line a-a.
Fig. 3 is a schematic top view of a first structure of a pixel arrangement of the display panel in fig. 1.
Fig. 4 is an enlarged schematic view of one pixel in fig. 3.
Fig. 5 is a schematic top view of a second structure of a pixel arrangement of the display panel in fig. 1.
Fig. 6 is a schematic top view of a third structure of a pixel arrangement of the display panel in fig. 1.
Fig. 7 is a schematic top view of a fourth structure of the pixel arrangement of the display panel in fig. 1.
Fig. 8 is a schematic top view of a pixel arrangement of a display panel according to a second embodiment of the present application.
Fig. 9 is a schematic top view of a pixel arrangement of a display panel according to a third embodiment of the present application.
Fig. 10 is a schematic top view of a pixel arrangement of a display panel according to a fourth embodiment of the present application.
Detailed Description
The technical solution in the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. It should be apparent that the described embodiments are only some embodiments of the present application, and not all embodiments. All other embodiments, which can be obtained by a person skilled in the art without making any inventive step based on the embodiments in the present application, are within the scope of protection of the present application.
In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise the first and second features directly, or may comprise the first and second features not being directly connected but being in contact with each other by means of further features between them. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
The application provides an electronic device. The electronic device may be a mobile phone, a tablet computer, an electronic reader, an electronic display screen, a notebook computer, a mobile phone, an Augmented Reality (AR) \ Virtual Reality (VR) device, a media player, a wearable device, a digital camera, a vehicle-mounted navigator, or the like. In this embodiment, the electronic device is a mobile phone as an example.
The electronic device includes a display panel. The display panel includes a substrate, a first bonding pad, and a first light emitting chip and a second light emitting chip. The first bonding pad is disposed on the substrate. The first light emitting chip and the second light emitting chip are connected to the same first bonding pad.
In the prior art, in order to mount one light emitting chip, two bonding pads are required to be correspondingly disposed on a substrate. In order to mount the first light emitting chip and the second light emitting chip, four bonding pads are required to be correspondingly disposed on the substrate. By making the first and second light emitting chips share the same first bonding pad, four bonding pads can be reduced to three. Through reducing the quantity of binding the pad, can reduce the area that the pad took on the base plate of binding, the space of practicing thrift can be used for setting up drive circuit to improve drive circuit's design degree of freedom, be convenient for optimize drive circuit, improve the display effect. In addition, the arrangement of the bonding pads is integrated by sharing the bonding pads, and the distance between the corresponding light emitting chips is also reduced. The number of light emitting chips included on the display panel is constant at the same resolution. If the distance between the light emitting chips is reduced, the area of a single light emitting chip can be increased, the size of the light emitting chip can be designed to be larger, the manufacturing difficulty of the light emitting chip can be reduced, the binding yield of the light emitting chip is improved, and the yield of the display panel is improved.
Hereinafter, specific embodiments of the present application will be described in detail with reference to the drawings.
Referring to fig. 1 and 2, the electronic device 1 includes a display panel 100 and a housing 200. The display panel 100 is disposed in the case 200. The electronic device 1 further includes a rear cover, a middle frame, a cover plate, a processor, a speaker, and other components for implementing the functions of the electronic device 1.
The display panel 100 includes a substrate 10, a driving circuit layer 20, and a light emitting chip 30, which are sequentially stacked.
The substrate 10 serves to support the driving circuit layer 20 and the light emitting chip 30. The substrate 10 may be a transparent glass substrate or a plastic substrate. The substrate 10 may be a rigid substrate or a flexible substrate. The flexible substrate may include a single layer, two layers, or more than two flexible organic layers. The material of the flexible organic layer is selected from one or a combination of Polyimide (PI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), Polyarylate (PAR), Polycarbonate (PC), Polyetherimide (PEI) and Polyethersulfone (PES).
The driving circuit layer 20 is disposed on the substrate 10 and is used for driving the light emitting chip 30 to emit light. The driving circuit layer 20 includes a pixel driving circuit. The pixel drive circuit may be a drive circuit commonly used in the art, such as a 1T1C, 2T1C, 3T1C, 5T1C, or 7T1C circuit. The driving circuit layer 20 includes a first bonding pad 201 and a second bonding pad 202. The first bonding pad 201 is connected to the VSS power line. The VSS power line provides a first potential. Optionally, the first bond pad 201 is grounded. The second bond pad 202 is coupled to the VDD power line. The VDD power line provides a second potential. The first potential is lower than the second potential. The pixel driving circuit is coupled between a VDD power line and a VSS power line.
The light emitting chip 30 is connected to the driving circuit layer 20. Specifically, each light emitting chip 30 is connected to one pixel driving circuit. The opposite ends of each light emitting chip 30 are respectively provided with a first lead 301 and a second lead 302. The first and second bonding pads 201 and 202 on the driving circuit layer 20 are disposed corresponding to the first and second pins 301 and 302 on the light emitting chip. The first pin 301 is connected to the first bonding pad 201. The second pin 302 is connected to the second bond pad 202. The first bonding pad 201 transmits a first potential of the VSS power line to the light emitting chip 30, and the second bonding pad 202 transmits a second potential of the VDD power line to the light emitting chip 30. That is, the light emitting chip 30 has a positive electrode connected to the second bonding pad 202 and a negative electrode connected to the first bonding pad 201. The second potential supplied to the light emitting chip 30 by the driving circuit layer 20 may vary with an image to be displayed. While the first potential is fixed. Optionally, the first potential is a ground potential or a potential close to 0V.
Referring to fig. 3 and 4, the display panel 100 includes a plurality of pixels PX, alternatively referred to as a plurality of display units. The plurality of pixels PX are arranged in a matrix. Specifically, the plurality of pixels PX are arranged in rows at intervals in the first direction D1 and in columns at intervals in the second direction D2. The first direction D1 intersects the second direction D2. Optionally, the first direction D1 is perpendicular to the second direction D2. Each pixel PX includes a first light-emitting chip 31, a second light-emitting chip 32, and a third light-emitting chip 33. In other words, the first, second, and third light emitting chips 31, 32, and 33 are sub-pixels of the pixel PX. The first and second light emitting chips 31 and 32 of each pixel are spaced apart in the first direction D1, the third light emitting chip 33 is spaced apart from the first and second light emitting chips 31 and 32 in the second direction D2, and the third light emitting chip 33 is disposed corresponding to the spacing between the first and second light emitting chips 31 and 32. Alternatively, the third light emitting chip 33 may be disposed on the upper sides of the first light emitting chip 31 and the second light emitting chip 32, or may be disposed on the lower sides of the first light emitting chip 31 and the second light emitting chip 32. Thus, the plurality of first light emitting chips 31 and the plurality of second light emitting chips 32 are alternately spaced apart in the first direction D1, and the plurality of third light emitting chips 33 and the plurality of first light emitting chips 31 and the plurality of second light emitting chips 32 are alternately spaced apart in the second direction D2.
The pitch (pitch) between sub-pixels refers to the distance from the center of a sub-pixel to the center of an adjacent sub-pixel. Specifically, the distance between two adjacent light emitting chips 30 of the same color in the first direction D1 is the lateral pitch D1 of the light emitting chips 30, and the distance between two adjacent light emitting chips 30 of the same color in the second direction D2 is the longitudinal pitch D2 of the light emitting chips 30. Optionally, the transverse distance d1 of the first light emitting chip 31, the transverse distance d1 of the second light emitting chip 32, and the transverse distance d1 of the third light emitting chip 33 are equal, and the longitudinal distance d2 of the first light emitting chip 31, the longitudinal distance d2 of the second light emitting chip 32, and the longitudinal distance d2 of the third light emitting chip 33 are also equal.
The first to third light emitting chips 31 to 33 are all micro light emitting diode chips or sub-millimeter light emitting diode chips. Specifically, the first light emitting chip 31 may be a blue chip, the second light emitting chip 32 may be a green chip, and the third light emitting chip 33 may be a red chip. That is, in one pixel PX, the left side of the first row is a blue subpixel, the right side of the first row is a green subpixel, and the second row is a red subpixel. The sub-pixels in the pixel PX are arranged in a "T" shape. This arrangement is most suitable for the current user habits and is most appreciated by users in the current state of the art. It is understood that the red, green and blue sub-pixels may be arranged in other order, for example, the first light emitting chip 31 is a red chip, the second light emitting chip 32 is a blue chip, the third light emitting chip 33 is a red chip, etc.
The first light emitting chip 31 extends in the third direction D3, the second light emitting chip 32 extends in the fourth direction D4, and the second light emitting chip 32 extends in the fifth direction D5. In the present embodiment, the extending direction of the light emitting chip refers to the direction of the long side of the light emitting chip 30. The third direction D3 and the fourth direction D4 are both parallel to the first direction D1. The fifth direction D5 is parallel to the second direction D2. The extending direction of the light emitting chips 30 is parallel to the arrangement direction, and the light emitting chips 30 of the same color are arranged in a straight line, so that the display effect can be improved. The light emitting chips 30 may have two extending directions, for example, a long side direction and a short side direction, as long as one of the extending directions of the light emitting chips 30 is parallel to the arrangement direction.
The first light emitting chip 31, the second light emitting chip 32, and the third light emitting chip 33 in each pixel PX are connected to the same first bonding pad 201. That is, the first light emitting chip 31, the second light emitting chip 32, and the third light emitting chip 33 in each pixel PX share one ground pad. Specifically, the first pins 301 of the first, second and third light emitting chips 31, 32 and 33 are connected to the same first bonding pad 201. The second leads 302 of the first, second and third light emitting chips 31, 32 and 33 are connected to different second bonding pads 202, respectively. As mentioned above, through sharing the binding pad, according to the display panel of the application, can reduce original three ground pads to one, reduce the quantity of binding the pad, be convenient for optimize drive circuit, improve the display effect. In addition, the arrangement and integration of the light emitting chips can be further performed, thereby improving the degree of freedom in designing the light emitting chips and facilitating the manufacture and binding of the light emitting chips 30.
The orthographic projections of the first light emitting chip 31, the second light emitting chip 32 and the third light emitting chip 33 on the first bonding pad 201 are all overlapped with the first bonding pad 201. That is, in a top view, the first bonding pad 201 is located at a boundary position of the first light emitting chip 31, the second light emitting chip 32, and the third light emitting chip 33. Thereby, the first to third light emitting chips 31 to 33 are conveniently bound on the first binding pad 201. The first light emitting chip 31 may include a first protrusion 311. The second light emitting chip 32 may include a second protrusion 321. The third light emitting chip 33 may include a third protrusion 331. Orthographic projections of the first protrusion 311, the second protrusion 321, and the third protrusion 331 on the first bonding pad 201 all overlap with the first bonding pad 201. The first protrusion 311, the second protrusion 321 and the third protrusion 331 are all provided with a first pin 301 for connecting the first bonding pad 201.
More specifically, orthographic projections of the first light emitting chip 31, the second light emitting chip 32, and the third light emitting chip 33 on the first bonding pad 201 are arranged centering on the first bonding pad 201. Thereby, the first, second, and third light emitting chips 31, 32, and 33 may be closely arranged, thereby reducing the area of the first bonding pad 201. The first protrusion 311 is disposed opposite to the second protrusion 321 to form a gap GP, and the third protrusion 331 extends into the gap GP. Further, the shape of the third protrusion 331 may also match the gap GP, so that the third protrusion 331 is better embedded in the gap GP.
The widths of the first protrusion 311, the second protrusion 321, and the third protrusion 331 are all gradually reduced from a side away from the first binding pad 201 toward a side close to the first binding pad 201. Alternatively, the first protrusion 311, the second protrusion 321, and the third protrusion 331 may have a trapezoidal or triangular shape. The shape of the protruding portion is not limited in the present application, and the shape of the protruding portion may be rectangular, circular, polygonal, zigzag, or wavy. Further, the oblique side of the first protrusion 311 adjacent to the third light emitting chip 33 is adjacent to and parallel to one oblique side of the third light emitting chip 33, and the oblique side of the second protrusion 321 adjacent to the third light emitting chip 33 is adjacent to and parallel to the oblique side of the third light emitting chip 33. And, the interval between the oblique sides adjacent to the first and third light emitting chips 31 and 33 is equal to the interval between the oblique sides adjacent to the second and third light emitting chips 32 and 33.
By providing the protruding portion on the light emitting chip 30 and forming the first lead 301 on the protruding portion, since the area of the protruding portion is small and the protruding portion is arranged tightly, when the light emitting chip 30 is soldered to the driving circuit layer 20, the first lead 301 and the first bonding pad 201 are aligned relatively easily, and the alignment accuracy is improved. Due to the fact that the alignment precision is improved, the area of the first binding pad 201 can be further reduced, and therefore more design spaces of the driving circuit are provided, the driving circuit can be optimized, and the display effect is improved.
Hereinafter, another structure of the display panel of the present application will be briefly described.
Referring to fig. 5, the third direction D3 and the fourth direction D4 may also intersect the first direction D1. That is, the three light emitting chips 30 in each pixel PX are arranged in a "Y" shape. Further, the first luminescent chip 31 has a first side L1 and a second side L2, and the first side L1 intersects the second side L2. The second light emitting chip 32 has a third side L3 and a fourth side L4, and the third side L3 intersects the fourth side L4. The third light emitting chip 33 has a fifth side L5 and a sixth side L6, and the fifth side L5 is connected to the sixth side L6. In the present embodiment, the fifth side L5 intersects the sixth side L6. The first side L1 is parallel to and adjacent to the fifth side L5, the second side L2 is parallel to and adjacent to the fourth side L4, and the third side L3 is parallel to and adjacent to the sixth side L6. Moreover, the distance between the first side L1 and the fifth side L5, the distance between the second side L2 and the fourth side L4, and the distance between the third side L3 and the sixth side L6 may be equal, and the first side L1 and the fifth side L5, the second side L2 and the fourth side L4, and the third side L3 and the sixth side L6 are as close as possible under the allowable conditions of the manufacturing process. In the present embodiment, the extending direction of the light emitting chips 30 intersects with the arrangement direction, so that the arrangement of the three light emitting chips 30 can be further integrated, thereby reducing the occupied area of the whole pixel PX, facilitating to increase the pixel density and the resolution.
Referring to fig. 6, alternatively, the first to third light emitting chips 31 to 33 may not include a protrusion. For example, the first to third light emitting chips 31 to 33 may also have a rectangular shape. The first light emitting chip 31 is closely adjacent to the second light emitting chip 32, and the top edge of the third light emitting chip 33 is closely adjacent to the bottom edges of the first light emitting chip 31 and the second light emitting chip 32. It can be understood that there may be a certain gap between the first light emitting chip 31 and the third light emitting chip 33.
Specifically, the first light emitting chip 31 has a first side L1 and a second side L2, and the first side L1 intersects the second side L2. The second light emitting chip 32 has a third side L3 and a fourth side L4, and the third side L3 intersects the fourth side L4. The third light emitting chip 33 has a fifth side L5 and a sixth side L6, and the fifth side L5 is connected to the sixth side L6. In the present embodiment, the fifth side L5 is parallel to the sixth side L6. The first side L1 is parallel to and adjacent to the fifth side L5, the second side L2 is parallel to and adjacent to the fourth side L4, and the third side L3 is parallel to and adjacent to the sixth side L6.
Referring to fig. 7, each pixel PX may further include more than three light emitting chips 30. For example, a fourth light emitting chip 34 is included in addition to the three-color chips of red, green, and blue. The fourth light emitting chip 34 may be yellow or white. And, of the four color chips, at least two light emitting chips 30 are connected to the same first bonding pad 201. In fig. 7, four light emitting chips 30 share the same first bonding pad 201.
It is understood that in other embodiments of the present application, two light emitting chips 30 in each pixel PX may be connected to the same first bonding pad 201, and another light emitting chip 30 may be separately connected to different first bonding pads 201. Two or more light emitting chips 30 in two adjacent pixels PX may be connected to the same first bonding pad 201. For example, in fig. 3, the second light emitting chip 32 in the pixel of the first row and the first column is connected to the same first bonding pad 201 as the first light emitting chip 31 of the first row and the second column. Or the third light emitting chip 33 in the pixel of the first row and the first column and at least one of the first light emitting chip 31 and the second light emitting chip 32 in the pixel of the second row and the first column are connected to the same first bonding pad 201. As long as can reduce the use of ground pads through sharing the bonding pad.
It is understood that, in the above embodiments, the first pins 301 of the first light emitting chip 31, the second light emitting chip 32 and the third light emitting chip 33 are all directly connected to the same first bonding pad 201. In other embodiments, the first leads 301 of the first light emitting chip 31, the second light emitting chip 32 and the third light emitting chip 33 can be indirectly connected to the same first bonding pad 201. In this case, the first bonding pad 201 may be disposed at an arbitrary position without being disposed at the boundary of the first, second, and third light emitting chips 31, 32, and 33.
Referring to fig. 8, an electronic device according to a second embodiment of the present application is different from the first embodiment in that:
the third light emitting chip 33 further includes a fourth protrusion 332. The fourth protrusion 332 is located at an end opposite to the third protrusion 331. The fourth protrusion 332 protrudes into the pixel PX adjacent to the third light-emitting chip 33 in the second direction D2, and into the gap between the first protrusion 311 and the second protrusion 321 of the adjacent pixel PX. The width of the fourth protrusion 332 is gradually decreased from a side away from the first binding pad 201 toward a side close to the first binding pad 201. That is, the third light emitting chip 33 has a substantially long and narrow hexagon shape, and two corners of the hexagon opposite to each other in the second direction D2 are respectively located in two adjacent pixels PX in the second direction D2. Thereby, one third light emitting chip 33 may be shared between two pixels PX adjacent in the second direction D2. One third light emitting chip 33 is simultaneously used for color mixing of two pixels PX, which is advantageous to improve the display effect.
Referring to fig. 9, an electronic device 1 according to a third embodiment of the present application is different from the first embodiment in that:
the pixels PX of the display panel 100 include first pixels PX1 and second pixels PX alternately arranged in a row along the first direction D1. The first pixels PX1 and the second pixels PX are arranged in columns along the second direction D2, respectively. Also, the first pixel PX1 is substantially flush with the top end of the second pixel PX. In the first pixel PX1, the first light emitting chip 31 and the second light emitting chip 32 are disposed at an interval in the first direction D1, and the third light emitting chip 33 is disposed at a first side of the first light emitting chip 31 and the second light emitting chip 32 in the second direction D2; in the second pixel PX, the first light emitting chip 31 and the second light emitting chip 32 are disposed at an interval in the first direction D1, and the third light emitting chip 33 is disposed at a second side of the first light emitting chip 31 and the second light emitting chip 32 in the second direction D2. The first side is opposite the second side. Optionally, the first side is an upper side and the second side is a lower side. Thereby, the first light emitting chip 31, the second light emitting chip 32, and the third light emitting chip 33 are sequentially arranged at intervals in the first direction D1. That is, the three light emitting chips 30 in the first pixel PX1 are arranged in a "T" shape, the three light emitting chips in the second pixel PX are arranged in an inverted "T" shape, and the second pixel PX is located in a gap between adjacent two first pixels PX 1. By the arrangement mode, the transverse spacing d1 and the longitudinal spacing d2 between the sub-pixels can be reduced, so that the design freedom of a chip is improved, and the process difficulty is reduced. In addition, the pixels can be arranged more closely, which is beneficial to improving the resolution. Since the pitch between the sub-pixels reflects the size of the space between two sub-pixels, a smaller pitch means a smaller space between the sub-pixels, which means a higher pixel density and a higher screen resolution.
Referring to fig. 10, an electronic device according to a fourth embodiment of the present application is different from the first embodiment in that:
the plurality of pixels PX are arranged in rows at intervals in the first direction D1, respectively. However, the pixels PX in adjacent rows are arranged in a staggered manner. Specifically, a row of pixels PX is disposed corresponding to an interval between adjacent rows of pixels PX. Such a pixel arrangement can be used in a display panel 100 designed specifically for a particular application.
This application binds the pad through making the luminescent chip sharing, reduces the quantity of binding the pad, can reduce the area that binds the pad and occupy on the base plate, and the space of practicing thrift out can be used for setting up drive circuit to improve drive circuit's design degree of freedom, be convenient for optimize drive circuit, improve the display effect. The binding pads are shared, so that the arrangement of the binding pads is integrated, the distance between the corresponding light-emitting chips is reduced, the size of the light-emitting chips in the pixels can be designed to be larger, the manufacturing difficulty of the light-emitting chips can be reduced, and the binding yield of the light-emitting chips is improved.
According to one embodiment of the application, the three light-emitting chips in each pixel are arranged in a Y shape, so that the arrangement of the three light-emitting chips can be further integrated, the occupied area of the whole pixel is reduced, the pixel density is improved, and the resolution is improved.
According to one embodiment of the present application, the pixels include first pixels and second pixels alternately arranged in a row at intervals in the first direction. Three light-emitting chips in the first pixel are arranged in a T shape, three light-emitting chips in the second pixel are arranged in an inverted T shape, and the transverse distance and the longitudinal distance between the sub-pixels can be reduced through the arrangement mode, so that the design freedom degree of the chips is improved, and the process difficulty is reduced. In addition, the pixels can be arranged more closely, which is beneficial to improving the resolution.
The foregoing provides a detailed description of embodiments of the present application, and the principles and embodiments of the present application have been described herein using specific examples, which are presented solely to aid in the understanding of the present application. Meanwhile, for those skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (10)
1. A display panel, comprising:
a substrate;
a first bonding pad disposed on the substrate;
the first light-emitting chip and the second light-emitting chip are connected to the same first binding pad.
2. The display panel of claim 1, wherein the display panel comprises at least one pixel, the pixel comprises the first light emitting chip, the second light emitting chip and a third light emitting chip, the first light emitting chip, the second light emitting chip and the third light emitting chip are all provided with a first pin, and the first pins of the first light emitting chip, the second light emitting chip and the third light emitting chip are all connected to the same first bonding pad.
3. The display panel of claim 2, wherein orthographic projections of the first light emitting chip, the second light emitting chip, and the third light emitting chip on the first bonding pad are arranged centering on the first bonding pad.
4. The display panel of claim 3, wherein the first light emitting chip comprises a first protrusion, the second light emitting chip comprises a second protrusion, the third light emitting chip comprises a third protrusion, the first protrusion is disposed opposite to the second protrusion and forms a gap, the third protrusion protrudes into the gap, and the widths of the first protrusion, the second protrusion, and the third protrusion are gradually decreased from a side away from the first bonding pad to a side close to the first bonding pad.
5. The display panel of claim 4, wherein the third light emitting chip further comprises a fourth protrusion protruding into a gap between the first protrusion and the second protrusion of the pixel adjacent to the third light emitting chip, and a width of the fourth protrusion gradually decreases from a side away from the first bonding pad toward a side close to the first bonding pad.
6. The display panel according to claim 3 or 4, wherein the first light emitting chip has a first edge and a second edge, the first edge intersects the second edge, the second light emitting chip has a third edge and a fourth edge, the third edge intersects the fourth edge, the third light emitting chip has a fifth edge and a sixth edge, the fifth edge is connected to the sixth edge, the first edge is parallel and adjacent to the fifth edge, the second edge is parallel and adjacent to the fourth edge, and the third edge is parallel and adjacent to the sixth edge.
7. The display panel according to claim 2, wherein the at least one pixel is arranged in a matrix, the first light emitting chips and the second light emitting chips are arranged at intervals in a first direction, the third light emitting chips are arranged at intervals in a second direction perpendicular to the first direction, and the third light emitting chips are disposed corresponding to the intervals between the first light emitting chips and the second light emitting chips.
8. The display panel according to claim 2, wherein the pixels include first pixels and second pixels alternately arranged at intervals in a first direction, the first pixels and the second pixels are both arranged at intervals in a second direction perpendicular to the first direction, the first light emitting chips and the second light emitting chips are arranged at intervals in the first direction in the first pixels, and the third light emitting chips are arranged on first sides of the first light emitting chips and the second light emitting chips; in the second pixel, the first light emitting chip and the second light emitting chip are arranged at an interval along the first direction, and the third light emitting chip is arranged on a second side of the first light emitting chip and the second light emitting chip opposite to the first side.
9. The display panel of claim 2, wherein the display panel further comprises second bonding pads, the first light emitting chip, the second light emitting chip and the third light emitting chip are respectively connected to different second bonding pads, the first bonding pad is used for providing a first potential, the first potential is a ground potential, the second bonding pad is used for providing a second potential, and the first potential is lower than the second potential.
10. An electronic device comprising the display panel according to any one of claims 1 to 9 and a housing, the display panel being provided in the housing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110820229.XA CN113593428A (en) | 2021-07-20 | 2021-07-20 | Display panel and electronic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110820229.XA CN113593428A (en) | 2021-07-20 | 2021-07-20 | Display panel and electronic device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN113593428A true CN113593428A (en) | 2021-11-02 |
Family
ID=78248423
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110820229.XA Pending CN113593428A (en) | 2021-07-20 | 2021-07-20 | Display panel and electronic device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113593428A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024060707A1 (en) * | 2022-09-23 | 2024-03-28 | 惠科股份有限公司 | Display panel and display device |
Citations (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1012926A (en) * | 1996-06-20 | 1998-01-16 | Toyoda Gosei Co Ltd | Full color emission diode lamp and display |
| CN101308897A (en) * | 2007-05-16 | 2008-11-19 | 优志旺电机株式会社 | Led device and method by which it is produced |
| CN106098731A (en) * | 2015-04-29 | 2016-11-09 | 乐金显示有限公司 | Organic light emitting diode display |
| CN107230697A (en) * | 2017-05-16 | 2017-10-03 | 纳晶科技股份有限公司 | Substrate with dot structure, photoelectric device and Method of printing containing it |
| CN107731990A (en) * | 2017-11-24 | 2018-02-23 | 山西高科华烨电子集团有限公司 | Full-color COB display screens lamp bead encapsulation welding tray structure |
| CN207852672U (en) * | 2018-02-26 | 2018-09-11 | 山东晶泰星光电科技有限公司 | A kind of tetrad RGB-LED encapsulation modules and its display screen |
| CN108630114A (en) * | 2018-06-26 | 2018-10-09 | 佛山市国星光电股份有限公司 | A kind of LED display unit group and display panel |
| CN108807356A (en) * | 2018-06-05 | 2018-11-13 | 深圳市智讯达光电科技有限公司 | A kind of four-in-one mini-LED modules, display screen and manufacturing method |
| CN109411455A (en) * | 2018-09-27 | 2019-03-01 | 佛山市国星光电股份有限公司 | A kind of LED display unit group and display panel |
| CN110021238A (en) * | 2018-01-10 | 2019-07-16 | 佳能株式会社 | Show equipment and picture pick-up device |
| CN110634930A (en) * | 2019-09-27 | 2019-12-31 | 京东方科技集团股份有限公司 | Display panel and display device |
| CN210040253U (en) * | 2019-08-13 | 2020-02-07 | 厦门三安光电有限公司 | All-in-one light-emitting module and display screen |
| CN110767830A (en) * | 2018-12-28 | 2020-02-07 | 云谷（固安）科技有限公司 | Transparent OLED substrate, array substrate, display screen and display device |
| CN210167054U (en) * | 2019-06-10 | 2020-03-20 | 深圳市晶泓科技有限公司 | LED lamp bead and transparent LED display screen |
| CN111799320A (en) * | 2020-09-01 | 2020-10-20 | 京东方科技集团股份有限公司 | Display panel and display device |
| CN112908196A (en) * | 2021-01-29 | 2021-06-04 | 厦门天马微电子有限公司 | Display panel and display device |
| CN113113526A (en) * | 2021-04-16 | 2021-07-13 | 安徽精卓光显技术有限责任公司 | Small-size LED transparent display screen and production method thereof |
-
2021
- 2021-07-20 CN CN202110820229.XA patent/CN113593428A/en active Pending
Patent Citations (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1012926A (en) * | 1996-06-20 | 1998-01-16 | Toyoda Gosei Co Ltd | Full color emission diode lamp and display |
| CN101308897A (en) * | 2007-05-16 | 2008-11-19 | 优志旺电机株式会社 | Led device and method by which it is produced |
| CN106098731A (en) * | 2015-04-29 | 2016-11-09 | 乐金显示有限公司 | Organic light emitting diode display |
| CN107230697A (en) * | 2017-05-16 | 2017-10-03 | 纳晶科技股份有限公司 | Substrate with dot structure, photoelectric device and Method of printing containing it |
| CN107731990A (en) * | 2017-11-24 | 2018-02-23 | 山西高科华烨电子集团有限公司 | Full-color COB display screens lamp bead encapsulation welding tray structure |
| CN110021238A (en) * | 2018-01-10 | 2019-07-16 | 佳能株式会社 | Show equipment and picture pick-up device |
| CN207852672U (en) * | 2018-02-26 | 2018-09-11 | 山东晶泰星光电科技有限公司 | A kind of tetrad RGB-LED encapsulation modules and its display screen |
| CN108807356A (en) * | 2018-06-05 | 2018-11-13 | 深圳市智讯达光电科技有限公司 | A kind of four-in-one mini-LED modules, display screen and manufacturing method |
| CN108630114A (en) * | 2018-06-26 | 2018-10-09 | 佛山市国星光电股份有限公司 | A kind of LED display unit group and display panel |
| CN109411455A (en) * | 2018-09-27 | 2019-03-01 | 佛山市国星光电股份有限公司 | A kind of LED display unit group and display panel |
| CN110767830A (en) * | 2018-12-28 | 2020-02-07 | 云谷（固安）科技有限公司 | Transparent OLED substrate, array substrate, display screen and display device |
| CN210167054U (en) * | 2019-06-10 | 2020-03-20 | 深圳市晶泓科技有限公司 | LED lamp bead and transparent LED display screen |
| CN210040253U (en) * | 2019-08-13 | 2020-02-07 | 厦门三安光电有限公司 | All-in-one light-emitting module and display screen |
| CN110634930A (en) * | 2019-09-27 | 2019-12-31 | 京东方科技集团股份有限公司 | Display panel and display device |
| CN111799320A (en) * | 2020-09-01 | 2020-10-20 | 京东方科技集团股份有限公司 | Display panel and display device |
| CN112908196A (en) * | 2021-01-29 | 2021-06-04 | 厦门天马微电子有限公司 | Display panel and display device |
| CN113113526A (en) * | 2021-04-16 | 2021-07-13 | 安徽精卓光显技术有限责任公司 | Small-size LED transparent display screen and production method thereof |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024060707A1 (en) * | 2022-09-23 | 2024-03-28 | 惠科股份有限公司 | Display panel and display device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN111524928B (en) | Display panel and display device | |
| CN111092108B (en) | Display panel and display device | |
| US8405646B2 (en) | Display panel and active device array substrate thereof | |
| KR20200106039A (en) | Display device using semiconductor light emitting device and manufacturing method thereof | |
| CN113805378B (en) | Light-emitting substrate and display device | |
| US20230148233A1 (en) | Display substrate and display device | |
| KR20190099149A (en) | Display device using micro-led | |
| US8355087B2 (en) | Pixel array substrate, conductive structure and display panel | |
| CN111552131A (en) | Display device | |
| CN111179831A (en) | Display substrate and display device | |
| CN111916488A (en) | Display substrate and display device | |
| CN113593428A (en) | Display panel and electronic device | |
| JP2013238829A (en) | Liquid crystal display device | |
| US20240256206A1 (en) | Display apparatus | |
| WO2024022069A1 (en) | Display panel and display apparatus | |
| CN115136317B (en) | Display substrate, manufacturing method thereof and display device | |
| US11929388B2 (en) | Local passive matrix displays | |
| WO2019218585A1 (en) | Display panel and display device thereof | |
| CN113363298B (en) | Display panel and display device comprising same | |
| TWI754386B (en) | Liquid crystal display device and method for making the same | |
| WO2022061543A1 (en) | Display substrate and display device | |
| CN116249400A (en) | Display substrate and display device | |
| EP4210103A1 (en) | Display device | |
| CN221670336U (en) | Display device | |
| CN115220269B (en) | Display panel and display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |