CN113514711B - Phase sequence detection device and phase sequence detection method - Google Patents
Phase sequence detection device and phase sequence detection method Download PDFInfo
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Abstract
A phase sequence detection device and a phase sequence detection method are provided. According to an embodiment of the present disclosure, a phase sequence detection apparatus may include: a waveform detection circuit for detecting a first waveform of a first line voltage of a first phase with respect to a second phase and a second waveform of a second line voltage of the second phase with respect to a third phase of three-phase alternating current power; and a signal processor for determining a first duration of the first waveform and a second duration of the second waveform, determining a phase sequence of the alternating current power or whether a phase-loss fault occurs based on the first duration and the second duration. According to the embodiment of the disclosure, the phase sequence detection can be conveniently, effectively and reliably realized by combining software and hardware.
Description
Technical Field
The present disclosure relates generally to power electronics technology, and more particularly, to a phase sequence detection apparatus and a phase sequence detection method.
Background
Many electrical devices, such as frequency converters, require phase detection to prevent phase loss, determine phase sequence, etc. Currently, hardware circuitry is typically used for phase detection. However, such circuits are generally complex, have a narrow application voltage range, are poorly adapted to the power grid (e.g., can only be used at 50 Hz), and have a large number of components and low reliability.
Disclosure of Invention
Accordingly, it is an object of the present disclosure, at least in part, to provide a phase sequence detection apparatus and a phase sequence detection method to at least partially suppress or solve the above-mentioned problems.
According to one aspect of the present disclosure, there is provided a phase sequence detection apparatus including: a waveform detection circuit for detecting a first waveform of a first line voltage of a first phase with respect to a second phase and a second waveform of a second line voltage of the second phase with respect to a third phase of three-phase alternating current power; and a signal processor for determining a first duration of the first waveform and a second duration of the second waveform, determining a phase sequence of the three-phase alternating current power or whether a phase loss fault occurs based on the first duration and the second duration.
Here, a hardware circuit, a waveform detection circuit, is used to sample line voltages, obtain their waveforms, and an algorithm or software is used by a signal processor to determine phase sequence or phase loss based on the obtained waveforms. The basic principle of the judgment is that the phase difference between the three phases of the three-phase alternating-current power is substantially fixed under normal conditions, the amplitude of the three-phase alternating-current power is also substantially fixed, and therefore the phase and amplitude of the line voltage between the adjacent two phases are also substantially constant, and then the high (or low) level duration of the two line voltages are also substantially fixed, and the time difference between the high (or low) level durations of the two line voltages is also substantially zero. If the amplitude of any one phase voltage decreases, the high (or low) level duration of the corresponding line voltage shortens. Thus, by detecting the high (or low) level duration of the two line voltages, it is possible to determine whether or not a phase loss fault occurs. Further, if the amplitude difference of any two-phase voltage becomes large, the difference in the high (or low) level duration of the two line voltages becomes large. Therefore, by detecting the difference in the high (or low) level durations of the two line voltages, the degree of balance of the three-phase alternating current power can be determined. The high (or low) level duration of the line voltage can be determined by sampling the line voltage according to the preset sampling time without always monitoring the line voltage, and the judgment is realized by software, so that the software can be simplified, and the resources occupied by the software can be reduced.
According to an embodiment of the present disclosure, the waveform detection circuit may include: a waveform conversion circuit configured to convert each of the first waveform and the second waveform into a pulse waveform having the same period and phase as the waveform, wherein a signal processor is configured to make the determination based on a duration of the pulse waveform.
According to an embodiment of the present disclosure, the waveform conversion circuit may be configured to convert a portion of the waveform having an amplitude exceeding a predetermined threshold into a pulse.
According to an embodiment of the present disclosure, the signal processor may be configured to: if the first duration and the second duration are both greater than a first preset threshold value and the difference between the first duration and the second duration is smaller than a second preset threshold value, a phase sequence judging stage is entered, otherwise, the open-phase fault is determined to occur.
According to an embodiment of the present disclosure, in the phase sequence determination phase, if the first duration occurs before the second duration, the phase sequence is determined to be forward, otherwise, the phase sequence is determined to be reverse.
According to an embodiment of the present disclosure, the signal processor may be configured to identify a plurality of the first durations and a plurality of the second durations within a predetermined detection period, and to take an average of a sum of the plurality of first durations as the first duration and an average of a sum of the plurality of second durations as the second duration.
According to an embodiment of the present disclosure, the signal processor may determine that a phase loss fault occurs if the first duration or the second duration is not detected within a predetermined detection period.
According to an embodiment of the present disclosure, the signal processor may be further configured to filter the plurality of first durations and the plurality of second durations, filtering out durations having a duration less than a first filtering threshold and a duration interval less than a second filtering threshold.
According to an embodiment of the present disclosure, the waveform conversion circuit may include: an optocoupler whose input-side photodiode receives a line voltage to be detected or a voltage proportional to the line voltage to be detected, whose output-side transistor is connected to output a low level at an output node when the input-side photodiode is turned on and to output a high level when the input-side photodiode is turned off; the logic conversion circuit receives the output at the output node of the optocoupler, converts the high-level output into low level, and converts the low-level output into high level; and a filter circuit that filters an output of the logic conversion circuit.
According to another aspect of the present disclosure, there is provided a phase sequence detection method including: detecting a first waveform of a first line voltage of a first phase relative to a second phase and a second waveform of a second line voltage of the second phase relative to a third phase of the three-phase alternating current power; and determining a first duration of the first waveform and a second duration of the second waveform, determining a phase sequence of the three-phase alternating current power or whether a phase-loss fault occurs based on the first duration and the second duration.
According to an embodiment of the present disclosure, detecting the first waveform and the second waveform may include: each of the first waveform and the second waveform is converted into a pulse waveform having the same period and phase as the waveform, wherein the determination is made based on the duration of the pulse waveform.
According to an embodiment of the present disclosure, determining a phase sequence of the three-phase alternating current power or whether a phase-loss fault occurs based on the first duration and the second duration may include: if the first duration and the second duration are both greater than a first preset threshold value and the difference between the first duration and the second duration is smaller than a second preset threshold value, determining to enter a phase sequence judging stage, otherwise, determining that the phase failure occurs.
According to an embodiment of the present disclosure, the phase sequence determination phase includes: if the first duration occurs before the second duration, the phase sequence is determined to be forward, otherwise, the phase sequence is determined to be reverse.
According to an embodiment of the present disclosure, determining a phase sequence of the three-phase alternating current power or whether a phase-loss fault occurs based on the first duration and the second duration may include: a plurality of the first durations and a plurality of the second durations are identified within a predetermined detection period, and an average of a sum of the plurality of first durations is taken as the first duration and an average of a sum of the plurality of second durations is taken as the second duration.
According to an embodiment of the present disclosure, determining a phase sequence of the three-phase alternating current power or whether a phase-loss fault occurs based on the first duration and the second duration may include: if the first duration or the second duration is not detected within a predetermined detection period, it is determined that an open-phase fault has occurred.
According to an embodiment of the present disclosure, determining a phase sequence of the three-phase alternating current power or whether a phase-loss fault occurs based on the first duration and the second duration may further include: filtering the plurality of first durations and the plurality of second durations, filtering out durations having durations less than a first filtering threshold and durations having duration intervals less than a second filtering threshold.
As described above, the solution proposed by the present disclosure is convenient, efficient and reliable.
Drawings
The above and other objects, features and advantages of the present disclosure will become more apparent from the following description of embodiments thereof with reference to the accompanying drawings in which:
FIG. 1 is a schematic diagram illustrating the detection principle according to an embodiment of the present disclosure;
FIG. 2 is a schematic block diagram illustrating a phase sequence detection apparatus according to an embodiment of the present disclosure;
fig. 3 is a schematic diagram showing an example of waveform conversion according to an embodiment of the present disclosure;
fig. 4 is a circuit diagram showing an example of a waveform conversion circuit according to an embodiment of the present disclosure;
FIG. 5 is a schematic diagram illustrating the principle of a detection algorithm according to an embodiment of the present disclosure;
Fig. 6 is a flowchart illustrating a phase sequence detection method according to an embodiment of the present disclosure.
The same or similar reference numbers will be used throughout the drawings to refer to the same or like parts.
Detailed Description
Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood that the description is only exemplary and is not intended to limit the scope of the present disclosure. In addition, in the following description, descriptions of well-known structures and techniques are omitted so as not to unnecessarily obscure the concepts of the present disclosure.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. The words "a", "an", and "the" as used herein are also intended to include the meaning of "a plurality", etc., unless the context clearly indicates otherwise. Furthermore, the terms "comprises," "comprising," and the like, as used herein, specify the presence of stated features, steps, operations, and/or components, but do not preclude the presence or addition of one or more other features, steps, operations, or components.
All terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art unless otherwise defined. It should be noted that the terms used herein should be construed to have meanings consistent with the context of the present specification and should not be construed in an idealized or overly formal manner.
Fig. 1 is a schematic diagram illustrating a detection principle according to an embodiment of the present disclosure.
For three-phase Alternating Current (AC) power, such as AC power from a power grid, the phase difference between the three phases is normally substantially constant (120 °), as is the magnitude of the three-phase AC power. Whereby the phase and amplitude of the line voltage between adjacent phases is also substantially constant; in turn, the high (or low) level duration of the two line voltages is also substantially fixed, and the time difference between the high (or low) level durations of the two line voltages is also substantially zero. Fig. 1 schematically shows waveforms of line voltages 1-2 of a first phase with respect to a second phase and line voltages 2-3 of the second phase with respect to a third phase. More specifically, in time, the high (or low) level duration of the waveforms of the two line voltages is fixed after the waveform detection circuit is provided, for example, the duration T1 of the level of the first phase with respect to the line voltage 1-2 of the second phase higher than the threshold value is fixed, for example, 5ms, and the duration T2 of the level of the second phase with respect to the line voltage 2-3 of the third phase higher than the threshold value is also fixed, for example, 5ms. If the amplitude of any one phase voltage is reduced, the high (or low) level duration of the waveform of the corresponding line voltage is shortened. Therefore, by detecting the high (or low) level duration of the waveforms of the two line voltages, it is possible to determine whether or not a phase loss fault occurs. Further, if the amplitude difference of any two-phase voltage becomes large, the difference in the high (or low) level durations of the waveforms of the two line voltages becomes large. Therefore, by detecting the difference in the high (or low) level durations of the waveforms of the two line voltages, the degree of balance of the three-phase alternating current power can be determined.
For example, a waveform of a first line voltage of the first phase with respect to the second phase is referred to as a first waveform, a waveform of a second line voltage of the second phase with respect to the third phase is referred to as a second waveform, a duration of the first waveform being a high (or low) level is referred to as a first duration, and a duration of the second waveform being a high (or low) level is referred to as a second duration, and if the first duration and the second duration are less than a first predetermined threshold value or a difference between the first duration and the second duration is greater than a second predetermined threshold value, a phase failure may be considered to occur by detecting the first duration and the second duration. If the first duration occurs before the second duration, the phase sequence of the three-phase alternating current power is recorded as a forward direction, otherwise, the phase sequence of the three-phase alternating current power is recorded as a reverse direction.
The detection algorithm may be designed according to the above principle. Only data representing the waveform, in particular its high/low level (e.g. waveform samples), need be input to the algorithm. Thus, the design of the hardware portion can be greatly simplified and the resource occupation of the software can be reduced.
Fig. 2 is a schematic block diagram illustrating a phase sequence detection apparatus according to an embodiment of the present disclosure.
As shown in fig. 2, the phase sequence detection apparatus 200 according to this embodiment may include a waveform detection circuit 201 and a signal processor 203.
The waveform detection circuit 201 may be configured to detect waveforms of each of a line voltage of a first phase with respect to a second phase and a line voltage of the second phase with respect to a third phase of the three-phase alternating-current power. The waveform detection circuit 201 may be implemented in a variety of ways. For example, the waveform detection circuit 201 may simply sample the line voltage and send the sampled signal into the signal processor 203, which signal processor 203 processes and calculates the high (or low) level duration of the waveform.
According to an embodiment of the present disclosure, the waveform detection circuit 201 may include a waveform conversion circuit for converting each of the first waveform and the second waveform into a pulse waveform having the same period and phase as the waveform. The pulse shape is advantageous for detection, in particular level detection, due to its variability. The converted pulse waveform and the pre-conversion waveform may be substantially aligned in time, i.e., in phase, so that the converted pulse waveform may represent the position in time of the pre-conversion waveform and thus may be used for detection.
Fig. 3 is a schematic diagram illustrating an example of waveform conversion according to an embodiment of the present disclosure.
As shown in fig. 3, in this example, the waveform of the line voltage is converted into a square wave pulse train. Specifically, a portion of the waveform of the line voltage whose amplitude V exceeds the predetermined threshold REF may be converted into a pulse. Thus, each pulse in the pulse train coincides substantially in time with the peak portion of the waveform of the line voltage. Of course, the rising and falling edges of the square waveform may have some skew due to delays that may be present in the circuit elements. The threshold REF is adjustable.
Of course, the waveform conversion circuit may have a different design. For example, the waveform conversion circuit may generate a pulse train corresponding in time to a trough portion of the waveform of the line voltage (e.g., by converting a portion of the waveform of the line voltage having an amplitude V below a negative predetermined threshold value into a pulse).
Because of the similarity between the line voltages 1-2 and 2-3 (they should have the same waveform in principle regardless of noise and phase differences), the relative positional relationship of the converted pulse waveforms in time and the relative positional relationship of the level (amplitude) and the waveforms of the line voltages 1-2 and 2-3 and the level (amplitude) can be kept uniform regardless of the design of the waveform conversion circuit to which the same waveform conversion circuit is applied to the line voltages 1-2 and 2-3.
Fig. 4 is a circuit diagram showing an example of a waveform conversion circuit according to an embodiment of the present disclosure.
As shown in fig. 4, the waveform conversion circuit 400 according to this embodiment may include a comparison means 401 to compare a line voltage (e.g., a line voltage of the first phase AC1 relative to the second phase AC 2) with a threshold voltage REF. The comparison means 401 may have different outputs according to the magnitude relation between the line voltage and the threshold voltage REF. In this example, an optocoupler capable of functioning as an isolation is used as the comparing means 401 in view of the possibly high voltage of the AC power (e.g. 220V or 380V in case of a grid, etc.). The optocoupler includes an input side photodiode PD and an output side transistor PT. When the line voltage is greater than the threshold voltage REF, the voltage across the input side photodiode PD of the optocoupler 401 may turn on the photodiode PD and thus the output side transistor PT. On the other hand, when the line voltage is smaller than the threshold voltage REF, the voltage applied across the input-side photodiode PD of the optocoupler 401 is insufficient to turn on the photodiode PD, and thus the output-side transistor PT is turned off.
Here, the input-side photodiode PD may receive the line voltage through the voltage dividing circuit 403. The voltage dividing circuit 403 includes voltage dividing resistors R1 and R2. The voltage dividing ratio of the voltage dividing circuit 403 is adjusted by adjusting the resistance values of the voltage dividing resistors R1 and R2, so that the above-described threshold voltage REF can be adjusted, and the length of the duration of the pulse waveform corresponding to the waveform of the line voltage can be adjusted.
In addition, a diode D1 is connected in series on the input side to prevent a reverse current from flowing through the photodiode PD.
On the output side of the optocoupler 401, different signals, for example, high and low level signals, may be output according to the on or off state of the output side transistor PT. There are numerous circuit designs in the art that achieve this goal. In one example, one end of the output side transistor PT is connected to the supply voltage VSS1 through a pull-up resistor R3, and the other end is connected to a reference voltage such as the ground voltage GND. Then, at the output node N1 of the transistor PT, when the transistor PT is on (i.e., when the line voltage is higher than the threshold voltage REF), a low level (approximately the ground voltage GND) is output, and when the transistor PT is off (i.e., when the line voltage is lower than the threshold voltage REF), a high level (approximately the power supply voltage VSS 1) is output.
This output logic is opposite to the desired output logic (as described above, it is desired to output a pulse of a high level when the line voltage is higher than the threshold voltage REF), and thus the logic conversion circuit 405 is connected after the output node N1 in this example. In an example, the logic conversion circuit 405 may implement an inverting function. The logic conversion circuit 405 may include a transistor T1, which is connected similarly to the transistor PT. Specifically, one end of the transistor T1 is connected to the power supply voltage VSS2 through the pull-up resistor R4, and the other end is connected to the ground voltage GND. Thus, when the node N1 is at a low level, the transistor T1 is turned off, and a high level (approximately the power supply voltage VSS 2) is output at the output node N2 of the transistor T1, and when the node N1 is at a high level, the transistor T1 is turned on, and a low level (approximately the ground voltage GND) is output at the node N2.
In addition, a filter circuit 407 may be provided between the node N1 and the logic conversion circuit 405. For example, the filter circuit 407 may include a resistor R5, a capacitor C1, and a diode D2. The filter circuit 407 may filter out switching components caused by the switching of the optocoupler 401. In addition, after the node N2, the filter circuit 409 may be connected to stabilize the output. For example, the filter circuit 409 may include a resistor R6 and a capacitor C2.
Returning to fig. 2, the signal processor 203 may determine whether an open-phase fault has occurred based on the high-level duration of the waveform detected by the waveform detection circuit 201. For example, the signal processor 203 may calculate the high level duration of the waveforms of the line voltages 1-2 and 2-3, respectively, from the waveforms detected by the waveform detecting circuit 201, such as the pulse waveforms converted by the waveform converting circuit, and determine whether the phase sequence is forward or reverse, or whether a phase loss fault occurs, based on the high level duration and the order in which the high level durations occur, with reference to the principle described above in connection with fig. 1. Such calculations and decisions may be implemented, for example, by the signal processor 203 running a correlation program or executing a correlation algorithm. Fig. 5 is a schematic diagram illustrating the principle of a detection algorithm according to an embodiment of the present disclosure.
As shown in fig. 5, in the case of three-phase AC power, there are two line voltages, namely, a line voltage 1-2 of a first phase with respect to a second phase and a line voltage 2-3 of the second phase with respect to a third phase. The waveforms of the line voltages 1-2 and 2-3 are converted into pulse waveforms by the waveform converting circuit described above, for example. Phase sequence detection may then be performed based on the high (or low) level duration of these waveforms. Here, description is made taking a high level duration of a waveform as an example.
Due to the repetition of the period, detection can be achieved by several pulses that are adjacent in time. If the state of the PULSE1 of the line voltage 1-2 or the PULSE2 of the line voltage 2-3 cannot be recognized for more than a certain time (for example, the duration of 30 signal periods), i.e., if the first duration or the second duration is not detected within a predetermined detection period, it is determined that the open-phase fault occurs.
In case of detection of these two PULSEs PULSE1, PULSE2, their high-level duration can be calculated. For example, the duration of the high level of PULSE1 for line voltage 1-2 is CNTA, and the duration of the high level of PULSE2 for line voltage 2-3 is CNTB. Specifically, at power up, or at a specific time, for example for a 50Hz grid, its signal period is 20ms, detection starts at a multiple of 20ms after power up (shown as T0 in fig. 5).
If first a high PULSE1 is detected while a low PULSE2 is detected, the phase sequence is recorded as forward, cnta++. If, however, a low PULSE1 is detected first, while a high PULSE2 is detected, the recorded phase sequence is reversed, cntb++.
Next, if PULSE1 is detected as low while PULSE2 is high, cntb++. If PULSE1 is high while PULSE2 is low, cnta++.
Finally, at t1=t0+20 ms, for example, the detection ends.
When the phase sequence is forward, first PULSE1 is detected as high while PULSE2 is low, then PULSE1 is detected as low while PULSE2 is high. While when the phase sequence is reversed, first PULSE2 is detected as high while PULSE1 is low, then PULSE1 is detected as high while PULSE2 is low. Thus, the phase sequence can be recorded as either forward or reverse by first detecting whether PULSE1 is high or PULSE2 is high.
The sampling period may be set according to the performance of the singlechip used for calculation, for example, the level of the pulse waveform may be set so that the pulse waveform is sampled every 1 ms.
At this time, the high level duration of PULSE1 and PULSE2 and the PULSE width difference between line voltages 1-2 and 2-3 are determined, i.e., the values of CNTA, CNTB and the difference between CNTA and CNTB are determined. If the high level duration of PULSE1 and PULSE2 is greater than a first predetermined threshold (e.g., 4 ms) and the difference between CNTA and CNTB is less than a second predetermined threshold (e.g., 2 ms), a phase sequence determination phase is entered, and if not, a phase loss fault is determined to occur. In the phase sequence determination phase, it can be determined from the record whether it is forward or reverse, i.e. if PULSE1 is high before PULSE2, then the phase sequence is determined to be forward, otherwise, the phase sequence is determined to be reverse.
Fig. 5 shows a case where, for example, the magnitudes of the first phase voltage, the second phase voltage are normal, and the magnitude of the third phase voltage is reduced. As the amplitude of the third phase voltage decreases, the amplitude of the line voltage 2-3 becomes smaller. The amplitude of the line voltage 1-2 is unchanged at this time. As shown in fig. 5, the high-level duration CNTA of the PULSE waveform PULSE1 remains normal, and the high-level duration CNTB of the PULSE waveform PULSE2 becomes smaller. If the magnitude of the third phase voltage decreases within the tolerance range, CNTB is still greater than the first predetermined threshold, at which point the phase sequence is determined to be forward based on the occurrence of PULSE1 before PULSE 2.
If the amplitude of the third phase voltage decreases beyond the tolerance range, CNTB is smaller than the first predetermined threshold, and it is determined that a phase-missing fault occurs, where the voltage of a certain phase fails.
In another example, if the magnitude of the first phase voltage becomes larger, the magnitude of the third phase voltage becomes smaller, and the magnitude of the second phase voltage is normal, the magnitude of the line voltage 1-2 becomes larger and the magnitude of the line voltage 2-3 becomes smaller. If the amplitude variation of the first phase voltage and the amplitude variation of the third phase voltage are both within the tolerance range, both CNTA and CNTB are greater than the first predetermined threshold. But if the difference between CNTA and CNTB is greater than a second predetermined threshold, it is determined that a phase loss fault, i.e. a grid imbalance, has occurred.
The first predetermined threshold and the second predetermined threshold may be set according to different situations. As described above, the voltage division ratio of the voltage division circuit 403 is adjusted by adjusting the resistance values of the voltage division resistors R1 and R2 in the waveform conversion circuit shown in fig. 4, so that the length of the duration of the line voltage can be adjusted, that is, the first predetermined threshold value is set. Moreover, a different second predetermined threshold may be set for different detection error margins and balance of the grid.
The following is an example of pseudo code for a phase sequence detection algorithm that may be employed, taking 1ms as the sampling period and 20ms as the detection period in this example.
Furthermore, a predetermined detection period may be set, for example 600ms (e.g. 30 signal periods). The signal processor 203 performs detection continuously for a predetermined detection period, recognizes a plurality of CNTAs and a plurality of CNTBs, and processes an average value of the plurality of CNTAs and an average value of the plurality of CNTBs as the CNTAs and the CNTBs. If CNTA or CNTB is not detected within a predetermined detection period, it is determined that a phase loss fault occurs.
According to an embodiment of the present disclosure, the signal processor 203 may filter the plurality of CNTAs and the plurality of CNTBs detected within the predetermined detection period, filtering out CNTAs and CNTBs that are smaller than the first filtering threshold and spaced apart by less than the second filtering threshold. For example, short duration pulses may occur when a grid is dithered, or the interval between pulses that occur is short. Filtering these pulses is beneficial to improving detection accuracy.
The signal processor 203 may be various means or devices capable of running executable code, such as a programmable device, e.g., a Field Programmable Gate Array (FPGA), a microprocessor (μp), or a Micro Control Unit (MCU), etc. The executable code may be solidified into the signal processor 203 or may be externally loaded into the signal processor 203.
In addition, the phase sequence detection apparatus 200 may further include an analog-to-digital (a/D) converter 205 for converting the analog output of the waveform detection circuit 201 into digital form for processing by the signal processor 203. Of course, the waveform detection circuit 201 itself may be designed to be digital, or the a/D converter 205 may be included in the signal processor 203.
In addition, the phase sequence detecting device 200 may further include a display device, such as a liquid crystal display panel, for displaying the detection result.
The above description is given by taking the high level of the sampling waveform as an example, and the circuit design and the detection principle are similar when the low level of the sampling waveform is sampled, and the description is omitted here. For example, as described above, in the case of the reverse connection of the optocoupler 401 in the waveform conversion circuit 400, the low level of the waveform (i.e., the trough of the waveform) can be converted into a corresponding pulse sequence, and accordingly, the duration of the low level can be detected and thus the embodiments of the present application can be implemented.
Fig. 6 is a flowchart illustrating a phase sequence detection method according to an embodiment of the present disclosure.
As shown in fig. 6, a method 600 according to this embodiment may include: at 601, waveforms of a first line voltage of a first phase relative to a second phase and a second line voltage of the second phase relative to a third phase of the three-phase AC power are each detected. Waveform detection may be implemented by hardware circuitry, such as the waveform detection circuitry described above. For example, the waveform of the line voltage may be converted into a pulse waveform of the same period, and phase sequence detection may be performed based on the duration of the pulse waveform.
Next, at 602, a phase sequence of the three-phase ac power or whether a phase loss fault occurs may be determined based on the duration of the detected waveform. Such a determination may be made by software or an algorithm as described above.
For example, if the first duration of the first line voltage and the second duration of the second line voltage are both greater than a first predetermined threshold and the difference between the first duration and the second duration is less than a second predetermined threshold, it is determined that a phase sequence determination phase is entered, otherwise it is determined that a phase loss fault has occurred. The phase sequence judging stage comprises the following steps: if the first duration occurs before the second duration, the phase sequence is determined to be forward, otherwise, the phase sequence is determined to be reverse.
Step 602 may further include detecting continuously for a predetermined detection period, identifying a plurality of first durations and a plurality of second durations, and treating a mean of the plurality of first durations and a mean of the plurality of second durations as the first duration and the second duration. If the first duration or the second duration is not detected within the predetermined detection period, it is determined that the open-phase fault occurs.
Step 602 may further include filtering the plurality of first durations and the plurality of second durations for durations less than a first filtering threshold and for durations less than a second filtering threshold at intervals.
According to embodiments of the present disclosure, a hardware circuit is used to sample line voltages, obtain their waveforms, and an algorithm or software is used to determine phase sequence or phase loss based on the obtained waveforms. The basic principle of the judgment is that the phase difference between the three phases of the three-phase alternating-current power is substantially fixed under normal conditions, and the amplitude of the three-phase alternating-current power is also substantially fixed. The phase and amplitude of the line voltages between adjacent two phases are thus also substantially constant, and consequently the high (or low) level duration of the two line voltages is also substantially fixed, and the time difference between the high (or low) level durations of the two line voltages is also substantially zero. If the amplitude of any one phase voltage decreases, the high (or low) level duration of the corresponding line voltage shortens. Thus, by detecting the high (or low) level duration of the two line voltages, it is possible to determine whether or not a phase loss fault occurs. Further, if the amplitude difference of any two-phase voltage becomes large, the difference in the high (or low) level duration of the two line voltages becomes large. Therefore, by detecting the difference in the high (or low) level durations of the two line voltages, the degree of balance of the three-phase alternating current power can be determined. The high (or low) level duration of the line voltage can be determined by sampling the line voltage according to the preset adoption time without always monitoring the line voltage, and the judgment is realized by software, so that the software can be simplified, and the resources occupied by the software can be reduced.
The embodiments of the present disclosure are described above. These examples are for illustrative purposes only and are not intended to limit the scope of the present disclosure. Although the embodiments are described above separately, this does not mean that the measures in the embodiments cannot be used advantageously in combination. The scope of the disclosure is defined by the appended claims and equivalents thereof. Various alternatives and modifications can be made by those skilled in the art without departing from the scope of the disclosure, and such alternatives and modifications are intended to fall within the scope of the disclosure.
Claims (12)
1. A phase sequence detection apparatus for use in a frequency converter for detecting a phase sequence of three-phase ac power from a power grid, the phase sequence detection apparatus comprising:
A waveform detection circuit configured to detect a first waveform of a first line voltage of a first phase of the three-phase alternating-current power with respect to a second phase and a second waveform of a second line voltage of the second phase with respect to a third phase; and
A signal processor for determining a first duration of the first waveform and a second duration of the second waveform and recording a sequence of occurrence of the first duration and the second duration as a sequence of phase sequences;
Determining that a phase loss fault occurs when the first duration or the second duration is less than a first predetermined threshold or the difference between the first duration and the second duration is greater than a second predetermined threshold;
The phase sequence is determined to be forward when the first duration occurs before the second duration.
2. The phase sequence detection apparatus according to claim 1, wherein the waveform detection circuit includes:
A waveform conversion circuit configured to convert each of the first waveform and the second waveform into a pulse waveform having the same period and phase as the waveform,
Wherein the signal processor is configured to make the determination based on the duration of the pulse waveform.
3. The phase sequence detection apparatus according to claim 2, wherein the waveform conversion circuit is configured to convert a portion of the waveform whose amplitude exceeds a predetermined threshold value into a pulse.
4. The phase sequence detection apparatus of claim 1, wherein the signal processor is configured to identify a plurality of the first durations and a plurality of the second durations within a predetermined detection period, and to take an average of a sum of the plurality of first durations as the first duration and an average of a sum of the plurality of second durations as the second duration.
5. The phase sequence detection apparatus of claim 4, wherein the signal processor determines that a phase-loss fault has occurred if the first duration or the second duration is not detected within a predetermined detection period.
6. The phase sequence detection apparatus of claim 4, wherein the signal processor is further configured to filter the plurality of first durations and the plurality of second durations for durations less than a first filtering threshold and for durations with duration intervals less than a second filtering threshold.
7. The phase sequence detection apparatus according to claim 1, wherein the waveform conversion circuit includes:
An optocoupler whose input-side photodiode receives a line voltage to be detected or a voltage proportional to the line voltage to be detected, whose output-side transistor is connected to output a low level at an output node when the input-side photodiode is turned on and to output a high level when the input-side photodiode is turned off;
The logic conversion circuit receives the output at the output node of the optocoupler, converts the high-level output into low level, and converts the low-level output into high level; and
And a filter circuit for filtering the output of the logic conversion circuit.
8. A phase sequence detection method for a frequency converter for detecting a phase sequence of three-phase ac power from a power grid, the method comprising:
Detecting a first waveform of a first line voltage of a first phase of the three-phase alternating current power with respect to a second phase and a second waveform of a second line voltage of the second phase with respect to a third phase; and
Determining a first duration of the first waveform and a second duration of the second waveform, and recording an order in which the first duration and the second duration occur as an order of phase sequences;
Determining that a phase loss fault occurs when the first duration or the second duration is less than a first predetermined threshold or the difference between the first duration and the second duration is greater than a second predetermined threshold;
The phase sequence is determined to be forward when the first duration occurs before the second duration.
9. The method of claim 8, wherein detecting the first waveform and the second waveform comprises:
converting each of the first waveform and the second waveform into a pulse waveform having the same period and phase as the waveform,
Wherein the step of determining a first duration of the first waveform and a second duration of the second waveform is performed based on the durations of the pulse waveforms.
10. The method of claim 8, wherein determining a first duration of the first waveform and a second duration of the second waveform comprises:
a plurality of the first durations and a plurality of the second durations are identified within a predetermined detection period, and an average of a sum of the plurality of first durations is taken as the first duration and an average of a sum of the plurality of second durations is taken as the second duration.
11. The method of claim 10, further comprising:
If the first duration or the second duration is not detected within a predetermined detection period, it is determined that an open-phase fault has occurred.
12. The method of claim 10, wherein determining a first duration of the first waveform and a second duration of the second waveform further comprises:
Filtering the plurality of first durations and the plurality of second durations, filtering out durations having durations less than a first filtering threshold and durations having duration intervals less than a second filtering threshold.
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