CN113380547B - A capacitor parallel structure applied to power electronic devices - Google Patents

Abstract

The invention provides a capacitor parallel structure applied to a power electronic device, comprising a capacitor core and a bus bar terminal pair; in each output loop, the circuit miscellaneous inductance of the capacitor part of the capacitor core L _cn =L _connector +L _internal ; Each busbar terminal pair includes a first busbar terminal and a second busbar terminal that are symmetrical to each other; the length of the first busbar terminal and the second busbar terminal from the fixed end fixed on the capacitor busbar to the free end is h; The radial width of the first busbar terminal and the second busbar terminal is w; the distance between the first busbar terminal and the second busbar terminal is d; the miscellaneous inductance value of each busbar terminal is calculated as

When the internal stray inductance L _internal of each capacitor core is different, by adjusting d, w, and h to be different, the stray inductances of different output loops are L _c1 =L _c2 =L _c3 . After the above technical solution is adopted, the heat dissipation of the capacitor core is uniformized and the miscellaneous inductance is balanced.

Description

A capacitor parallel structure applied to power electronic devices

technical field

The invention relates to the field of motor control, in particular to a capacitor parallel structure applied to a power electronic device.

Background technique

In electronic devices, the capacitors in them often generate a lot of heat due to high frequency use. This part of the heat will cause thermal damage to electronic devices due to long-term generation.

Not only that, but in addition to generating heat, it will also generate uneven heat. Taking the film capacitor as an example, the multi-core parallel scheme is often used to achieve a larger capacitance value. Due to the asymmetry in the structure, the path impedance of each parallel core will be different, which will affect the current distribution inside the capacitor, which will ultimately affect each capacitor. There is a risk of thermal unevenness and thermal damage due to the heating of the core.

Therefore, there is a need for a novel capacitor parallel structure, which can evenly heat the capacitor cores, helps avoid derating of capacitors caused by heat, and reduces the risk of thermal damage.

SUMMARY OF THE INVENTION

In order to overcome the above technical defects, the purpose of the present invention is to provide a capacitor parallel structure applied to a power electronic device, which can uniformize the heat dissipation of the capacitor core and balance the miscellaneous inductance.

The invention discloses a capacitor parallel structure applied to a power electronic device, comprising at least two capacitor cores arranged on a capacitor busbar, each capacitor core is connected between switch components to form an output loop,

The capacitor busbar is provided with a pair of busbar terminals electrically connected with each capacitor core, and there are electrical connection lines between the capacitor core and the pair of busbar terminals, so that a capacitor busbar and a busbar terminal pair are formed in pairs;

The loop inductance of the capacitor part of each capacitor core L _cn =L _connector +L _internal ;

Each busbar terminal pair includes a first busbar terminal and a second busbar terminal that are symmetrical to each other;

The length of the first busbar terminal and the second busbar terminal from the fixed end fixed on the capacitor busbar to the free end is h;

The width of the first busbar terminal and the second busbar terminal along the radial direction is w;

The distance between the first busbar terminal and the second busbar terminal is d;

当每一电容芯子的内部杂感L_internal不同时，通过配置d、w、h不同，使得不同输出回路的杂感L_c1＝L_c2＝L_c3。The miscellaneous inductance value of each busbar terminal is calculated as:

When the internal stray inductance L _internal of each capacitor core is different, the stray inductances of different output loops are made L _c1 =L _c2 =L _c3 by configuring d, w, and h to be different.

Preferably, the capacitance value of the capacitor core farther from the bus bar terminal pair is larger, so that the capacitance value of each capacitor core is the same as the product of the total circuit stray inductance of the capacitor.

Preferably, the stray inductance of the pair of busbar terminals located in the middle of the capacitor busbar is smaller than the stray inductance of the pair of busbar terminals located at the far end of the capacitor busbar.

Preferably, the first busbar terminal and the second busbar terminal include a fixed end connected to the capacitor busbar and an extension end extending away from the capacitor busbar;

The width of the fixed end is greater than h, and the width of the extension end is equal to h.

Preferably, the length of the fixed end accounts for the length of the first busbar terminal and the length of the second busbar terminal

Preferably, the first busbar terminal and the second busbar terminal include a fixed end connected to the capacitor busbar and an extension end extending away from the capacitor busbar;

The width of the fixed end is less than h, and the width of the extension end is equal to h.

Preferably, the projections of the fixed end and the extension end on the capacitor busbar overlap each other or partially overlap.

Preferably, the radial width of the first bus bar terminal is w ₁ , the radial width of the second bus bar terminal is w ₂ , and w ₁ ≠w ₂ .

After adopting the above-mentioned technical scheme, compared with the prior art, it has the following beneficial effects:

1. The current flowing through the capacitor cores on the capacitor busbar is equalized, and the heat generation is balanced;

2. Extend the service life of power electronic devices.

Description of drawings

FIG. 1 is a schematic structural diagram of a capacitor parallel structure in accordance with a preferred embodiment of the present invention.

Reference number:

100-capacitor busbar, 110-first busbar terminal, 120-second busbar terminal.

Detailed ways

The advantages of the present invention are further described below with reference to the accompanying drawings and specific embodiments.

Exemplary embodiments will be described in detail herein, examples of which are illustrated in the accompanying drawings. Where the following description refers to the drawings, the same numerals in different drawings refer to the same or similar elements unless otherwise indicated. The implementations described in the illustrative examples below are not intended to represent all implementations consistent with this disclosure. Rather, they are merely examples of apparatus and methods consistent with some aspects of the present disclosure as recited in the appended claims.

The terminology used in the present disclosure is for the purpose of describing particular embodiments only and is not intended to limit the present disclosure. As used in this disclosure and the appended claims, the singular forms "a," "the," and "the" are intended to include the plural forms as well, unless the context clearly dictates otherwise. It will also be understood that the term "and/or" as used herein refers to and includes any and all possible combinations of one or more of the associated listed items.

It should be understood that although the terms first, second, third, etc. may be used in this disclosure to describe various pieces of information, such information should not be limited by these terms. These terms are only used to distinguish the same type of information from each other. For example, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information, without departing from the scope of the present disclosure. Depending on the context, the word "if" as used herein can be interpreted as "at the time of" or "when" or "in response to determining."

In the description of the present invention, it should be understood that the terms "portrait", "horizontal", "upper", "lower", "front", "rear", "left", "right", "vertical", The orientation or positional relationship indicated by "horizontal", "top", "bottom", "inside", "outside", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present invention and description, rather than indicating Or imply that the device or element referred to must have a particular orientation, be constructed and operate in a particular orientation, and therefore should not be construed as limiting the invention.

In the description of the present invention, unless otherwise specified and limited, it should be noted that the terms "installed", "connected" and "connected" should be understood in a broad sense, for example, it may be a mechanical connection or an electrical connection, or two The internal communication between the elements may be directly connected or indirectly connected through an intermediate medium, and those of ordinary skill in the art can understand the specific meanings of the above terms according to specific situations.

In the following description, suffixes such as 'module', 'component' or 'unit' used to represent elements are used only to facilitate the description of the present invention, and have no specific meaning per se. Therefore, "module" and "component" can be used interchangeably.

Referring to FIG. 1, which is a schematic structural diagram of a capacitor parallel structure in accordance with a preferred embodiment of the present invention, in this embodiment, at least two capacitor cores are provided on the capacitor bus bar 100, and each capacitor core is connected between switch components , form an output loop, can cut off DC, connect AC, prevent low frequency characteristics, widely used in coupling, DC blocking, bypass, filtering, tuning, energy conversion and automatic control. The capacitor busbar 100 is provided with a pair of busbar terminals that are electrically connected to the capacitor cores. The busbar terminal pair extends out of the capacitor busbar 100 and can be electrically connected to external electronic devices, that is, the busbar terminal pair is used to connect the capacitor core. the medium between the child and the external electronics. The capacitor core and the pair of busbar terminals are connected by electrical connecting wires, so that external current flows into the capacitor core from one end of the pair of busbar terminals and flows out from the other end. That is, a capacitor core and a busbar terminal pair with two terminals are formed in pairs. When a plurality of capacitor cores on the same capacitor busbar 100 are energized, different currents will flow due to different stray inductances, thereby generating different amounts of heat. Therefore, in order to balance the miscellaneous inductance and the heat generation of each capacitor core, the pair of busbar terminals on the capacitor busbar 100 is customized and configured.

当每一电容芯子的内部杂感L_internal不同时，可通过对d、w、h的调节，直至不同输出回路的杂感L_c1＝L_c2＝L_c3。也就是说，该实施例中，通过调节第一母排端子110和第二母排端子120的杂感，在另一方面保证了热平衡。Specifically, the loop stray inductance of the capacitive part of each capacitive core is defined as: L _cn =L _connector +L _internal . L _cn is the total loop stray inductance of the capacitor core, L _connector is the stray inductance of the capacitor terminals, and L _internal is the internal stray inductance of the capacitor. And the stray inductance of the capacitor terminal occupies about 70% of the total loop stray inductance of the capacitor. Each busbar terminal pair includes a first busbar terminal 110 and a second busbar terminal 120 symmetrical to each other, which are used for current input and output, respectively. Further, the first busbar terminal 110 and the second busbar terminal 120 are defined as, the length of the first busbar terminal 110 and the second busbar terminal 120 from the fixed end fixed on the capacitor busbar 100 to the free end is h; The width of the first busbar terminal 110 and the second busbar terminal 120 in the radial direction is w; the distance between the first busbar terminal 110 and the second busbar terminal 120 is d. Furthermore, in order to equalize the current and heat, the stray inductance value of each busbar terminal will be defined as (or approximately calculated as)

When the internal stray inductance L _internal of each capacitor core is different, d, w, and h can be adjusted until the stray inductance of different output loops L _c1 =L _c2 =L _c3 . That is to say, in this embodiment, by adjusting the miscellaneous inductance of the first bus bar terminal 110 and the second bus bar terminal 120 , thermal balance is ensured on the other hand.

In addition, considering that the accommodation of the capacitor core is related to the distance from the busbar terminal pair, when the electrical connection line between the capacitor core and the busbar terminal pair is longer, the capacitance value of the capacitor core will be larger, so The achievement of the capacitance value of each capacitor core is the same as that of the total circuit inductance of the capacitor. That is to say, if the stray inductance of the capacitor core n is L _cn , and the capacity of the capacitor core is C _n , then for each capacitor core, after the product is the same, the current flowing through each capacitor core will be The same, the fever is also the same. In other words, in this embodiment, by configuring the capacitance values of the capacitor cores, the above products are made the same. If there are three capacitor cores, the balance formula that needs to be satisfied is: L _c1 *C ₁ =L _c2 * C ₂ =L _c3 *C ₃ . That is to say, in this embodiment, the heat generation can also be balanced according to the accommodating configuration of the capacitor core.

In a preferred embodiment, the miscellaneous inductance of the busbar terminal pair located in the middle of the capacitor busbar 100 is smaller than the miscellaneous inductance of the busbar terminal pair located at the far end of the capacitor busbar 100 . That is, the closer the capacitor core is to the middle of the capacitor bus bar 100, the smaller the internal clutter.

In another preferred embodiment, the first bus bar terminal 110 and the second bus bar terminal 120 include a fixed end connected to the capacitor bus bar 100 and an extended end extended away from the capacitor bus bar 100, the width of the fixed end is greater than h, and the width of the extended end is greater than h. The width is equal to h, that is to say, the fixed ends of the first busbar terminal 110 and the second busbar terminal 120 are used to prevent overcurrent, and the main influence of the miscellaneous inductance of the first busbar terminal 110 and the second busbar terminal 120 is the extension end width. Preferably, the length of the fixed end accounts for the length of the first busbar terminal 110 and the length of the second busbar terminal 120

In another preferred embodiment, the first busbar terminal 110 and the second busbar terminal 120 include a fixed end connected to the capacitor busbar 100 and an extension end extending away from the capacitor busbar 100; the width of the fixed end is less than h, and the width of the extension end is The width is equal to h (not shown). Similarly, the overall width h can be fine-tuned by adjusting the average width of the first bus bar terminal 110 and the second bus bar terminal 120 .

In the embodiment where the width of the fixed end is smaller than h, the projections of the fixed end and the extension end on the capacitor bus bar 100 overlap each other or partially overlap. The miscellaneous feeling of the first bus bar terminal 110 and the second bus bar terminal 120 can be adjusted more finely by configuring different positions in the width.

In yet another optional embodiment, the radial width of the first bus bar terminal 110 is w ₁ , the radial width of the second bus bar terminal 120 is w ₂ , and w ₁ ≠w ₂ . In the case that a certain busbar terminal cannot be adjusted, the miscellaneous inductance of the first busbar terminal 110 and the second busbar terminal 120 can be adjusted by only adjusting the width of the other busbar terminal.

With the capacitor parallel structure in any of the above embodiments, when testing in the experimental environment, multiple temperature sensors can be embedded in the capacitor busbar, and the temperature of each position of the capacitor core under different working hours can be obtained, as shown in the following table. Show:

It can be seen from the table that the temperature of the capacitor cores at different positions is similar to achieve the temperature balance of the capacitor busbar.

It should be noted that the embodiments of the present invention have better practicability, and do not limit the present invention in any form, and any person skilled in the art may use the technical contents disclosed above to change or modify into equivalent effective embodiments However, any modifications or equivalent changes and modifications made to the above embodiments according to the technical essence of the present invention without departing from the content of the technical solution of the present invention still fall within the scope of the technical solution of the present invention.

Claims (4)

1. A capacitor parallel structure applied to a power electronic device comprises at least two capacitor cores arranged on a capacitor bus bar, wherein each capacitor core is connected between switch components to form an output loop,

the capacitor bus bar is provided with a bus bar terminal pair electrically connected with each capacitor core, and an electric connecting line is arranged between each capacitor core and the corresponding bus bar terminal pair, so that a capacitor bus bar and a bus bar terminal pair are formed in pairs;

the capacitance value of the capacitor core which is farther away from the busbar terminal pair is larger, so that the product of the capacitance value of each capacitor core and the stray inductance of the total capacitor loop is the same;

loop inductance L of capacitor part of each capacitor core_cn＝L_connector+L_internal；

Each busbar terminal pair comprises a first busbar terminal and a second busbar terminal which are symmetrical to each other;

the length from a fixed end fixed on the capacitor busbar to a free end of the first busbar terminal and the second busbar terminal is h;

the first busbar terminal and the second busbar terminal are w in width along the radial direction;

the distance between the first busbar terminal and the second busbar terminal is d;

the stray inductance value of each busbar terminal is calculated as:

when the internal noise L of each capacitor core_internalWhen the difference is different, the configuration d, w and h are different, so that the mixed feeling L of different output circuits_c1＝L_c2＝L_c3；

The first busbar terminal and the second busbar terminal comprise fixed ends connected with the capacitor busbar and extension ends extending away from the capacitor busbar;

the width of the fixed end is smaller than h, and the width of the extending end is equal to h;

the first busbar terminal has a width w along the radial direction₁The second bus bar terminal has a width w along the radial direction₂And w is₁≠w₂。

2. The capacitor parallel structure of claim 1,

the impurity inductance of the busbar terminal pair positioned in the middle of the capacitor busbar is less than that of the busbar terminal pair positioned at the far end of the capacitor busbar.

3. The capacitor parallel structure of claim 1,

the length of the fixed end accounts for the length of the first busbar terminal and the second busbar terminal

4. The capacitor parallel structure of claim 1,

the projections of the fixed end and the extending end on the capacitor busbar are mutually overlapped or partially overlapped.

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