CN113299722A - Display panel - Google Patents
Display panel Download PDFInfo
- Publication number
- CN113299722A CN113299722A CN202110601063.2A CN202110601063A CN113299722A CN 113299722 A CN113299722 A CN 113299722A CN 202110601063 A CN202110601063 A CN 202110601063A CN 113299722 A CN113299722 A CN 113299722A
- Authority
- CN
- China
- Prior art keywords
- sub
- circuit
- light
- pixel
- pixel area
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000002093 peripheral effect Effects 0.000 claims abstract description 17
- 239000000463 material Substances 0.000 claims description 17
- 230000005525 hole transport Effects 0.000 claims description 8
- 230000005540 biological transmission Effects 0.000 claims description 5
- 239000010410 layer Substances 0.000 description 48
- 238000010586 diagram Methods 0.000 description 10
- 239000010409 thin film Substances 0.000 description 4
- OFIYHXOOOISSDN-UHFFFAOYSA-N tellanylidenegallium Chemical compound [Te]=[Ga] OFIYHXOOOISSDN-UHFFFAOYSA-N 0.000 description 3
- 238000002834 transmittance Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 206010049155 Visual brightness Diseases 0.000 description 1
- 230000002238 attenuated effect Effects 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000012780 transparent material Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/30—Devices specially adapted for multicolour light emission
- H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
- H10K59/353—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Geometry (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
The disclosure provides a display panel, and belongs to the technical field of display. The display panel comprises a driving back plate, a driving back plate and a driving back plate, wherein the driving back plate comprises a pixel area and a peripheral area arranged on the periphery of the pixel area, and the pixel area comprises a first sub-pixel area and a second sub-pixel area; the light-emitting layer is arranged on one side of the driving backboard, covers the first sub-pixel area and the second sub-pixel area, comprises a first light-emitting unit and a second light-emitting unit, the first light-emitting unit is located in the first sub-pixel area, the second light-emitting unit is located in the second sub-pixel area, the first light-emitting unit comprises a light-emitting device, the second light-emitting unit comprises a plurality of light-emitting devices which are connected in series and are stacked towards the direction of the back-ion driving backboard, and the density of the first light-emitting unit in the first sub-pixel area is greater than that of the second light-emitting unit in the second sub-pixel area. The display panel can keep the consistency of the display brightness of the first sub-pixel area and the second sub-pixel area, thereby avoiding the reduction of the service life of the second sub-pixel area due to the current increase.
Description
Technical Field
The present disclosure relates to the field of display technologies, and in particular, to a display panel.
Background
A display panel has a requirement of local transparency, and the local transparency region may adopt special designs to improve the transmittance of the region, such as local transparency material, low PPI (pixel density) design, and circuit evasion design, but the special designs may bring differences between local display effect and panel lifetime.
The above information disclosed in the background section is only for enhancement of understanding of the background of the present disclosure and therefore it may contain information that does not constitute prior art that is known to a person of ordinary skill in the art.
Disclosure of Invention
The present disclosure provides a display panel, which can maintain the uniformity of the display brightness of a first sub-pixel region and a second sub-pixel region, thereby preventing the lifetime of the second sub-pixel region from being reduced due to current boosting.
In order to achieve the purpose, the technical scheme adopted by the disclosure is as follows:
according to a first aspect of the present disclosure, there is provided a display panel, comprising:
the driving back plate comprises a pixel area and a peripheral area arranged on the periphery of the pixel area, wherein the pixel area comprises a first sub-pixel area and a second sub-pixel area;
the light-emitting layer is arranged on one side of the driving backboard, covers the first sub-pixel area and the second sub-pixel area, comprises a first light-emitting unit and a second light-emitting unit, is positioned in the first sub-pixel area, is positioned in the second sub-pixel area, comprises a light-emitting device, and comprises a plurality of serially-connected light-emitting devices which are arranged in a stacked mode in the direction back to the driving backboard, and the density of the first light-emitting unit in the first sub-pixel area is greater than that of the second light-emitting unit in the second sub-pixel area.
In an exemplary embodiment of the present disclosure, the light emitting device includes:
the hole transmission layer is arranged on one side of the driving back plate;
the light-emitting material layer is arranged on one side, away from the driving backboard, of the hole transport layer and covers the hole transport layer;
the electronic transmission layer is arranged on one side, far away from the driving back plate, of the light-emitting material layer, and covers the light-emitting material layer.
In an exemplary embodiment of the present disclosure, the second light emitting unit further includes:
and the charge generation layer is electrically connected between two adjacent light-emitting devices.
In an exemplary embodiment of the present disclosure, the first sub-pixel region is provided with a first pixel circuit, and the second sub-pixel region is provided with a second pixel circuit;
the display panel further includes:
the first driving circuit is connected with the first pixel circuit and used for driving the first light-emitting unit to emit light;
and the second driving circuit is connected with the second pixel circuit and is used for driving the second light-emitting unit to emit light.
In an exemplary embodiment of the present disclosure, the first driving circuit includes:
a first gate driving circuit connected to the first pixel circuit, the first gate driving circuit being configured to input a scan signal to the first pixel circuit;
a first source driver circuit connected to the first pixel circuit, the first source driver circuit configured to input a data signal to the first pixel circuit;
the first time schedule controller is connected with the first grid driving circuit and the first source driving circuit;
a first power supply circuit for supplying power signals to the first gate driving circuit, the first source driving circuit and the first timing controller, the first power supply circuit including a first power supply line for supplying a first power signal and a second power supply line for supplying a second power signal;
the second drive circuit comprises a first drive circuit and a second drive circuit,
a second gate driving circuit connected to the second pixel circuit, the second gate driving circuit being configured to input a scan signal to the second pixel circuit;
a second source driver circuit connected to the second pixel circuit, the second source driver circuit configured to input a data signal to the second pixel circuit;
the second time schedule controller is connected with the second grid driving circuit and the second source driving circuit;
and the second power supply circuit is used for providing power supply signals for the second grid driving circuit, the second source driving circuit and the second time schedule controller, and comprises a third power supply line and a fourth power supply line, wherein the third power supply line is used for providing the first power supply signal, and the fourth power supply line is used for providing the second power supply signal.
In an exemplary embodiment of the present disclosure, the fourth power line includes a first sub-segment and a second sub-segment, the first sub-segment is located in the peripheral regions at two sides of the second sub-pixel region, the second sub-segment passes through the second sub-pixel region and is connected between the first sub-segments, the number of the second sub-segments is multiple, and a single second sub-segment is thinner than the first sub-segment.
In an exemplary embodiment of the present disclosure, the display panel further includes:
the first circuit board is positioned on one side, far away from the second sub-pixel area, of the first sub-pixel area;
the second circuit board is positioned on one side, far away from the first sub-pixel area, of the second sub-pixel area;
the first source electrode driving circuit and the first time sequence controller are positioned on the first circuit board;
the second source electrode driving circuit and the second time schedule controller are positioned on the second circuit board;
the first gate driving circuit and the second gate driving circuit are located in a peripheral region of the driving back plate.
In an exemplary embodiment of the present disclosure, the display panel further includes:
the first circuit board is positioned on one side, far away from the second sub-pixel area, of the first sub-pixel area;
the second circuit board is positioned on one side, far away from the first sub-pixel area, of the second sub-pixel area;
the third circuit board is positioned on the same side of the first sub-pixel area and the second sub-pixel area;
the first source electrode driving circuit and the first time sequence controller are positioned on the first circuit board;
the second source electrode driving circuit and the second time schedule controller are positioned on the second circuit board;
the first gate driving circuit and the second gate driving circuit are located on the third circuit board.
In an exemplary embodiment of the present disclosure, the display panel further includes:
and the connecting circuit board is connected between the first circuit board and the second circuit board and used for an external control system to control the first driving circuit and the second driving circuit through the connecting circuit board so as to control the first light-emitting unit and the second light-emitting unit to emit light.
In an exemplary embodiment of the present disclosure, the display panel further includes:
the circuit board is positioned at one end of the driving back plate, and the first source electrode driving circuit, the first time sequence controller, the second source electrode driving circuit and the second time sequence controller are all positioned on the circuit board.
The display panel provided by the present disclosure includes a driving backplane and a light emitting layer. The driving back plate comprises a pixel area and a peripheral area, wherein the pixel area comprises a first sub-pixel area and a second sub-pixel area. The light-emitting layer comprises a first light-emitting unit and a second light-emitting unit, the first light-emitting unit is located in the first sub-pixel area, and the second light-emitting unit is located in the second sub-pixel area. The first light-emitting unit comprises a light-emitting device, and the second light-emitting unit comprises a plurality of serially-connected light emitters which are arranged in a stacked mode in the direction departing from the driving backboard. In the present disclosure, the number of the light emitting devices of the second light emitting unit is greater than the number of the light emitting devices of the first light emitting unit, and therefore, the luminance of the second light emitting unit is greater than the luminance of the first light emitting unit, and the design can maintain the uniformity of the display luminance of the first sub-pixel area and the second sub-pixel area to a certain extent without increasing the current of the second sub-pixel area, thereby avoiding the reduction of the lifetime of the second sub-pixel area due to the increase of the current.
Drawings
The above and other features and advantages of the present disclosure will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings.
FIG. 1 is a cross-sectional view in the thickness direction of a pixel region of a display panel in an exemplary embodiment of the present disclosure;
FIG. 2 is a schematic diagram of a display panel structure in an exemplary embodiment of the disclosure;
FIG. 3 is a schematic diagram of a display panel structure in another exemplary embodiment of the present disclosure;
FIG. 4 is a schematic diagram of a display panel structure in yet another exemplary embodiment of the present disclosure;
fig. 5 is a schematic structural diagram of the first circuit board and the second circuit board after being bent in the exemplary embodiment of the disclosure;
FIG. 6 is a schematic diagram of the first and second power supply circuits in an exemplary embodiment of the disclosure;
FIG. 7 is a schematic diagram of the first and second power supply circuits in another exemplary embodiment of the present disclosure;
FIG. 8 is a schematic diagram of a display panel structure in yet another exemplary embodiment of the present disclosure;
FIG. 9 is a schematic diagram of a display panel structure in yet another exemplary embodiment of the present disclosure;
FIG. 10 is a schematic diagram of the first and second power supply circuits in yet another exemplary embodiment of the present disclosure;
fig. 11 is a schematic diagram of the first power supply circuit and the second power supply circuit in a further exemplary embodiment of the present disclosure.
The reference numerals of the main elements in the figures are explained as follows:
1-driving the back plate; 11-pixel region; 11 a-a first sub-pixel region; 11 b-a second sub-pixel region; 12-a peripheral region; 2-a light-emitting layer; 21-a first light emitting unit; 22-a second light emitting unit; 221-a charge generation layer; 23-a light emitting device; 230-a first electrode; 231-hole transport layer; 232-a layer of light-emitting material; 233-electron transport layer; 234-a second electrode; 3-a first pixel circuit; 31-a first scan line; 32-a first data line; 41-a first gate drive circuit; 42-a first source driver circuit; 43-a first timing controller; 45-a first power supply circuit; 51-a first power line; 52-a second power supply line; 6-a second pixel circuit; 61-a second scan line; 62-a second data line; 71-a second gate drive circuit; 72-a second source drive circuit; 73-a second timing controller; 78-a second power supply circuit; 81-a third power line; 82-a fourth power line; 821-a first subsection; 822-a second sub-segment; 9-a first circuit board; 91-a first sub-circuit board; 92-a second sub-circuit board; 10-a second circuit board; 101-a third sub-circuit board; 102-a fourth sub-circuit board; 11-connecting a circuit board; 13-a third circuit board; 14-a circuit board; 15-a first control circuit; 16-second control circuit.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the disclosure.
In the drawings, the thickness of regions and layers may be exaggerated for clarity. The same reference numerals denote the same or similar structures in the drawings, and thus detailed descriptions thereof will be omitted.
The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the disclosure. One skilled in the relevant art will recognize, however, that the embodiments of the disclosure can be practiced without one or more of the specific details, or with other methods, components, materials, and so forth. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring the primary technical ideas of the disclosure.
When a structure is "on" another structure, it may mean that the structure is integrally formed with the other structure, or that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure via another structure.
The terms "a," "an," "the," and the like are used to denote the presence of one or more elements/components/parts; the terms "comprising" and "having" are intended to be inclusive and mean that there may be additional elements/components/etc. other than the listed elements/components/etc. The terms "first" and "second", etc. are used merely as labels, and are not limiting on the number of their objects.
In the related art, under the market demand of the full-screen, the OLED (Organic Light-Emitting Diode) display panel needs to be partially processed by Light transmission, and the Light-sensitive elements such as a camera can be placed under the screen, so as to meet the design demand of the full-screen. Currently, a conventional OLED display panel is a single-sided light-emitting design, so special designs, such as a partially transparent material, a low PPI (pixel density Per inc) design, a circuit evasion design, and the like, need to be adopted for a partially transparent region. In the process of realizing local transparency, the local transparent area (which may be a rectangle, a circle, a semicircle or other various shapes) is found, and the display effect difference from the normal display area is large. Moreover, due to the special design of the local transparent area, the service life of the OLED device in the area is greatly different from that of a normal display area.
In the related art, the life time of a material in a partially transparent region light emitting device is decreased faster than that in a normal display region. This attenuation is not caused by the material properties, but is mainly caused by the fact that in the related art, in order to meet the requirement of transparency, the pixel design in the area is reduced, but in order to achieve uniform visual brightness of the whole display screen, the current in the area needs to be increased, so that the unit pixel brightness of the local transparent area is higher than that of the normal display area, and the higher current causes the material in the local transparent area to be attenuated too fast.
As shown in fig. 1 and fig. 2, the present disclosure provides a display panel including a driving backplane 1 and a light emitting layer 2. The driving backplane 1 includes a pixel region 11 and a peripheral region 12 disposed at the periphery of the pixel region 11, and the pixel region 11 includes a first sub-pixel region 11a and a second sub-pixel region 11 b. The light emitting layer 2 is arranged on one side of the driving backboard 1, the light emitting layer 2 covers the first sub-pixel area 11a and the second sub-pixel area 11b, the light emitting layer 2 comprises a first light emitting unit 21 and a second light emitting unit 22, the first light emitting unit 21 is located in the first sub-pixel area 11a, the second light emitting unit 22 is located in the second sub-pixel area 11b, the first light emitting unit 21 comprises a light emitting device 23, the second light emitting unit 22 comprises a plurality of serially connected light emitting devices 23 which are stacked in the direction away from the driving backboard 1, and the density of the first light emitting units 21 in the first sub-pixel area 11a is greater than that of the second light emitting units 22 in the second sub-pixel area 11 b.
The display panel provided by the present disclosure includes a driving backplane 1 and a light emitting layer 2. The driving backplane 1 includes a pixel region 11 and a peripheral region 12, and the pixel region 11 includes a first sub-pixel region 11a and a second sub-pixel region 11 b. The light emitting layer 2 includes a first light emitting unit 21 and a second light emitting unit 22, the first light emitting unit 21 being located in the first sub-pixel region 11a, and the second light emitting unit 22 being located in the second sub-pixel region 11 b. Wherein, the first light-emitting unit 21 comprises one light-emitting device 23, and the second light-emitting unit 22 comprises a plurality of light-emitting devices 23 which are stacked in series in a direction away from the driving back plate 1. In the present disclosure, the number of the light emitting devices 23 of the second light emitting unit 22 is greater than the number of the light emitting devices 23 of the first light emitting unit 21, and therefore, the luminance of the second light emitting unit 22 is greater than the luminance of the first light emitting unit 21, and the design can maintain the uniformity of the display luminance of the first sub-pixel region 11a and the second sub-pixel region 11b to a certain extent without increasing the current of the second sub-pixel region 11b, thereby preventing the lifetime of the second sub-pixel region 11b from being reduced due to the increase of the current.
Each component of the display panel provided in the embodiments of the present disclosure is described in detail below with reference to the drawings.
As shown in fig. 3, the present disclosure provides a display panel, which may be an OLED (Organic Light-Emitting Diode) display panel. The display panel comprises a driving backplane 1 and a light emitting layer 2. The driving backplane 1 includes a pixel region 11 and a peripheral region 12 disposed at the periphery of the pixel region 11. The pixel region 11 includes a first sub-pixel region 11a and a second sub-pixel region 11 b. The first sub-pixel area 11a is a normal display area for normally displaying an image. The second sub-pixel region 11b is a transparent display region, and a photosensitive element such as a camera can be placed below this region.
The light emitting layer 2 is arranged on one side of the driving backboard 1, the light emitting layer 2 covers the first sub-pixel area 11a and the second sub-pixel area 11b, the light emitting layer 2 comprises a first light emitting unit 21 and a second light emitting unit 22, the first light emitting unit 21 is located in the first sub-pixel area 11a, the second light emitting unit 22 is located in the second sub-pixel area 11b, the first light emitting unit 21 comprises a light emitting device 23, the second light emitting unit 22 comprises a plurality of serially connected light emitting devices 23 which are stacked in the direction away from the driving backboard 1, and the density of the first light emitting units 21 in the first sub-pixel area 11a is greater than that of the second light emitting units 22 in the second sub-pixel area 11 b. It should be noted that the density of the first light-emitting units 21 refers to a ratio of the number of the first light-emitting units 21 to the area of the first sub-pixel region 11a, and the density of the second light-emitting units 22 refers to a ratio of the number of the second light-emitting units 22 to the area of the second sub-pixel region 11 b.
In some embodiments, the light emitting device 23 comprises a hole transport layer 231, a light emitting material layer 232, and an electron transport layer 233, which are sequentially stacked in a direction away from the driving backplane 1. The hole transport layer 231 is disposed on one side of the driving backplate 1. The light emitting material layer 232 is disposed on a side of the hole transport layer 231 away from the driving backplane 1, and covers the hole transport layer 231. The electron transport layer 233 is disposed on a side of the light emitting material layer 232 away from the driving back plate 1, and the electron transport layer 233 covers the light emitting material layer 232.
In a specific embodiment, the second light emitting unit 22 further includes a charge generation layer 221 electrically connected between two adjacent light emitting devices 23 to realize series connection between the plurality of light emitting devices 23. The first light emitting unit 21 and the second light emitting unit 22 further include a first electrode 230 and a second electrode 234, the first electrode 230 being disposed at one side of the driving back plate 1; the first electrode 230 may serve as an anode of the light emitting device 23. The second electrode 234 is disposed on a side of the electron transport layer 233 away from the driving backplane 1, and the second electrode 234 can serve as a cathode of the light emitting device 23. The plurality of light emitting devices 23 of the second light emitting unit 22 are connected in series between the first electrode 230 and the second electrode 234.
As shown in fig. 2 to 4, 8 and 9, the first sub-pixel region 11a is provided with the first pixel circuits 3, the number of the first pixel circuits 3 is the same as the number of the light emitting devices 23 in the first sub-pixel region 11a, and the light emitting devices 23 are connected in a one-to-one correspondence to control the light emission of the light emitting devices 23, respectively. The first sub-pixel region 11a is further provided with a first scan line 31 and a first data line 32, the first scan line 31 extends in a row direction and is arranged in a column direction, and the first data line 32 extends in the column direction and is arranged in the row direction. It should be noted that the arrangement of the first scan line 31 and the first data line 32 is not limited to the drawings, and the specific arrangement may vary with the area of the first sub-pixel region 11 a.
The first pixel circuit 3 may include a plurality of thin film transistors and a storage capacitor. The thin film transistor may be a top gate thin film transistor, or a bottom gate thin film transistor, and taking the top gate thin film transistor as an example, the thin film transistor may include an active layer, a first gate insulating layer, a gate electrode, a second gate insulating layer, an interlayer dielectric layer, a source drain layer, a planarization layer, and the like, and the disclosure is not limited in particular. The thin film transistor includes a switching transistor and a driving transistor, the first scan line 31 is connected to a gate of the switching transistor and can control the switching transistor to write a data signal into the gate of the driving transistor according to a scan signal, and the driving transistor drives the corresponding first light emitting cell 21 to emit light according to the written data signal.
The display panel further includes a first driving circuit connected to the first pixel circuit 3 for driving the first light emitting unit 21 to emit light. The first driving circuit includes a first gate driving circuit 41, a first source driving circuit 42, and a first timing controller 43. The first gate driver circuit 41 is connected to the first pixel circuit 3 via the first scan line 31, and inputs a scan signal to the first pixel circuit 3. The first source driver circuit 42 is connected to the first pixel circuit 3 through the first data line 32, and inputs a data signal to the first pixel circuit 3. The first timing controller 43 is connected to the first gate driving circuit 41 and the first source driving circuit 42. The first timing controller 43 controls parameters such as a frame rate of the output signal, a time interval between two frames, and a charging period, so that the display panel corresponding to the first sub-pixel region 11a can display a corresponding picture.
As shown in fig. 6, 7, 10 and 11, the first driving circuit further includes a first power supply circuit 45 for supplying power supply signals to the first gate driving circuit 41, the first source driving circuit 42 and the first timing controller 43. The first power supply circuit 45 includes a first power supply line 51 and a second power supply line 52, the first power supply line 51 being for supplying a first power supply signal Vdd, and the second power supply line 52 being for supplying a second power supply signal Vss.
As shown in fig. 2 to 4, 8 and 9, the second sub-pixel region 11b is provided with the second pixel circuits 6, the number of the second pixel circuits 6 is the same as the number of the light emitting devices 23 in the second sub-pixel region 11b, and the light emitting devices 23 are connected in a one-to-one correspondence to control the light emission of the light emitting devices 23, respectively. The first sub-pixel region 11a is further provided with a second scan line 61 and a second data line 62, the second scan line 61 extends in the row direction and is arranged in the column direction, and the second data line 62 extends in the column direction and is arranged in the row direction. It should be noted that the arrangement of the second scan lines 61 and the second data lines 62 is not limited to the drawings, and the specific arrangement may vary with the area of the second sub-pixel region 11 b.
The second pixel circuit 6 may further include a plurality of transistors including a switching transistor and a driving transistor, and a storage capacitor, the second scan line 61 is connected to a gate of the switching transistor and can control the switching transistor to write a data signal into a gate of the driving transistor according to a scan signal, and the driving transistor drives the corresponding second light emitting unit 22 to emit light according to the written data signal.
The display panel further comprises a second driving circuit connected to the second pixel circuit 6 for driving the second light emitting unit 22 to emit light. The second driving circuit includes a second gate driving circuit 71, a second source driving circuit 72, and a second timing controller 73. The second gate driver circuit 71 is connected to the second pixel circuit 6 via the second scan line 61, and inputs a scan signal to the second pixel circuit 6. The second source driver circuit 72 is connected to the second pixel circuit 6 via the second data line 62, and inputs a data signal to the second pixel circuit 6. The second timing controller 73 is connected to the second gate driving circuit 71 and the second source driving circuit 72. The second timing controller 73 controls parameters such as a frame rate of the output signal, a time interval between two frames, and a charging period, so that the display panel corresponding to the second sub-pixel region 11b can display a corresponding picture.
As shown in fig. 6, 7, 10 and 11, the second driving circuit further includes a second power supply circuit 78 for supplying power supply signals to the second gate driving circuit 71, the second source driving circuit 72 and the second timing controller 73. The second power supply circuit 78 includes a third power supply line 81 for supplying the first power supply signal Vdd and a fourth power supply line 82 for supplying the second power supply signal Vss, the fourth power supply line 82 being at least partially located at the periphery of the second sub-pixel region 11 b. As shown in fig. 6 and 11, in a specific embodiment, the fourth power line 82 is partially located at the periphery of the second sub-pixel region 11b, that is, located at the peripheral region 12 corresponding to the second sub-pixel region 11b, the fourth power line 82 includes a first sub-segment 821 and a second sub-segment 822, where the number of the first sub-segment 821 is two, the first sub-segment 821 is respectively located at the peripheral regions 12 at two sides of the second sub-pixel region 11b, the second sub-segment 822 is connected between the two first sub-segments 821, the number of the second sub-segments 822 is multiple, and a single second sub-segment 822 is thinner than the third field to ensure the light transmittance of the second sub-pixel region 11 b. As shown in fig. 7 and 10, in another embodiment, the fourth power line 82 is completely located at the periphery of the second sub-pixel region 11b, i.e. is located at the peripheral region 12 corresponding to the second sub-pixel region 11b, so as to better ensure the light transmittance of the second sub-pixel region 11 b.
As shown in fig. 2 to 4, 8 and 9, in some embodiments of the present disclosure, the display panel further includes other circuits, such as a first control circuit 15 for outputting various control signals to the first driving circuit or the first pixel circuit 3, and a second control circuit 16 for outputting various control signals to the second driving circuit or the second pixel circuit 6. The first control circuit 15 and the second control circuit 16 may include an EL power management chip, a logic power management chip, a Gamma chip, level conversion, and the like.
In the present disclosure, the driving circuits and the like of the first sub-pixel region 11a and the second sub-pixel region 11b may share one circuit board, or different circuit boards may be used separately.
As shown in fig. 2 to 4, in an embodiment, the display panel further includes a first circuit board 9 and a second circuit board 10, the first circuit board 9 is located on a side of the first sub-pixel region 11a away from the second sub-pixel region 11b, and the second circuit board 10 is located on a side of the second sub-pixel region 11b away from the first sub-pixel region 11 a; the first circuit board 9 and the second circuit board 10 are bendable relative to the driving back plate 1. That is, the first circuit board 9 and the second circuit board 10 may be connected to the driving back plate 1 through a bending structure, and may be bent relative to the driving back plate 1. The first source driving circuit 42 and the first timing controller 43 are located on the first circuit board 9; the second source driving circuit 72 and the second timing controller 73 are located on the second circuit board 10. Further, a first control circuit 15 is located on the first circuit board 9, and a second control circuit 16 is located on the second circuit board 10. The first Circuit board 9 and the second Circuit board 10 may be a PCB (Printed Circuit board) or an FPC (Flexible Printed Circuit).
As shown in fig. 5, the display panel preferably further includes a connection circuit board 11 connected between the first circuit board 9 and the second circuit board 10 for enabling mutual communication between the first circuit board 9 and the second circuit board 10. Specifically, the first circuit board 9 and the second circuit board 10 may be bent to a surface of the driving backplane 1 away from the light-emitting layer 2, and the connection circuit board 11 is connected to the first circuit board 9 and the second circuit board 10 and located on a surface of the driving backplane 1 away from the light-emitting layer 2.
As shown in fig. 2 to 5, the first circuit board 9 and the second circuit board 10 can be bent for multiple times relative to the driving back plate 1, and are specifically set according to the installation requirements of the actual circuit boards. For example, the first circuit board 9 may include a first sub circuit board 91 and a second sub circuit board 92, the first sub circuit board 91 is connected to the first sub pixel region 11a in a bent manner, the second sub circuit board 92 may be bent with respect to the first sub circuit board 91, and the second sub circuit board 92 is used for connecting the connection circuit board 11 and further connecting with the second circuit board 10, so as to achieve mutual communication between the first circuit board 9 and the second circuit board 10. Correspondingly, the second circuit board 10 may include a third sub circuit board 101 and a fourth sub circuit board 102, the third sub circuit board 101 is connected to the second sub pixel region 11b in a bent manner, the fourth sub circuit board 102 is bent relative to the third sub circuit board 101, and the fourth sub circuit board 102 is used for connecting the connection circuit board 11. It should be noted that the arrangement positions of the first sub circuit board 91 and the second sub circuit board 92, and the arrangement positions of the third sub circuit board 101 and the fourth sub circuit board 102 are not limited in this disclosure. Specifically, as shown in fig. 2 and fig. 3, in a specific embodiment, the first sub circuit board 91 and the third sub circuit board 101 are located at two opposite ends of the driving backplane 1, the second sub circuit board 92 is connected to the first sub circuit board 91, the fourth sub circuit board 102 is connected to the third sub circuit board 101, and the second sub circuit board 92 and the fourth sub circuit board 102 are located at the same side of the driving backplane 1. As shown in fig. 4, in another embodiment, the first sub circuit board 91 and the third sub circuit board 101 are located at two opposite ends of the driving backplane 1, the second sub circuit board 92 is connected to the first sub circuit board 91, the fourth sub circuit board 102 is connected to the third sub circuit board 101, and the second sub circuit board 92 and the fourth sub circuit board 102 are located at different sides of the driving backplane 1.
In the disclosure, the display panel may be connected to an external control system within a non-display panel design, such as a control system of a display terminal, by a connection circuit board 11. The external control system controls the first and second driving circuits through the connection circuit board 11 to control the first and second light emitting units 21 and 22 to emit light. The first sub-pixel region 11a and the second sub-pixel region 11b respectively employ different driving systems. The main control terminal of the display panel may be a driving system of the first sub-pixel region 11a, may also be a driving system of the second sub-pixel region 11b, and may also be a control system in a non-display panel design, and the disclosure is not limited thereto.
In another particular embodiment, as shown in fig. 8 and 9, the display panel further includes a circuit board 14. The circuit board 14 is located at one end of the driving backplane 1, and the first source driving circuit 42, the first timing controller 43, the second source driving circuit 72 and the second timing controller 73 are all located on the circuit board. Further, a first control circuit 15 and a second control circuit 16 are also located on the circuit board.
In the present disclosure, the first gate driving circuit 41 and the second gate driving circuit 71 may be located in the peripheral region 12 of the driving backplane 1, or may be located in other external circuit boards.
As shown in fig. 2, 4 and 8, in a specific embodiment, the first gate driving circuit 41 and the second gate driving circuit 71 are located in the peripheral region 12 of the driving backplane 1. In another embodiment, as shown in fig. 3 and 9, the display panel further includes a third circuit board 13, and the third circuit board 13 is located on the same side of the first sub-pixel region 11a and the second sub-pixel region 11 b. The first gate driving circuit 41 and the second gate driving circuit 71 are located on the third circuit board 13.
It is to be understood that the disclosure is not limited in its application to the details of construction and the arrangements of the components set forth in the specification. The present disclosure is capable of other embodiments and of being practiced and carried out in various ways. The foregoing variations and modifications are within the scope of the present disclosure. It should be understood that the disclosure disclosed and defined in this specification extends to all alternative combinations of two or more of the individual features mentioned or evident from the text and/or drawings. All of these different combinations constitute various alternative aspects of the present disclosure. The embodiments of this specification illustrate the best mode known for carrying out the disclosure and will enable those skilled in the art to utilize the disclosure.
Claims (10)
1. A display panel, comprising:
the driving back plate comprises a pixel area and a peripheral area arranged on the periphery of the pixel area, wherein the pixel area comprises a first sub-pixel area and a second sub-pixel area;
the light-emitting layer is arranged on one side of the driving backboard, covers the first sub-pixel area and the second sub-pixel area, comprises a first light-emitting unit and a second light-emitting unit, is positioned in the first sub-pixel area, is positioned in the second sub-pixel area, comprises a light-emitting device, and comprises a plurality of serially-connected light-emitting devices which are arranged in a stacked mode in the direction back to the driving backboard, and the density of the first light-emitting unit in the first sub-pixel area is greater than that of the second light-emitting unit in the second sub-pixel area.
2. The display panel according to claim 1, wherein the light-emitting device comprises:
the hole transmission layer is arranged on one side of the driving back plate;
the light-emitting material layer is arranged on one side, away from the driving backboard, of the hole transport layer and covers the hole transport layer;
the electronic transmission layer is arranged on one side, far away from the driving back plate, of the light-emitting material layer, and covers the light-emitting material layer.
3. The display panel according to claim 2, wherein the second light-emitting unit further comprises:
and the charge generation layer is electrically connected between two adjacent light-emitting devices.
4. The display panel according to claim 1, wherein the first sub-pixel region is provided with a first pixel circuit, and the second sub-pixel region is provided with a second pixel circuit;
the display panel further includes:
the first driving circuit is connected with the first pixel circuit and used for driving the first light-emitting unit to emit light;
and the second driving circuit is connected with the second pixel circuit and is used for driving the second light-emitting unit to emit light.
5. The display panel according to claim 4, wherein the first driver circuit comprises:
a first gate driving circuit connected to the first pixel circuit, the first gate driving circuit being configured to input a scan signal to the first pixel circuit;
a first source driver circuit connected to the first pixel circuit, the first source driver circuit configured to input a data signal to the first pixel circuit;
the first time schedule controller is connected with the first grid driving circuit and the first source driving circuit;
a first power supply circuit for supplying power signals to the first gate driving circuit, the first source driving circuit and the first timing controller, the first power supply circuit including a first power supply line for supplying a first power signal and a second power supply line for supplying a second power signal;
the second drive circuit comprises a first drive circuit and a second drive circuit,
a second gate driving circuit connected to the second pixel circuit, the second gate driving circuit being configured to input a scan signal to the second pixel circuit;
a second source driver circuit connected to the second pixel circuit, the second source driver circuit configured to input a data signal to the second pixel circuit;
the second time schedule controller is connected with the second grid driving circuit and the second source driving circuit;
and the second power supply circuit is used for providing power supply signals for the second grid driving circuit, the second source driving circuit and the second time schedule controller, and comprises a third power supply line and a fourth power supply line, wherein the third power supply line is used for providing the first power supply signal, and the fourth power supply line is used for providing the second power supply signal.
6. The display panel according to claim 5, wherein the fourth power line includes a first sub-segment and a second sub-segment, the first sub-segment is located in the peripheral regions on both sides of the second sub-pixel region, the second sub-segment passes through the second sub-pixel region and is connected between the first sub-segments, the number of the second sub-segments is multiple, and a single second sub-segment is thinner than the first sub-segment.
7. The display panel according to claim 5, characterized in that the display panel further comprises:
the first circuit board is positioned on one side, far away from the second sub-pixel area, of the first sub-pixel area;
the second circuit board is positioned on one side, far away from the first sub-pixel area, of the second sub-pixel area;
the first source electrode driving circuit and the first time sequence controller are positioned on the first circuit board;
the second source electrode driving circuit and the second time schedule controller are positioned on the second circuit board;
the first gate driving circuit and the second gate driving circuit are located in a peripheral region of the driving back plate.
8. The display panel according to claim 5, characterized in that the display panel further comprises:
the first circuit board is positioned on one side, far away from the second sub-pixel area, of the first sub-pixel area;
the second circuit board is positioned on one side, far away from the first sub-pixel area, of the second sub-pixel area;
the third circuit board is positioned on the same side of the first sub-pixel area and the second sub-pixel area;
the first source electrode driving circuit and the first time sequence controller are positioned on the first circuit board;
the second source electrode driving circuit and the second time schedule controller are positioned on the second circuit board;
the first gate driving circuit and the second gate driving circuit are located on the third circuit board.
9. The display panel according to claim 7 or 8, characterized by further comprising:
and the connecting circuit board is connected between the first circuit board and the second circuit board and used for an external control system to control the first driving circuit and the second driving circuit through the connecting circuit board so as to control the first light-emitting unit and the second light-emitting unit to emit light.
10. The display panel according to claim 5, characterized in that the display panel further comprises:
the circuit board is positioned at one end of the driving back plate, and the first source electrode driving circuit, the first time sequence controller, the second source electrode driving circuit and the second time sequence controller are all positioned on the circuit board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110601063.2A CN113299722B (en) | 2021-05-31 | 2021-05-31 | Display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110601063.2A CN113299722B (en) | 2021-05-31 | 2021-05-31 | Display panel |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113299722A true CN113299722A (en) | 2021-08-24 |
| CN113299722B CN113299722B (en) | 2024-08-16 |
Family
ID=77326361
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110601063.2A Active CN113299722B (en) | 2021-05-31 | 2021-05-31 | Display panel |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113299722B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024000875A1 (en) * | 2022-06-29 | 2024-01-04 | 武汉天马微电子有限公司 | Display panel and display device |
Citations (41)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030067434A1 (en) * | 2001-10-03 | 2003-04-10 | Nec Corporation | Display device and semiconductor device |
| CN1964062A (en) * | 2005-11-09 | 2007-05-16 | 三星Sdi株式会社 | Flat panel display device |
| US20080265785A1 (en) * | 2007-04-27 | 2008-10-30 | Seungtae Kim | Organic light emitting device |
| CN101983397A (en) * | 2008-03-31 | 2011-03-02 | 富士电机控股株式会社 | Planar light emission type display device |
| CN103069477A (en) * | 2011-08-09 | 2013-04-24 | 松下电器产业株式会社 | Image display device |
| CN103268746A (en) * | 2012-12-07 | 2013-08-28 | 上海天马微电子有限公司 | Pixel driving circuit, light emitting diode display screen and display device |
| US20140034910A1 (en) * | 2012-08-06 | 2014-02-06 | Shenzhen China Star Optoelectronics Technology Co. Ltd. | Organic display device and manufacturing method thereof |
| CN103681762A (en) * | 2012-09-14 | 2014-03-26 | 环球展览公司 | Lifetime OLED display |
| US20140211116A1 (en) * | 2012-11-27 | 2014-07-31 | Shenzhen China Star Optoelectronics Technology Co. Ltd. | Method for saving by-pass capacitor by using circuit board |
| CN107133613A (en) * | 2017-06-06 | 2017-09-05 | 上海天马微电子有限公司 | Display panel and display device |
| CN108133689A (en) * | 2016-12-01 | 2018-06-08 | 三星显示有限公司 | Oganic light-emitting display device |
| CN108389555A (en) * | 2018-02-06 | 2018-08-10 | 昆山龙腾光电有限公司 | Driving circuit and display device |
| CN108389550A (en) * | 2018-01-31 | 2018-08-10 | 上海天马有机发光显示技术有限公司 | The driving method and organic light-emitting display device of display screen |
| CN109950284A (en) * | 2019-03-27 | 2019-06-28 | 京东方科技集团股份有限公司 | A kind of display panel and display device |
| KR20190078780A (en) * | 2017-12-27 | 2019-07-05 | 엘지디스플레이 주식회사 | Organic light emitting display device and method for driving the organic light emitting display device |
| CN110190103A (en) * | 2019-05-31 | 2019-08-30 | 武汉天马微电子有限公司 | Display panel and display device |
| CN110264966A (en) * | 2019-05-09 | 2019-09-20 | 京东方科技集团股份有限公司 | Display base plate and its driving method, display device |
| CN110289296A (en) * | 2019-06-28 | 2019-09-27 | 武汉天马微电子有限公司 | Display panel and display device |
| CN110379356A (en) * | 2019-08-29 | 2019-10-25 | 武汉天马微电子有限公司 | Display panel and display device |
| CN110767717A (en) * | 2019-04-30 | 2020-02-07 | 昆山国显光电有限公司 | Array substrate, display panel and display device |
| CN110767662A (en) * | 2019-05-31 | 2020-02-07 | 昆山国显光电有限公司 | Display substrate, display panel and display device |
| CN110767715A (en) * | 2019-03-29 | 2020-02-07 | 昆山国显光电有限公司 | Display device, OLED light-transmitting substrate and OLED substrate thereof |
| CN110853565A (en) * | 2019-11-29 | 2020-02-28 | 昆山国显光电有限公司 | Preparation method of display substrate, display panel and display device |
| CN110911468A (en) * | 2019-12-11 | 2020-03-24 | 京东方科技集团股份有限公司 | Substrate for display and electroluminescent display device |
| CN110930941A (en) * | 2019-11-11 | 2020-03-27 | 武汉天马微电子有限公司 | Display module and display device |
| CN110956911A (en) * | 2018-09-27 | 2020-04-03 | 合肥鑫晟光电科技有限公司 | Array substrate, detection method thereof and display panel |
| CN111028757A (en) * | 2019-12-25 | 2020-04-17 | 武汉天马微电子有限公司 | Display device and driving method thereof |
| CN111108544A (en) * | 2017-07-31 | 2020-05-05 | 乐金显示有限公司 | Organic light emitting display device |
| CN111128080A (en) * | 2020-03-30 | 2020-05-08 | 京东方科技集团股份有限公司 | Display substrate and display device |
| CN111326560A (en) * | 2020-01-23 | 2020-06-23 | 京东方科技集团股份有限公司 | Display substrate and display device |
| CN111627341A (en) * | 2020-06-30 | 2020-09-04 | 武汉天马微电子有限公司 | Display panel and display device |
| WO2020232628A1 (en) * | 2019-05-21 | 2020-11-26 | 深圳市柔宇科技有限公司 | Display apparatus, terminal and photographing method |
| US20200381502A1 (en) * | 2019-05-27 | 2020-12-03 | Samsung Display Co., Ltd. | Display device |
| CN112071209A (en) * | 2020-09-16 | 2020-12-11 | 云谷（固安）科技有限公司 | Display panel and display device |
| CN112102772A (en) * | 2019-06-17 | 2020-12-18 | 三星电子株式会社 | Display module and driving method thereof |
| CN112151591A (en) * | 2020-09-30 | 2020-12-29 | 武汉天马微电子有限公司 | Display panel and display device |
| CN112151588A (en) * | 2020-09-27 | 2020-12-29 | 京东方科技集团股份有限公司 | Display assembly and display device |
| CN212569360U (en) * | 2020-06-17 | 2021-02-19 | 北京小米移动软件有限公司 | Display screen |
| US20210074800A1 (en) * | 2018-03-30 | 2021-03-11 | Sharp Kabushiki Kaisha | Display device |
| CN112582449A (en) * | 2019-09-30 | 2021-03-30 | 乐金显示有限公司 | Display device |
| US20210158746A1 (en) * | 2019-11-21 | 2021-05-27 | Beijing Xiaomi Mobile Software Co., Ltd. | Display panel and electronic device |
-
2021
- 2021-05-31 CN CN202110601063.2A patent/CN113299722B/en active Active
Patent Citations (42)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030067434A1 (en) * | 2001-10-03 | 2003-04-10 | Nec Corporation | Display device and semiconductor device |
| CN1964062A (en) * | 2005-11-09 | 2007-05-16 | 三星Sdi株式会社 | Flat panel display device |
| US20080265785A1 (en) * | 2007-04-27 | 2008-10-30 | Seungtae Kim | Organic light emitting device |
| CN101983397A (en) * | 2008-03-31 | 2011-03-02 | 富士电机控股株式会社 | Planar light emission type display device |
| CN103069477A (en) * | 2011-08-09 | 2013-04-24 | 松下电器产业株式会社 | Image display device |
| US20140034910A1 (en) * | 2012-08-06 | 2014-02-06 | Shenzhen China Star Optoelectronics Technology Co. Ltd. | Organic display device and manufacturing method thereof |
| CN103681762A (en) * | 2012-09-14 | 2014-03-26 | 环球展览公司 | Lifetime OLED display |
| US20140211116A1 (en) * | 2012-11-27 | 2014-07-31 | Shenzhen China Star Optoelectronics Technology Co. Ltd. | Method for saving by-pass capacitor by using circuit board |
| CN103268746A (en) * | 2012-12-07 | 2013-08-28 | 上海天马微电子有限公司 | Pixel driving circuit, light emitting diode display screen and display device |
| CN108133689A (en) * | 2016-12-01 | 2018-06-08 | 三星显示有限公司 | Oganic light-emitting display device |
| CN107133613A (en) * | 2017-06-06 | 2017-09-05 | 上海天马微电子有限公司 | Display panel and display device |
| CN111108544A (en) * | 2017-07-31 | 2020-05-05 | 乐金显示有限公司 | Organic light emitting display device |
| KR20190078780A (en) * | 2017-12-27 | 2019-07-05 | 엘지디스플레이 주식회사 | Organic light emitting display device and method for driving the organic light emitting display device |
| CN108389550A (en) * | 2018-01-31 | 2018-08-10 | 上海天马有机发光显示技术有限公司 | The driving method and organic light-emitting display device of display screen |
| CN108389555A (en) * | 2018-02-06 | 2018-08-10 | 昆山龙腾光电有限公司 | Driving circuit and display device |
| US20210074800A1 (en) * | 2018-03-30 | 2021-03-11 | Sharp Kabushiki Kaisha | Display device |
| CN110956911A (en) * | 2018-09-27 | 2020-04-03 | 合肥鑫晟光电科技有限公司 | Array substrate, detection method thereof and display panel |
| CN109950284A (en) * | 2019-03-27 | 2019-06-28 | 京东方科技集团股份有限公司 | A kind of display panel and display device |
| CN110767715A (en) * | 2019-03-29 | 2020-02-07 | 昆山国显光电有限公司 | Display device, OLED light-transmitting substrate and OLED substrate thereof |
| CN110767717A (en) * | 2019-04-30 | 2020-02-07 | 昆山国显光电有限公司 | Array substrate, display panel and display device |
| CN110264966A (en) * | 2019-05-09 | 2019-09-20 | 京东方科技集团股份有限公司 | Display base plate and its driving method, display device |
| WO2020232628A1 (en) * | 2019-05-21 | 2020-11-26 | 深圳市柔宇科技有限公司 | Display apparatus, terminal and photographing method |
| US20200381502A1 (en) * | 2019-05-27 | 2020-12-03 | Samsung Display Co., Ltd. | Display device |
| CN110767662A (en) * | 2019-05-31 | 2020-02-07 | 昆山国显光电有限公司 | Display substrate, display panel and display device |
| CN110190103A (en) * | 2019-05-31 | 2019-08-30 | 武汉天马微电子有限公司 | Display panel and display device |
| CN112102772A (en) * | 2019-06-17 | 2020-12-18 | 三星电子株式会社 | Display module and driving method thereof |
| CN110289296A (en) * | 2019-06-28 | 2019-09-27 | 武汉天马微电子有限公司 | Display panel and display device |
| US20210066427A1 (en) * | 2019-08-29 | 2021-03-04 | Wuhan Tianma Micro-Electronics Co.,Ltd | Display panel and display device |
| CN110379356A (en) * | 2019-08-29 | 2019-10-25 | 武汉天马微电子有限公司 | Display panel and display device |
| CN112582449A (en) * | 2019-09-30 | 2021-03-30 | 乐金显示有限公司 | Display device |
| CN110930941A (en) * | 2019-11-11 | 2020-03-27 | 武汉天马微电子有限公司 | Display module and display device |
| US20210158746A1 (en) * | 2019-11-21 | 2021-05-27 | Beijing Xiaomi Mobile Software Co., Ltd. | Display panel and electronic device |
| CN110853565A (en) * | 2019-11-29 | 2020-02-28 | 昆山国显光电有限公司 | Preparation method of display substrate, display panel and display device |
| CN110911468A (en) * | 2019-12-11 | 2020-03-24 | 京东方科技集团股份有限公司 | Substrate for display and electroluminescent display device |
| CN111028757A (en) * | 2019-12-25 | 2020-04-17 | 武汉天马微电子有限公司 | Display device and driving method thereof |
| CN111326560A (en) * | 2020-01-23 | 2020-06-23 | 京东方科技集团股份有限公司 | Display substrate and display device |
| CN111128080A (en) * | 2020-03-30 | 2020-05-08 | 京东方科技集团股份有限公司 | Display substrate and display device |
| CN212569360U (en) * | 2020-06-17 | 2021-02-19 | 北京小米移动软件有限公司 | Display screen |
| CN111627341A (en) * | 2020-06-30 | 2020-09-04 | 武汉天马微电子有限公司 | Display panel and display device |
| CN112071209A (en) * | 2020-09-16 | 2020-12-11 | 云谷（固安）科技有限公司 | Display panel and display device |
| CN112151588A (en) * | 2020-09-27 | 2020-12-29 | 京东方科技集团股份有限公司 | Display assembly and display device |
| CN112151591A (en) * | 2020-09-30 | 2020-12-29 | 武汉天马微电子有限公司 | Display panel and display device |
Non-Patent Citations (1)
| Title |
|---|
| 曾庆贵: "集成电路版图设计教程", 上海科学技术出版社, pages: 255 - 258 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024000875A1 (en) * | 2022-06-29 | 2024-01-04 | 武汉天马微电子有限公司 | Display panel and display device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113299722B (en) | 2024-08-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| WO2023000830A1 (en) | Display module and display device | |
| US10879340B2 (en) | Tiling display device | |
| WO2020228205A1 (en) | Display panel and display device | |
| WO2020133950A1 (en) | Array substrate, display panel, and display device | |
| US20240078960A1 (en) | Display device | |
| WO2023000832A1 (en) | Display module and display apparatus | |
| US20230015666A1 (en) | Display panel and display device | |
| CN110867525B (en) | Organic light emitting diode display panel and display device | |
| CN108258022B (en) | Pixel structure, display substrate and display device | |
| US20220366848A1 (en) | Display substrate and display panel | |
| US20230189596A1 (en) | Display panel and display device | |
| CN108648695B (en) | Display panel, touch display panel and touch display device | |
| WO2024011776A1 (en) | Display panel and display device | |
| CN113299722B (en) | Display panel | |
| CN114724492A (en) | Display panel and display device | |
| TWI462284B (en) | Pixel array layout | |
| CN113724651A (en) | Array substrate and display panel | |
| CN110164940B (en) | Organic light emitting display panel and display device | |
| US20230368715A1 (en) | Array substrate and display panel | |
| CN219228311U (en) | Display substrate and display device | |
| US20230263027A1 (en) | Display substrate and manufacturing method thereof and display device | |
| WO2023103091A1 (en) | Micro light-emitting diode touch-control display panel | |
| CN114649394A (en) | Display panel and display device | |
| US20230180589A1 (en) | Display module and display apparatus | |
| CN114639698A (en) | Display panel and display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |