CN113296691B

CN113296691B - Data processing system, method and device and electronic equipment

Info

Publication number: CN113296691B
Application number: CN202010734749.4A
Authority: CN
Inventors: 方兴; 黄子龙; 吕涛; 陈继承; 李志超
Original assignee: Alibaba Group Holding Ltd
Current assignee: Alibaba Group Holding Ltd
Priority date: 2020-07-27
Filing date: 2020-07-27
Publication date: 2024-05-03
Anticipated expiration: 2040-07-27
Also published as: CN113296691A

Abstract

The embodiment of the application provides a data processing system, wherein NVMe bridge equipment is only responsible for processing data processing commands and forwarding processing data access request information, namely: the mapping module in the NVMe bridge device is used for mapping the first address space information contained in the first data processing command to obtain a second data processing command containing second address space information; and providing the second data processing command to the NVMe system device. The agent module is used for receiving the first request information, modifying the second address space information according to the first request information, obtaining target address space information for accessing data in the host equipment, and performing data access in the host equipment based on the target address space information; and providing the data access return result to the NVMe system equipment after the data access is performed. The NVMe bridge equipment does not need to buffer data in the host or NVMe system equipment, so that the delay problem is reduced, and the extra power consumption is reduced, so that the resources are saved.

Description

Data processing system, method and device and electronic equipment

Technical Field

The present application relates to the field of computer technology, and in particular, to a data processing system, a method, an apparatus, and an electronic device, and also relates to a computer storage medium.

Background

With the development of information technology in recent years, in the field of data storage, the use amount of NVMe (Non-Volatile Memory express, i.e., the interface specification of a nonvolatile memory host controller) hard disk is increasing. Compared with the traditional mechanical hard disk, the NVMe hard disk has great improvement in bandwidth and time delay performance. Generally, NVMe hard disk latency is below 100us (microseconds). However, in the cloud computing scenario, since the operability of the NVMe hard disk is poor, an NVMe bridge device needs to be introduced between the host device and the NVMe hard disk to solve the problem of poor operability of the NVMe hard disk in the cloud computing scenario.

In the existing NVMe bridge device, it is required to map an address space of the host device to a memory space of the NVMe bridge device, and meanwhile, it is also required that the NVMe bridge device also buffers commands, addresses and data in the memory space of the host device to the memory space of the NVMe bridge device, so that the NVMe hard disk can obtain the commands, addresses and data from the memory space of the NVMe bridge device. Therefore, when the NVMe hard disk accesses the host device, the command, address and data needs to be copied from the memory space of the NVMe bridge device, which generates additional delay, and this additional delay has a great influence on the performance of the NVMe hard disk. Meanwhile, since the NVMe bridge device needs a large amount of memory, additional power consumption is also caused, thereby causing resource waste.

Disclosure of Invention

The embodiment of the application provides a data processing system which is used for solving the problem of time delay caused by using NVMe bridge equipment to access data between an NVMe hard disk and host equipment in the prior art. And simultaneously, the extra power consumption is reduced, so that the resources are saved.

An embodiment of the present application provides a data processing system, including: host device, NVMe system device, and NVMe bridge device; the NVMe bridge device comprises a mapping module and an agent module;

The mapping module is specifically configured to receive a first data processing command sent by the host device, map first address space information included in the first data processing command, obtain a second data processing command including second address space information, and provide the second data processing command to the NVMe system device; the second address space information is address space information obtained by the mapping of the first address space information; the first address space information is physical address space information of the host device;

The NVMe system device is used for receiving the second data processing command and sending first request information for accessing data in the host device to the proxy module based on the second data processing command;

The agent module is used for receiving the first request information, modifying the second address space information according to the first request information, obtaining target address space information for accessing data in the host equipment, and performing data access in the host equipment based on the target address space information; and after the data access, providing a data access return result to the NVMe system device.

Optionally, the proxy module is further configured to: receiving second request information of the NVMe system equipment for accessing the memory space of the NVMe bridge equipment; the second request information refers to request information of the NVMe system device for accessing a cache command in the memory space of the NVMe bridge device.

Optionally, after receiving the request information sent by the NVMe system device, the proxy module determines whether the request information is the first request information or the second request information;

If the request information is the first request information, forwarding the request information to the host equipment so as to access data in the memory space of the host equipment; otherwise, the request information is forwarded to the NVMe bridge equipment to access the cache command in the memory space of the NVMe bridge equipment.

Optionally, the first data processing command refers to a commit queue command related to data access stored in the host device;

The mapping module receives a first data processing command sent by the host device, maps first address space information contained in the first data processing command, and obtains a second data processing command containing second address space information, and the mapping module comprises:

Receiving the commit queue command sent by the host device;

and mapping the first address space information related in the commit queue command to obtain a second data processing command containing second address space information.

Optionally, the mapping the first address space information included in the first data processing command to obtain a second data processing command including second address space information includes:

obtaining first address space information involved in the commit queue command;

Modifying the physical address area field information corresponding to the first address space information related in the submitting queue command to obtain modified address area field information; and taking the command containing the modified address area field information as the second data processing command containing the second address space information.

Optionally, before modifying the physical address area field information corresponding to the first address space information related in the commit queue command, the NVMe bridge device determines whether the first address space information is physical area page input information, and provides a determination result to the mapping module;

if the judging result is that the first address space information is physical area page input information, the modifying the physical address area field information corresponding to the first address space information related in the commit queue command includes: performing zero-taking assignment on a part of bit fields of the physical address area field information;

If the determination result is that the first address space information is not physical area page input information, the modifying the physical address area field information corresponding to the first address space information related in the commit queue command includes: and carrying out non-zero assignment on a part of bit fields of the physical address area field information.

Optionally, the agent module modifies the second address space information according to the first request information to obtain target address space information for accessing data in the host device, including:

the agent module judges whether the assignment result of the partial bit field is non-zero assignment;

If the assignment result is not non-zero assignment, modifying the intra-page offset information according to a preset mapping table of the physical channel/virtual channel, and confirming the modified intra-page offset information as the target address space information;

Otherwise, modifying the offset information in the page according to a preset mapping table of the physical channel/virtual channel, and recording the label information for accessing the host equipment, the identification information of the partial bit field and the value corresponding to the non-zero assignment; and confirming the modified intra-page offset information, the label information, the identification information of the partial bit field and the value corresponding to the non-zero assignment as the target address space information.

Optionally, after the data access, providing a data access return result to the NVMe system device, including:

Obtaining a data access return result for the first request information returned by the host equipment;

judging whether the data access return result is data which is finally required to be accessed or intermediate address information, wherein the intermediate address information is the return result which requires the NVMe system equipment to send out the first request information again;

If the data access return result is the data which is finally required to be accessed, the data which is finally required to be accessed is directly provided to the NVMe system equipment so that the NVMe system equipment can store the data which is finally required to be accessed;

And if the data access return result is intermediate address information, modifying the intermediate address information, and providing the modified intermediate address information to the NVMe system equipment so that the NVMe system equipment can send out the first request information again.

Optionally, the modifying the intermediate address information and providing the modified intermediate address information to the NVMe system device includes:

judging whether the intermediate address information is the last address of a physical area page;

If the intermediate address information is not the last address of the physical area page, carrying out zero-taking assignment on partial bit fields of the intermediate address information to obtain modified intermediate address information; providing the modified intermediate address information to the NVMe system device;

if the intermediate address information is the last address of the physical area page, carrying out value subtracting 1 assignment on a part of bit fields of the intermediate address information to obtain modified intermediate address information; and providing the modified intermediate address information to the NVMe system equipment.

Optionally, the mapping module caches the second address space information in the memory space of the NVMe bridge device after mapping the first address space information related in the commit queue command.

Optionally, the mapping module is further configured to obtain a data cache address space sent by the host device, map the data cache address space, and provide the mapped data cache address space to the host device, so as to cache the mapped data cache address space in a memory space of the host device.

Optionally, the NVMe bridge device further includes a switching module; the transfer module is used for connecting the host equipment and the NVMe bridge equipment so as to transfer data processing commands and data access request information between the host equipment and the NVMe bridge equipment.

The embodiment of the application provides a data processing method, which comprises the following steps:

receiving a first data processing command sent by a host device;

Mapping first address space information contained in the first data processing command to obtain a second data processing command containing second address space information, and providing the second data processing command to NVMe system equipment;

the second address space information is address space information obtained by the mapping of the first address space information; the first address space information is physical address space information of the host device.

the receiving the first data processing command sent by the host device, mapping the first address space information contained in the first data processing command to obtain a second data processing command containing second address space information, including:

Receiving the commit queue command sent by the host device;

obtaining first address space information involved in the commit queue command;

Optionally, before modifying the physical address area field information corresponding to the first address space information related in the commit queue command, a determination result provided by the NVMe bridge device for determining whether the first address space information is physical area page input information is obtained;

the modifying the physical address area field information corresponding to the first address space information related in the commit queue command includes:

If the judgment result is that the first address space information is the physical area page input information, carrying out zero-taking assignment on partial bit areas of the physical address area field information; and if the judging result is that the first address space information is not the physical area page input information, carrying out non-zero assignment on part of bit fields of the physical address area field information.

Optionally, the method further comprises: after mapping the first address space information related in the commit queue command, the second address space information is cached in the memory space of the NVMe bridge device.

Optionally, the method further comprises: obtaining a data cache address space sent by the host device, mapping the data cache address space, and providing the mapped data cache address space for the host device so as to cache the mapped data cache address space in a memory space of the host device.

receiving first request information which is sent by NVMe system equipment and used for accessing data in host equipment;

modifying the second address space information provided by the mapping module according to the first request information to obtain target address space information for accessing the data in the host device; the second address space information is address space information obtained by mapping physical address space information of the host equipment by using the mapping module;

and performing data access in the host equipment based on the target address space information, obtaining a data access return result, and providing the data access return result to the NVMe system equipment.

Optionally, the method further comprises: receiving second request information of the NVMe system equipment for accessing the memory space of the NVMe bridge equipment; the second request information refers to request information of the NVMe system device for accessing a cache command in the memory space of the NVMe bridge device.

Optionally, after receiving the request information sent by the NVMe system device, determining whether the request information is the first request information or the second request information;

Optionally, the modifying the second address space information provided by the mapping module according to the first request information, to obtain target address space information for accessing data in the host device, includes:

Obtaining modification result information of physical address area field information corresponding to physical address space information of host equipment, which is provided by the mapping module;

If the modification result information is not non-zero assignment, modifying the intra-page offset information according to a preset mapping table of the physical channel/virtual channel, and confirming the modified intra-page offset information as the target address space information;

Optionally, the providing the data access return result to the NVMe system device includes:

Correspondingly, an embodiment of the present application provides a data processing apparatus, including:

a command receiving unit for receiving a first data processing command transmitted by the host device;

a mapping unit, configured to map first address space information included in the first data processing command, to obtain a second data processing command including second address space information;

a command providing unit for providing the second data processing command to the NVMe system device;

A request receiving unit, configured to receive first request information sent by an NVMe system device for accessing data in a host device;

a modifying unit, configured to modify the second address space information provided by the mapping module according to the first request information, to obtain target address space information for accessing data in the host device; the second address space information is address space information obtained by mapping physical address space information of the host equipment by using the mapping module;

A return result obtaining unit, configured to perform data access in the host device based on the target address space information, to obtain a data access return result;

And the return result providing unit is used for providing the data access return result to the NVMe system equipment.

Correspondingly, the embodiment of the application provides electronic equipment, which comprises:

A processor;

and a memory for storing a computer program to be executed by the processor to perform the data processing method.

Correspondingly, the embodiment of the application provides a computer storage medium, wherein the computer storage medium stores a computer program, and the computer program is executed by a processor to execute the data processing method.

Compared with the prior art, the embodiment of the application has the following advantages:

An embodiment of the present application provides a data processing system, including: host device, NVMe system device, and NVMe bridge device; the NVMe bridge device comprises a mapping module and an agent module; the mapping module is specifically configured to receive a first data processing command sent by the host device, map first address space information included in the first data processing command, obtain a second data processing command including second address space information, and provide the second data processing command to the NVMe system device; the second address space information is address space information obtained by the mapping of the first address space information; the first address space information is physical address space information of the host device; the NVMe system equipment is used for receiving a second data processing command and sending first request information for accessing data in the host equipment to the proxy module based on the second data processing command; the agent module is used for receiving the first request information, modifying the second address space information according to the first request information, obtaining target address space information for accessing data in the host equipment, and performing data access in the host equipment based on the target address space information; and providing the data access return result to the NVMe system equipment after the data access is performed. Since in the data processing system of this embodiment, the NVMe bridge device is only responsible for processing data processing commands and forwarding processing data access request information, the processing data processing commands refer to: the mapping module in the NVMe bridge device is used for mapping the first address space information contained in the first data processing command to obtain a second data processing command containing second address space information; and providing the second data processing command to the NVMe system device; forwarding the processing data access request information means: the agent module is used for receiving the first request information, modifying the second address space information according to the first request information, obtaining target address space information for accessing data in the host equipment, and performing data access in the host equipment based on the target address space information; and providing the data access return result to the NVMe system equipment after the data access is performed. The NVMe bridge equipment in the system of the embodiment does not need to buffer the data in the host or the NVMe system equipment, so that the delay problem is reduced, the extra power consumption is reduced, and the resources are saved.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments described in the present application, and other drawings may be obtained according to these drawings for a person having ordinary skill in the art.

FIG. 1 is a schematic diagram of a data processing system according to a first embodiment of the present application;

FIG. 1A is a schematic diagram of a system for handling access of NVMe system devices to host devices according to a first embodiment of the present application;

FIG. 1B is a diagram illustrating storage locations of data information and command information according to a first embodiment of the present application;

FIG. 2 is a flow chart of a data processing method according to a second embodiment of the present application;

FIG. 3 is a flowchart of a data processing method according to a third embodiment of the present application;

FIG. 4 is a schematic diagram of a data processing apparatus according to a fourth embodiment of the present application;

FIG. 5 is a schematic diagram of a data processing apparatus according to a fifth embodiment of the present application;

fig. 6 is a schematic diagram of an electronic device according to a sixth embodiment of the present application.

Detailed Description

In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application. The present application may be embodied in many other forms than those herein described, and those skilled in the art will readily appreciate that the present application may be similarly embodied without departing from the spirit or essential characteristics thereof, and therefore the present application is not limited to the specific embodiments disclosed below.

The application provides a data processing system, two data processing methods, two data processing devices, electronic equipment and a computer medium.

First embodiment

In order to more clearly illustrate the data processing system provided by the present application, some terms related to the present embodiment will be introduced.

NVMe, collectively referred to as Non-Volatile Memory express, is a Non-volatile memory host controller interface specification. Is a logical device interface specification. Based on the bus transmission protocol specification of the device logic interface (corresponding to the application layer in the communication protocol), for accessing the nonvolatile memory medium attached through the PCI-Express (PCIe) bus, PCI-Express (peripheral component interconnect Express) is a high-speed serial computer expansion bus standard.

The NVMe aims to fully utilize low delay and parallelism of PCIe channels, and parallelism of contemporary processors, platforms and applications, and greatly improve read-write performance of the solid state disk and reduce high delay under controllable storage cost.

PRP (Physical Region Page), which is a physical (memory) region page, in this embodiment a physical region page. SQ/CQ (issue/Completion Queue) is a commit/Completion Queue command stored in the host device that involves data access. DMA (Direct Memory Access) is direct memory storage, and HPA (Host PHYSICAL ADDRESS) is the physical (memory) address of the Host device. The PF/VF is the physical channel/virtual channel.

As shown in fig. 1, which is a schematic frame diagram of a system according to a first embodiment of the present application. The system comprises: host device, NVMe system device, and NVMe bridge device. The NVMe bridge device comprises a mapping module and an agent module.

The mapping module is specifically configured to receive a first data processing command sent by the host device, map first address space information included in the first data processing command, obtain a second data processing command including second address space information, and provide the second data processing command to the NVMe system device. The mapping module may be disposed in a processor system of the NVMe bridge device. In this embodiment, an NVMe hard disk device is specifically taken as an example of an NVMe system device, which describes how the NVMe system device interacts with a host device and an NVMe bridge device and processes data. In fact, in the present application, the NVMe system device may also be an NVMe over fabric or an NVMe over TCP application scenario device. NVMe Over Fabrics replace PCIe transmission using Fabric technologies such as RDMA or Fibre Channel (FC) architecture, NVMe over TCP involves high performance files or data storage.

In this embodiment, the second address space information is address space information obtained by mapping the first address space information; the first address space information is physical address space information of the host device; the physical address space information of the host device may also be referred to as memory address space information of the host device.

Specifically, the mapping module receives a first data processing command sent by the host device, and refers to a commit queue command related to data access stored in the host device. Therefore, the mapping module receives the first data processing command sent by the host device, maps the first address space information included in the first data processing command, and obtains the second data processing command including the second address space information, which may refer to: first, a commit queue command sent by a host device is received. Then, the first address space information involved in the commit queue command is mapped to obtain a second data processing command containing second address space information.

More specifically, as mapping the first address space information contained in the first data processing command, obtaining the second data processing command containing the second address space information may be: first, first address space information involved in a commit queue command is obtained. Then, modifying the physical address area field information corresponding to the first address space information related in the submitting queue command to obtain modified address area field information; and taking the command containing the modified address area field information as a second data processing command containing second address space information.

In this embodiment, before modifying the physical address area field information corresponding to the first address space information related to the commit queue command, the mapping module notifies the NVMe bridge device to determine whether the first address space information is physical area page input information, where determining whether the first address space information is physical area page input information may refer to determining whether the first address space information is a physical memory page entry, where the physical memory page entry is: prp_entry. After the NVMe bridge device judges, the judging result is provided to the mapping module so as to modify the physical address area field information corresponding to the first address space information related in the submitting queue command in the subsequent process of the mapping module.

The mapping module modifies the physical address area field information corresponding to the first address space information related in the submitted queue command according to the judging result, and the method is as follows: and if the judgment result is that the first address space information is the physical area page input information, carrying out zero-taking assignment on part of bit fields of the physical address area field information. And if the judgment result is that the first address space information is not the physical area page input information, carrying out non-zero assignment on part of bit fields of the physical address area field information. Here, the non-zero assignment corresponds to a value of N, which is essentially the depth information value of the PRP List. PRP List is a List of physical memory pages.

For example, as shown in fig. 1A, a schematic process of processing an NVMe hard disk device to access a host device by the system of the present embodiment is shown. In the beginning stage in fig. 1A, the NVMe bridge device determines whether the first address space information is physical area page input information, that is, whether SQ PRP1/PRP2 in the figure is PRP Entry. If SQ PRP1/PRP2 is not PRP Entry, then PRP_entry_M [55-M:0] = PRP Entry is performed; prp_entry_m [55:55-m+1] =n; prp_entry_m [63:56] =requestid. If SQ PRP1/PRP2 is PRP Entry, then PRP_entry_M [55-M:0] = PRP Entry is performed; prp_entry_m [55:55-m+1] =0; prp_entry_m [63:56] =requestid. This example is illustrated in terms of modifying a 64bit PRP field, M representing the number of bits employed by the PRP List depth.

And modifying the physical address area field information corresponding to the first address space information related in the commit queue command by assigning a value to a partial bit field (PRP_entry_M [55:55-M+1 ]) of the physical address area field information, thereby obtaining a second data processing command containing second address space information.

The final mapping module obtains a second data processing command containing second address space information. And forwards the second data processing command to the NVMe hard disk device. The second address space information contained in the second data processing command is referred to herein in effect as a modified PRP field.

And the NVMe hard disk device is used for receiving the second data processing command and sending first request information for accessing the data in the host device to the proxy module based on the second data processing command. The request information is in the form of a TLP for direct memory access, and the TLP is a form specified for the request information, which is required for data processing by the PCIe device. This process effectively means that the NVMe hard disk device initiates a DMA request based on the modified PRP field pointing to the address.

The agent module is used for receiving the first request information, modifying the second address space information according to the first request information, obtaining target address space information for accessing data in the host equipment, and performing data access in the host equipment based on the target address space information; and providing the data access return result to the NVMe hard disk device after the data access is performed. The target address space information actually refers to address space information where data is located inside the host device when the NVMe hard disk device performs data access at the host device.

In the above process, the proxy module receives the first request information, which means that the proxy module actually intercepts the TLP sent by the NVMe hard disk device, and uses the intercepted TLP as the received first request information.

After receiving the first request information, the proxy module modifies the second address space information according to the first request information to obtain target address space information for accessing data in the host device. As one embodiment of modifying the second address space information according to the first request information, target address space information for accessing data in the host device is obtained: first, it is determined whether the mapping module assigns a non-zero value to the assignment result of the partial bit field. Then, target address space information for accessing data in the host device is obtained according to the judgment result of whether the non-zero assignment is made.

Specifically, obtaining the target address space information for accessing the data in the host device according to the determination result of whether the value is non-zero assignment may refer to: if the assignment result is not non-zero assignment, modifying the intra-page offset information according to a preset mapping table of the physical channel/virtual channel, and confirming the modified intra-page offset information as target address space information.

Otherwise, modifying the offset information in the page according to a preset mapping table of the physical channel/virtual channel, and recording label information for accessing the host equipment, the identification information of the partial bit field and a value corresponding to non-zero assignment; and confirming the modified intra-page offset information, the label information, the identification information of the partial bit field and the value corresponding to the non-zero assignment as target address space information. The identification information of the partial bit field is PF/VFID coding information.

The specific above process is described as follows: with continued reference to fig. 1a, nvme hard disk device initiates address initiation using modified PRP pointing

After intercepting TLP sent by NVMe hard disk device, proxy module determines whether prp_entry_m [55:55-m+1] =0 is true, i.e.: whether the result of the assignment of the partial bit field is a non-zero assignment. If prp_entry_m [55:55-m+1] =0 holds, i.e.: and if the assignment result of the partial bit field is not non-zero assignment, modifying the page base offset according to the PF/VF ID MAPPING table, namely: and recovering the Page base offset corresponding to the PF/VF according to the PF/VF ID MAPPING table. If PRP_entry_M [55:55-M+1] =0 is not true, the values corresponding to the non-zero assignments of the Request tag and the data_addr_flag [ i ] are recorded except the Page base offset corresponding to the PF/VF which is restored according to the PF/VF ID MAPPING table. Page base offset is intra-page offset information, PF/VF ID MAPPING table is a mapping table of a preset physical channel/virtual channel, request tag is tag information of access host equipment, the identification information of the partial bit field is data_addr_flag [ i ], and data_addr_flag [ i ] is the bit field of PRP_entry_M [55:55-M+1] and refers to the nesting depth of PRP List. The Request ID is the bit field PRP_entry_M [63:56] and the corresponding value of the non-zero assignment is N. The PCIe TLP (PCIe TLP is a transport layer packet) tag, the tag is a transport layer packet sequence number, and the Request tag is stored to associate a response packet returned by the host device with a Request packet sent by the NVMe hard disk device, so that data in the response packet is modified by using data stored in a Request packet sent by the NVMe hard disk device before.

Regarding the modification of the page base offset according to the PF/VF ID MAPPING table, this is achieved by modifying the PRP field. The mapping module modifies the Page base offset field into PF/VFID+Data_addr_Flag+reserved field, wherein the reserved field refers to the bit field PRP_entry_M [55-M:0], and the reserved field refers to the part of the PRP field which does not need to be modified. The NVMe hard disk device sends a DMA request using the address pointed to by the modified PRP field, namely: the NVMe hard disk device issues the first request information based on the second data processing command. After intercepting the TLP sent by the NVMe hard disk device, the proxy module accesses the space of the host device according to the PF/VF ID of the address field. In the process, the proxy module judges whether the page of the DMA request is Data or a new PRP entry address pointed by the PRP list according to the data_addr_flag. When data_addr_flag is 0, namely: prp_entry_m [55:55-m+1] =0, indicating that the address points to the final data. Otherwise, the address points to the nesting depth of the PRP List.

When a page of a DMA request is not data, an item in units of 8 bytes is contained in the page. Wherein, if PRP_entry_M [55:55-M+1] is greater than 1, i.e., N is greater than 1, then the last item is PRP list and the preceding items of the last item are PRP Entry. If PRP_entry_M [55:55-M+1] is 1, i.e., N is equal to 1, then all the entries in the page are of the PRP Entry type.

In addition, the proxy module may provide the data access return result to the NVMe hard disk device after performing the data access as follows.

First, a data access return result for the first request information returned by the host device is obtained.

And then judging whether the data access return result is data which is finally required to be accessed or intermediate address information, wherein the intermediate address information is the return result of the first request information which is required to be sent again by the NVMe hard disk device.

If the data access return result is the data which is finally required to be accessed, the data which is finally required to be accessed is directly provided to the NVMe hard disk device so that the NVMe hard disk device can store the data which is finally required to be accessed; and if the data access return result is the intermediate address information, modifying the intermediate address information, and providing the modified intermediate address information to the NVMe hard disk device so that the NVMe hard disk device can send out the first request information again.

Specifically, the method modifies the intermediate address information and provides the modified intermediate address information to the NVMe hard disk device, and comprises the following steps:

judging whether the intermediate address information is the last address of the physical area page;

If the intermediate address information is not the last address of the physical area page, carrying out zero assignment on part of bit fields of the intermediate address information to obtain modified intermediate address information; and providing the modified intermediate address information to the NVMe hard disk device.

If the intermediate address information is the last address of the physical area page, performing value subtracting 1 assignment on a part of bit fields of the intermediate address information by taking a value corresponding to non-zero assignment to obtain modified intermediate address information; and providing the modified intermediate address information to the NVMe hard disk device.

The modification to the intermediate address information is specifically exemplified as follows: after the proxy module sends the data access request information to the host equipment, the host equipment returns a data access return result, and the proxy module intercepts the data access return result. And returning a result of data access to obtain a completion message.

When the proxy module receives a completion message corresponding to the recorded Request tag returned by the host device, namely the completion message is matched with the recorded Request tag, the PRP field in the completion message is modified to be a PF/VFID+Data_addr_Flag [ i ] -1+ reserved field. Specifically, when modifying the PRP field, it needs to determine whether the completion message returned by the host device is the last completion message, that is: judging whether the intermediate address information is the last address of the physical area page, if so, executing PRP_entry_M [55-M:0] =PRP Entry; prp_entry_m [55:55-m+1] =n-1; prp_entry_m [63:56] =requestid. If not, PRP_Entry_M [55-M:0] = PRP Entry is performed; prp_entry_m [55:55-m+1] =0; prp_entry_m [63:56] =requestid. After the PRP field is modified, the agent module provides the modified PRP field for the NVMe hard disk device so that the NVMe hard disk device can send out the first request information again.

In the above process, it is necessary to determine whether the data access return result is data that is ultimately required to be accessed or intermediate address information. For the data and the intermediate address information which finally need to be accessed, the following definition is carried out: if the completion message returned by the host device is not matched with the recorded Request tag, confirming that the data access return result is the data which is finally required to be accessed; and if the completion message returned by the host device is matched with the recorded Request tag, confirming that the data access return result is intermediate address information.

The agent module receives second request information of the NVMe hard disk device for accessing the memory space of the NVMe bridge device in addition to the first request information of accessing the data in the host device, which is sent by the NVMe hard disk device. In this embodiment, the second request information refers to request information of the NVMe hard disk device for accessing a cache command in a memory space of the NVMe bridge device.

As shown in fig. 1B, the storage locations of the data information and the command information in this embodiment are schematically shown. As can be seen in fig. 1B, from the visual angle of the memory of the NVMe hard disk device controller, the data information is cached in the memory space of the host device, where the data information includes SQ Buffer and CQ Buffer in the figure, that is, the commit Buffer queue and the completion Buffer queue.

And the command information is cached in the memory space of the NVMe bridge device. Specifically, the data information is cached in the memory space of the host device, and the command information is cached in the memory space of the NVMe bridge device based on the mapping module. The command information includes Admin SQ/CQ illustrated in the figure, that is: commit management queue/completion management queue, and I/O SQ and I/O CQ, namely: commit input/output queues, and complete input/output queues.

Specifically, the mapping module maps the first address space information related to the commit queue command, and then caches the second address space information in the memory space of the NVMe bridge device. The second address space information is one of command information.

And the mapping module is also used for obtaining the data cache address space sent by the host equipment, mapping the data cache address space and providing the mapped data cache address space for the host equipment so as to cache the mapped data cache address space in the memory space of the host equipment. The mapped data cache address space is one type of data information.

In this embodiment, the command information may refer to the first data processing command and the second data processing command. In this way, when the data processing system of the embodiment is used for data processing, the NVMe bridge device is only responsible for processing the data processing command and forwarding the processing data access request information, and provides the data processing command to the NVMe hard disk device. As for the forwarding of the data information, the forwarding is actually performed only between the host device and the NVMe hard disk device, so that the NVMe bridge device does not need to buffer the data information, and then forwards the data information to the NVMe hard disk device. Thus, delay problems can be reduced. Meanwhile, the NVMe bridge equipment does not need to buffer data information, so that the NVMe bridge equipment does not need to hang a large-capacity external memory, and the extra power consumption is reduced, thereby saving resources.

Since the proxy module is responsible for receiving both the first request information and the second request information. Therefore, after receiving the request information sent by the NVMe hard disk device, it is necessary to determine in advance whether the request information is the first request information or the second request information.

If the request information is the first request information, the request information is forwarded to the host device to access data in the memory space of the host device. Otherwise, the request information is forwarded to the NVMe bridge device to access the cache command in the memory space of the NVMe bridge device. Of course, when the request information is the second request information, the request information is forwarded to the NVMe bridge device.

In addition, the NVMe bridge device also comprises a switching module and a traversing module; the transfer module is used for connecting the host equipment and the NVMe bridge equipment so as to transfer data processing commands and data access request information between the host equipment and the NVMe bridge equipment. The traversal module is used for connecting the mapping module with the NVMe hard disk device so as to forward the second data processing command mapped by the mapping module to the NVMe hard disk device through the traversal module. And PCIe interfaces are adopted among the modules, between the modules and the host equipment and between the modules and the NVMe hard disk equipment. In addition, command forwarding of the mapping module, the switching module and the traversing module in the substrate is realized through the first interface.

Since in the data processing system of this embodiment, the NVMe bridge device is only responsible for processing data processing commands and forwarding processing data access request information, the processing data processing commands refer to: the mapping module in the NVMe bridge device is used for mapping the first address space information contained in the first data processing command to obtain a second data processing command containing second address space information; and providing the second data processing command to the NVMe hard disk device; forwarding the processing data access request information means: the agent module is used for receiving the first request information, modifying the second address space information according to the first request information, obtaining target address space information for accessing data in the host equipment, and performing data access in the host equipment based on the target address space information; and providing the data access return result to the NVMe hard disk device after the data access is performed. The NVMe bridge device in the system of the embodiment does not need to buffer the data in the host or the NVMe hard disk device, so that the delay problem is reduced, the additional power consumption is reduced, and the resources are saved.

Second embodiment

A second embodiment of the present application provides a data processing method. The main execution body of the method is the mapping module in the first embodiment, and since the steps executed by the mapping module are described in detail in the system of the first embodiment, the description is relatively simple, and the relevant points are referred to in the description of the relevant parts of the first embodiment. The embodiments described below are merely illustrative. Fig. 2 is a flowchart of a data processing method according to a second embodiment of the present application, and is described below with reference to fig. 2.

The embodiment provides a data processing method, which includes:

step S201: a first data processing command sent by a host device is received.

In this embodiment, the first data processing command refers to a commit queue command related to data access stored in the host device. Thus, receiving a first data processing command sent by a host device refers to receiving a commit queue command sent by the host device.

Step S202: and mapping the first address space information contained in the first data processing command to obtain a second data processing command containing second address space information, and providing the second data processing command to the NVMe hard disk device.

Since the first data processing command refers to a commit queue command related to data access stored in the host device, mapping the first address space information contained in the first data processing command, obtaining the second data processing command containing the second address space information may be: the first address space information involved in the commit queue command is mapped to obtain a second data processing command containing second address space information.

Specifically, mapping the first address space information contained in the first data processing command to obtain an embodiment of the second data processing command containing the second address space information:

first, first address space information involved in a commit queue command is obtained. Then, modifying the physical address area field information corresponding to the first address space information related in the submitting queue command to obtain modified address area field information; and taking the command containing the modified address area field information as a second data processing command containing second address space information.

Before modifying the physical address area field information corresponding to the first address space information related in the commit queue command, a determination result provided by the NVMe bridge device for determining whether the first address space information is the physical area page input information is obtained, and the physical address area field information corresponding to the first address space information related in the commit queue command is modified according to the determination result.

Specifically, according to the judgment result, modifying the physical address area field information corresponding to the first address space information related in the commit queue command into the following manner: and if the judgment result is that the first address space information is the physical area page input information, carrying out zero-taking assignment on part of bit fields of the physical address area field information. And if the judgment result is that the first address space information is not the physical area page input information, carrying out non-zero assignment on part of bit fields of the physical address area field information.

Further, after mapping the first address space information involved in the commit queue command, the second address space information is provided to the NVMe bridge device memory space such that the second address space information is cached within the NVMe bridge device memory space.

In addition, a data cache address space sent by the host device is obtained, the data cache address space is mapped, and the mapped data cache address space is provided for the host device so as to cache the mapped data cache address space in the memory space of the host device.

Third embodiment

A third embodiment of the present application provides a data processing method. The execution body of the method is the proxy module in the first embodiment, and since the steps executed by the proxy module are described in detail in the system of the first embodiment, the description is relatively simple, and the relevant points are referred to in the description of the relevant parts of the first embodiment. The embodiments described below are merely illustrative. As shown in fig. 3, a flowchart of a data processing method according to a third embodiment of the present application is described below with reference to fig. 3.

The embodiment provides a data processing method, which includes:

Step S301: and receiving first request information which is sent by the NVMe hard disk device and used for accessing the data in the host device.

In the above process, the proxy module may receive, in addition to the first request information for accessing the data in the host device sent by the NVMe hard disk device, the second request information for accessing the memory space of the NVMe bridge device by the NVMe hard disk device. The second request information refers to request information of the NVMe hard disk device for accessing a cache command in a memory space of the NVMe bridge device.

Since the proxy module can receive the first request information of accessing the data in the host device sent by the NVMe hard disk device, the proxy module can also receive the second request information of accessing the memory space of the NVMe bridge device by the NVMe hard disk device. Therefore, after receiving the request information sent by the NVMe hard disk device, it is determined whether the request information is the first request information or the second request information.

Specifically, if the request information is the first request information, forwarding the request information to the host device to access data in a memory space of the host device; otherwise, the request information is forwarded to the NVMe bridge device to access the cache command in the memory space of the NVMe bridge device.

Step S302: and modifying the second address space information provided by the mapping module according to the first request information to obtain target address space information for accessing the data in the host device.

In this embodiment, the second address space information is address space information obtained by mapping physical address space information of the host device by using the mapping module.

As a way of modifying the second address space information provided by the mapping module in accordance with the first request information, the target address space information for accessing the data in the host device is obtained: firstly, obtaining modification result information of physical address area field information corresponding to physical address space information of host equipment, which is provided by a mapping module; and judging whether the modification result is non-zero assignment or not, and performing different processing according to the judgment result of whether the modification result is non-zero assignment so as to obtain the target address space information.

Specifically, if the modification result information is not a non-zero assignment, modifying the intra-page offset information according to a preset mapping table of the physical channel/virtual channel, and confirming the modified intra-page offset information as target address space information;

Otherwise, modifying the offset information in the page according to a preset mapping table of the physical channel/virtual channel, and recording label information for accessing the host equipment, the identification information of the partial bit field and a value corresponding to non-zero assignment; and confirming the modified intra-page offset information, the label information, the identification information of the partial bit field and the value corresponding to the non-zero assignment as target address space information.

Step S303: and performing data access in the host equipment based on the target address space information, obtaining a data access return result, and providing the data access return result to the NVMe hard disk equipment.

Specifically, the data access return result is provided to the NVMe hard disk device, which may be as follows: first, a data access return result for the first request information returned by the host device is obtained. And then judging whether the data access return result is the data which finally needs to be accessed or the intermediate address information. The intermediate address information refers to a return result of the first request information needing to be sent again by the NVMe hard disk device;

And if the data access return result is the data which is finally required to be accessed, directly providing the data which is finally required to be accessed to the NVMe hard disk device so as to store the data which is finally required to be accessed by the NVMe hard disk device. And if the data access return result is the intermediate address information, modifying the intermediate address information, and providing the modified intermediate address information to the NVMe hard disk device so that the NVMe hard disk device can send out the first request information again.

More specifically, as an embodiment of modifying the intermediate address information and providing the modified intermediate address information to the NVMe hard disk device: it is determined whether the intermediate address information is the last address of the physical area page.

If the intermediate address information is not the last address of the physical area page, carrying out zero assignment on part of bit fields of the intermediate address information to obtain modified intermediate address information; providing the modified intermediate address information to the NVMe hard disk device;

Fourth embodiment

In the second embodiment described above, a data processing method is provided, and correspondingly, a fourth embodiment of the present application provides a data processing apparatus. Fig. 4 is a schematic diagram of a data processing apparatus according to a fourth embodiment of the present application. Since the apparatus embodiments are substantially similar to the method embodiments, the description is relatively simple, and reference is made to the description of the method embodiments for relevant points. The device embodiments described below are merely illustrative.

The present embodiment provides a data processing apparatus including:

a command receiving unit 401 for receiving a first data processing command sent by a host device;

a mapping unit 402, configured to map first address space information included in the first data processing command, to obtain a second data processing command including second address space information;

a command providing unit 403, configured to provide the second data processing command to an NVMe system device;

the command receiving unit is specifically configured to: receiving the commit queue command sent by the host device;

the mapping unit is specifically configured to: and mapping the first address space information related in the commit queue command to obtain a second data processing command containing second address space information.

Optionally, the mapping unit is specifically configured to:

obtaining first address space information involved in the commit queue command;

Optionally, the mapping unit is further configured to: before modifying the physical address area field information corresponding to the first address space information related in the commit queue command, obtaining a judging result provided by the NVMe bridge equipment for judging whether the first address space information is the physical area page input information;

Optionally, the device further comprises a first storage unit, where the first storage unit is specifically configured to: after mapping the first address space information related in the commit queue command, the second address space information is cached in the memory space of the NVMe bridge device.

Optionally, the device further comprises a second storage unit;

The mapping unit is specifically configured to: obtaining a data cache address space sent by the host equipment, and mapping the data cache address space;

the second storage unit is specifically configured to: and providing the mapped data cache address space to the host device for caching the mapped data cache address space in the host device memory space.

Fifth embodiment

In the third embodiment described above, a data processing method is provided, and in correspondence with this, a fifth embodiment of the present application provides a data processing apparatus. Fig. 5 is a schematic diagram of a data processing apparatus according to a fifth embodiment of the present application. Since the apparatus embodiments are substantially similar to the method embodiments, the description is relatively simple, and reference is made to the description of the method embodiments for relevant points. The device embodiments described below are merely illustrative.

The present embodiment provides a data processing apparatus including:

A request receiving unit 501, configured to receive first request information sent by an NVMe system device for accessing data in a host device;

A modifying unit 502, configured to modify the second address space information provided by the mapping module according to the first request information, to obtain target address space information for accessing data in the host device; the second address space information is address space information obtained by mapping physical address space information of the host equipment by using the mapping module;

A return result obtaining unit 503, configured to perform data access in the host device based on the target address space information, and obtain a data access return result;

and a return result providing unit 504, configured to provide the data access return result to the NVMe system device.

Optionally, the system further comprises a second request information receiving unit; the second request information receiving unit is specifically configured to: receiving second request information of the NVMe system equipment for accessing the memory space of the NVMe bridge equipment; the second request information refers to request information of the NVMe system device for accessing a cache command in the memory space of the NVMe bridge device.

Optionally, the system further comprises a judging unit and a forwarding unit; the judging unit is specifically configured to: after receiving request information sent by the NVMe system equipment, judging whether the request information is the first request information or the second request information;

the forwarding unit is specifically configured to: if the request information is the first request information, forwarding the request information to the host equipment so as to access data in the memory space of the host equipment; otherwise, the request information is forwarded to the NVMe bridge equipment to access the cache command in the memory space of the NVMe bridge equipment.

Optionally, the modifying unit is specifically configured to:

Optionally, the return result providing unit is specifically configured to:

Sixth embodiment

The sixth embodiment of the present application also provides an electronic device corresponding to the methods of the second to third embodiments of the present application. Fig. 6 is a schematic diagram of an electronic device according to a sixth embodiment of the present application.

The electronic device includes:

A processor 601; and

A memory 602 for storing a computer program to be executed by the processor for performing the methods described in the second to third embodiments.

Seventh embodiment

The seventh embodiment of the present application also provides a storage medium storing a computer program that is executed by a processor to perform the methods described in the second to third embodiments, corresponding to the methods of the second to third embodiments.

While the application has been described in terms of preferred embodiments, it is not intended to be limiting, but rather, it will be apparent to those skilled in the art that various changes and modifications can be made herein without departing from the spirit and scope of the application as defined by the appended claims.

In one typical configuration, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory. The memory may include volatile memory in a computer-readable medium, random Access Memory (RAM) and/or nonvolatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). Memory is an example of computer-readable media.

1. Computer readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of storage media for a computer include, but are not limited to, phase change memory (PRAM), static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), read Only Memory (ROM), electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium, which can be used to store information that can be accessed by a computing device. Computer-readable media, as defined herein, does not include non-transitory computer-readable storage media (non-transitory computer readable storage media), such as modulated data signals and carrier waves.

2. It will be appreciated by those skilled in the art that embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.

Claims

1. A data processing system, comprising: host device, NVMe system device, and NVMe bridge device; the NVMe bridge device comprises a mapping module and an agent module;

2. The system of claim 1, wherein the proxy module is further configured to: receiving second request information of the NVMe system equipment for accessing the memory space of the NVMe bridge equipment; the second request information refers to request information of the NVMe system device for accessing a cache command in the memory space of the NVMe bridge device.

3. The system of claim 2, wherein the proxy module determines whether the request information is the first request information or the second request information after receiving the request information sent by the NVMe system device;

4. The system of claim 1, wherein the first data processing command is a commit queue command related to data access stored in the host device;

Receiving the commit queue command sent by the host device;

5. The system of claim 4, wherein mapping the first address space information contained in the first data processing command to obtain a second data processing command containing second address space information comprises:

obtaining first address space information involved in the commit queue command;

6. The system of claim 5, wherein the NVMe bridge device determines whether the first address space information is physical area page input information before modifying physical address area field information corresponding to the first address space information involved in the commit queue command, and provides a determination result to the mapping module;

7. The system of claim 6, wherein the agent module modifying the second address space information according to the first request information to obtain target address space information for accessing data in the host device comprises:

8. The system of claim 7, wherein the providing the data access return result to the NVMe system device after the data access is performed comprises:

9. The system of claim 8, wherein the modifying the intermediate address information and providing the modified intermediate address information to the NVMe system device comprises:

10. The system of claim 4, wherein the mapping module caches the second address space information in the NVMe bridge device memory space after mapping the first address space information involved in the commit queue command.

11. The system of claim 4, wherein the mapping module is further configured to obtain a data cache address space sent by the host device, map the data cache address space, and provide the mapped data cache address space to the host device for caching the mapped data cache address space in a memory space of the host device.

12. The system of claim 1, wherein the NVMe bridge device further comprises a transit module; the transfer module is used for connecting the host equipment and the NVMe bridge equipment so as to transfer data processing commands and data access request information between the host equipment and the NVMe bridge equipment.

13. A method of data processing, comprising:

receiving a first data processing command sent by a host device;

14. The method of claim 13, wherein the first data processing command is a commit queue command related to data access stored in the host device;

Receiving the commit queue command sent by the host device;

15. The method of claim 14, wherein mapping the first address space information contained in the first data processing command to obtain a second data processing command containing second address space information comprises:

obtaining first address space information involved in the commit queue command;

16. The method of claim 15, wherein a determination result provided by an NVMe bridge device to determine whether the first address space information is physical area page input information is obtained before modifying physical address area field information corresponding to the first address space information involved in the commit queue command;

17. The method as recited in claim 14, further comprising: after mapping the first address space information related in the commit queue command, the second address space information is cached in the memory space of the NVMe bridge device.

18. The method as recited in claim 14, further comprising: obtaining a data cache address space sent by the host device, mapping the data cache address space, and providing the mapped data cache address space for the host device so as to cache the mapped data cache address space in a memory space of the host device.

19. A method of data processing, comprising:

20. The method as recited in claim 19, further comprising: receiving second request information of the NVMe system equipment for accessing the memory space of the NVMe bridge equipment; the second request information refers to request information of the NVMe system device for accessing a cache command in the memory space of the NVMe bridge device.

21. The method of claim 20, wherein after receiving the request information sent by the NVMe system device, determining whether the request information is the first request information or the second request information;

22. The method of claim 19, wherein modifying the second address space information provided by the mapping module based on the first request information to obtain target address space information for accessing data in the host device, comprises:

Otherwise, modifying the offset information in the page according to a preset mapping table of the physical channel/virtual channel, and recording values corresponding to the label information, the identification information of part bit fields and the non-zero assignment for accessing the host equipment; and confirming the modified intra-page offset information, the label information, the identification information of the partial bit field and the value corresponding to the non-zero assignment as the target address space information.

23. The method of claim 22, wherein the providing the data access return result to the NVMe system device comprises:

24. The method of claim 23, wherein the modifying the intermediate address information and providing the modified intermediate address information to the NVMe system device comprises:

25. A data processing apparatus, comprising:

26. A data processing apparatus, comprising:

27. An electronic device, comprising:

A processor;

A memory for storing a computer program to be run by a processor for performing the method of any one of claims 13-24.

28. A computer storage medium storing a computer program to be executed by a processor to perform the method of any one of claims 13-24.