CN113222938A - Chip defect detection method and system and computer readable storage medium - Google Patents
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Abstract
The invention discloses a chip defect detection method and a system and a computer readable storage medium, wherein the method comprises the following steps: acquiring an initial image of a chip to be detected; chip defect detection is carried out on the initial image of the chip through a target detection model, and the target detection model is formed by deep learning training on preset defects; when the chip is found to have defects, extracting a chip defect image from the initial image of the chip; and analyzing and processing the defect information in the chip defect image to obtain the defect data of the chip. The invention reduces the error rate of chip defect detection, improves the efficiency of chip defect detection, and provides basic data basis for the production and improvement of chips by providing complete defect data analysis. The method improves the error detection efficiency of the chip defect and the production efficiency of the chip, reduces the production cost and realizes the full automation of the chip defect detection process.
Description
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a chip defect detection method and system and a computer readable storage medium.
Background
In the production process of integrated circuits, chip quality inspection is an indispensable part in chip manufacturing, and is particularly important as the last process before the chip leaves factory, if various defects appear on the chip surface, the product quality will be seriously affected, and at present, Automatic Optical Inspection (AOI) -based technology is generally adopted by chip manufacturers for the process inspection.
At present, AOI equipment on the market is mostly detected by adopting traditional detection methods such as template matching and the like. Traditional AOI equipment adopts traditional algorithm, utilizes the template to compare, receives the influence of ambient light very easily, leads to appearing the false retrieval condition easily to make the picture that is not the defect be judged as the defect, need artifical secondary to recheck, greatly increased cost of labor and detection efficiency. In addition, as the types of chip defects are various and the characteristics of the defects are different, the traditional AIO equipment cannot be accurately classified, so that complete and effective data analysis cannot be provided, and the tracing analysis of the defects and the further defect reason analysis cannot be supported.
In summary, the following problems exist for the conventional AOI apparatus: 1. the misjudgment rate is too high, manual secondary rechecking is needed, the efficiency is low, and the labor cost is too high; 2. by adopting the traditional method, the defect types cannot be accurately classified, and the defect tracing analysis cannot be realized, so that the process cannot be improved, and the yield can be improved.
Disclosure of Invention
The invention aims to provide a chip defect detection method and system and a computer readable storage medium, which can reduce the error judgment rate of chip defect detection, improve the efficiency of chip defect detection, provide complete defect data analysis, provide data basis for the production improvement of chips, improve the production efficiency of chips, reduce the rejection rate of products and reduce the production cost.
In order to achieve the above object, the present invention provides a chip defect detection method, which comprises the following steps:
acquiring an initial image of a chip to be detected;
chip defect detection is carried out on the initial image of the chip through a target detection model, and the target detection model is formed by deep learning training on preset defects;
when the chip is found to have defects, extracting a chip defect image from the initial image of the chip;
and analyzing and processing the defect information in the chip defect image to obtain the defect data of the chip.
Further, in the above chip defect detecting method, the step of forming the target detection model by deep learning training of the predetermined defect includes:
training a target detection model according to a plurality of different types of chip preset defect training images, so that the defect identification accuracy of the target detection model reaches a preset range.
Further, in the chip defect detection method, the step of training the target detection model according to the predetermined defect training images of the chips of different types so that the defect identification accuracy of the target detection model reaches a preset range specifically includes:
acquiring a plurality of chip scheduled defect training images of different types;
acquiring picture data in a chip scheduled defect training image, marking a defect prior frame and an image name, and inputting the chip scheduled defect training image into a target detection model for training;
judging whether the defect identification accuracy of the target detection model is in a preset range, and if so, considering that the target detection model completes training; if not, the preset defect training image of the chip is obtained again to train the target detection model.
Further, in the chip defect detecting method, the step of extracting the chip defect image from the initial image of the chip specifically includes:
performing calculation analysis processing on the initial image through a self-adaptive image segmentation algorithm, and performing segmentation processing on the found chip defects to obtain chip defect images;
and calculating defect information, and marking and recording the defect information, wherein the defect information comprises a defect position, a defect size and a defect grade.
Further, in the above chip defect detecting method, when the initial image is calculated and analyzed by using an adaptive image segmentation algorithm, the method further includes:
preprocessing the initial image to obtain a gray image of the initial image, wherein the initial image and the gray image respectively have a first edge line for limiting a defect edge;
and performing local threshold calculation in the area of the first edge line in the gray image by using a self-adaptive image segmentation algorithm to obtain a segmented image of the chip defect as a chip defect image.
Further, in the above chip defect detecting method, the step of preprocessing the initial image includes:
carrying out noise reduction processing on the initial image through a filter;
converting the initial image into a grayscale image;
and enhancing the contrast of the gray-scale image through an image sharpening algorithm.
Further, in the above chip defect detecting method, the performing chip defect detection on the initial image of the chip by using the target detection model further includes:
when the defects in the chip are not found out, chip defect detection is carried out on the central area of the initial image through the target detection model, and if the defects in the chip are found out, the subsequent steps are carried out; if the defects in the chip are not found, judging that the defects do not exist in the initial image;
the step of obtaining the defect data of the chip comprises generating a quality inspection report of the inspection batch, and collecting and transmitting the defect data of the chip to a local server or a big data system.
In addition, the present invention also provides a chip defect detecting system, which comprises:
the image acquisition unit is used for acquiring an initial image of the chip to be detected;
the first calculation unit is used for carrying out chip defect detection on the initial image of the chip through a target detection model, and the target detection model is formed by carrying out deep learning training on preset defects;
the second calculation unit is used for calculating and analyzing the initial image of the chip with the defect and extracting a chip defect image from the initial image of the chip;
and the data analysis processing unit is used for analyzing and processing the defect information in the chip defect image to obtain the defect data of the chip.
Further, in the above chip defect detecting system, the second calculating unit further includes:
the image segmentation calculation subunit is used for analyzing and processing the initial image through a self-adaptive image segmentation algorithm to obtain a segmentation image of the chip defect, and the segmentation image is provided with a first edge line for limiting the defect edge;
the defect information processing subunit is used for calculating defect information, marking and recording the defect information, and generating a quality inspection report of the detection batch, wherein the defect information comprises a defect position, a defect size and a defect grade;
and the information transmission subunit is used for collecting and transmitting the defect data of the chip to a local server or a big data system.
In addition, the present invention also provides a computer readable storage medium, on which a computer program is stored, the program being executed by a processor to implement the chip defect detecting method as described above.
The invention detects the existing chip defects by using the deep learning algorithm in the artificial intelligence, reduces the error judgment rate of chip defect detection, improves the efficiency of chip defect detection, calculates the chip defect image in the chip initial image by using the digital image processing algorithm, analyzes and processes the defect information in the chip defect image, provides complete defect data analysis, and provides a basic data basis for the production and improvement of chips. The invention improves the error detection efficiency of chip defects and the production efficiency of chips, reduces the production cost and realizes the full automation of the chip defect detection process. The method is simple, easy to realize, low in cost and convenient to popularize.
Drawings
FIG. 1 is a schematic diagram of an application scenario of a chip defect detection method according to an embodiment of the present invention;
FIG. 2 is a flow chart of a chip defect detection method according to an embodiment of the present invention;
FIG. 3 is a first schematic view of an initial image of a defect in the chip of FIG. 2;
FIG. 4 is a second schematic view of the initial image of the chip defect of FIG. 2;
FIG. 5 is a flow chart of the training of the target model of FIG. 2;
FIG. 6 is a schematic structural diagram of a chip defect detection system according to an embodiment of the present invention;
fig. 7 is a schematic diagram of the structure of the second calculation unit in fig. 6.
Detailed Description
In the present embodiment, a chip defect detection method and a chip defect detection system based on artificial intelligence are taken as an example, and the present invention will be described in detail below with reference to specific embodiments and accompanying drawings.
The chip defect detection method provided by the embodiment of the invention comprises the following steps: acquiring an initial image of a chip to be detected; chip defect detection is carried out on the initial image of the chip through a target detection model, and the target detection model is formed by deep learning training on preset defects; when the chip is found to have defects, extracting a chip defect image from the initial image of the chip; and analyzing and processing the defect information in the chip defect image to obtain the defect data of the chip.
Referring to fig. 1 to 4, a chip defect detection method according to an embodiment of the present invention is used for detecting a chip defect 101 existing on an initial image of a chip, and summarizing and analyzing defect data of chips of the same batch to form an analysis report. The method specifically comprises the following steps:
step S11: acquiring an initial image of a chip to be detected;
in a specific implementation, the chip defect detection system comprises an image acquisition device and a detection host. The chip to be detected is placed on the image acquisition equipment, an image acquisition device (not shown) is arranged on the image acquisition equipment, and the image acquisition device is used for shooting an image of the chip to be detected and transmitting the image to the detection host for analysis and processing. In this embodiment, the image acquisition device is a CCD image sensor, and it can be understood that the image acquisition device may also be other imaging devices such as a high definition camera.
That is, the step S11 specifically includes:
and acquiring an initial image of the chip to be detected through a CCD image sensor of the chip defect detection system.
Step S12: chip defect detection is carried out on the initial image of the chip through a target detection model, and the target detection model is formed by deep learning training on preset defects;
in specific implementation, before the target detection model is applied, the target detection model needs to be learned and trained to obtain a more accurate recognition effect. The target detection model of this embodiment includes fast R-CNN, Yolo (young Only Look one), ssd (single Shot multi box Defender), etc., and its principle is roughly: acquiring a large number of training images (defect images of different types and different grades) with a target object, inputting the training images into a target detection model, extracting image characteristics of the target object through the target detection model, and classifying the target object and the image characteristics of the target object; and finally, evaluating the learning and training effects of the target detection models, wherein the loss value of the target detection models is selected for judgment, different target detection model pairs are different from the loss value and are generally below 0.4, and the smaller the loss value is, the higher the target image detection precision is.
Taking the Faster R-CNN target detection model as an example, the model realizes real-time target detection by using a candidate area network, can finely adjust the task of a candidate area and finely adjust the target detection, and the Faster R-CNN target detection model consists of two modules: a deep convolutional Network that extracts candidate regions, and using these regions, the FastR-CNN detector, the Region pro posal Network takes the image as input and generates an output of rectangular candidate regions, each rectangle having a detection score.
Namely, the step S12 further includes:
training a target detection model according to a plurality of different types of chip preset defect training images, so that the defect identification accuracy of the target detection model reaches a preset range.
Referring to fig. 5, the step of training a target detection model according to a plurality of different types of chip predetermined defect training images to make the defect identification accuracy of the target detection model reach a preset range specifically includes:
step S121: acquiring a plurality of chip scheduled defect training images of different types;
in order to achieve a better learning and training effect, a large number (hundreds or thousands of chips) of chip defect training images need to be provided, and the chip defect training images can be of the same type or different types, so that the target detection model can adapt to different types of chip detection.
Step S122: acquiring picture data in a chip scheduled defect training image, marking a defect prior frame and an image name, and inputting the chip scheduled defect training image into a target detection model for training;
before the target detection model is trained, chip defect image frames of different types and different levels preset on a chip image are required to be provided as a chip defect prior frame and a corresponding image name, the different prior frames are set, so that high probability of good matching degree to a target object is achieved, and then the marked chip defect training image is input into the target detection model for training.
Step S123: judging whether the defect identification accuracy of the target detection model is in a preset range, and if so, considering that the target detection model completes training; if not, returning to the step 121, and obtaining the chip scheduled defect training image again to train the target detection model.
After the training of the target detection model is completed, the chip defects in the obtained chip initial image can be identified and positioned through the target detection model, and the target detection model of the embodiment processes the chip initial image, analyzes and identifies the chip defect characteristics, marks the positions of the chip defects, and outputs the target image with the chip defects. In this embodiment, the found chip defects are segmented, the size and size of the defects are calculated to provide a basis for the severity of the defects, and the positions of the defects are marked, so that the defect grades are determined according to the above information.
In specific implementation, before the target detection model is applied, the target detection model needs to be learned and trained to obtain a more accurate recognition effect. The target detection model of this embodiment includes fast R-CNN, Yolo (young Only Look one), ssd (single Shot multi box Defender), etc., and its principle is roughly: acquiring a large number of training images with target objects, presetting prior frames (images with different defect types and different defect grades) near the target objects of the training images, inputting the training images into a target detection model, extracting image characteristics of the target objects through the target detection model, and classifying the target objects and the image characteristics of the target objects; and finally, evaluating the learning and training effects of the target detection models, and judging through the loss values of the target detection models, wherein the different target detection model pairs are different from the loss values and are generally below 0.4, and the smaller the loss value is, the higher the defect identification accuracy is.
Step S13: in the process of detecting the initial image of the chip through the target detection model, whether the defects in the chip are found out is judged, if yes, the step S15 is carried out; if not, go to step S14;
when the method is implemented specifically, a deep learning model is used for detecting the initial image of the chip for the first time, before the model is used, the collected data of the initial image of the chip needs to be marked, model training is carried out by using the marked data so as to screen and search the defects on the chip, when the defects on the chip are detected by primary screening, defect information is marked and defect data analysis is carried out, and when the defects on the chip are not detected by primary screening, in order to avoid omission, the initial image of the chip needs to be screened for the second time.
Step S14: performing secondary detection and analysis processing on the central area of the initial image of the chip through a target detection model, and performing step 15 if the defects in the chip are found out; if any defect in the chip is not found, judging that no defect exists in the initial image.
In specific implementation, the same points of the secondary screening and the primary screening are as follows: the process and the steps for carrying out secondary screening on the initial image of the chip are the same as those of the primary screening, so that omission and misjudgment are avoided. The difference between the secondary screening and the primary screening is as follows: the range of the secondary screening is smaller than that of the primary screening, the secondary screening is mainly concentrated in the central area of the initial image of the chip, and the target detection model of the secondary screening is a model trained by using the picture of the central area of the image. Namely, the secondary screening is more prominent, and the detection efficiency is higher.
Specifically, the central region of the initial image is a region in which chips to be detected are dense in the image or a region in which defects have been detected in the same type of image.
And if the defects are not found on the chip by secondary screening, judging that the chip is not defective. If the chip is detected to have defects in the secondary screening, the subsequent processing procedures and steps are the same as those for finding the chip defects in the primary screening, and the defect information is marked and the defect data is analyzed.
Step S15: performing calculation analysis processing on the initial image through a self-adaptive image segmentation algorithm, and performing segmentation processing on the found chip defects to obtain chip defect images;
in specific implementation, before image processing is performed by applying a self-adaptive image segmentation algorithm, firstly, preprocessing is performed on the target image, wherein the preprocessing comprises the steps of converting the target image into a gray image and performing sharpened edge enhancement; after the target image is converted into the gray image, because the contrast of the initial image of the chip is low, local threshold calculation can be performed in the region of the first edge line through a self-adaptive image segmentation algorithm, so that the defect edge of the chip is identified, and the boundary line of the defect edge of the chip, which is the region near the defect edge of the chip, needs to be further identified, namely the first edge line of the chip defect.
The step S15 specifically includes:
preprocessing the initial image to obtain a gray image of the initial image, wherein the initial image and the gray image respectively have a first edge line for limiting a defect edge;
and performing local threshold calculation in the area of the first edge line in the gray image by using a self-adaptive image segmentation algorithm to obtain a segmented image of the chip defect as a chip defect image.
Specifically, the step of preprocessing the initial image includes:
carrying out noise reduction processing on the initial image through a filter;
converting the initial image into a grayscale image;
and enhancing the contrast of the gray-scale image through an image sharpening algorithm.
The purpose of image sharpening is to improve the contrast of an image, so that the image is clearer, and the contrast of the image is improved by improving the gray level difference of pixels in a neighborhood. The edges and contours are usually located where the gray scale is prominent in the image, so it is intuitive to think of extracting the edges and contours by the difference of gray scale, usually by gradient operators.
The self-adaptive image segmentation algorithm is a local thresholding method, which determines a segmented threshold value according to a neighborhood block of a pixel, wherein the threshold value is determined by the distribution of surrounding pixels, so that the threshold value can be automatically adjusted for a brighter area or a darker area, and the characteristics of a local area of an image are reserved.
1) Mean of local neighborhood blocks:
wherein:
，
；
2) the gaussian weighted sum of local neighborhood blocks, the gaussian formula is as follows:
wherein:
，
，
。
in this embodiment, the parameters in the adaptive image segmentation algorithm include a pixel neighborhood and a weighted mean extraction constant related to a calculation threshold in the adaptive image segmentation algorithm;
wherein the value range of the pixel neighborhood is 35-48; the value range of the weighted average extraction constant is 1-11.
Step S16: calculating defect information, marking and recording, wherein the defect information comprises a defect position, a defect size and a defect grade;
in specific implementation, each chip defect is marked in the initial image of the chip, and the defect type, the defect position, the defect size and the defect grade are recorded respectively aiming at each chip defect.
Specifically, the type and grade of the chip defect are manually defined, and the type of the chip defect generally comprises chip foreign matter, scratch, tin penetration, ball loss and the like. Meanwhile, the severity of the defect is classified into a plurality of levels according to the kind of the defect and the size of the defect.
Step S17: and extracting a chip defect image from the initial image of the chip.
In specific implementation, an image of the chip defect is intercepted according to the defect position of each defect mark in the initial image of the chip, the size of the intercepted chip defect image is larger than that of the defect mark, and the edge line of the intercepted chip defect image is square or circular.
Step S18: and analyzing and processing the defect information in the chip defect image to obtain the defect data of the chip.
In specific implementation, the defect detection results of the chips are stored in the database, image information is recorded, the defect detection results of the chips in the same batch are analyzed in a gathering manner, a defect analysis report of the chips in the batch is given, for example, the defect analysis report comprises statistics of the type, position and number of the defects of each chip, statistics of various defect types, statistics of the yield of the chips in the same batch, whether the same type of defects exist in the same position of the chips in the same batch, and the like, and technical improvement can be provided for the previous production process according to the defect analysis report.
In addition, referring to fig. 6, the present invention further provides a chip defect detecting system for implementing the chip defect detecting method, wherein the system includes:
the image acquisition unit 10 is used for acquiring an initial image of a chip to be detected;
a first computing unit 20, configured to perform chip defect detection on an initial image of the chip through a target detection model, where the target detection model is formed by performing deep learning training on a predetermined defect;
a second calculating unit 30, configured to perform calculation analysis on the initial image of the chip with the defect, and extract a chip defect image from the initial image of the chip;
and the data analysis processing unit 40 is used for analyzing and processing the defect information in the chip defect image to obtain the defect data of the chip.
Referring to fig. 7, the second calculating unit further includes:
an image segmentation calculating subunit 301, configured to perform analysis processing on the initial image through an adaptive image segmentation algorithm to obtain a segmented image of the chip defect, where the segmented image has a first edge line defining a defect edge;
a defect information processing subunit 302, configured to calculate defect information, including defect position, defect size, and defect grade, and perform marking and recording, and generate a quality inspection report of the inspection batch;
and an information transmission subunit 303, configured to collect and transmit the defect data of the chip to a local server or a big data system.
In addition, the present invention also provides a computer readable storage medium, on which a computer program is stored, the program being executed by a processor to implement the chip defect detecting method as described above.
Compared with the prior art, the chip defect detection method has the advantages that the chip defect existing in the artificial intelligent intermediate-depth learning algorithm is detected, the error judgment rate of the chip defect detection is reduced, the chip defect detection efficiency is improved, the chip defect image in the chip initial image is calculated through the digital image processing algorithm, the defect information in the chip defect image is analyzed and processed, the complete defect data analysis is provided, and the basic data basis is provided for the production and improvement of the chip. The invention improves the error detection efficiency of chip defects and the production efficiency of chips, reduces the production cost and realizes the full automation of the chip defect detection process. The method is simple, easy to realize, low in cost and convenient to popularize.
The description and applications of the invention herein are illustrative and are not intended to limit the scope of the invention to the embodiments described above. Variations and modifications of the embodiments disclosed herein are possible, and alternative and equivalent various components of the embodiments will be apparent to those skilled in the art. It will be clear to those skilled in the art that the present invention may be embodied in other forms, structures, arrangements, proportions, and with other components, materials, and parts, without departing from the spirit or essential characteristics thereof. Other variations and modifications of the embodiments disclosed herein may be made without departing from the scope and spirit of the invention.
Claims (10)
1. A chip defect detection method is characterized by comprising the following steps:
acquiring an initial image of a chip to be detected;
chip defect detection is carried out on the initial image of the chip through a target detection model, and the target detection model is formed by deep learning training on preset defects;
when the chip is found to have defects, extracting a chip defect image from the initial image of the chip;
and analyzing and processing the defect information in the chip defect image to obtain the defect data of the chip.
2. The chip defect detection method of claim 1, wherein the step of forming the target detection model by deep learning training of predetermined defects comprises:
training a target detection model according to a plurality of different types of chip preset defect training images, so that the defect identification accuracy of the target detection model reaches a preset range.
3. The chip defect detecting method according to claim 2, wherein the step of training a target detection model according to predetermined defect training images of a plurality of different types of chips so that the defect recognition accuracy of the target detection model reaches a preset range specifically comprises:
acquiring a plurality of chip scheduled defect training images of different types;
acquiring picture data in a chip scheduled defect training image, marking a defect prior frame and an image name, and inputting the chip scheduled defect training image into a target detection model for training;
judging whether the defect identification accuracy of the target detection model is in a preset range, and if so, considering that the target detection model completes training; if not, the preset defect training image of the chip is obtained again to train the target detection model.
4. The chip defect detection method according to claim 2 or 3, wherein the step of extracting the chip defect image from the initial image of the chip specifically comprises:
performing calculation analysis processing on the initial image through a self-adaptive image segmentation algorithm, and performing segmentation processing on the found chip defects to obtain chip defect images;
and calculating defect information, and marking and recording the defect information, wherein the defect information comprises a defect position, a defect size and a defect grade.
5. The chip defect detecting method of claim 4, wherein when the initial image is computed, analyzed and processed by the adaptive image segmentation algorithm, further comprising:
preprocessing the initial image to obtain a gray image of the initial image, wherein the initial image and the gray image respectively have a first edge line for limiting a defect edge;
and performing local threshold calculation in the area of the first edge line in the gray image by using a self-adaptive image segmentation algorithm to obtain a segmented image of the chip defect as a chip defect image.
6. The chip defect detection method of claim 5, wherein the step of preprocessing the initial image comprises:
carrying out noise reduction processing on the initial image through a filter;
converting the initial image into a grayscale image;
and enhancing the contrast of the gray-scale image through an image sharpening algorithm.
7. The chip defect detection method of claim 1, wherein the chip defect detecting the initial image of the chip by the target detection model further comprises:
when the defects in the chip are not found out, chip defect detection is carried out on the central area of the initial image through the target detection model, and if the defects in the chip are found out, the subsequent steps are carried out; if the defects in the chip are not found, judging that the defects do not exist in the initial image;
the step of obtaining the defect data of the chip comprises generating a quality inspection report of the inspection batch, and collecting and transmitting the defect data of the chip to a local server or a big data system.
8. A chip defect detection system, the system comprising:
the image acquisition unit is used for acquiring an initial image of the chip to be detected;
the first calculation unit is used for carrying out chip defect detection on the initial image of the chip through a target detection model, and the target detection model is formed by carrying out deep learning training on preset defects;
the second calculation unit is used for calculating and analyzing the initial image of the chip with the defect and extracting a chip defect image from the initial image of the chip;
and the data analysis processing unit is used for analyzing and processing the defect information in the chip defect image to obtain the defect data of the chip.
9. The chip defect detection system of claim 8, wherein the second computing unit further comprises:
the image segmentation calculation subunit is used for analyzing and processing the initial image through a self-adaptive image segmentation algorithm to obtain a segmentation image of the chip defect, and the segmentation image is provided with a first edge line for limiting the defect edge;
the defect information processing subunit is used for calculating defect information, marking and recording the defect information, and generating a quality inspection report of the detection batch, wherein the defect information comprises a defect position, a defect size and a defect grade;
and the information transmission subunit is used for collecting and transmitting the defect data of the chip to a local server or a big data system.
10. A computer-readable storage medium, on which a computer program is stored, the program being executed by a processor to implement the chip defect detection method according to any one of claims 1 to 7.
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