CN113160746A - Energy-saving driving circuit and driving method of OLED panel - Google Patents
Energy-saving driving circuit and driving method of OLED panel Download PDFInfo
- Publication number
- CN113160746A CN113160746A CN202110431219.7A CN202110431219A CN113160746A CN 113160746 A CN113160746 A CN 113160746A CN 202110431219 A CN202110431219 A CN 202110431219A CN 113160746 A CN113160746 A CN 113160746A
- Authority
- CN
- China
- Prior art keywords
- amplifier
- pixel
- output
- comparison circuit
- switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
The invention relates to the technical field of OLED panels, and provides an energy-saving driving circuit and a driving method of an OLED panel so as to reduce the power consumption of the OLED panel. The energy-saving driving circuit and the driving method comprise four channels, a two-channel pixel comparison circuit, a four-channel pixel comparison circuit and switches for connecting an amplifier and a buffer across the channels are constructed among the channels, and the result of each pixel comparison circuit is used for controlling the starting/closing of the amplifier of the corresponding channel and controlling the conducting/stopping of the corresponding switch, so that in the four-channel driving circuit, when all data of the four channels are the same, the amplifiers of the three channels are closed, the amplifiers of the rest channels simultaneously drive the buffers of the four channels, and at most 75% of AMP quiescent current of the channels can be reduced, thereby further reducing the power consumption of the OLED panel. The comparison circuit with a hierarchical structure is adopted, so that the IC area is reduced.
Description
Technical Field
The invention relates to the technical field of OLED panels, in particular to an energy-saving driving circuit of an OLED panel, an energy-saving driving method of the OLED panel and a low-power-consumption OLED panel adopting the energy-saving driving circuit or the energy-saving driving method.
Background
Recently, the specification of OLED (Organic Light Emitting Diode) panels is getting higher and more, and the functions are getting more and more diversified, and a method for maintaining the service time of a battery is urgently needed when designing the OLED panels. Particularly, in terms of the product characteristics of the OLED panel, the power consumption minimization scheme of the OLED driving chip determines the battery service time when the OLED panel is switched from a standby mode to an off-screen mode (AOD).
Disclosure of Invention
The invention aims to provide an energy-saving driving circuit and method of an OLED panel, so as to reduce the power consumption of the OLED panel.
In order to achieve the purpose, the technical scheme adopted by the invention is as follows:
an energy-saving driving circuit of an OLED panel, comprising:
a first channel having a first pixel latch, a first amplifier, and a first buffer connected in sequence;
a second channel having a second pixel latch, a second amplifier and a second buffer connected in sequence;
a third channel having a third pixel latch, a third amplifier and a third buffer connected in sequence;
a fourth channel having a fourth pixel latch, a fourth amplifier, and a fourth buffer connected in sequence;
the fifth switch is connected between the output end of the second amplifier and the input end of the first buffer;
the sixth switch is connected between the output end of the fourth amplifier and the input end of the third buffer;
the seventh switch is connected between the output end of the fourth amplifier and the input end of the first buffer;
the eighth switch is connected between the output end of the fourth amplifier and the input end of the second buffer;
the first pixel comparison circuit is respectively connected with the output ends of the first and second pixel latches, the control end of the first amplifier and the control end of the fifth switch;
the second pixel comparison circuit is respectively connected with the output ends of the third and fourth pixel latches, the control end of the third amplifier and the control end of the sixth switch; and
and the third pixel comparison circuit is respectively connected with the output ends of the first and second pixel comparison circuits, the output ends of the second and third pixel latches, the control end of the second amplifier and the control ends of the seventh and eighth switches.
Preferably, the energy-saving driving circuit further includes:
a fifth channel having a fifth pixel latch, a fifth amplifier, and a fifth buffer connected in sequence;
a sixth channel having a sixth pixel latch, a sixth amplifier, and a sixth buffer connected in sequence;
a seventh channel having a seventh pixel latch, a seventh amplifier, and a seventh buffer connected in sequence;
an eighth channel having an eighth pixel latch, an eighth amplifier, and an eighth buffer connected in sequence;
the thirteenth switch is connected between the output end of the sixth amplifier and the input end of the fifth buffer;
a fourteenth switch connected between the output terminal of the eighth amplifier and the input terminal of the seventh buffer;
the fifteenth switch is connected between the output end of the eighth amplifier and the input end of the fifth buffer;
the sixteenth switch is connected between the output end of the eighth amplifier and the input end of the sixth buffer;
a seventeenth switch connected between the output terminal of the eighth amplifier and the input terminal of the first buffer;
the eighteenth switch is connected between the output end of the eighth amplifier and the input end of the second buffer;
the nineteenth switch is connected between the output end of the eighth amplifier and the input end of the third buffer;
a twentieth switch connected between the output terminal of the eighth amplifier and the input terminal of the fourth buffer;
the fourth pixel comparison circuit is respectively connected with the output ends of the fifth and sixth pixel latches, the control end of the fifth amplifier and the control end of the thirteenth switch;
the fifth pixel comparison circuit is respectively connected with the output ends of the seventh pixel latch and the eighth pixel latch, the control end of the seventh amplifier and the control end of the fourteenth switch;
the sixth pixel comparison circuit is respectively connected with the output ends of the fourth and fifth pixel comparison circuits, the output ends of the sixth and seventh pixel latches, the control end of the sixth amplifier and the control ends of the fifteenth and sixteenth switches; and
and the seventh pixel comparison circuit is respectively connected with the output ends of the third and sixth pixel comparison circuits, the output ends of the fourth and fifth pixel latches, the control end of the fourth amplifier and the control ends of the seventeenth to twentieth switches.
Preferably, the pixel latches in each channel are connected to the amplifier via a digital-to-analog converter and a decoder, respectively.
An energy-saving driving method of an OLED panel adopts the four-channel energy-saving driving circuit, and the driving method comprises the following steps:
when the data output by the first pixel latch is the same as the data output by the second pixel latch, the output of the first pixel comparison circuit enables the first amplifier to be closed and the fifth switch to be conducted, and the second amplifier outputs the data to the first buffer and the second buffer;
when the data output by the third pixel latch is the same as the data output by the fourth pixel latch, the output of the second pixel comparison circuit enables the third amplifier to be closed and the sixth switch to be conducted, and the fourth amplifier outputs the data to the third buffer and the fourth buffer;
when the data output by the first to fourth pixel latches are the same, the output of the first pixel comparison circuit turns off the first amplifier, the output of the second pixel comparison circuit turns off the third amplifier and turns on the sixth switch, the output of the third pixel comparison circuit turns off the second amplifier and turns on the seventh and eighth switches, and the fourth amplifier outputs the data to the first to fourth buffers.
An energy-saving driving method of an OLED panel, which adopts the eight-channel energy-saving driving circuit, comprises the following steps:
when the data output by the first pixel latch is the same as the data output by the second pixel latch, the output of the first pixel comparison circuit enables the first amplifier to be closed and the fifth switch to be conducted, and the second amplifier outputs the data to the first buffer and the second buffer;
when the data output by the third pixel latch is the same as the data output by the fourth pixel latch, the output of the second pixel comparison circuit enables the third amplifier to be closed and the sixth switch to be conducted, and the fourth amplifier outputs the data to the third buffer and the fourth buffer;
when the data output by the first pixel latch, the second pixel latch, the third pixel latch, the fourth pixel latch and the fourth pixel latch are the same, the output of the first pixel comparison circuit enables the first amplifier to be closed, the output of the second pixel comparison circuit enables the third amplifier to be closed, the sixth switch is conducted, the output of the third pixel comparison circuit enables the second amplifier to be closed, the seventh switch and the eighth switch are conducted, and the fourth amplifier outputs the data to the first buffer, the second buffer, the fourth buffer and the fourth buffer;
when the data output by the fifth pixel latch is the same as the data output by the sixth pixel latch, the output of the fourth pixel comparison circuit enables the fifth amplifier to be closed and the thirteenth switch to be turned on, and the sixth amplifier outputs the data to the fifth buffer and the sixth buffer;
when the data output by the seventh pixel latch is the same as the data output by the eighth pixel latch, the output of the fifth pixel comparison circuit enables the seventh amplifier to be closed and the fourteenth switch to be turned on, and the eighth amplifier outputs the data to the seventh buffer and the eighth buffer;
when the data output by the fifth to eighth pixel latches are the same, the output of the fourth pixel comparison circuit turns off the fifth amplifier, the output of the fifth pixel comparison circuit turns off the seventh amplifier and turns on the fourteenth switch, the output of the sixth pixel comparison circuit turns off the sixth amplifier and turns on the fifteenth and sixteenth switches, and the eighth amplifier outputs the data to the fifth to eighth buffers;
when the data output by the first to eighth pixel latches are the same, the output of the first pixel comparison circuit turns off the first amplifier, the output of the second pixel comparison circuit turns off the third amplifier, the output of the third pixel comparison circuit turns off the second amplifier, the output of the fourth pixel comparison circuit turns off the fifth amplifier, the output of the fifth pixel comparison circuit turns off the seventh amplifier and turns on the fourteenth switch, the output of the sixth pixel comparison circuit turns off the sixth amplifier and turns on the fifteenth and sixteenth switches, the output of the seventh pixel comparison circuit turns off the fourth amplifier and turns on the seventeenth to twentieth switches, and the eighth amplifier outputs data to the first to eighth buffers.
Adopt the low-power consumption OLED panel of the energy-saving driving circuit as above.
Adopt the low-power consumption OLED panel of the energy-saving driving method as above.
Compared with the prior art, the invention has at least the following beneficial effects:
when four channels are used, up to 75% of the channel AMP (amplifier) quiescent current can be reduced. When eight channels are used, the channel AMP quiescent current can be reduced by up to 87.5%.
In addition, the first pixel comparison circuit, the second pixel comparison circuit, the fourth pixel comparison circuit, and the fifth pixel comparison circuit each generate a two-channel comparison result using the results of the two pixel latches, the third pixel comparison circuit generates a four-channel comparison result using the results of the first pixel comparison circuit and the second pixel comparison circuit, the sixth pixel comparison circuit generates a four-channel comparison result using the results of the fourth pixel comparison circuit and the fifth pixel comparison circuit, and the seventh pixel comparison circuit generates an eight-channel comparison result, that is, a comparison circuit employing a hierarchical structure, using the results of the third pixel comparison circuit and the sixth pixel comparison circuit. Compared with the complex way of comparing all pixel latches, the hierarchical comparison circuit reduces the area of an Integrated Circuit (IC).
Drawings
FIG. 1 is a circuit block diagram of a first embodiment;
FIG. 2 is a circuit block diagram of a second embodiment;
reference numerals:
10. a first channel;
11. a first pixel latch; 12. a first digital-to-analog converter; 13. a first decoder; 14. a first amplifier; 15. a first switch; 16. a first buffer;
20. a second channel;
21. a second pixel latch; 22. a second digital-to-analog converter; 23. a second decoder; 24. a second amplifier; 25. a second switch; 26. a second buffer;
30. a third channel;
31. a third pixel latch; 32. a third digital-to-analog converter; 33. a third decoder; 34. a third amplifier; 35. a third switch; 36. a third buffer;
40. a fourth channel;
41. a fourth pixel latch; 42. a fourth digital-to-analog converter; 43. a fourth decoder; 44. a fourth amplifier; 45. a fourth switch; 46. a fourth buffer;
50. a fifth channel;
51. a fifth pixel latch; 52. a fifth digital-to-analog converter; 53. a fifth decoder; 54. a fifth amplifier; 55. a ninth switch; 56. a fifth buffer;
60. a sixth channel;
61. a sixth pixel latch; 62. a sixth digital-to-analog converter; 63. a sixth decoder; 64. a sixth amplifier; 65. a tenth switch; 66. a sixth buffer;
70. a seventh channel;
71. a seventh pixel latch; 72. a seventh digital-to-analog converter; 73. a seventh decoder; 74. a seventh amplifier; 75. an eleventh switch; 76. a seventh buffer;
80. an eighth channel;
81. an eighth pixel latch; 82. an eighth digital-to-analog converter; 83. an eighth decoder; 84. an eighth amplifier; 85. a twelfth switch; 86. an eighth buffer;
91. a first pixel comparison circuit; 92. a third pixel comparison circuit; 93. a second pixel comparison circuit; 94. a seventh pixel comparison circuit; 95. a fourth pixel comparison circuit; 96. a sixth pixel comparison circuit; 97. a fifth pixel comparison circuit;
101. a fifth switch; 102. a sixth switch; 103. a thirteenth switch; 104. a fourteenth switch; 105. a seventh switch; 106. an eighth switch; 107. a fifteenth switch; 108. a sixteenth switch; 109. a seventeenth switch; 110. an eighteenth switch; 111. a nineteenth switch; 112. and a twentieth switch.
Detailed Description
The invention is further illustrated with reference to the following figures and examples.
The first embodiment:
referring to fig. 1, the energy-saving driving circuit includes: a first channel 10, a second channel 20, a third channel 30, a fourth channel 40, a fifth switch 101, a sixth switch 102, a seventh switch 105, an eighth switch 106, a first pixel comparison circuit 91, a second pixel comparison circuit 93, and a third pixel comparison circuit 92.
The first channel 10 has a first pixel latch 11, a first digital-to-analog converter (L/S)12, a first Decoder (DEC)13, a first amplifier 14, and a first buffer 16 connected in sequence; the second channel 20 has a second pixel latch 21, a second digital-to-analog converter 22, a second decoder 23, a second amplifier 24, and a second buffer 26 connected in sequence; the third channel 30 has a third pixel latch 31, a third digital-to-analog converter 32, a third decoder 33, a third amplifier 34, and a third buffer 36 connected in sequence; the fourth channel 40 has a fourth pixel latch 41, a fourth digital-to-analog converter 42, a fourth decoder 43, a fourth amplifier 44, and a fourth buffer 46 connected in series. The fifth switch 101 is connected between the output of the second amplifier 24 and the input of the first buffer 16; the sixth switch 102 is connected between the output of the fourth amplifier 44 and the input of the third buffer 36; the seventh switch 105 is connected between the output of the fourth amplifier 44 and the input of the first buffer 16; an eighth switch 106 is connected between the output of the fourth amplifier 44 and the input of the second buffer 26. The first pixel comparing circuit 91 is connected to the output terminal of the first pixel latch 11 and the output terminal of the second pixel latch 21, the control terminal of the first amplifier 14, and the control terminal of the fifth switch 101, respectively. The second pixel comparison circuit 93 is connected to the output terminal of the third pixel latch 31 and the output terminal of the fourth pixel latch 41, the control terminal of the third amplifier 34, and the control terminal of the sixth switch 102, respectively. The third pixel comparison circuit 92 is connected to the output terminal of the first pixel comparison circuit 91 and the output terminal of the second pixel comparison circuit 93, the output terminal of the second pixel latch 21 and the output terminal of the third pixel latch 31, the control terminal of the second amplifier 24, the control terminal of the seventh switch 105, and the control terminal of the eighth switch 106, respectively.
The driving method of the energy-saving driving circuit comprises the following steps:
when the data output by the first pixel latch 11 and the data output by the second pixel latch 21 are the same, the output of the first pixel comparison circuit 91 turns off the first amplifier 14 and turns on the fifth switch 101, and the second amplifier 24 outputs the data to the first buffer 16 and the second buffer 26; otherwise, both the first amplifier 14 and the second amplifier 24 are turned on;
when the data output by the third pixel latch 31 and the data output by the fourth pixel latch 41 are the same, the output of the second pixel comparison circuit 93 turns off the third amplifier 34 and turns on the sixth switch 102, and the fourth amplifier 44 outputs the data to the third buffer 36 and the fourth buffer 46; otherwise, both the third amplifier 34 and the fourth amplifier 44 are turned on;
when the data output by the first pixel latch 41, the second pixel latch 42, the third pixel latch 43 and the fourth pixel latch 44 are all the same, the output of the first pixel comparison circuit 91 turns off the first amplifier 14, the output of the second pixel comparison circuit 93 turns off the third amplifier 34 and turns on the sixth switch 102, the output of the third pixel comparison circuit 92 turns off the second amplifier 24 and turns on the seventh switch 105 and the eighth switch 106, and the fourth amplifier 44 outputs the data to the first buffer 16, the second buffer 26, the third buffer 36 and the fourth buffer 46 at the same time; otherwise, both the second amplifier 24 and the fourth amplifier 44 are turned on.
As can be seen from the above, when the data output from the first to fourth pixel latches are all the same, the first amplifier 14, the second amplifier 24, and the third amplifier 34 are all turned off, and the fourth amplifier 44 drives the first buffer 16, the second buffer 26, the third buffer 36, and the fourth buffer 46 simultaneously, the channel AMP quiescent current can be reduced by 75%. The first pixel comparison circuit 91 and the second pixel comparison circuit 93 each generate a two-channel comparison result using the results of the two pixel latches, and the third pixel comparison circuit 92 generates a four-channel comparison result using the results of the first pixel comparison circuit 91, the results of the second pixel comparison circuit 93, the output data of the second pixel latch 21, and the output data of the third pixel latch 31, that is, a comparison circuit having a hierarchical structure. The hierarchical comparison circuit reduces the IC area compared to the complex manner in which all pixel latches are compared.
The formula of the four-channel energy-saving driving circuit is as follows:
if(LATCH1==LATCH2)
2CH_COMP_EN[0]=1,CH1 AMP1=OFF,CH2 AMP2=ON
Else
2CH_COMP_EN[0]=0,CH1 AMP1=ON,CH2 AMP2=ON
if(LATCH3==LATCH4)
2CH_COMP_EN[1]=1,CH3 AMP3=OFF,CH4 AMP4=ON
Else
2CH_COMP_EN[1]=0,CH3 AMP3=ON,CH4 AMP4=ON
if(2CH_COMP_EN[1:0]=11&&(LATCH2==LATCH3))
4CH_COMP_EN=1,CH2 AMP2=OFF,CH4 AMP4=ON
Else
4CH_COMP_EN=0,CH2 AMP2=ON,CH4 AMP4=ON
second embodiment:
referring to fig. 2, the energy-saving driving circuit includes: the first channel 10, the second channel 20, the third channel 30, the fourth channel 40, the fifth channel 50, the sixth channel 60, the seventh channel 70, the eighth channel 80, the fifth switch 101, the sixth switch 102, the seventh switch 105, the eighth switch 106, the thirteenth switch 103, the fourteenth switch 104, the fifteenth switch 107, the sixteenth switch 108, the seventeenth switch 109, the eighteenth switch 110, the nineteenth switch 111, the twentieth switch 112, the first pixel comparison circuit 91, the second pixel comparison circuit 93, the third pixel comparison circuit 92, the fourth pixel comparison circuit 95, the fifth pixel comparison circuit 97, the sixth pixel comparison circuit 96, and the seventh pixel comparison circuit 94.
The first channel 10 has a first pixel latch 11, a first digital-to-analog converter 12, a first decoder 13, a first amplifier 14, and a first buffer 16 connected in sequence; the second channel 20 has a second pixel latch 21, a second digital-to-analog converter 22, a second decoder 23, a second amplifier 24, and a second buffer 26 connected in sequence; the third channel 30 has a third pixel latch 31, a third digital-to-analog converter 32, a third decoder 33, a third amplifier 34, and a third buffer 36 connected in sequence; the fourth channel 40 has a fourth pixel latch 41, a fourth digital-to-analog converter 42, a fourth decoder 43, a fourth amplifier 44, and a fourth buffer 46 connected in series; the fifth channel 50 has a fifth pixel latch 51, a fifth digital-to-analog converter 52, a fifth decoder 53, a fifth amplifier 54, and a fifth buffer 56 connected in sequence; the sixth channel 60 has a sixth pixel latch 61, a sixth digital-to-analog converter 62, a sixth decoder 63, a sixth amplifier 64, and a sixth buffer 66 connected in sequence; the seventh channel 70 has a seventh pixel latch 71, a seventh digital-to-analog converter 72, a seventh decoder 73, a seventh amplifier 74, and a seventh buffer 76, which are connected in this order; the eighth channel 80 has an eighth pixel latch 81, an eighth digital-to-analog converter 82, an eighth decoder 83, an eighth amplifier 84, and an eighth buffer 86 connected in series.
The fifth switch 101 is connected between the output of the second amplifier 24 and the input of the first buffer 16; the sixth switch 102 is connected between the output of the fourth amplifier 44 and the input of the third buffer 36; the seventh switch 105 is connected between the output of the fourth amplifier 44 and the input of the first buffer 16; the eighth switch 106 is connected between the output of the fourth amplifier 44 and the input of the second buffer 26; the thirteenth switch 103 is connected between the output of the sixth amplifier 64 and the input of the fifth buffer 56; the fourteenth switch 104 is connected between the output terminal of the eighth amplifier 84 and the input terminal of the seventh buffer 76; a fifteenth switch 107 is connected between the output of the eighth amplifier 84 and the input of the fifth buffer 56; a sixteenth switch 108 is connected between the output of the eighth amplifier 84 and the input of the sixth buffer 66; the seventeenth switch 109 is connected between the output of the eighth amplifier 84 and the input of the first buffer 16; the eighteenth switch 110 is connected between the output of the eighth amplifier 84 and the input of the second buffer 26; the nineteenth switch 111 is connected between the output terminal of the eighth amplifier 84 and the input terminal of the third buffer 36; a twentieth switch 112 is connected between the output of the eighth amplifier 84 and the input of the fourth buffer 46.
The first pixel comparing circuit 91 is connected to the output terminal of the first pixel latch 11 and the output terminal of the second pixel latch 21, the control terminal of the first amplifier 14, and the control terminal of the fifth switch 101, respectively. The second pixel comparison circuit 93 is connected to the output terminal of the third pixel latch 31 and the output terminal of the fourth pixel latch 41, the control terminal of the third amplifier 34, and the control terminal of the sixth switch 102, respectively. The third pixel comparison circuit 92 is connected to the output terminal of the first pixel comparison circuit 91 and the output terminal of the second pixel comparison circuit 93, the output terminal of the second pixel latch 21 and the output terminal of the third pixel latch 31, the control terminal of the second amplifier 24, the control terminal of the seventh switch 105, and the control terminal of the eighth switch 106, respectively. Fourth pixel comparison circuit 95 is coupled to the output of fifth pixel latch 51 and the output of sixth pixel latch 61, a control terminal of fifth amplifier 54, and a control terminal of thirteenth switch 103, respectively. Fifth pixel comparison circuit 97 is coupled to the output of seventh pixel latch 71 and the output of eighth pixel latch 81, respectively, to the control terminal of seventh amplifier 74, and to the control terminal of fourteenth switch 104. The sixth pixel comparison circuit 96 is connected to an output terminal of the fourth pixel comparison circuit 95 and an output terminal of the fifth pixel comparison circuit 97, an output terminal of the sixth pixel latch 61 and an output terminal of the seventh pixel latch 71, a control terminal of the sixth amplifier 64, a control terminal of the fifteenth switch 107, and a control terminal of the sixteenth switch 108, respectively. The seventh pixel comparison circuit 94 is connected to the output terminal of the third pixel comparison circuit 92 and the output terminal of the sixth pixel comparison circuit 96, the output terminal of the fourth pixel latch 41 and the output terminal of the fifth pixel latch 51, the control terminal of the fourth amplifier 44, the control terminal of the seventeenth switch 109, the control terminal of the eighteenth switch 110, the control terminal of the nineteenth switch 111, and the control terminal of the twentieth switch 112, respectively.
The driving method of the energy-saving driving circuit of the second embodiment is as follows:
when the data output by the first pixel latch 11 and the data output by the second pixel latch 21 are the same, the output of the first pixel comparison circuit 91 turns off the first amplifier 14 and turns on the fifth switch 101, and the second amplifier 24 outputs the data to the first buffer 16 and the second buffer 26; otherwise, both the first amplifier 14 and the second amplifier 24 are turned on;
when the data output by the third pixel latch 31 and the data output by the fourth pixel latch 41 are the same, the output of the second pixel comparison circuit 93 turns off the third amplifier 34 and turns on the sixth switch 102, and the fourth amplifier 44 outputs the data to the third buffer 36 and the fourth buffer 46; otherwise, both the third amplifier 34 and the fourth amplifier 44 are turned on;
when the data output by the first pixel latch 41, the second pixel latch 42, the third pixel latch 43 and the fourth pixel latch 44 are all the same, the output of the first pixel comparison circuit 91 turns off the first amplifier 14, the output of the second pixel comparison circuit 93 turns off the third amplifier 34 and turns on the sixth switch 102, the output of the third pixel comparison circuit 92 turns off the second amplifier 24 and turns on the seventh switch 105 and the eighth switch 106, and the fourth amplifier 44 outputs the data to the first buffer 16, the second buffer 26, the third buffer 36 and the fourth buffer 46 at the same time; otherwise, both the second amplifier 24 and the fourth amplifier 44 are turned on;
when the data output by the fifth pixel latch 51 is the same as the data output by the sixth pixel latch 61, the output of the fourth pixel comparison circuit 95 turns off the fifth amplifier 54 and turns on the thirteenth switch 103, and the sixth amplifier 64 outputs the data to the fifth buffer 56 and the sixth buffer 66; otherwise, both the fifth amplifier 54 and the sixth amplifier 64 are turned on;
when the data output by the seventh pixel latch 71 and the data output by the eighth pixel latch 81 are the same, the output of the fifth pixel comparison circuit 97 turns off the seventh amplifier 74 and turns on the fourteenth switch 104, and the eighth amplifier 84 outputs the data to the seventh buffer 76 and the eighth buffer 86; otherwise, both the seventh amplifier 74 and the eighth amplifier 84 are turned on;
when the data output by the fifth pixel latch 51, the sixth pixel latch 61, the seventh pixel latch 71 and the eighth pixel latch 81 are the same, the output of the fourth pixel comparison circuit 95 turns off the fifth amplifier 54, the output of the fifth pixel comparison circuit 97 turns off the seventh amplifier 74 and turns on the fourteenth switch 104, the output of the sixth pixel comparison circuit 96 turns off the sixth amplifier 64 and turns on the fifteenth switch 107 and the sixteenth switch 108, and the eighth amplifier 84 outputs the data to the fifth buffer 56, the sixth buffer 66, the seventh buffer 76 and the eighth buffer 86 at the same time; otherwise, both the sixth amplifier 64 and the eighth amplifier 84 are turned on;
when the data output from the first to eighth pixel latches are the same, the output of the first pixel comparison circuit 91 turns off the first amplifier 14, the output of the second pixel comparison circuit 93 turns off the third amplifier 34, the output of the third pixel comparison circuit 92 turns off the second amplifier 24, the output of the fourth pixel comparison circuit 95 turns off the fifth amplifier 54, the output of the fifth pixel comparison circuit 97 turns off the seventh amplifier 74 and turns on the fourteenth switch 104, the output of the sixth pixel comparison circuit 96 turns off the sixth amplifier 64 and turns on the fifteenth switch 107 and the sixteenth switch 108, the output of the seventh pixel comparison circuit 94 turns off the fourth amplifier 44 and turns on the seventeenth switch 109, the eighteenth switch 110, the nineteenth switch 111 and the twentieth switch 112, and the eighth amplifier 84 simultaneously outputs the data to the first buffer 16, A second buffer 26, a third buffer 36, a fourth buffer 46, a fifth buffer 56, a sixth buffer 66, a seventh buffer 76, and an eighth buffer 86; otherwise, both the fourth amplifier 44 and the eighth amplifier 84 are turned on.
The formula of the eight-channel energy-saving driving circuit is as follows:
if(LATCH1==LATCH2)
2CH_COMP_EN[0]=1,CH1 AMP1=OFF,CH2 AMP2=ON
Else
2CH_COMP_EN[0]=0,CH1 AMP1=ON,CH2 AMP2=ON
if(LATCH3==LATCH4)
2CH_COMP_EN[1]=1,CH3 AMP3=OFF,CH4 AMP4=ON
Else
2CH_COMP_EN[1]=0,CH3 AMP3=ON,CH4 AMP4=ON
if(2CH_COMP_EN[1:0]=11&&(LATCH2==LATCH3))
4CH_COMP_EN[0]=1,CH2 AMP2=OFF,CH4 AMP4=ON
Else
4CH_COMP_EN[0]=0,CH2 AMP2=ON,CH4 AMP4=ON
if(LATCH5==LATCH6)
2CH_COMP_EN[2]=1,CH5 AMP5=OFF,CH6 AMP6=ON
Else
2CH_COMP_EN[2]=0,CH5 AMP5=ON,CH6 AMP6=ON
if(LATCH7==LATCH8)
2CH_COMP_EN[3]=1,CH7 AMP7=OFF,CH8 AMP8=ON
Else
2CH_COMP_EN[3]=0,CH7 AMP7=ON,CH8 AMP8=ON
if(2CH_COMP_EN[3:2]=11&&(LATCH6==LATCH7))
4CH_COMP_EN[1]=1,CH6 AMP6=OFF,CH8 AMP8=ON
Else
4CH_COMP_EN[1]=0,CH6 AMP6=ON,CH8 AMP8=ON
if(4CH_COMP_EN[1:0]=11&&(LATCH4==LATCH5))
8CH_COMP_EN=1,CH4 AMP4=OFF,CH8 AMP8=ON
else
8CH_COMP_EN=0,CH4 AMP4=ON,CH8 AMP8=ON
in the eight-channel energy-saving driving circuit, under different conditions, the states and power consumption of the amplifiers are as follows, and CH in the table represents a channel.
As can be seen from the above table, there are various cases according to the difference of the output data of the pixel latches of the eight channels. Case a is a case where data is different for all channels, in which case amplifiers for all channels are in an ON state and power consumption is 100%. The case b is a case where the first and second channel data are the same and the fifth and sixth channel data are the same, in which case the amplifiers in the first and fifth channels are in an OFF state, the quiescent current of the two channels AMP can be reduced and the power consumption is 75%. The case c is a case where data of adjacent four channels (i.e., fifth to eighth channels) are the same, three amplifiers in the four channels are in an OFF state, quiescent current of the three channels AMP can be reduced, and power consumption is 62.5%. The case d is a case where the first and second channel data are the same and the fifth to eighth channel data are the same, in which case the amplifiers in the four channels are in the OFF state, the quiescent current of the four channels AMP can be reduced, and the power consumption is 50%. Case e is a case where the data of eight channels are all the same, in which case the amplifiers in the seven channels are in the OFF state, the quiescent current of the seven channels AMP can be reduced, and the power consumption is 12.5%.
As can be seen from the above description, with the second embodiment, when the data output from the first to eighth pixel latches are all the same, the first amplifier 14, the second amplifier 24, the first to eighth buffers are all turned off, and the channel AMP quiescent current can be reduced by 87.5% at most by driving the first to eighth buffers through the eighth amplifier 84. In addition, the second embodiment employs a hierarchical comparison circuit, namely: the first pixel comparison circuit 91, the second pixel comparison circuit 93, the fourth pixel comparison circuit 95, and the fifth pixel comparison circuit 97 each generate a two-channel comparison result using the results of the two pixel latches, the third pixel comparison circuit 92 generates a four-channel comparison result using the result of the first pixel comparison circuit 91, the result of the second pixel comparison circuit 93, the result of the second pixel latch 21, and the result of the third pixel latch 31, the sixth pixel comparison circuit 96 generates a four-channel comparison result using the result of the fourth pixel comparison circuit 95, the result of the fifth pixel comparison circuit 97, the result of the sixth pixel latch 61, and the result of the seventh pixel latch 71, the seventh pixel comparison circuit 94 generates an eight-channel comparison result using the result of the third pixel comparison circuit 92, the result of the sixth pixel comparison circuit 96, the result of the fourth pixel latch 41, and the result of the fifth pixel latch 51. This hierarchical structure of the comparison circuit reduces the IC area compared to the complex way of comparing all the pixel latches.
The third embodiment:
the low-power OLED panel adopting the four-channel energy-saving driving circuit of the first embodiment.
The fourth embodiment:
the low-power OLED panel adopting the eight-channel energy-saving driving circuit of the second embodiment.
Fifth embodiment:
the low-power-consumption OLED panel adopts the energy-saving driving method in the first embodiment.
Sixth embodiment:
and a low power consumption OLED panel adopting the energy-saving driving method in the second embodiment.
The present invention has been described in detail with reference to the specific embodiments, and the detailed description is only for the purpose of helping those skilled in the art understand the present invention, and is not to be construed as limiting the scope of the present invention. Various modifications, equivalent changes, etc. made by those skilled in the art under the spirit of the present invention shall be included in the protection scope of the present invention.
Claims (8)
1. An energy-saving driving circuit of an OLED panel is characterized by comprising:
a first channel (10) having a first pixel latch (11), a first amplifier (14) and a first buffer (16) connected in sequence;
a second channel (20) having a second pixel latch (21), a second amplifier (24) and a second buffer (26) connected in sequence;
a third channel (30) having a third pixel latch (31), a third amplifier (34) and a third buffer (36) connected in sequence;
a fourth channel (40) having a fourth pixel latch (41), a fourth amplifier (44) and a fourth buffer (46) connected in series;
a fifth switch (101) connected between the output of the second amplifier (24) and the input of the first buffer (16);
a sixth switch (102) connected between the output of the fourth amplifier (44) and the input of the third buffer (36);
a seventh switch (105) connected between the output of the fourth amplifier (44) and the input of the first buffer (16);
an eighth switch (106) connected between the output of the fourth amplifier (44) and the input of the second buffer (26);
a first pixel comparison circuit (91) connected to the output terminals of the first and second pixel latches (11 and 21), the control terminal of the first amplifier (14) and the control terminal of the fifth switch (101), respectively;
a second pixel comparison circuit (93) connected to the output terminals of the third and fourth pixel latches (31 and 41), the control terminal of the third amplifier (34), and the control terminal of the sixth switch (102), respectively; and
and a third pixel comparison circuit (92) connected to the output terminals of the first and second pixel comparison circuits (91 and 93), the output terminals of the second and third pixel latches (21 and 31), the control terminal of the second amplifier (24), and the control terminals of the seventh and eighth switches (105 and 106), respectively.
2. The energy-saving driving circuit of an OLED panel according to claim 1, further comprising:
a fifth channel (50) having a fifth pixel latch (51), a fifth amplifier (54), and a fifth buffer (56) connected in sequence;
a sixth channel (60) having a sixth pixel latch (61), a sixth amplifier (64), and a sixth buffer (66) connected in sequence;
a seventh channel (70) having a seventh pixel latch (71), a seventh amplifier (74), and a seventh buffer (76) connected in sequence;
an eighth channel (80) having an eighth pixel latch (81), an eighth amplifier (84), and an eighth buffer (86) connected in series;
a thirteenth switch (103) connected between the output terminal of the sixth amplifier (64) and the input terminal of the fifth buffer (56);
a fourteenth switch (104) connected between the output of the eighth amplifier (84) and the input of the seventh buffer (76);
a fifteenth switch (107) connected between the output of the eighth amplifier (84) and the input of the fifth buffer (56);
a sixteenth switch (108) connected between the output terminal of the eighth amplifier (84) and the input terminal of the sixth buffer (66);
a seventeenth switch (109) connected between the output of the eighth amplifier (84) and the input of the first buffer (16);
an eighteenth switch (110) connected between the output of the eighth amplifier (84) and the input of the second buffer (26);
a nineteenth switch (111) connected between the output terminal of the eighth amplifier (84) and the input terminal of the third buffer (36);
a twentieth switch (112) connected between the output of the eighth amplifier (84) and the input of the fourth buffer (46);
a fourth pixel comparison circuit (95) connected to the output terminals of the fifth and sixth pixel latches (51 and 61), the control terminal of the fifth amplifier (54), and the control terminal of the thirteenth switch (103), respectively;
a fifth pixel comparison circuit (97) connected to the output terminals of the seventh and eighth pixel latches (71 and 81), the control terminal of the seventh amplifier (74), and the control terminal of the fourteenth switch (104), respectively;
a sixth pixel comparison circuit (96) connected to output terminals of the fourth and fifth pixel comparison circuits (95 and 97), output terminals of the sixth and seventh pixel latches (61 and 71), a control terminal of the sixth amplifier (64), and control terminals of the fifteenth and sixteenth switches (107 and 108), respectively; and
and a seventh pixel comparison circuit (94) connected to output terminals of the third and sixth pixel comparison circuits (92 and 96), output terminals of the fourth and fifth pixel latches (41 and 51), a control terminal of the fourth amplifier (44), and control terminals of the seventeenth to twentieth switches (109, 110, 111, 112), respectively.
3. The OLED panel power-saving driving circuit of claim 2 or 3, wherein the pixel latches in each channel are connected to the amplifier via a digital-to-analog converter and a decoder, respectively.
4. An energy-saving driving method of an OLED panel, using the energy-saving driving circuit of claim 1, the driving method comprising:
when the data output by the first pixel latch (11) and the data output by the second pixel latch (21) are the same, the output of the first pixel comparison circuit (91) enables the first amplifier (14) to be closed and the fifth switch (101) to be turned on, and the second amplifier (24) outputs the data to the first and second buffers (16 and 26);
when the data output by the third pixel latch (31) and the data output by the fourth pixel latch (41) are the same, the output of the second pixel comparison circuit (93) enables the third amplifier (34) to be closed and the sixth switch (102) to be turned on, and the fourth amplifier (44) outputs the data to the third and fourth buffers (36 and 46);
when the data output by the first to fourth pixel latches (11, 21, 31, 41) are the same, the output of the first pixel comparison circuit (91) turns off the first amplifier (14), the output of the second pixel comparison circuit (93) turns off the third amplifier (34) and the sixth switch (102) is turned on, the output of the third pixel comparison circuit (92) turns off the second amplifier (24) and the seventh and eighth switches (105 and 106) are both turned on, and the fourth amplifier (44) outputs the data to the first to fourth buffers (16, 26, 36, 46).
5. An energy-saving driving method of an OLED panel, using the energy-saving driving circuit of claim 2, the driving method comprising:
when the data output by the first pixel latch (11) and the data output by the second pixel latch (21) are the same, the output of the first pixel comparison circuit (91) enables the first amplifier (14) to be closed and the fifth switch (101) to be turned on, and the second amplifier (24) outputs the data to the first and second buffers (16 and 26);
when the data output by the third pixel latch (31) and the data output by the fourth pixel latch (41) are the same, the output of the second pixel comparison circuit (93) enables the third amplifier (34) to be closed and the sixth switch (102) to be turned on, and the fourth amplifier (44) outputs the data to the third and fourth buffers (36 and 46);
when the data output by the first to fourth pixel latches (11, 21, 31, 41) are the same, the output of the first pixel comparison circuit (91) turns off the first amplifier (14), the output of the second pixel comparison circuit (93) turns off the third amplifier (34) and the sixth switch (102) is turned on, the output of the third pixel comparison circuit (92) turns off the second amplifier (24) and the seventh and eighth switches (105 and 106) are both turned on, and the fourth amplifier (44) outputs the data to the first to fourth buffers (16, 26, 36, 46);
when the data output by the fifth pixel latch (51) and the data output by the sixth pixel latch (61) are the same, the output of the fourth pixel comparison circuit (95) enables the fifth amplifier (54) to be closed and the thirteenth switch (103) to be turned on, and the sixth amplifier (64) outputs the data to the fifth and sixth buffers (56, 66);
when the data output by the seventh pixel latch (71) and the data output by the eighth pixel latch (81) are the same, the output of the fifth pixel comparison circuit (97) enables the seventh amplifier (74) to be closed and the fourteenth switch (104) to be turned on, and the eighth amplifier (84) outputs the data to the seventh and eighth buffers (76 and 86);
when the data output by the fifth to eighth pixel latches (51, 61, 71, 81) are the same, the output of the fourth pixel comparison circuit (95) turns off the fifth amplifier (54), the output of the fifth pixel comparison circuit (97) turns off the seventh amplifier (74) and the fourteenth switch (104) is turned on, the output of the sixth pixel comparison circuit (96) turns off the sixth amplifier (64) and the fifteenth and sixteenth switches (107 and 108) are turned on, and the eighth amplifier (84) outputs the data to the fifth to eighth buffers (56, 66, 76, 86);
when the data output from the first to eighth pixel latches (11, 21, 31, 41, 51, 61, 71, 81) are the same, the output from the first pixel comparison circuit (91) turns off the first amplifier (14), the output from the second pixel comparison circuit (93) turns off the third amplifier (34), the output from the third pixel comparison circuit (92) turns off the second amplifier (24), the output from the fourth pixel comparison circuit (95) turns off the fifth amplifier (54), the output from the fifth pixel comparison circuit (97) turns off the seventh amplifier (74) and the fourteenth switch (104) on, the output from the sixth pixel comparison circuit (96) turns off the sixth amplifier (64) and the fifteenth and sixteenth switches (107 and 108) on, the output from the seventh pixel comparison circuit (94) turns off the fourth amplifier (44) and the seventeenth to twentieth switches (109, and twenty switches (109), 110. 111, 112) are turned on, and the eighth amplifier (84) outputs data to the first to eighth buffers (16, 26, 36, 46, 56, 66, 76, 86).
6. Low power OLED panel using the energy saving driving circuit of any one of claims 1 to 3.
7. Low power OLED panel using the energy-saving driving method according to claim 4.
8. An OLED panel with low power consumption using the energy-saving driving method as claimed in claim 5.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202110431219.7A CN113160746A (en) | 2021-04-21 | 2021-04-21 | Energy-saving driving circuit and driving method of OLED panel |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202110431219.7A CN113160746A (en) | 2021-04-21 | 2021-04-21 | Energy-saving driving circuit and driving method of OLED panel |
Publications (1)
Publication Number | Publication Date |
---|---|
CN113160746A true CN113160746A (en) | 2021-07-23 |
Family
ID=76867753
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202110431219.7A Pending CN113160746A (en) | 2021-04-21 | 2021-04-21 | Energy-saving driving circuit and driving method of OLED panel |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN113160746A (en) |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101887677A (en) * | 2009-05-14 | 2010-11-17 | 奇景光电股份有限公司 | Source electrode driver with low power consumption and driving method thereof |
CN105047157A (en) * | 2015-08-19 | 2015-11-11 | 深圳市华星光电技术有限公司 | Source drive circuit |
US20160104428A1 (en) * | 2014-10-08 | 2016-04-14 | Samsung Display Co., Ltd. | Display device and driving apparatus thereof |
CN107240372A (en) * | 2016-03-29 | 2017-10-10 | 三星电子株式会社 | Circuit of display driving and the display device including circuit of display driving |
US20170309219A1 (en) * | 2016-04-25 | 2017-10-26 | Samsung Electronics Co., Ltd. | Data driver, display driving circuit, and operating method of display driving circuit |
US20180315390A1 (en) * | 2017-04-28 | 2018-11-01 | Samsung Electronics Co., Ltd. | Display driving circuit and operating method thereof |
US20190088230A1 (en) * | 2017-09-15 | 2019-03-21 | Db Hitek Co., Ltd. | Source Driver and Display Device Including the Same |
CN109817141A (en) * | 2017-11-20 | 2019-05-28 | 三星电子株式会社 | Source electrode drive circuit and display device including the source electrode drive circuit |
CN110728951A (en) * | 2019-10-23 | 2020-01-24 | 广东晟合技术有限公司 | Driving structure and method of OLED panel with multiplexing switch and panel |
-
2021
- 2021-04-21 CN CN202110431219.7A patent/CN113160746A/en active Pending
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101887677A (en) * | 2009-05-14 | 2010-11-17 | 奇景光电股份有限公司 | Source electrode driver with low power consumption and driving method thereof |
US20160104428A1 (en) * | 2014-10-08 | 2016-04-14 | Samsung Display Co., Ltd. | Display device and driving apparatus thereof |
CN105047157A (en) * | 2015-08-19 | 2015-11-11 | 深圳市华星光电技术有限公司 | Source drive circuit |
CN107240372A (en) * | 2016-03-29 | 2017-10-10 | 三星电子株式会社 | Circuit of display driving and the display device including circuit of display driving |
US20170309219A1 (en) * | 2016-04-25 | 2017-10-26 | Samsung Electronics Co., Ltd. | Data driver, display driving circuit, and operating method of display driving circuit |
US20180315390A1 (en) * | 2017-04-28 | 2018-11-01 | Samsung Electronics Co., Ltd. | Display driving circuit and operating method thereof |
US20190088230A1 (en) * | 2017-09-15 | 2019-03-21 | Db Hitek Co., Ltd. | Source Driver and Display Device Including the Same |
CN109817141A (en) * | 2017-11-20 | 2019-05-28 | 三星电子株式会社 | Source electrode drive circuit and display device including the source electrode drive circuit |
CN110728951A (en) * | 2019-10-23 | 2020-01-24 | 广东晟合技术有限公司 | Driving structure and method of OLED panel with multiplexing switch and panel |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
AU2013369771B2 (en) | Multipath current source switching device | |
KR101201929B1 (en) | Source driver chip | |
CN100430855C (en) | Constant voltage power supply | |
AU2001265322A1 (en) | Dual drive buck regulator | |
CN113160746A (en) | Energy-saving driving circuit and driving method of OLED panel | |
CN103178713B (en) | Low dropout regulator and method capable of remarkably reducing standby power consumption | |
CN110728951A (en) | Driving structure and method of OLED panel with multiplexing switch and panel | |
CN101551982B (en) | Liquid crystal driving circuit | |
CN100563088C (en) | The high-voltage starting circuit of power converter | |
US20130293451A1 (en) | Liquid crystal display apparatus and source driving circuit thereof | |
CN205910520U (en) | Power control chip and be provided with electronic equipment of this chip | |
US20110181341A1 (en) | Push-pull driver circuit | |
CN100555397C (en) | Level converter and possess the display apparatus of this device | |
CN217590785U (en) | Serial-to-parallel multi-channel output circuit and control system | |
CN110932705A (en) | Power rail switching circuit | |
US20140077863A1 (en) | Switch control circuit, semiconductor device, and radio communication device | |
CN103312313A (en) | rail to rail enable signal and level conversion circuit | |
CN210958313U (en) | NMOS drive circuit and wafer | |
CN215817887U (en) | Multi-channel input switching circuit and multi-channel power supply system | |
CN214795641U (en) | Single-pole 512-throw switch circuit | |
CN219740350U (en) | Novel high-speed low-power consumption level conversion circuit | |
CN111402813B (en) | Display module and electronic equipment | |
CN219875713U (en) | Low-cost RS485 communication isolation circuit | |
CN218958799U (en) | Switching power supply and electronic equipment | |
CN220190674U (en) | Driving circuit of switching power supply and switching power supply |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20210723 |
|
RJ01 | Rejection of invention patent application after publication |