CN112968434B - High-precision overcurrent protection circuit - Google Patents
High-precision overcurrent protection circuit Download PDFInfo
- Publication number
- CN112968434B CN112968434B CN202110277392.6A CN202110277392A CN112968434B CN 112968434 B CN112968434 B CN 112968434B CN 202110277392 A CN202110277392 A CN 202110277392A CN 112968434 B CN112968434 B CN 112968434B
- Authority
- CN
- China
- Prior art keywords
- nmos tube
- nmos
- tube
- transistor
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
- H02H9/02—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
- H02H9/025—Current limitation using field effect transistors
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/32—Compensating for temperature change
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H1/00—Details of emergency protective circuit arrangements
- H02H1/0007—Details of emergency protective circuit arrangements concerning the detecting means
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
Abstract
The invention discloses a high-precision overcurrent protection circuit, which comprises a sampling input module, an amplifying comparison module and a clamping current limiting module, wherein the sampling input module, the amplifying comparison module and the clamping current limiting module are sequentially connected, in the sampling input module, load current IL flowing through a driving tube Q1 forms sampling voltage V+ on a sampling resistor Rs, reference current outputted by a constant current source CS forms reference voltage V-on a resistor Rr, in the amplifying comparison module, the sampling voltage V+ and the reference voltage V-are transmitted to the input end of a comparator CMP1, a comparison signal Vcmp is obtained after amplifying comparison, the comparison signal Vcmp and the reference signal Vref are input to a comparator CMP2, and when overcurrent protection is triggered, a GATE end control signal N_GATE of the driving tube is pulled down by the CMP2 and clamped to the rated value by a clamping circuit CLP, so that the overcurrent protection of the circuit is realized.
Description
Technical Field
The invention relates to the technical field of power protection, in particular to a high-precision overcurrent protection circuit.
Background
Along with the rising of the markets of power management ICs and motor control ICs, the demand for circuit protection is also a daily and monthly variation, wherein the over-current protection is one of the most important rings of circuit protection, the over-current protection circuit limits the output current of a power supply within a fixed range, and the problem that when the output end exceeds a rated load or is short-circuited, the power supply is damaged, so that a system cannot work normally, the protection of the system or the load is realized, and the common design difficulty of the current over-current protection circuit mainly lies in the aspects of overlarge temperature drift of the over-current protection point, poor precision, difficult debugging of the protection point and the like, so that the application range of the over-current protection circuit is limited.
Disclosure of Invention
In order to overcome the technical difficulties, the invention provides a high-precision overcurrent protection circuit with small temperature drift, high precision and easy debugging, which comprises a sampling input module, an amplifying and comparing module and a clamping and current limiting module, wherein the circuit comprises the sampling input module, the amplifying and comparing module and the clamping and current limiting module, the sampling input module, the amplifying and comparing module and the clamping and current limiting module are sequentially connected, the sampling input module comprises an NMOS tube M1, the NMOS tube M1 is sequentially connected with an NMOS tube M2, an NMOS tube M3, an NMOS tube M4, an NMOS tube M5, an NMOS tube M6, an NMOS tube M7 and an NMOS tube M8, the drains of the NMOS tube M3, the NMOS tube M4, the NMOS tube M5 and the NMOS tube M6 are sequentially connected with four programming bits S1, S2, S3 and S4, the emitter of the triode T1 is connected with a resistor R1, the collector of the triode T2 is connected with the drain of the NMOS tube M2, the source of the driving tube Q1 is connected with a sampling resistor, the amplifying and comparing module comprises an NMOS tube M9, the drain electrode of the NMOS tube M9 is connected with the drain electrode of an NMOS tube M8, the NMOS tube M9 is connected with the grid electrode of an NMOS tube M10, the NMOS tube M10 is connected with the drain electrode of an NMOS tube M11, the NMOS tube M11 is sequentially connected with an NMOS tube M12 and an NMOS tube M13, the NMOS tube M12 is connected with an NMOS tube M14 through the drain electrode, the NMOS tube M13 is connected with an NMOS tube M15 through the drain electrode, the NMOS tube M14 is connected with the grid electrode of the NMOS tube M15, the source electrode of the NMOS tube M14 is connected with the emitter electrode of a triode T3, the base electrode of the triode T3 is connected with the drain electrode of the NMOS tube M7, the NMOS tube M15 is connected with the emitter electrode of a triode T4, the base electrode of the triode T4 is connected with the source electrode of a driving tube Q1, the clamping and current limiting module comprises an NMOS tube M19, the source electrode of the NMOS tube M19 is connected with the drain electrode of the NMOS tube M15, the NMOS tube M19 is connected with the drain electrode of the NMOS tube M20, the NMOS tube M20 is connected with the NMOS tube M21 through the grid electrode, the source electrode of the NMOS tube M20 is connected with the drain electrode of the NMOS tube M22, the NMOS tube M16 is connected with the NMOS tube M17 through a grid electrode, and the drain electrode of the NMOS tube M16 is connected with the drain electrode of the NMOS tube M23.
As an improvement of the invention, the drains and gates of the NMOS tube M1, the NMOS tube M9, the NMOS tube M11, the NMOS tube M14, the NMOS tube M16, the NMOS tube M19 and the NMOS tube M20 are connected together, the gates of the NMOS tube M3, the NMOS tube M4, the NMOS tube M5, the NMOS tube M6, the NMOS tube M7 and the NMOS tube M8 are connected, the gates of the NMOS tube M11, the NMOS tube M12 and the NMOS tube M13 are connected, and the gates of the NMOS tube M10, the NMOS tube M22 and the NMOS tube M23 are connected.
As an improvement of the invention, the base electrode of the triode T1 is connected with the base electrode of the triode T2, and the collector electrode of the triode T2 is connected with the base electrode.
As an improvement of the invention, the resistor R1, the triode T2, the NMOS tube M1 and the NMOS tube M2 form a constant current source CS, the NMOS tube M3, the NMOS tube M4, the NMOS tube M5, the NMOS tube M6, the NMOS tube M7 and the NMOS tube M8 form a current mirror, bias and reference currents are provided, S1, S2, S3 and S4 are 4 programming bits, the precision of a circuit is improved, and the NMOS tube M9, the NMOS tube M10, the NMOS tube M11, the NMOS tube M12 and the NMOS tube M13 respectively form a current mirror, so that bias voltages are provided for the circuit.
As an improvement of the present invention, in the sampling input module, the load current IL flowing through the driving tube Q1 forms the sampling voltage v+ on the sampling resistor Rs, and the reference current outputted by the constant current source CS forms the reference voltage V-on the resistor Rr.
As an improvement of the present invention, in the amplifying and comparing module, the sampling voltage v+ and the reference voltage V-are transmitted to the input terminal of the comparator CMP1, and the comparison signal Vcmp is obtained after amplifying and comparing.
As an improvement of the present invention, in the clamping current limiting module, the comparison signal Vcmp and the reference signal Vref are input to the comparator CMP2, and when the overcurrent protection is triggered, the GATE control signal n_gate of the driving tube will be pulled down by CMP2 and clamped to the rated value by the clamping circuit CLP, thereby implementing the overcurrent protection of the circuit.
As an improvement of the invention, the NMOS transistor M12 and the NMOS transistor M13 are used as active loads of the output stage of the comparator CMP1, the triode T3 and the triode T4 are input stages of the comparator CMP1, the NMOS transistor M14 and the NMOS transistor M15 are amplifying output stages of the comparator CMP1, the NMOS transistor M16, the NMOS transistor M17, the NMOS transistor M19, the NMOS transistor M20, the NMOS transistor M21, the NMOS transistors M22 and M23 form the operational transconductance amplifier CMP2, and the NMOS transistor M18 is a clamp tube, that is, a clamp module CLP.
The beneficial effects of the invention are as follows:
1) The chip adopts on-chip integrated metal resistor sampling, so that on one hand, the temperature coefficient of an overcurrent protection point is greatly reduced, zero-temperature drift overcurrent protection is realized, the chip has the advantages of small temperature drift, high integration level and low cost, on the other hand, the chip is convenient to integrate by using a metal interconnection line for sampling resistors, the area of the chip is not additionally occupied, and meanwhile, better heat dissipation capacity can be obtained, and the influence caused by heat is further reduced;
2) The circuit adopts 4-bit programming trimming to ensure that the circuit obtains higher precision and has high stability, and is suitable for the field of high-precision overcurrent protection;
3) The circuit has simple structure, and can adjust the temperature drift and overcurrent protection point by only changing the resistance value of the resistor and the width-to-length ratio of the pipe, thereby being very flexible and simple.
Drawings
Fig. 1 is a schematic diagram of the connection of each module in the circuit.
Fig. 2 is a block diagram of each module in the circuit.
Fig. 3 is a schematic diagram of the circuit structure connection.
Detailed Description
The present invention is further illustrated in the following drawings and detailed description, which are to be understood as being merely illustrative of the invention and not limiting the scope of the invention.
Examples: according to fig. 2, in the sampling input module, the load current IL flowing through the driving tube Q1 forms a sampling voltage v+ on the sampling resistor Rs, the reference current outputted by the constant current source CS forms a reference voltage V-on the resistor Rr, in the amplifying comparison module, the sampling voltage v+ and the reference voltage V-are transmitted to the input end of the comparator CMP1, and the comparison signal Vcmp is obtained after amplifying comparison, in the clamping current limiting module, the comparison signal Vcmp and the reference signal Vref are input to the comparator CMP2, and when the overcurrent protection is triggered, the GATE control signal n_gate of the driving tube is pulled down by CMP2 and clamped to the rated value by the clamp circuit CLP, thereby realizing the overcurrent protection of the circuit.
According to the illustration shown in fig. 3, the sampling input module comprises an NMOS tube M1, the NMOS tube M1 is sequentially connected with an NMOS tube M2, an NMOS tube M3, an NMOS tube M4, an NMOS tube M5, an NMOS tube M6, an NMOS tube M7 and an NMOS tube M8, the drains of the NMOS tube M3, the NMOS tube M4, the NMOS tube M5 and the NMOS tube M6 are sequentially connected with four programming bits S1, S2, S3 and S4, the emitter of the triode T1 is connected with a resistor R1, the triode T1 is connected with a triode T2, the collector of the triode T2 is connected with the drain of the NMOS tube M2, the source of the driving tube Q1 is connected with a sampling resistor Rs, the drain of the NMOS tube M7 is connected with a resistor Rr, the amplifying comparison module comprises an NMOS tube M9, the drain of the NMOS tube M9 is connected with the drain of the NMOS tube M8, the drains of the NMOS tube M9 and the NMOS tube M10 are connected with the drains of the NMOS tube M11, the NMOS tube M11 is sequentially connected with an NMOS tube M12 and an NMOS tube M13, the NMOS tube M12 and the NMOS tube M14 are connected with the drain of the NMOS tube M13 through the drain tube M13, the NMOS transistor M14 is connected with the grid electrode of the NMOS transistor M15, the source electrode of the NMOS transistor M14 is connected with the emitter electrode of the triode T3, the base electrode of the triode T3 is connected with the drain electrode of the NMOS transistor M7, the NMOS transistor M15 is connected with the emitter electrode of the triode T4, the base electrode of the triode T4 is connected with the source electrode of the driving transistor Q1, the clamping current limiting module comprises an NMOS transistor M19, the source electrode of the NMOS transistor M19 is connected with the drain electrode of the NMOS transistor M13 and the drain electrode of the NMOS transistor M15, the drain electrodes of the NMOS transistor M19 and the NMOS transistor M20 are connected, the NMOS transistor M20 is connected with the NMOS transistor M21 through the grid electrode, the source electrode of the NMOS transistor M20 is connected with the drain electrode of the NMOS transistor M22, the NMOS transistor M16 is connected with the drain electrode of the NMOS transistor M17 through the grid electrode, the NMOS transistor M1, the NMOS transistor M9, the NMOS transistor M11, the NMOS transistor M14, the NMOS transistor M16, the NMOS transistor M19 and the drain electrode and the grid electrode of the NMOS transistor M20 are connected together, the NMOS transistor M3, the NMOS transistor M4, the NMOS transistor M5, the NMOS transistor M6, the NMOS transistor M7 and the grid electrode of the NMOS transistor M8 are connected together, and the NMOS transistor M11 NMOS pipe M12 links to each other with the grid of NMOS pipe M13, NMOS pipe M10, NMOS pipe M22, NMOS pipe M23's grid links to each other, triode T2's base is connected to triode T1's base, triode T2's collecting electrode links to each other with the base, resistance R1, triode T1 and triode T2, NMOS pipe M1 and NMOS pipe M2 constitute constant current source CS, NMOS pipe M3, NMOS pipe M4, NMOS pipe M5, NMOS pipe M6, NMOS pipe M7 and NMOS pipe M8 constitute the current mirror, and its ratio of width to length is 1 in proper order: 2:4:8:10: and 3, providing bias and reference currents, wherein S1, S2, S3 and S4 are 4 programming bits, are control switches for 4 trimming currents, improve the precision of a circuit, respectively form a current mirror by an NMOS tube M9, an NMOS tube M10, an NMOS tube M11, an NMOS tube M12 and an NMOS tube M13, provide bias voltages for the circuit, the NMOS tube M12 and the NMOS tube M13 serve as active loads of an output stage of a comparator CMP1, the triode T3 and the triode T4 are input stages of the comparator CMP1, the NMOS tube M14 and the NMOS tube M15 are amplification output stages of the comparator CMP1, and the NMOS tube M16, the NMOS tube M17, the NMOS tube M19, the NMOS tube M20, the NMOS tube M21, the NMOS tube M22 and the NMOS tube M23 form an operational transconductance amplifier CMP2, and the NMOS tube M18 is a clamp tube, namely a clamp module CLP.
In order to reduce the temperature drift of the overcurrent protection point, R1 and Rr are the same type of matching resistor, and the sampling resistor Rs is composed of a metal resistor, namely rs=r0× [1+k1× (T-300) ] (K1 is the temperature coefficient of the metal resistor, and K1>0;T is the thermodynamic temperature, rs0 is the resistance value of Rs at normal temperature);
the temperature coefficient of the sampled voltage is: d (v+)/dt=d (il×rs)/dt=il×rs0×k1; and reference current ir=n× (avbe/R1) =n× [ vt×ln (M) ]/r1=n× [ (k×t/q) ×ln (M) ]/R1 (n is the ratio of the width to length ratio of M1 to M8; q is the charge amount of electrons, q=1.602×10-19c; K is the boltzmann constant, k=1.381×10-23J/K; M is the ratio of T1 to T2 emitter area);
the temperature coefficient of the reference voltage is:
d(V-)/dT=d(IR×Rr)/dT=d{n×[(k×T/q)×ln(m)]×Rr/R1}/dT=n×[(k/q)×ln(m)]×Rr/R1；
d (v+)/dt=0, i.e., d (v+)/dt=d (V-)/dT;
IL×Rs0×K1= n×[(k/q)×ln(m)]×Rr/R1；
the zero temperature drift of different over-current protection points can be achieved by adjusting the values of n, m, (Rr/R1) and Rs0, for example, taking the values of r0=50mΩ, n=4, m=9, rr/rs=3/10, and the variation amplitude of the 1A over-current protection point in the interval from-40 ℃ to 125 ℃ is 9.8mA, namely 59.4ppm/°c.
In order to improve the accuracy of overcurrent protection, 4 paths of trimming currents are arranged on the reference current IR, a programming mode of 8421 is adopted, the trimming range is (-44%, +38%) and the step is 5.6%, so that the accuracy can be within +/-3%, in addition, the bandwidth of a comparator is increased by sacrificing a part of gain, the stability of a circuit is improved, and the overcurrent protection point is changed mainly through adjusting the values of n, m, (Rr/R1) and Rs0 in the circuit debugging process, so that the circuit is flexible and simple.
In the description of the present invention, it should be noted that, directions or positional relationships indicated by terms "upper", "lower", "left", "right", "inner", "outer", etc., are directions or positional relationships based on those shown in the drawings, are merely for convenience of describing the present invention and simplifying the description, and do not indicate or imply that the apparatus or element to be referred to must have a specific direction, be constructed and operated in a specific direction, and thus should not be construed as limiting the present invention; furthermore, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present invention will be understood in specific cases by those of ordinary skill in the art.
Finally, it should be noted that: the foregoing embodiments are merely for illustrating the technical solution of the present invention, and not for limiting the same, and although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those skilled in the art that modifications may be made to the technical solution described in the foregoing embodiments, or equivalents may be substituted for some or all of the technical features thereof, without departing from the spirit of the corresponding technical solution from the scope of the technical solution of the embodiments of the present invention.
Claims (8)
1. The high-precision overcurrent protection circuit is characterized by comprising a sampling input module, an amplifying comparison module and a clamping current limiting module, wherein the sampling input module, the amplifying comparison module and the clamping current limiting module are sequentially connected, the sampling input module comprises an NMOS tube M1, the NMOS tube M1 is sequentially connected with an NMOS tube M2, an NMOS tube M3, an NMOS tube M4, an NMOS tube M5, an NMOS tube M6, an NMOS tube M7 and an NMOS tube M8, drains of the NMOS tube M3, the NMOS tube M4, the NMOS tube M5 and the NMOS tube M6 are sequentially connected with four programming bits S1, S2, S3 and S4, an emitter connecting resistor R1 of a triode T1 is connected with a triode T2, a collector of the triode T2 is connected with a drain of the NMOS tube M2, a source of a driving tube Q1 is connected with a sampling resistor Rs, drain connecting resistors Rr of the NMOS tube M7 are of the same type, the sampling resistors Rs are metal resistors, the amplifying comparison module comprises an NMOS tube M9, the drain electrode of the NMOS tube M9 is connected with the drain electrode of the NMOS tube M8, the NMOS tube M9 is connected with the grid electrode of the NMOS tube M10, the NMOS tube M10 is connected with the drain electrode of the NMOS tube M11, the NMOS tube M11 is sequentially connected with the NMOS tube M12 and the NMOS tube M13, the NMOS tube M12 is connected with the NMOS tube M14 through the drain electrode, the NMOS tube M13 is connected with the grid electrode of the NMOS tube M15 through the drain electrode, the source electrode of the NMOS tube M14 is connected with the emitter electrode of the triode T3, the base electrode of the triode T3 is connected with the drain electrode of the NMOS tube M7, the NMOS tube M15 is connected with the emitter electrode of the triode T4, the base electrode of the triode T4 is connected with the source electrode of the driving tube Q1, the clamping current limiting module comprises an NMOS tube M19, the source electrode of the NMOS tube M19 is connected with the drain electrode of the NMOS tube M13, the NMOS tube M19 is connected with the drain electrode of the NMOS tube M20, the NMOS tube M20 is connected with the NMOS tube M21 through the grid electrode, the source electrode of the NMOS tube M20 is connected with the drain electrode of the NMOS tube M22, the NMOS tube M16 is connected with the NMOS tube M17 through the grid electrode, the drain electrode of the NMOS tube M16 is connected with the drain electrode of the NMOS tube M23, the drain electrodes of the NMOS tube M1, the NMOS tube M9, the NMOS tube M11, the NMOS tube M14, the NMOS tube M16, the NMOS tube M19 and the NMOS tube M20 are connected together, the grid electrodes of the NMOS tube M3, the NMOS tube M4, the NMOS tube M5, the NMOS tube M6, the NMOS tube M7 and the NMOS tube M8 are connected, the grid electrodes of the NMOS tube M11, the NMOS tube M12 and the NMOS tube M13 are connected, the grid electrodes of the NMOS tube M10, the NMOS tube M22 and the NMOS tube M23 are connected, the base electrode of the triode T1 is connected with the base electrode of the triode T2, and the collector electrode of the triode T2 is connected with the base electrode.
2. The high-precision overcurrent protection circuit according to claim 1, wherein the resistor R1, the triode T2, the NMOS transistor M1 and the NMOS transistor M2 form a constant current source CS, the NMOS transistor M3, the NMOS transistor M4, the NMOS transistor M5, the NMOS transistor M6, the NMOS transistor M7 and the NMOS transistor M8 form a current mirror, and the NMOS transistor M9, the NMOS transistor M10, the NMOS transistor M11, the NMOS transistor M12 and the NMOS transistor M13 form a current mirror respectively.
3. The high-precision overcurrent protection circuit according to claim 2, wherein the ratio of the width to the length of the current mirror formed by the NMOS transistor M3, the NMOS transistor M4, the NMOS transistor M5, the NMOS transistor M6, the NMOS transistor M7 and the NMOS transistor M8 is sequentially 1:2:4:8:10:3.
4. the high-precision overcurrent protection circuit according to claim 3, wherein the reference current IR is provided with four trimming currents, and the trimming range is (-44%, +38%) and the step is 5.6% by using a programming mode set by 8421.
5. The high-precision overcurrent protection circuit according to claim 4, wherein in the sampling input module, the load current IL flowing through the driving tube Q1 forms a sampling voltage v+ at the sampling resistor Rs, and the reference current outputted by the constant current source CS forms a reference voltage V-at the resistor Rr.
6. The high-precision over-current protection circuit according to claim 5, wherein the sampling voltage v+ and the reference voltage V-are transmitted to an input terminal of the comparator CMP1 in the amplifying and comparing module, and the comparison signal Vcmp is obtained after amplifying and comparing.
7. The high-precision over-current protection circuit according to claim 6, wherein in the clamping current limiting module, a comparison signal Vcmp and a reference signal Vref are input to a comparator CMP2, and when the over-current protection is triggered, a GATE control signal n_gate of the driving tube is pulled down by CMP2 and clamped to a rated value by a clamping circuit CLP.
8. The high-precision over-current protection circuit according to claim 7, wherein the NMOS transistor M12 and the NMOS transistor M13 are used as active loads of an output stage of the comparator CMP1, the transistor T3 and the transistor T4 are input stages of the comparator CMP1, the NMOS transistor M14 and the NMOS transistor M15 are amplifying output stages of the comparator CMP1, the NMOS transistor M16, the NMOS transistor M17, the NMOS transistor M19, the NMOS transistor M20, the NMOS transistor M21, the NMOS transistors M22 and M23 form the operational transconductance amplifier CMP2, and the NMOS transistor M18 is a clamp transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110277392.6A CN112968434B (en) | 2021-03-15 | 2021-03-15 | High-precision overcurrent protection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110277392.6A CN112968434B (en) | 2021-03-15 | 2021-03-15 | High-precision overcurrent protection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN112968434A CN112968434A (en) | 2021-06-15 |
| CN112968434B true CN112968434B (en) | 2023-06-02 |
Family
ID=76279230
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110277392.6A Active CN112968434B (en) | 2021-03-15 | 2021-03-15 | High-precision overcurrent protection circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112968434B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115996044B (en) * | 2023-03-22 | 2023-06-02 | 江苏润石科技有限公司 | Fast comparator |
| CN116137524B (en) * | 2023-04-04 | 2023-07-14 | 荣湃半导体（上海）有限公司 | Comparator with high voltage input resistance |
| CN116885670B (en) * | 2023-08-30 | 2023-12-01 | 江苏阿诗特能源科技股份有限公司 | IGBT overcurrent protection circuit and inverter |
| CN117388723B (en) * | 2023-12-12 | 2024-02-23 | 成都市易冲半导体有限公司 | Current sampling circuit, chip and electronic equipment |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101165983B (en) * | 2006-10-16 | 2010-06-09 | 安凯(广州)微电子技术有限公司 | Current limiting short circuit protection circuit |
| CN103575964B (en) * | 2012-07-19 | 2016-03-23 | 快捷半导体(苏州)有限公司 | A kind of over-current detection circuit of power switch pipe and method |
| CN110336546B (en) * | 2019-07-19 | 2020-07-31 | 电子科技大学 | Low-power-consumption high-speed current comparator circuit |
-
2021
- 2021-03-15 CN CN202110277392.6A patent/CN112968434B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN112968434A (en) | 2021-06-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN112968434B (en) | High-precision overcurrent protection circuit | |
| CN105487587B (en) | Circuit is calibrated in high accuracy number temperature sensor | |
| US4573005A (en) | Current source arrangement having a precision current-mirror circuit | |
| TWI719809B (en) | Temperature sensing circuit | |
| CN114679040B (en) | Current-limiting protection circuit | |
| CN112542948B (en) | Slope compensation circuit | |
| CN111478687B (en) | High-precision current-limiting load switch circuit | |
| CN111665898B (en) | Power amplifier chip biasing circuit based on GaAs HBT technology | |
| CN117631740B (en) | Differential reference voltage generating circuit and electronic equipment | |
| CN115357087B (en) | Band gap reference circuit | |
| CN116388763B (en) | DAC compatible with voltage/current output | |
| CN110879626A (en) | Reference circuit under low power supply voltage | |
| CN115857601A (en) | High-performance band-gap reference circuit | |
| US4370608A (en) | Integrable conversion circuit for converting input voltage to output current or voltage | |
| CN115390611A (en) | Band gap reference circuit, base current compensation method and chip | |
| CN109270984B (en) | High-precision complementary current source circuit | |
| CN217445246U (en) | Voltage comparator and current limit control circuit thereof | |
| CN117728661B (en) | Voltage protection device, method and system and electronic equipment | |
| US20240272010A1 (en) | Temperature sensor | |
| CN113885640B (en) | High-precision band-gap reference voltage source circuit | |
| CN220121192U (en) | Band gap reference circuit structure and electronic equipment | |
| CN214480493U (en) | Front gain amplifier | |
| CN112630498B (en) | High-side sampling circuit | |
| CN117134713B (en) | High-gain fast response error amplifier with trimming function and control method thereof | |
| JPS60164822A (en) | Dc voltage generating circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |