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CN112751771A - Method and device for realizing congestion control and computer readable storage medium - Google Patents

Method and device for realizing congestion control and computer readable storage medium Download PDF

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Publication number
CN112751771A
CN112751771A CN201911037545.9A CN201911037545A CN112751771A CN 112751771 A CN112751771 A CN 112751771A CN 201911037545 A CN201911037545 A CN 201911037545A CN 112751771 A CN112751771 A CN 112751771A
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input
link
input link
bandwidth
links
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成放
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Sanechips Technology Co Ltd
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Sanechips Technology Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/12Avoiding congestion; Recovering from congestion
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/55Prevention, detection or correction of errors

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  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

The embodiment of the invention discloses a method and a device for realizing congestion control and a computer readable storage medium, comprising the following steps: when at least one output link of the switching device of the first-level switching network is abnormal, traversing all input links of all active SAs connected with the switching device for each destination switching access device SA; and when the sum of the bandwidth of the currently traversed input link and the bandwidth of the traversed and opened input link is greater than the total output bandwidth of the destination SA, closing the currently traversed input link. In one embodiment of the present invention, when at least one output link of the switching device of the first-level switching network is abnormal, some input links are closed in a mode of traversing the input links, so that the input bandwidth and the output bandwidth of each destination SA are matched, and congestion occurring inside the switching device due to asymmetry is reduced or even eliminated.

Description

Method and device for realizing congestion control and computer readable storage medium
Technical Field
Embodiments of the present invention relate to, but not limited to, packet data switching technologies, and in particular, to a method and an apparatus for implementing congestion control and a computer-readable storage medium.
Background
The third-level networking is a networking mode in packet switching, and a switching network is composed of third-level switching, as shown in fig. 1, and includes a switching Access device (SA, Switch Access), a first-level switching network (SF1, Switch Fabric1), a second-level switching network SF2, and a third-level switching network SF 3. Data passes from the source SA through the three-stage switching network and finally to the destination SA.
Under normal conditions, for a switching device in a switching network, the input and output bandwidths to a certain destination SA are equal, and no congestion occurs in the switching device, but when an output link of the switching device is abnormal, data cannot be transmitted, and a condition that the input bandwidth is greater than the output bandwidth occurs, which is called asymmetry. The asymmetry can cause congestion in the switching device, which seriously affects the switching performance.
Disclosure of Invention
Embodiments of the present invention provide a method and an apparatus for implementing congestion control, and a computer-readable storage medium, which can reduce or even eliminate congestion occurring in a switching apparatus due to asymmetry.
The embodiment of the invention provides a method for realizing congestion control, which comprises the following steps:
when at least one output link of the switching device of the first-level switching network is abnormal, traversing all input links of all active SAs connected with the switching device for each destination switching access device SA;
and when the sum of the bandwidth of the currently traversed input link and the bandwidth of the traversed and opened input link is greater than the total output bandwidth of the destination SA, closing the currently traversed input link.
The invention provides a device for realizing congestion control, which comprises a processor and a computer-readable storage medium, wherein the computer-readable storage medium stores instructions, and when the instructions are executed by the processor, any one of the above methods for realizing congestion control is realized.
Embodiments of the present invention provide a computer-readable storage medium, on which a computer program is stored, where the computer program, when executed by a processor, implements the steps of any one of the above-mentioned methods for implementing congestion control.
An embodiment of the present invention provides a device for implementing congestion control, including:
the traversing module is used for traversing each input link of all the active SAs connected with the switching device for each destination switching access device SA when at least one output link of the switching device of the first-stage switching network is abnormal;
and when the sum of the bandwidth of the currently traversed input link and the bandwidth of the traversed and opened input link is greater than the total output bandwidth of the destination SA, closing the currently traversed input link.
One embodiment of the invention comprises: when at least one output link of the switching device of the first-level switching network is abnormal, traversing all input links of all active SAs connected with the switching device for each destination switching access device SA; and when the sum of the bandwidth of the currently traversed input link and the bandwidth of the traversed and opened input link is greater than the total output bandwidth of the destination SA, closing the currently traversed input link. In one embodiment of the present invention, when at least one output link of the switching device of the first-level switching network is abnormal, some input links are closed in a mode of traversing the input links, so that the input bandwidth and the output bandwidth of each destination SA are matched, and congestion occurring inside the switching device due to asymmetry is reduced or even eliminated.
In another embodiment of the present invention, each incoming link in each packet is traversed in order from the first packet to the nth packet; wherein N is the number of input links to which each of the source SAs is connected to the switching device, and each packet includes one of the N input links to which each of the source SAs is connected to the switching device. Another embodiment of the present invention groups all incoming links such that the closed links are evenly distributed to all active SAs.
In another embodiment of the invention, all said incoming links in the same packet are arranged in a random order. Another embodiment of the present invention arranges the incoming links in each packet in a random order, preventing the situation where multiple switching devices close the incoming links of the same source SA when they do asymmetric processing.
Additional features and advantages of embodiments of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of embodiments of the invention. The objectives and other advantages of the embodiments of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
The accompanying drawings are included to provide a further understanding of the embodiments of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the examples of the invention serve to explain the principles of the embodiments of the invention and not to limit the embodiments of the invention.
Fig. 1 is a schematic structural diagram of a related art switching network;
FIG. 2 is a diagram illustrating asymmetry of switching devices in a first-stage switching network according to the related art;
fig. 3 is a flowchart of a method for implementing congestion control according to an embodiment of the present invention;
fig. 4 is a schematic diagram illustrating a connection relationship between a source SA and a switching device of a first-stage switching network according to an embodiment of the present invention;
FIG. 5 is a graph illustrating the result of asymmetric processing according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of the storage of an input link ID according to an embodiment of the present invention;
fig. 7 is a flowchart illustrating a method for implementing congestion control according to an embodiment of the present invention.
Detailed Description
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. It should be noted that the embodiments and features of the embodiments of the present invention may be arbitrarily combined with each other without conflict.
The steps illustrated in the flow charts of the figures may be performed in a computer system such as a set of computer-executable instructions. Also, while a logical order is shown in the flow diagrams, in some cases, the steps shown or described may be performed in an order different than here.
The embodiment of the invention adopts a method for closing the input link in the switching device to control the congestion in the switching device caused by asymmetry, namely when the output bandwidth is reduced and the asymmetry occurs, the input bandwidth is correspondingly reduced, and the input bandwidth is ensured to be less than or equal to the output bandwidth. Asymmetric processing needs to be performed at each stage of the three-stage networking. Fig. 2 is a schematic diagram showing asymmetry occurring in the switching devices of the first-stage switching network, and as shown in fig. 2, an abnormal link is indicated by a black arrow in the drawing, and a normal link is indicated by a gray arrow in the drawing. The switching device of the first-stage switching network comprises SF1_0 and SF1_1, the switching device of the second-stage switching network comprises SF2_0 and SF2_1, an input link 0 and an input link 1 of the SF1_1 are connected with a source switching access device SA _0, an input link 2 and an input link 3 are connected with the source switching access device SA _1, an output link 4 and an output link 5 are connected with SF2_0, and an output link 6 and an output link 7 are connected with SF2_ 1. For SF1_1, normally both input and output links are active, and both input and output links to a destination SA are 4. When the output link 6 of SF1_1 is disconnected, the number of input links is still 4, the number of output links is changed to 3, and asymmetric processing is required to close 1 input link.
Referring to fig. 3, an embodiment of the present invention provides a method for implementing congestion control, including:
step 300, when at least one output link of the switching device of the first-level switching network is abnormal, traversing all input links, connected with the switching device, of all the active SAs for each destination switching access device SA.
In this embodiment of the present invention, when traversing each input link, the input links may be traversed in any order, which is not limited in this embodiment of the present invention.
In one illustrative example, to evenly distribute closed incoming links to all active SAs, all incoming links are grouped and then each incoming link in each group is traversed in the order of the group. The number of packets is related to the number of incoming links to which each source SA is connected to the switching apparatus, and may be taken as the number of incoming links to which each source SA is connected to the switching apparatus, in order to ensure that each packet includes one of all incoming links to which each source SA is connected to the switching apparatus. That is, each incoming link in each packet is traversed in order from the first packet to the nth packet; wherein N is the number of input links to which each of the source SAs is connected to the switching device, and each packet includes one of the N input links to which each of the source SAs is connected to the switching device.
The embodiment of the present invention does not limit which input link included in each packet is connected between each source SA and the switching device, as long as different packets include different input links connected between the same source SA and the switching device. In an exemplary embodiment, the first packet includes the input link with the lowest identification number of the N input links to which each of the source SAs is connected to the switching apparatus, the second packet includes the input link with the lowest identification number of the N input links to which each of the source SAs is connected to the switching apparatus, … …, and so on, … …, the N-1 packet includes the input link with the highest identification number of the N input links to which each of the source SAs is connected to the switching apparatus, and the N-1 packet includes the input link with the highest identification number of the N input links to which each of the source SAs is connected to the switching apparatus.
The embodiment of the present invention does not limit the arrangement order of all input links in the same group. In an exemplary embodiment, to prevent multiple switching devices from turning off the incoming links of the same source SA when they are performing asymmetric processing, all incoming links in the same packet may be arranged in a random order.
Step 301, when the sum of the bandwidth of the currently traversed input link and the bandwidth of the traversed and opened input link is greater than the total output bandwidth of the destination SA, closing the currently traversed input link.
In another embodiment of the present invention, when the sum of the bandwidth of the currently traversed input link and the bandwidth of the traversed and opened input link is less than or equal to the total output bandwidth of the destination SA, the currently traversed input link is opened.
In the embodiment of the present invention, the total output bandwidth of the destination SA is the sum of the bandwidths of all the output links of the destination SA.
For example, fig. 4 is a schematic diagram illustrating a connection relationship between a source SA and a switching device of a first-stage switching network according to an embodiment of the present invention. As shown in fig. 4, assuming that each source SA has four input links connected to SF1, 48 output links of SF1, and SA _0 to SA _11 as a whole, there are 48 input links of SF1, and the input bandwidth and the output bandwidth are equal and symmetrical.
The four incoming links to which each source SA is connected to SF1 are grouped into 4 groups. Specific input links with input link identification numbers of 0, 4, 8, 12, 16 and the like belong to the group 1; incoming links with incoming link identification numbers 1, 5, 9, 13, 17, etc. belong to group 2; incoming links with incoming link identification numbers 2, 6, 10, 14, 18, etc. belong to group 3; incoming links with incoming link identification numbers 3, 7, 11, 15, 19, etc. belong to group 4; the incoming link identification numbers within the 4 packets are arranged in a random order.
When asymmetry occurs, the output bandwidth is reduced, the total output bandwidth of the destination SA is calculated according to the routing information of the destination SA in the unicast table, all input links are traversed according to the sequence from the group 1 to the group 4, the input bandwidth is calculated, and when the sum of the bandwidth of the currently traversed input link and the bandwidth of the traversed and opened input link is greater than the total output bandwidth of the destination SA, the currently traversed input link is closed; that is, when traversing to the m input link of the packet n, the bandwidth of the m input link is added to the bandwidth of the input link which has already been traversed and has been opened, and the m input link is closed when the input bandwidth is greater than the total output bandwidth.
For example, as shown in fig. 5, 4 output links of SF1_0 are broken, 3 output links of SF1_1 are broken, and assuming that the bandwidth of each output link is the same, 4 input links are randomly broken in packet 4 during SF1_0 asymmetric processing, and 3 input links are randomly broken in packet 4 during SF1_1 asymmetric processing.
In another embodiment of the present invention, before determining whether at least one output link of the switching device of the first-stage switching network is abnormal, the method further includes:
configuring an input link identification number (link id) table; the link identification number table is used for storing identification numbers of all the input links;
correspondingly, traversing each input link of each source SA connected to the switching device includes: and traversing each input link in the input link identification number table.
The embodiment of the present invention may configure the input link id number table in various ways, and the specific configuration way is not limited in the embodiment of the present invention.
In an illustrative example, the incoming link of each packet is stored in the memory space with consecutive memory addresses in the order from the first packet to the nth packet. The memory addresses of the incoming links within each packet are arranged in a random order.
In another illustrative example, configuring the input link identification number table includes:
configuring a first said input link identification number (first link id) register, i.e. storing the identification number of the first input link in said first said input link identification number register;
and starting from the second input link identification number, storing the identification number of each input link in the storage space with the storage address of the identification number of the last input link.
For example, when all links are divided into N groups, the first input link identification number register is used to store the first input link identification number of group 1, the current input link identification number is used as a storage address for reading the next input link identification number, and the next input link identification number can be searched; the last incoming link identification number of a packet is used as the storage address for the first incoming link identification number of the next packet. For example, the order of the input link identification numbers of packet 1 is 16, 0, 24, 48, … …, and the last input link identification number is 4; the order of the input link identification numbers of packet 2 is 21, 1, 13, etc., then 16 is stored in the first input link identification number register, input link identification number 0 is obtained in the storage space with storage address 16, input link identification number 24 is obtained in the storage space with storage address 0, input link identification number 48 is obtained in the storage space with storage address 24, input link identification number 21 is obtained in the storage space with storage address 4, and so on.
In one embodiment of the present invention, when at least one output link of the switching device of the first-level switching network is abnormal, some input links are closed in a mode of traversing the input links, so that the input bandwidth and the output bandwidth of each destination SA are matched, and congestion occurring inside the switching device due to asymmetry is reduced or even eliminated.
The following is a detailed description of the specific implementation process of the above method by way of an example, which is only for convenience of illustration and is not intended to limit the scope of the embodiments of the present invention.
Examples of the invention
Referring to fig. 7, the method includes:
step 700, configuring a link id table, specifically, configuring a first link id register, where the first link id register is used to store a first link id (i.e., an input link identification number) of the group 1, and store a second link id of the group 1 in a storage space whose storage address is the first link id of the group 1, and so on, store a first link id of the group 2 in a storage space whose storage address is the last link id of the group 1, and so on, until all input link identification numbers of the groups 1 to N (N is the number of input links to which one source SA is connected to SF 1) are written into corresponding storage spaces, and the link ids in one group are randomly ordered.
And step 701, calculating the total output bandwidth of each destination SA.
In this step, the destination SA id is used as an address to read a unicast transmission routing table, that is, the unicast table), the unicast transmission routing table stores routing information that can reach the destination SA, the output link number and the link number from SF1 to the destination SA can be obtained through the read bitmap, and then the total output bandwidth bw _ o of the destination SA is calculated according to the link rate, that is, the product of the link rate and the link number.
Step 702, traversing all input links for each destination SA, and closing the currently traversed input link when the sum of the bandwidth of the currently traversed input link and the bandwidth of the traversed and opened input link is greater than the total output bandwidth of the destination SA; and when the sum of the bandwidth of the currently traversed input link and the bandwidth of the traversed and opened input link is less than or equal to the total output bandwidth of the destination SA, opening the currently traversed input link.
In this step, the initially traversed input link identification number is a value stored in a first link id register, the link bandwidth corresponding to the input link identification number is compared with the total output bandwidth bw _ o, when the link bandwidth is smaller than or equal to bw _ o, the input link is opened, and when the link bandwidth is larger than bw _ o, the input link is closed; taking a first link id as an address reading link id table, acquiring an identification number of a second input link, comparing the bandwidth of the second input link plus the bandwidth of the traversed and started input link with a total output bandwidth bw _ o, starting the input link when the bandwidth is less than or equal to bw _ o, and closing the input link when the bandwidth is greater than bw _ o; and reading a link id table by taking the identification number of the second input link as an address to obtain the identification number of the third input link, comparing the bandwidth of the third link plus the bandwidth of the traversed and opened input link with the total output bandwidth bw _ o, opening the input link when the bandwidth is less than or equal to bw _ o, and closing the input link when the bandwidth is greater than bw _ o. All incoming links are traversed in this way.
Step 703, after the input link of a destination SA is traversed, the destination SA is changed to jump back to step 701. And when all the destination SA traversals are completed, the process is ended.
Another embodiment of the present invention provides an apparatus for implementing congestion control, including a processor and a computer-readable storage medium, where instructions are stored in the computer-readable storage medium, and when the instructions are executed by the processor, the apparatus implements any one of the above methods for implementing congestion control.
Another embodiment of the invention proposes a computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of any of the above-mentioned methods of implementing congestion control.
Another embodiment of the present invention provides an apparatus for implementing congestion control, including:
the traversing module is used for traversing each input link of all the active SAs connected with the switching device for each destination switching access device SA when at least one output link of the switching device of the first-stage switching network is abnormal;
and when the sum of the bandwidth of the currently traversed input link and the bandwidth of the traversed and opened input link is greater than the total output bandwidth of the destination SA, closing the currently traversed input link.
In this embodiment of the present invention, the traversal module may traverse each input link in any order, which is not limited in this embodiment of the present invention.
In one illustrative example, to evenly distribute closed incoming links to all active SAs, the traversal module groups all incoming links and then traverses each incoming link in each group in the order of the group. The number of packets is related to the number of incoming links to which each source SA is connected to the switching apparatus, and may be taken as the number of incoming links to which each source SA is connected to the switching apparatus, in order to ensure that each packet includes one of all incoming links to which each source SA is connected to the switching apparatus. That is, each incoming link in each packet is traversed in order from the first packet to the nth packet; wherein N is the number of input links to which each of the source SAs is connected to the switching device, and each packet includes one of the N input links to which each of the source SAs is connected to the switching device.
The embodiment of the present invention does not limit which input link included in each packet is connected between each source SA and the switching device, as long as different packets include different input links connected between the same source SA and the switching device. In an exemplary embodiment, the first packet includes the input link with the lowest identification number of the N input links to which each of the source SAs is connected to the switching apparatus, the second packet includes the input link with the lowest identification number of the N input links to which each of the source SAs is connected to the switching apparatus, … …, and so on, … …, the N-1 packet includes the input link with the highest identification number of the N input links to which each of the source SAs is connected to the switching apparatus, and the N-1 packet includes the input link with the highest identification number of the N input links to which each of the source SAs is connected to the switching apparatus.
The embodiment of the present invention does not limit the arrangement order of all input links in the same group. In an exemplary embodiment, to prevent multiple switching devices from turning off the incoming links of the same source SA when they are performing asymmetric processing, all incoming links in the same packet may be arranged in a random order.
In the embodiment of the present invention, the total output bandwidth of the destination SA is the sum of the bandwidths of all the output links of the destination SA.
In another embodiment of the present invention, the traversal module is further configured to:
configuring an input link identification number (link id) table; the link identification number table is used for storing identification numbers of all the input links; and traversing each input link in the input link identification number table.
The embodiment of the present invention may configure the input link id number table in various ways, and the specific configuration way is not limited in the embodiment of the present invention.
In one illustrative example, the traversal module stores the incoming link for each packet in a memory space with consecutive memory addresses in order from the first packet to the nth packet. The memory addresses of the incoming links within each packet are arranged in a random order.
In another exemplary embodiment, the traversing module is specifically configured to configure the input link id number table by:
configuring a first said input link identification number (first link id) register, i.e. storing the identification number of the first input link in said first said input link identification number register;
and starting from the second input link identification number, storing the identification number of each input link in the storage space with the storage address of the identification number of the last input link.
For example, when all links are divided into N groups, the first input link identification number register is used to store the first input link identification number of group 1, the current input link identification number is used as a storage address for reading the next input link identification number, and the next input link identification number can be searched; the last incoming link identification number of a packet is used as the storage address for the first incoming link identification number of the next packet. For example, the order of the input link identification numbers of packet 1 is 16, 0, 24, 48, … …, and the last input link identification number is 4; the order of the input link identification numbers of packet 2 is 21, 1, 13, etc., then 16 is stored in the first input link identification number register, input link identification number 0 is obtained in the storage space with storage address 16, input link identification number 24 is obtained in the storage space with storage address 0, input link identification number 48 is obtained in the storage space with storage address 24, input link identification number 21 is obtained in the storage space with storage address 4, and so on.
In one embodiment of the present invention, when at least one output link of the switching device of the first-level switching network is abnormal, some input links are closed in a mode of traversing the input links, so that the input bandwidth and the output bandwidth of each destination SA are matched, and congestion occurring inside the switching device due to asymmetry is reduced or even eliminated.
It will be understood by those of ordinary skill in the art that all or some of the steps of the methods, systems, functional modules/units in the devices disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. In a hardware implementation, the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed by several physical components in cooperation. Some or all of the components may be implemented as software executed by a processor, such as a digital signal processor or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as is well known to those of ordinary skill in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, Digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can accessed by a computer. In addition, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media as known to those skilled in the art.
Although the embodiments of the present invention have been described above, the descriptions are only used for understanding the embodiments of the present invention, and are not intended to limit the embodiments of the present invention. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the embodiments of the invention as defined by the appended claims.

Claims (9)

1. A method of implementing congestion control, comprising:
when at least one output link of the switching device of the first-level switching network is abnormal, traversing all input links of all active SAs connected with the switching device for each destination switching access device SA;
and when the sum of the bandwidth of the currently traversed input link and the bandwidth of the traversed and opened input link is greater than the total output bandwidth of the destination SA, closing the currently traversed input link.
2. The method of claim 1, wherein traversing each input link to which all active SAs are connected to the switching device comprises:
traversing each incoming link in each packet in order from the first packet to the nth packet;
wherein N is the number of input links to which each of the source SAs is connected to the switching device, and each packet includes one of the N input links to which each of the source SAs is connected to the switching device.
3. The method of claim 2 wherein the first packet comprises the lowest-numbered one of the N input links to which each of the source SAs is connected to the switching apparatus, the second packet comprises the next-lowest-numbered one of the N input links to which each of the source SAs is connected to the switching apparatus, … …, and so on, … …, and the N-1 packet comprises the highest-numbered one of the N input links to which each of the source SAs is connected to the switching apparatus, and the nth packet comprises the highest-numbered one of the N input links to which each of the source SAs is connected to the switching apparatus.
4. The method of claim 2, wherein all of the incoming links in a same packet are arranged in a random order.
5. The method according to any one of claims 1 to 4, wherein before determining whether at least one output link of the switching device of the first stage switching network is abnormal, the method further comprises:
configuring an input link identification number table; the link identification number table is used for storing identification numbers of all the input links;
traversing each input link to which each source SA is connected to the switching device comprises:
and traversing each input link in the input link identification number table.
6. The method of claim 5, wherein configuring the input link identification number table comprises:
configuring a first one of said input link identification number registers, i.e. storing an identification number of a first one of said input links in said first one of said input link identification number registers;
and starting from the second input link identification number, storing the identification number of each input link in the storage space with the storage address of the identification number of the last input link.
7. An apparatus for implementing congestion control, comprising a processor and a computer-readable storage medium, wherein instructions are stored in the computer-readable storage medium, and when the instructions are executed by the processor, the method for implementing congestion control according to any one of claims 1 to 6 is implemented.
8. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method of carrying out congestion control according to any one of claims 1 to 6.
9. An apparatus for implementing congestion control, comprising:
the traversing module is used for traversing each input link of all the active SAs connected with the switching device for each destination switching access device SA when at least one output link of the switching device of the first-stage switching network is abnormal;
and when the sum of the bandwidth of the currently traversed input link and the bandwidth of the traversed and opened input link is greater than the total output bandwidth of the destination SA, closing the currently traversed input link.
CN201911037545.9A 2019-10-29 2019-10-29 Method and device for realizing congestion control and computer readable storage medium Withdrawn CN112751771A (en)

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