CN112654036B

CN112654036B - Apparatus and method for blind decoding and/or channel estimation capability indication

Info

Publication number: CN112654036B
Application number: CN202011072085.6A
Authority: CN
Inventors: 阿维克·森古普塔; 阿列克谢·达维多夫; 比斯瓦鲁普·蒙达尔; 德伯迪普·查特吉
Original assignee: Intel Corp
Current assignee: Intel Corp
Priority date: 2019-10-11
Filing date: 2020-10-09
Publication date: 2024-08-09
Anticipated expiration: 2040-10-09
Also published as: CN112654036A

Abstract

The present disclosure provides apparatus and methods for blind decoding and/or channel estimation capability indication. An apparatus for a UE comprising: a memory; and processor circuitry coupled with the memory via the interface, the processor circuitry to: encoding AN indicator for transmission to the AN, wherein the indicator comprises a first value for indicating a first increased blind decoding and/or channel estimation capability supported by the UE for monitoring the PDCCH; decoding first higher layer signaling, wherein the first higher layer signaling is sent by the AN in response to receiving the indicator, wherein the first higher layer signaling includes a second value indicating a second increased blind decoding and/or channel estimation capability applied to the UE for monitoring the PDCCH, and wherein the second value is based at least in part on the first value; and monitoring the PDCCH based on the second value, and wherein the memory is for storing the second value. Other embodiments are also disclosed and claimed.

Description

Apparatus and method for blind decoding and/or channel estimation capability indication

Priority statement

The present application is based on and claims priority from U.S. provisional application serial No. 62/914,288 filed on 10/11 in 2019. The entire contents of this application are incorporated herein by reference in their entirety.

Technical Field

Embodiments of the present disclosure relate generally to the field of wireless communications, and in particular, to an apparatus and method for blind decoding and/or channel estimation capability indication.

Background

Explosive wireless traffic growth has led to an urgent need for rate and capacity improvements. Communication using a plurality of Transmission Reception Points (TRP)/panels (panel) has been introduced and studied to improve the rate and capacity of wireless communication. When using communications with multiple TRP/panels, it is necessary to increase the blind decoding and channel estimation capabilities accordingly.

Disclosure of Invention

An aspect of the present disclosure provides an apparatus for a User Equipment (UE), the apparatus comprising: a memory; and a processor circuit coupled with the memory via an interface, wherein the processor circuit is to: encoding AN indicator for transmission to AN Access Node (AN), wherein the indicator comprises a first value for indicating a first increased blind decoding and/or channel estimation capability supported by the UE for monitoring a Physical Downlink Control Channel (PDCCH); decoding first higher layer signaling, wherein the first higher layer signaling is sent by the AN in response to receiving the indicator, wherein the first higher layer signaling comprises a second value for indicating a second increased blind decoding and/or channel estimation capability applied to the UE for monitoring the PDCCH, and wherein the second value is based at least in part on the first value; and monitoring the PDCCH based on the second value, and wherein the memory is for storing the second value. .

An aspect of the disclosure provides a computer readable medium having instructions stored thereon, wherein the instructions, when executed by processor circuitry of a User Equipment (UE), cause the processor circuitry to: decoding higher layer signaling received from AN Access Node (AN), wherein the higher layer signaling includes a higher layer index per control resource set (CORESET) for activating a multi-Transmit Receive Point (TRP) operation of the UE based on multi-Downlink Control Information (DCI) per CORESET; and performing the multi-DCI based multi-TRP operation in response to the per CORESET based higher layer index.

AN aspect of the present disclosure provides AN apparatus for AN Access Node (AN), the apparatus comprising: a Radio Frequency (RF) circuit interface; and a processor circuit coupled with the RF circuit interface, wherein the processor circuit is to: decoding an indicator received from a User Equipment (UE) via the RF circuit interface, wherein the indicator includes a first value for indicating a first increased blind decoding and/or channel estimation capability supported by the UE for monitoring a Physical Downlink Control Channel (PDCCH); encoding a first higher layer signaling based at least in part on the first value, wherein the first higher layer signaling includes a second value for indicating a second increased blind decoding and/or channel estimation capability applied to the UE for monitoring the PDCCH; and causing the first higher layer signaling to be transmitted to the UE via the RF circuit interface for the UE to monitor the PDCCH based on the second value.

Drawings

Embodiments of the present disclosure will now be described, by way of example and not limitation, in the figures of the accompanying drawings in which like reference numerals refer to similar elements.

Fig. 1 illustrates an example architecture of a system according to some embodiments of the present disclosure.

Fig. 2 illustrates a flow chart of a method for blind decoding/channel estimation capability indication according to some embodiments of the present disclosure.

Fig. 3 illustrates a flow chart of a method for blind decoding/channel estimation capability activation according to some embodiments of the present disclosure.

Fig. 4 illustrates a flow chart of a method for blind decoding/channel estimation capability indication according to some embodiments of the present disclosure.

Fig. 5 illustrates example components of a device according to some embodiments of the present disclosure.

Fig. 6 illustrates an example interface of baseband circuitry according to some embodiments of the present disclosure.

Fig. 7 is a block diagram illustrating components capable of reading instructions from a machine-readable or computer-readable medium and performing any one or more of the methods discussed herein, according to some example embodiments.

Fig. 8 illustrates an example of an infrastructure device, in accordance with various embodiments.

Detailed Description

Various aspects of the illustrative embodiments will be described using terms commonly employed by those skilled in the art to convey the substance of the disclosure to others skilled in the art. However, it will be readily understood by those skilled in the art that many alternative embodiments may be practiced using portions of the described aspects. For purposes of explanation, specific numbers, materials and configurations are set forth in order to provide a thorough understanding of the illustrative embodiments. However, it will be apparent to one skilled in the art that alternative embodiments may be practiced without these specific details. In other instances, well-known features may be omitted or simplified in order not to obscure the illustrative embodiments.

Moreover, various operations will be described as multiple discrete operations in a manner that is most helpful in understanding the illustrative embodiments; however, the order of description should not be construed as to imply that these operations are necessarily order dependent. In particular, these operations need not be performed in the order of presentation.

The phrases "in an embodiment," "in one embodiment," and "in some embodiments" are repeated herein. The phrase generally does not refer to the same embodiment; but it may refer to the same embodiment. The terms "comprising," "having," and "including" are synonymous, unless the context dictates otherwise. The phrases "A or B" and "A/B" mean "(A), (B) or (A and B)".

Fig. 1 illustrates an example architecture of a system 100 according to some embodiments of the disclosure. The following description is provided for an example system 100 that operates in conjunction with a Long Term Evolution (LTE) system standard and a 5G or New Radio (NR) system standard provided by a 3GPP Technical Specification (TS). However, the example embodiments are not limited in this respect and the described embodiments may be applied to other networks that benefit from the principles described herein, such as future 3GPP systems (e.g., sixth generation (6G)) systems, institute of Electrical and Electronics Engineers (IEEE) 802.16 protocols (e.g., wireless Metropolitan Area Network (MAN), worldwide Interoperability for Microwave Access (WiMAX), etc.), and so forth.

As shown in fig. 1, the system 100 may include a UE 101a and a UE 101b (collectively referred to as UE(s) 101 "). As used herein, the term "user equipment" or "UE" may refer to a device having radio communication capabilities and may describe a remote user of network resources in a communication network. The term "user equipment" or "UE" may be considered synonymous and may be referred to as a client, mobile phone, mobile device, mobile terminal, user terminal, mobile unit, mobile station, mobile user, subscriber, user, remote station, access agent, user agent, receiver, radio, reconfigurable mobile, etc. Furthermore, the term "user equipment" or "UE" may include any type of wireless/wired device or any computing device that includes a wireless communication interface. In this example, the UE 101 is shown as a smart phone (e.g., a handheld touch screen mobile computing device connectable to one or more cellular networks), but may also include any mobile or non-mobile computing device, such as consumer electronics devices, cellular phones, smart phones, feature phones, tablet computers, wearable computer devices, personal Digital Assistants (PDAs), pagers, wireless handheld devices, desktop computers, notebook computers, in-Vehicle Infotainment Systems (IVIs), in-vehicle entertainment (ICE) devices, dashboards (Instrument Cluster, ICs), heads-up display (HUD) devices, in-vehicle diagnostic (OBD) devices, dashboard mobile Devices (DME), mobile Data Terminals (MDT), electronic Engine Management Systems (EEMS), electronic/Engine Control Units (ECU), electronic/Engine Control Modules (ECM), embedded systems, microcontrollers, control modules, engine Management Systems (EMS), or "smart" devices, machine-type communication (MTC) devices, machine-to-machine (M2M), internet of things (IoT) devices, and/or the like.

In some embodiments, any of the UEs 101 may include an IoT UE, which may include a network access layer designed for low power IoT applications that utilize short-term UE connections. IoT UEs may utilize technologies such as M2M or MTC to exchange data with MTC servers or devices via PLMNs, proximity-based services (ProSe) or device-to-device (D2D) communications, sensor networks, or IoT networks. The data exchange of M2M or MTC may be a machine initiated data exchange. IoT networks describe interconnected IoT UEs that may include uniquely identifiable embedded computing devices (within the internet infrastructure) with short-term connections. The IoT UE may execute a background application (e.g., keep-alive message, status update, etc.) to facilitate connection of the IoT network.

UE 101 may be configured to connect (e.g., communicatively couple) with RAN 110. In an embodiment, RAN 110 may be a Next Generation (NG) RAN or a 5G RAN, an evolved Universal Mobile Telecommunications System (UMTS) terrestrial radio access network (E-UTRAN) or a legacy RAN, such as a UTRAN (UMTS terrestrial radio access network) or a GERAN (GSM (global system for Mobile communications or group Sp service Mobile) EDGE (GSM evolution) radio access network). As used herein, the term "NG RAN" or the like may refer to RAN 110 operating in NR or 5G system 100, and the term "E-UTRAN" or the like may refer to RAN 110 operating in LTE or 4G system 100. The UE 101 utilizes connections (or channels) 103 and 104, respectively, each of which includes a physical communication interface or layer (discussed in further detail below). As used herein, the term "channel" may refer to any tangible or intangible transmission medium for transmitting data or a data stream. The term "channel" may be synonymous and/or equivalent to "communication channel," "data communication channel," "transmission channel," "data transmission channel," "access channel," "data access channel," "link," "data link," "carrier," "radio frequency carrier," and/or any other similar term indicating a path or medium through which data is transmitted. In addition, the term "link" may refer to a connection between two devices for the purpose of transmitting and receiving information via a Radio Access Technology (RAT).

In this example, connections 103 and 104 are shown as air interfaces to enable communicative coupling, and may be consistent with cellular communication protocols, such as global system for mobile communications (GSM) protocols, code Division Multiple Access (CDMA) network protocols, push-to-talk (PTT) protocols, push-to-cellular PTT (POC) protocols, universal Mobile Telecommunications System (UMTS) protocols, 3GPP Long Term Evolution (LTE) protocols, fifth generation (5G) protocols, new Radio (NR) protocols, and/or any other communication protocols discussed herein. In an embodiment, the UE 101 may exchange communication data directly via the ProSe interface 105. ProSe interface 105 may alternatively be referred to as a Sidelink (SL) interface 105 and may include one or more logical channels including, but not limited to, a physical side link control channel (PSCCH), a physical side link shared channel (PSSCH), a physical side link discovery channel (PSDCH), and a physical side link broadcast channel (PSBCH).

The UE 101b is shown configured to access an Access Point (AP) 106 (also referred to as a "WLAN node 106", "WLAN terminal 106", or "WT 106", etc.) via a connection 107. Connection 107 may comprise a local wireless connection, such as a connection consistent with any IEEE 802.11 protocol, where AP 106 would comprise a wireless fidelity (WiFi) router. In this example, the AP 106 is shown connected to the internet and not to the core network of the wireless system (described in further detail below). In various embodiments, the UE 101b, RAN 110, and AP 106 may be configured to utilize LTE-WLAN aggregation (LWA) operation and/or WLAN LTE/WLAN radio level integration (LWIP) operation with IPsec tunneling. The LWA operation may involve the UE 101b in rrc_connected being configured by the RAN node 111 to utilize radio resources of LTE and WLAN. LWIP operations may involve the UE 101b using WLAN radio resources (e.g., connection 107) to authenticate and encrypt packets (e.g., internet Protocol (IP) packets) sent over connection 107 via an internet protocol security (IPsec) protocol tunnel. IPsec tunnels may include encapsulating the entire original IP packet and adding a new packet header, protecting the original header of the IP packet.

RAN 110 may include one or more RAN nodes 111a and 111b (collectively referred to as RAN node(s) 111 ") that enable connections 103 and 104. As used herein, the terms "Access Node (AN)", "access point", "RAN node", and the like may describe devices that provide radio baseband functionality for data and/or voice connections between a network and one or more users. These access nodes may be referred to as Base Stations (BS), next generation node BS (gNB), RAN nodes, evolved nodebs (enbs), nodebs, roadside units (RSUs), transmission reception points (TRxP or TRPs), and the like, and may include ground stations (e.g., terrestrial access points) or satellite stations that provide coverage within a geographic area (e.g., cell). As used herein, the term "NG RAN node" or the like may refer to a RAN node 111 (e.g., a gNB) operating in an NR or 5G system 100, and the term "E-UTRAN node" or the like may refer to a RAN node 111 (e.g., an eNB) operating in an LTE or 4G system 100. According to various embodiments, RAN node 111 may be implemented as one or more dedicated physical devices such as a macrocell base station and/or a Low Power (LP) base station for providing a femtocell, picocell, or other similar cell with smaller coverage area, smaller user capacity, or higher bandwidth than the macrocell.

In some embodiments, all or part of RAN node 111 may be implemented as part of a virtual network as one or more software entities running on a server computer, which may be referred to as a Cloud Radio Access Network (CRAN) and/or a pool of virtual baseband units (vBBUP). In these embodiments, CRAN or vBBUP may implement RAN functional partitioning, such as: PDCP partitioning, wherein RRC and PDCP layers are operated by CRAN/vBBUP, and other layer 2 (L2) protocol entities are operated by individual RAN nodes 111; MAC/PHY partitioning, wherein RRC, PDCP, RLC and MAC layers are operated by CRAN/vBBUP and PHY layers are operated by individual RAN nodes 111; or "lower PHY" split, where RRC, PDCP, RLC, MAC layers and upper portions of the PHY layers are operated by CRAN/vBBUP and lower portions of the PHY layers are operated by individual RAN nodes 111. The virtualization framework allows freeing up the processor cores of RAN node 111 to execute other virtualized applications. In some implementations, individual RAN node 111 may represent an individual gNB-DU connected to the gNB-CU via an individual F1 interface (not shown in fig. 1). In these implementations, the gNB-DU may include one or more remote radio heads or Radio Front End Modules (RFEM), and the gNB-CU may be operated by a server (not shown) located in RAN 110 or by a server pool in a similar manner as CRAN/vBBUP. Additionally or alternatively, one or more RAN nodes 111 may be a next generation eNB (NG-eNB), which is a RAN node providing E-UTRA user plane and control plane protocol termination to the UE 101, and which is connected to the 5GC via an NG interface.

In a V2X scenario, one or more RAN nodes 111 may be or act as an RSU. The term "roadside unit" or "RSU" may refer to any transport infrastructure entity for V2X communication. The RSUs may be implemented in or by suitable RAN nodes or fixed (or relatively stationary) UEs, wherein RSUs implemented in or by UEs may be referred to as "UE-type RSUs", RSUs implemented in or by enbs may be referred to as "eNB-type RSUs", RSUs implemented in or by gnbs may be referred to as "gNB-type RSUs", etc. In one example, an RSU is a computing device coupled with a radio frequency circuit located at the roadside that provides connectivity support for a passing vehicle UE 101 (vUE 101). The RSU may also include internal data storage circuitry for storing junction map geometry, traffic statistics, media, and applications/software for sensing and controlling ongoing vehicle and pedestrian traffic. The RSU may operate over the 5.9GHz Direct Short Range Communication (DSRC) band to provide very low latency communications required for high speed events, such as avoiding collisions, traffic warnings, and the like. Additionally or alternatively, the RSU may operate on the cellular V2X frequency band to provide the low-latency communications described above, as well as other cellular communication services. Additionally or alternatively, the RSU may operate as a WiFi hotspot (2.4 GHz band) and/or provide connectivity to one or more cellular networks to provide uplink and downlink communications. The computing device(s) and some or all of the radio frequency circuitry of the RSU may be enclosed in a weather-proof enclosure suitable for outdoor installation, and may include a network interface controller to provide a wired (e.g., ethernet) connection with the traffic signal controller and/or the backhaul network.

Any RAN node 111 may terminate the air interface protocol and may be the first point of contact for the UE 101. In some embodiments, any RAN node 111 may satisfy various logical functions of RAN 110 including, but not limited to, radio Network Controller (RNC) functions such as radio bearer management, uplink and downlink dynamic radio resource management and data packet scheduling, and mobility management.

In embodiments, UE 101 may be configured to communicate with each other or any RAN node 111 over a multicarrier communication channel using Orthogonal Frequency Division Multiplexing (OFDM) communication signals in accordance with various communication techniques such as, but not limited to, orthogonal Frequency Division Multiple Access (OFDMA) communication techniques (e.g., for downlink communications) or single carrier frequency division multiple access (SC-FDMA) communication techniques (e.g., for uplink and ProSe or side-link communications), although the scope of the embodiments is not limited in this respect. The OFDM signal may comprise a plurality of orthogonal subcarriers.

In some embodiments, the downlink resource grid may be used for downlink transmissions from any RAN node 111 to the UE 101, while uplink transmissions may use similar techniques. The grid may be a time-frequency grid, referred to as a resource grid or time-frequency resource grid, which is the physical resource of each time slot in the downlink. This time-frequency plane representation is a common practice for OFDM systems, which makes radio resource allocation intuitive. Each column and each row of the resource grid corresponds to one OFDM symbol and one OFDM subcarrier, respectively. The duration of the resource grid in the time domain corresponds to one slot in the radio frame. The smallest time-frequency unit in the resource grid is denoted as a resource element. Each resource grid includes a plurality of resource blocks that describe the mapping of certain physical channels to resource elements. Each resource block includes a set of resource elements; in the frequency domain, this may represent the minimum amount of resources that can be currently allocated. There are several different physical downlink channels transmitted using such resource blocks.

According to various embodiments, UE 101 and RAN node 111 transmit (e.g., send and receive) data over a licensed medium (also referred to as "licensed spectrum" and/or "licensed band") and an unlicensed shared medium (also referred to as "unlicensed spectrum and/or" unlicensed band "). The licensed spectrum may include channels operating in a frequency range of about 400MHz to about 3.8GHz, while the unlicensed spectrum may include the 5GHz band.

To operate in unlicensed spectrum, the UE 101 and RAN node 111 may operate using Licensed Assisted Access (LAA), enhanced LAA (eLAA), and/or other eLAA (feLAA) mechanisms. In these implementations, the UE 101 and RAN node 111 may perform one or more known media sensing operations and/or carrier sensing operations to determine whether one or more channels in the unlicensed spectrum are unavailable or otherwise occupied prior to transmission in the unlicensed spectrum. The medium/carrier sensing operation may be performed according to a Listen Before Talk (LBT) protocol.

LBT is a mechanism in which a device (e.g., UE 101, RAN node 111,112, etc.) senses a medium (e.g., channel or carrier frequency) and transmits when the medium is sensed to be idle (or when a particular channel in the medium is sensed to be unoccupied). The medium sensing operation may include a Clear Channel Assessment (CCA) that utilizes at least Energy Detection (ED) to determine whether other signals are present on the channel in order to determine whether the channel is occupied or clear. The LBT mechanism allows the cellular/LAA network to coexist with incumbent systems in the unlicensed spectrum and with other LAA networks. ED may include sensing Radio Frequency (RF) energy over an expected transmission band for a period of time and comparing the sensed RF energy to a predetermined or configured threshold.

In general, incumbent systems in the 5GHz band are WLANs based on IEEE 802.11 technology. WLAN employs a contention-based channel access mechanism called carrier sense multiple access with collision avoidance (CSMA/CA). Here, when a WLAN node (e.g., a Mobile Station (MS) such as UE 101, AP 106) intends to transmit, the WLAN node may first perform CCA before transmitting. In addition, a back-off mechanism is used to avoid collisions in the case where more than one WLAN node senses the channel as idle and transmits simultaneously. The backoff mechanism may be a counter that is randomly drawn within the Contention Window Size (CWS), which increases exponentially when collisions occur and is reset to a minimum when the transmission is successful. The LBT mechanism designed for LAA is somewhat similar to CSMA/CA for WLAN. In some implementations, the LBT procedure for DL or UL transmission bursts comprising PDSCH or PUSCH transmissions, respectively, may have LAA contention window of variable length between X and Y extended CCA (ECCA) slots, where X and Y are minimum and maximum values of CWS for the LAA. In one example, the minimum CWS for LAA transmission may be 9 microseconds (μs); however, the size of the CWS and the Maximum Channel Occupancy Time (MCOT) (e.g., transmission burst) may be based on government regulatory requirements.

LAA mechanisms are established based on Carrier Aggregation (CA) technology of LTE-Advanced (LTE-Advanced) systems. In CA, each aggregated carrier is referred to as a Component Carrier (CC). CCs may have bandwidths of 1.4, 3, 5, 10, 15, or 20MHz, and may aggregate up to five CCs, thus the maximum aggregate bandwidth is 100MHz. In a Frequency Division Duplex (FDD) system, the number of aggregated carriers may be different for DL and UL, where the number of UL CCs is equal to or lower than the number of DL component carriers. In some cases, individual CCs may have different bandwidths than other CCs. In a Time Division Duplex (TDD) system, the number of CCs and the bandwidth of each CC are typically the same for DL and UL.

The CA also includes a separate serving cell to provide a separate CC. The coverage of the serving cell may be different, for example, because CCs on different frequency bands will experience different path losses. A primary serving cell or primary cell (PCell) may provide a primary CC (PCC) for both UL and DL, and may handle Radio Resource Control (RRC) and non-access stratum (NAS) related activities. Other serving cells are referred to as secondary cells (scells), and each SCell may provide a separate secondary CC (SCC) for both UL and DL. SCCs may be added and removed as needed, while changing PCC may require UE 101 to undergo a handover. In LAA, eLAA, and feLAA, some or all scells may operate in unlicensed spectrum (referred to as "LAA scells") and the LAA scells are assisted by PCell operating in licensed spectrum. When the UE is configured with more than one LAA SCell, the UE may receive a UL grant on the configured LAA SCell indicating a different Physical Uplink Shared Channel (PUSCH) starting location within the same subframe.

A Physical Downlink Shared Channel (PDSCH) may carry user data and higher layer signaling to the UE 101. The Physical Downlink Control Channel (PDCCH) may carry information on a transport format and resource allocation related to the PDSCH channel, etc. It may also inform the UE 101 about transport format, resource allocation and H-ARQ (hybrid automatic repeat request) information related to the uplink shared channel. In general, downlink scheduling (allocation of control and shared channel resource blocks to UEs 101b within a cell) may be performed at any RAN node 111 based on channel quality information fed back from any UE 101. The downlink resource allocation information may be transmitted on a PDCCH for (e.g., allocated to) each UE 101.

The PDCCH may use a Control Channel Element (CCE) to convey control information. The PDCCH complex-valued symbols may first be organized into quadruples before being mapped to resource elements, which may then be permuted using a sub-block interleaver for rate matching. Each PDCCH may be transmitted using one or more of these CCEs, where each CCE may correspond to nine sets of four physical resource elements called Resource Element Groups (REGs). Four Quadrature Phase Shift Keying (QPSK) symbols may be mapped to each REG. The PDCCH may be transmitted using one or more CCEs, depending on the size of Downlink Control Information (DCI) and channel conditions. Four or more different PDCCH formats with different numbers of CCEs may be defined in LTE (e.g., aggregation level, l=1, 2, 4, or 8).

Some embodiments may use a concept of resource allocation for control channel information, which is an extension of the above concept. For example, some embodiments may use an Enhanced Physical Downlink Control Channel (EPDCCH) that uses PDSCH resources for control information transmission. The EPDCCH may be transmitted using one or more Enhanced Control Channel Elements (ECCEs). Similar to the above, each ECCE may correspond to nine sets of four physical resource elements referred to as Enhanced Resource Element Groups (EREGs). In some cases, ECCEs may have other amounts of EREGs.

RAN nodes 111 may be configured to communicate with each other via interface 112. In embodiments where the system 100 is an LTE system, the interface 112 may be an X2 interface 112. The X2 interface may be defined between two or more RAN nodes 111 (e.g., two or more enbs, etc.) connected to EPC 120 and/or two enbs connected to EPC 120. In some implementations, the X2 interface may include an X2 user plane interface (X2-U) and an X2 control plane interface (X2-C). The X2-U may provide a flow control mechanism for user data packets transmitted over the X2 interface and may be used to communicate information about user data transfer between enbs. For example, X2-U may provide specific sequence number information for user data transmitted from a master eNB (MeNB) to a secondary eNB (SeNB); information about successful sequential transmission of PDCP PDUs from the SeNB to the UE 101 for user data; information of PDCP PDUs not delivered to the UE 101; information about a current minimum required buffer size at the SeNB for data sent to the UE user; etc. X2-C may provide LTE access mobility functions including context transfer from source eNB to target eNB, user plane transfer control, etc.; a load management function; inter-cell interference coordination function.

In embodiments where system 100 is a 5G or NR system, interface 112 may be an Xn interface 112. An Xn interface is defined between two or more RAN nodes 111 (e.g., two or more gnbs, etc.) connected to the 5gc 120, between a RAN node 111 (e.g., a gNB) connected to the 5gc 120 and an eNB, and/or between two enbs connected to the 5gc 120. In some implementations, the Xn interface may include an Xn user plane (Xn-U) interface and an Xn control plane (Xn-C) interface. Xn-U may provide for the unsecured transport of user plane PDUs and support/provide data forwarding and flow control functions. Xn-C may provide: management and error handling functions; managing the function of the Xn-C interface; mobility support for UEs 101 in CONNECTED mode (e.g., CM-CONNECTED) includes functionality to manage UE mobility for CONNECTED modes between one or more RAN nodes 111. Mobility support may include context transfer from an old (source) serving RAN node 111 to a new (target) serving RAN node 111; and control of user plane tunnels between the old (source) serving RAN node 111 and the new (target) serving RAN node 111. The protocol stack of an Xn-U may include a transport network layer built on top of an Internet Protocol (IP) transport layer, and a GTP-U layer above the UDP and/or IP layer(s) for carrying user plane PDUs. The Xn-C protocol stack may include an application layer signaling protocol, referred to as the Xn application protocol (Xn-AP), and a transport network layer built on SCTP. SCTP may be located above the IP layer and may provide for the vouching transfer of application layer messages. In the transport IP layer, point-to-point transport is used to deliver signaling PDUs. In other implementations, the Xn-U protocol stack and/or the Xn-C protocol stack may be the same as or similar to the user plane(s) and/or control plane protocol stack(s) shown and described herein.

RAN 110 is shown communicatively coupled to a core network, in this embodiment Core Network (CN) 120.CN 120 may include a plurality of network elements 122 configured to provide various data and telecommunications services to clients/subscribers (e.g., users of UE 101) connected to CN 120 through RAN 110. The term "network element" may describe a physical or virtualized device for providing wired or wireless communication network services. The term "network element" may be considered synonymous with and/or referred to as: networked computers, network hardware, network devices, routers, switches, hubs, bridges, radio network controllers, radio access network devices, gateways, servers, virtualized Network Functions (VNFs), network Function Virtualization Infrastructure (NFVI), and/or the like. The components of the CN 120 may be implemented in one physical node or in a separate physical node, including components that read and execute instructions from a machine-readable or computer-readable medium (e.g., a non-transitory machine-readable storage medium). In some embodiments, network Function Virtualization (NFV) may be used to virtualize any or all of the above-described network node functions (described in further detail below) via executable instructions stored in one or more computer-readable storage media. The logical instantiation of the CN 120 may be referred to as a network slice, and the logical instantiation of a portion of the CN 120 may be referred to as a network sub-slice. NFV architecture and infrastructure can be used to virtualize one or more network functions or be executed by dedicated hardware onto physical resources including industry standard server hardware, storage hardware, or a combination of switches. In other words, NFV systems may be used to perform virtual or reconfigurable implementations of one or more EPC components/functions.

In general, the application server 130 may be an element that provides an application that uses IP bearer resources with a core network (e.g., UMTS Packet Service (PS) domain, LTE PS data service, etc.). The application server 130 may also be configured to support one or more communication services (e.g., voice over internet protocol (VoIP) sessions, PTT sessions, group communication sessions, social networking services, etc.) for the UE 101 via the EPC 120.

In an embodiment, CN 120 may be 5GC (referred to as "5GC 120" or the like), and RAN 110 may be connected with CN 120 via NG interface 113. In an embodiment, NG interface 113 may be split into two parts: a NG user plane (NG-U) interface 114 that carries traffic data between RAN node 111 and User Plane Functions (UPFs); and an S1 control plane (NG-C) interface 115, which is a signaling interface between RAN node 111 and the AMF.

In an embodiment, the CN 120 may be a 5G CN (referred to as "5gc 120" or the like), while in other embodiments, the CN 120 may be an Evolved Packet Core (EPC). In the case where CN 120 is an EPC (referred to as "EPC 120", etc.), RAN 110 may connect with CN 120 via S1 interface 113. In an embodiment, the S1 interface 13 may be divided into two parts: an S1 user plane (S1-U) interface 114 that carries traffic data between RAN node 111 and a serving gateway (S-GW); and an S1-Mobility Management Entity (MME) interface 115, which is a signaling interface between RAN node 111 and the MME.

In Rel-16 NR, multiple-input multiple-output (MIMO) work items study and specify downlink reception of data by a UE from multiple TRP/panels. A method for downlink reception of data from a plurality of TRPs may include: PDSCH transmissions from the plurality of TRPs to the UE are scheduled using the plurality of DCIs transmitted within PDCCHs on the plurality of configured sets of control resources (CORESET) with the associated set of search spaces. When a UE is expected to decode multiple DCIs for multi-TRP transmission, the corresponding blind decoding and channel estimation capabilities for the UE may be increased.

Methods for activating and/or instructing a UE to use increased blind decoding/channel estimation capability are provided in the present disclosure for multi-DCI based multi-TRP (multi-DCI based multi-TRP) operation in Rel-16 NR and future next generation cellular systems.

The channel estimation capability is related to Control Channel Element (CCE) CHANNEL ELEMENT, and thus, in this disclosure, the blind decoding/channel estimation (blind decoding/channel estimation) capability can be interchanged with BD/CCE capability.

In some embodiments of the present disclosure, blind decoding/channel estimation capability may be described on a serving cell, component Carrier (CC), bandwidth portion (BWP), time slot, etc. (e.g., on a per serving cell, per Component Carrier (CC), per bandwidth portion (BWP), per time slot, etc.).

In addition, the blind decoding/channel estimation capability may be related to both: total number of monitored PDCCH candidates per slot with subcarrier spacing (SCS) configuration μOr the total number of non-overlapping CCEs per slot with SCS configuration μThus, "blind decoding/channel estimation capability"And "blind decoding/channel estimation total limit" are interchangeable in this disclosure.

In Rel-16 NR, a procedure for multi-TRP/panel operation based on multi-DCI is being specified. The following have been agreed:

If a higher layer index (also referred to herein as CORESETPoolIndex or higher layer index per CORESET) is configured per CORESET for a UE supporting multi-DCI based multi-TRP transmission, the following principle of multi-DCI based multi-TRP transmission is supported:

for DL BWP, the maximum number of monitored PDCCH candidates per slot with SCS configuration μ, for the case of configuring multiple CORESET for the same TRP (e.g., based on the same CORESETPoolIndex value being configured per "PDCCH-Config") And maximum number of non-overlapping CCEs per slot with SCS configuration μNo greater than the rel.15 limit defined in tables 10.1-2 and 10.1-3 in 3GPP TS 38.213V15.7.0 (2019-09);

The method of calculation of the total limit of blind decoding/channel estimation across configured CCs is the same as in rel.15, based on that described in clause 10 of 3GPP TS 38.213V15.7.0 (2019-09) Calculating;

Where the maximum number of monitored PDCCH candidates and non-overlapping CCEs per slot (defined in 3GPP TS 38.213V15.7.0 (2019-09)) is determined (boundary derived from PDCCH-BlindDetectionCA) And) With the total restriction, the number of DL serving cell(s) configured for multi-DCI based multi-TRP transmission is increased by a factor of R, where R is a value indicating the extent to which the UE is to increase its blind decoding/channel estimation capability;

for a serving cell configured with multi-TRP operation based on multi-DCI, o (boundary independent of pdcch-BlindDetectionCA), compared to those defined in tables 10.1-2 and 10.1-3 in 3GPP TS 38.213V15.7.0 (2019-09), AndIncreasing by a factor of R;

To be studied further (FFS), the boundaries originate from pdcch-BlindDetectionMCG or pdcch-BlindDetectionSCG, or the boundaries are independent of pdcch-BlindDetectionMCG or pdcch-BlindDetectionSCG.

If a higher layer index (also referred to herein as CORESETPoolIndex or higher layer index per CORESET) is configured per CORESET for a UE supporting multi-DCI based multi-TRP transmission, the following is supported for the above principles:

number of DL cells with SCS configuration μ Is replaced by Wherein the method comprises the steps ofIs the number of configured DL serving cell(s) with scsμ, with active DL BWP, and without multi-DCI based multi-TRP operation, andIs the number of configured DL serving cell(s) with scsμ, with active DL BWP, and with multi-TRP operation based on multi-DCI;

the value range of omicron R is [1, 2], which depends on the UE's capabilities;

UE indication pdcch-BlindDetectionCA when: a+b DL cells may be configured to the UE, where a > =0 DL serving cells having no multi-DCI based multi-TRP operation and B > =0 DL serving cells having multi-DCI based multi-TRP operation such that a+r·b >4;

When UE does not provide pdcch-BlindDetectionCA, Where a is the number of configured DL serving cells without multi-DCI based multi-TRP operation and b is the number of configured DL serving cells with multi-DCI based multi-TRP operation.

For multi-DCI based multi-TRP operation, UE capability reporting is supported. The UE may report the value R. This capability may only be applicable to downlink cells configured by the network for multi-DCI based multi-TRP operation. In the case where the UE reports its capability by the value of R >1, the network may not be authorized to use this reported capability to increase blind decoding/channel estimation capability for multi-TRP operation while sacrificing CA flexibility.

Thus, it would be beneficial to allow for two cases of multi-DCI based multi-TRP operation:

Case a: the blind decoding/channel estimation limit per CC based per slot is increased by a factor of R compared to Rel-15.

Case B: the per CC based per slot based blind decoding/channel estimation constraint is the same as in Rel-15.

Let r=2, andAssume that 4 CCs are configured for CA, e.g., 4 cells are configured, including one primary cell (PCell) and three secondary cells (scells). Also assume that the actual number of PDCCH candidates/non-overlapping CCEs configured on the PCell isWhile the actual number of PDCCH candidates/non-overlapping CCEs configured on each of the three scells is

For case a, assume that the network is configured with multi-DCI based multi-TRP operation such thatAndIn this case, the blind decoding/channel estimation limit is increased toWhile the total limit of blind decoding/channel estimation is defined byGiven. In this case, PDCCH candidates are not discarded on the PCell due to increased blind decoding/channel estimation limitations. Therefore, PDCCH candidates cannot be configured for all scells beyond their respective limitsSince oversubscription is not allowed on the SCell (overbooking), the search space must be reconfigured.

For case B, assume that the network is configured with multi-DCI based multi-TRP operation such thatAndThis means that there is no increase in the per CC based blind decoding/channel estimation limit compared to Rel-15. In this case, the PDCCH candidate would be discarded on the PCell according to the Rel-15 oversubscription rule. PDCCH candidates may be configured for each of the three scells up to their maximum limitAnd does not require reconfiguration of the search space.

Hereinafter, a method for blind decoding/channel estimation capability indication and activation will be described in detail with reference to fig. 2 to 4.

Fig. 2 illustrates a flow chart of a method 200 for blind decoding/channel estimation capability indication according to some embodiments of the present disclosure. The method 200 may be performed by a UE.

In 210, the UE may encode AN indicator for transmission to AN (e.g., a gNB). The indicator may include a first value R for indicating a first increased blind decoding/channel estimation capability supported by the UE for monitoring the PDCCH. In some embodiments, the first value may be greater than 1.

In 220, the UE may decode the first higher layer signaling. The first higher layer signaling may be sent by the AN in response to receiving 210 the indicator. The first higher layer signaling may include a second value R _applied (also referred to as BDFactorR) for indicating a second increased blind decoding/channel estimation capability applied to the UE for monitoring the PDCCH. The second value R _applied is based at least in part on the first value R. In some embodiments, the second value R _applied is also based on bandwidth conditions or the like.

In some embodiments, the second value R _applied is equal to or less than the first value R.

In some embodiments, the UE may store the second value R _applied in memory.

In 230, the UE may monitor the PDCCH based on the second value R _applied to perform multi-DCI based multi-TRP operation.

In some embodiments, when the UE reports an increased blind decoding/channel estimation capability with a value R >1, the UE will expect to configure by the network higher layer parameters that specify the actual value R _applied of R that the network is using, where R _applied < = R. In other words, the blind decoding/channel estimation capability is increased by R _applied times to enable the UE to perform multi-TRP operation based on multi-DCI.

In some embodiments, R _applied may be indicated by the AN on a slot basis, a CC set basis, a cell basis, a TRP basis, a BWP basis, and/or a UE basis (e.g., on a per slot basis, a per CC set basis, a per cell basis, a per TRP basis, a per BWP basis, and/or a per UE basis).

In some embodiments of the present invention, in some embodiments,

In some embodiments, the UE may receive and decode the second higher layer signaling sent from the AN. The second higher layer signaling may include CORESETPoolIndex to enable increased blind decoding/channel estimation capability of the UE. In other words, the AN may use CORESETPoolIndex to activate multi-DCI based multi-TRP operation of the UE. In one embodiment, the UE may receive CORESETPoolIndex before reporting R to the AN. In another embodiment, the UE may report R prior to receiving CORESETPoolIndex from the AN. The embodiments are not limited in this respect.

In some embodiments CORESETPoolIndex may include a value of 0 or 1.

In some embodiments, the UE may report R, where R > 1, but may be configured by the networkDue toIs configured as a single TRP cellAnd R _applied times the multiple TRP cellAnd thus the multi-TRP operation may be transparent to the UE. In these embodiments, CORESETPoolIndex of all cells may be configured to have the same value, so the network configures the UE using blind decoding/channel estimation capabilities similar to Rel-15 NR.

In some embodiments, the network applies oversubscription to PDCCH candidates, e.g., on the PCell, based on CORESETPoolIndex and R _applied. Oversubscription means that more PDCCH candidates than the blind decoding/channel estimation limit are configured by the AN. Thus, the UE may check for oversubscription based on CORESETPoolIndex and R _applied, determining PDCCH candidates that need to be detected to reach the blind decoding/channel estimation limit derived from R _applied. The remaining (out of limit) PDCCH candidates need not be detected, e.g., may be discarded.

In the example of R _applied > 1, oversubscription may be applied only to PDCCH candidates corresponding to CORESETPoolIndex =0. Thus, the UE may examine a set of search spaces associated with CORESET corresponding to CORESETPoolIndex =0. However, this example is described for illustrative purposes only, and the disclosure is not limited in this respect. Thus, in another example, oversubscription may be applied to the PDCCH candidate corresponding to CORESETPoolIndex =1.

Fig. 3 illustrates a flow chart of a method 300 for blind decoding/channel estimation capability activation according to some embodiments of the present disclosure. The method 300 may be performed by a UE.

In 310, the UE may decode higher layer signaling received from the AN. The higher layer signaling may include a higher layer index (CORESETPoolIndex) per CORESET to activate multi-DCI based multi-TRP operation of the UE.

In 320, the UE may perform multi-DCI based multi-TRP operation in response to the per CORESET higher layer index.

As described above, the higher layer index (CORESETPoolIndex) per CORESET may be used to activate multi-DCI based multi-TRP operation of the UE. Then, the UE may perform multi-TRP operation based on multi-DCI, and its blind decoding/channel estimation capability increases accordingly.

In some embodiments, CORESET corresponding to two TRPs are configured to have the same CORESETPoolIndex value, any multi-TRP transmissions from the two TRPs may be transparent from the perspective of the UE, and blind decoding/channel estimation capabilities may not be increased.

Fig. 4 illustrates a flow chart of a method 400 for blind decoding/channel estimation capability indication according to some embodiments of the present disclosure. The method 400 may be performed by AN.

In 410, the AN may decode AN indicator comprising a first value indicating a first increased blind decoding/channel estimation capability supported by the UE for monitoring the PDCCH.

In 420, the AN may encode the first higher layer signaling based at least in part on the first value. The first higher layer signaling may include a second value to indicate a second increased blind decoding/channel estimation capability applied to the UE for monitoring the PDCCH.

In 430, the AN may send first higher layer signaling to the UE to monitor the PDCCH by the UE based on the second value.

The method 400 performed by the AN may be understood in conjunction with embodiments of the method 200 and will not be described in detail herein.

The method for blind decoding/channel estimation capability indication and activation has been described above. With these methods, the UE may perform multi-TRP operation based on multi-DCI to increase the capability of downlink reception.

Fig. 5 illustrates example components of a device 500 according to some embodiments. In some embodiments, the device 500 may include an application circuit 502, a baseband circuit 504, a Radio Frequency (RF) circuit 506, a Front End Module (FEM) circuit 508, one or more antennas 510, and a Power Management Circuit (PMC) 512 coupled together at least as shown. The components of the illustrated device 500 may be included in a UE or AN. In some embodiments, device 500 may include fewer elements (e.g., AN may not use application circuitry 502, but instead include a processor/controller to process IP data received from the EPC). In some embodiments, device 500 may include additional elements, such as memory/storage devices, displays, cameras, sensors, or input/output (I/O) interfaces. In other embodiments, the components described below may be included in more than one device (e.g., the circuitry may be separately included in more than one device for a Cloud-RAN (C-RAN) implementation).

The application circuitry 502 may include one or more application processors. For example, application circuitry 502 may include circuitry such as, but not limited to: one or more single-core or multi-core processors. The processor(s) may include any combination of general-purpose processors and special-purpose processors (e.g., graphics processors, application processors, etc.). The processor may be coupled to or may include memory/storage and may be configured to execute instructions stored in the memory/storage to enable various applications and/or operating systems to run on the device 500. In some embodiments, the processor of application circuitry 502 may process IP packets received from the EPC.

Baseband circuitry 504 may include circuitry such as, but not limited to: one or more single-core or multi-core processors. Baseband circuitry 504 may include one or more baseband processors or control logic to process baseband signals received from the receive signal path of RF circuitry 506 and to generate baseband signals for the transmit signal path of RF circuitry 506. Baseband processing circuit 504 may interface with application circuit 502 to generate and process baseband signals and control the operation of RF circuit 506. For example, in some embodiments, baseband circuitry 504 may include a third generation (3G) baseband processor 504A, a fourth generation (4G) baseband processor 504B, a fifth generation (5G) baseband processor 504C, or other baseband processor(s) 504D for other existing generations, generations to be developed in or about to be developed in the future (e.g., sixth generation (6G), etc.). Baseband circuitry 504 (e.g., one or more of baseband processors 504A-D) may handle various radio control functions that support communication with one or more radio networks via RF circuitry 506. In other embodiments, some or all of the functionality of baseband processors 504A-D may be included in modules stored in memory 504G and these functions may be performed via Central Processing Unit (CPU) 504E. The radio control functions may include, but are not limited to: signal modulation/demodulation, encoding/decoding, radio frequency shifting, etc. In some embodiments, the modulation/demodulation circuitry of baseband circuitry 504 may include Fast Fourier Transform (FFT), precoding, and/or constellation mapping/demapping functions. In some embodiments, the encoding/decoding circuitry of baseband circuitry 504 may include convolution, tail-biting (tail-biting) convolution, turbo, viterbi, and/or Low Density Parity Check (LDPC) encoder/decoder functions. Embodiments of the modem and encoder/decoder functions are not limited to these examples and may include other suitable functions in other embodiments.

In some embodiments, baseband circuitry 504 may include one or more audio Digital Signal Processors (DSPs) 504F. The audio DSP(s) 504F may include elements for compression/decompression and echo cancellation, and may include other suitable processing elements in other embodiments. In some embodiments, components of the baseband circuitry may be suitably combined in a single chip, a single chipset, or disposed on the same circuit board. In some embodiments, some or all of the constituent components of baseband circuitry 504 and application circuitry 502 may be implemented together, for example, on a system on a chip (SOC).

In some embodiments, baseband circuitry 504 may provide communications compatible with one or more radio technologies. For example, in some embodiments, baseband circuitry 504 may support communication with an Evolved Universal Terrestrial Radio Access Network (EUTRAN) or other Wireless Metropolitan Area Network (WMAN), a Wireless Local Area Network (WLAN), a Wireless Personal Area Network (WPAN). Embodiments in which baseband circuitry 504 is configured to support radio communications for more than one wireless protocol may be referred to as multi-mode baseband circuitry.

RF circuitry 506 may support communication with a wireless network using modulated electromagnetic radiation through a non-solid medium. In various embodiments, RF circuitry 506 may include switches, filters, amplifiers, and the like to facilitate communication with a wireless network. RF circuitry 506 may include a receive signal path that may include circuitry to down-convert RF signals received from FEM circuitry 508 and provide baseband signals to baseband circuitry 504. RF circuitry 506 may also include transmit signal paths that may include circuitry to up-convert baseband signals provided by baseband circuitry 504 and provide RF output signals to FEM circuitry 508 for transmission.

In some embodiments, the receive signal path of RF circuit 506 may include a mixer circuit 506a, an amplifier circuit 506b, and a filter circuit 506c. In some embodiments, the transmit signal path of RF circuit 506 may include a filter circuit 506c and a mixer circuit 506a. The RF circuit 506 may also include a synthesizer circuit 506d for synthesizing frequencies for use by the mixer circuit 506a of the receive signal path and the transmit signal path. In some embodiments, mixer circuit 506a of the receive signal path may be configured to down-convert the RF signal received from FEM circuit 508 based on the synthesized frequency provided by synthesizer circuit 506 d. The amplifier circuit 506b may be configured to amplify the down-converted signal, and the filter circuit 506c may be a Low Pass Filter (LPF) or a Band Pass Filter (BPF) configured to remove unwanted signals from the down-converted signal to generate an output baseband signal. The output baseband signal may be provided to baseband circuitry 504 for further processing. In some embodiments, the output baseband signal may be a zero frequency baseband signal, but this is not required. In some embodiments, mixer circuit 506a of the receive signal path may comprise a passive mixer, although the scope of the embodiments is not limited in this respect.

In some embodiments, the mixer circuit 506a of the transmit signal path may be configured to upconvert the input baseband signal based on the synthesized frequency provided by the synthesizer circuit 506d to generate an RF output signal for the FEM circuit 508. The baseband signal may be provided by baseband circuitry 504 and may be filtered by filter circuitry 506 c.

In some embodiments, the mixer circuit 506a of the receive signal path and the mixer circuit 506a of the transmit signal path may comprise two or more mixers and may be arranged for quadrature down-conversion and/or up-conversion, respectively.

In some embodiments, the mixer circuit 506a of the receive signal path and the mixer circuit 506a of the transmit signal path may include two or more mixers and may be arranged for image rejection (e.g., hartley image rejection). In some embodiments, the mixer circuit 506a of the receive signal path and the mixer circuit 506a of the transmit signal path may be arranged for direct down-conversion and/or direct up-conversion, respectively. In some embodiments, the mixer circuit 506a of the receive signal path and the mixer circuit 506a of the transmit signal path may be configured for superheterodyne operation.

In some embodiments, the output baseband signal and the input baseband signal may be analog baseband signals, although the scope of the embodiments is not limited in this respect. In some alternative embodiments, the output baseband signal and the input baseband signal may be digital baseband signals. In these alternative embodiments, RF circuitry 506 may include analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuitry, and baseband circuitry 504 may include a digital baseband interface to communicate with RF circuitry 506.

In some dual mode embodiments, separate radio IC circuits may be provided to process signals for each spectrum, although the scope of the embodiments is not limited in this respect.

In some embodiments, synthesizer circuit 506d may be a fractional-N synthesizer or a fractional-N/N +1 synthesizer, although the scope of the embodiments is not limited in this respect as other types of frequency synthesizers may be suitable. For example, synthesizer circuit 506d may be a delta-sigma synthesizer, a frequency multiplier, or a synthesizer including a phase locked loop with a frequency divider.

Synthesizer circuit 506d may be configured to synthesize an output frequency for use by mixer circuit 506a of RF circuit 506 based on the frequency input and the divider control input. In some embodiments, synthesizer circuit 506d may be a fractional N/n+1 synthesizer.

In some embodiments, the frequency input may be provided by a Voltage Controlled Oscillator (VCO), but this is not required. The divider control input may be provided by the baseband circuitry 504 or the application processor 502 depending on the desired output frequency. In some embodiments, the divider control input (e.g., N) may be determined from a look-up table based on a channel indicated by the application processor 502.

Synthesizer circuit 506d of RF circuit 506 may include a frequency divider, a Delay Locked Loop (DLL), a multiplexer, and a phase accumulator. In some embodiments, the frequency divider may be a dual-mode frequency divider (DMD) and the phase accumulator may be a Digital Phase Accumulator (DPA). In some embodiments, the DMD may be configured to divide the input signal by N or n+1 (e.g., based on the carry out) to provide a fractional division ratio. In some example embodiments, a DLL may include a set of cascaded, tunable delay elements, a phase detector, a charge pump, and a D-type flip-flop. In these embodiments, the delay elements may be configured to decompose the VCO period into up to Nd equal phase packets, where Nd is the number of delay elements in the delay line. In this way, the DLL provides negative feedback to help ensure that the total delay through the delay line is one VCO cycle.

In some embodiments, synthesizer circuit 506d may be configured to generate a carrier frequency as the output frequency, while in other embodiments, the output frequency may be a multiple of the carrier frequency (e.g., twice the carrier frequency, four times the carrier frequency) and used with quadrature generator and divider circuits to generate a plurality of signals having a plurality of mutually different phases at the carrier frequency. In some embodiments, the output frequency may be an LO frequency (fLO). In some embodiments, RF circuit 506 may include an IQ/polarity converter.

FEM circuitry 508 may include a receive signal path, which may include circuitry configured to operate on RF signals received from one or more antennas 510, amplify the received signals, and provide an amplified version of the received signals to RF circuitry 506 for further processing. FEM circuitry 508 may also include a transmit signal path, which may include circuitry configured to amplify signals provided by RF circuitry 506 for transmission by one or more of one or more antennas 510. In various embodiments, amplification via either the transmit signal path or the receive signal path may be accomplished in only RF circuit 506, only FEM 508, or in both RF circuit 506 and FEM 508.

In some embodiments, FEM circuitry 508 may include TX/RX switches to switch between transmit and receive mode operation. The FEM circuitry may include a receive signal path and a transmit signal path. The receive signal path of the FEM circuitry may include a Low Noise Amplifier (LNA) to amplify the received RF signal and provide the amplified received RF signal as an output (e.g., to the RF circuitry 506). The transmit signal path of FEM circuitry 508 may include a Power Amplifier (PA) for amplifying an input RF signal (e.g., provided by RF circuitry 506) and one or more filters for generating an RF signal for subsequent transmission (e.g., through one or more of one or more antennas 510).

In some embodiments, PMC 512 may manage the power provided to baseband circuitry 504. Specifically, the PMC 512 may control power supply selection, voltage scaling, battery charging, or DC-DC conversion. PMC 512 may generally be included when device 500 is capable of being powered by a battery, for example, when the device is included in a UE. PMC 512 may improve power conversion efficiency while providing desired implementation size and heat dissipation characteristics.

Although fig. 5 shows PMC 512 coupled only to baseband circuitry 504. However, in other embodiments, PMC 512 may additionally or alternatively be coupled with and perform similar power management operations on other components, such as, but not limited to, application circuitry 502, RF circuitry 506, or FEM 508.

In some embodiments, PMC 512 may control or otherwise be part of the various power saving mechanisms of device 500. For example, if the device 500 is in an RRC Connected state in which the device 500 is still Connected to the RAN node when it expects to receive traffic soon, and then may enter a state called discontinuous reception mode (DRX) after a period of inactivity. During this state, the device 500 may be powered down for a brief interval, thereby conserving power.

If there is no data traffic activity for an extended period of time, the device 500 may transition to an rrc_idle state in which the device 500 is disconnected from the network and does not perform operations such as channel quality feedback, handover, and the like. The device 500 enters a very low power state and performs paging, where the device 500 wakes up again periodically to listen to the network and then powers down again. The device 500 may not receive data in this state and may transition back to the RRC Connected state in order to receive data.

The additional power saving mode may allow the device to be unavailable to the network for periods longer than the paging interval (ranging from a few seconds to a few hours). During this time, the device is completely inaccessible to the network and may be completely powered off. Any data transmitted during this period will incur a significant delay and the delay is assumed to be acceptable.

The processor of the application circuitry 502 and the processor of the baseband circuitry 504 may be used to execute elements of one or more instances of a protocol stack. For example, the processor of baseband circuitry 504 (alone or in combination) may be used to perform layer 3, layer 2, or layer 1 functions, while the processor of application circuitry 504 may utilize data (e.g., packet data) received from these layers and further perform layer 4 functions (e.g., transmission Communication Protocol (TCP) and User Datagram Protocol (UDP) layers). As mentioned herein, layer 3 may include an RRC layer. As mentioned herein, layer 2 may include a Medium Access Control (MAC) layer, a Radio Link Control (RLC) layer, and a Packet Data Convergence Protocol (PDCP) layer. As mentioned herein, layer 1 may include a Physical (PHY) layer of a UE/RAN node.

Fig. 6 illustrates an example interface of baseband circuitry according to some embodiments. As described above, the baseband circuitry 504 of fig. 5 may include processors 504A-504E and memory 504G used by the processors. Each of the processors 504A-504E may include a memory interface 604A-604E, respectively, to send and receive data to and from the memory 504G.

Baseband circuitry 504 may also include one or more interfaces to communicatively couple to other circuits/devices, such as a memory interface 612 (e.g., an interface for transmitting/receiving data to/from memory external to baseband circuitry 504), an application circuit interface 614 (e.g., an interface for transmitting/receiving data to/from application circuitry 502 of fig. 5), an RF circuit interface 616 (e.g., an interface for transmitting/receiving data to/from RF circuitry 506 of fig. 5), a wireless hardware connection interface 618 (e.g., an interface for transmitting/receiving data to/from Near Field Communication (NFC) components, bluetooth components (e.g., bluetooth low energy), wi-Fi components, and other communication components), and a power management interface 620 (e.g., an interface for transmitting/receiving power or control signals to/from PMC 512).

Fig. 7 is a block diagram illustrating components capable of reading instructions from a machine-readable or computer-readable medium (e.g., a non-transitory machine-readable storage medium) and performing any one or more of the methods discussed herein, according to some example embodiments. In particular, FIG. 7 shows a diagrammatic representation of a hardware resource 700 that includes one or more processors (or processor cores) 710, one or more memory/storage devices 720, and one or more communication resources 730, each of which may be communicatively coupled via a bus 740. For embodiments that utilize node virtualization (e.g., NFV), the hypervisor 702 can be executed to provide an execution environment for one or more network slices/sub-slices to utilize the hardware resources 700.

Processor 710 (e.g., a Central Processing Unit (CPU), a Reduced Instruction Set Computing (RISC) processor, a Complex Instruction Set Computing (CISC) processor, a Graphics Processing Unit (GPU), a Digital Signal Processor (DSP) such as a baseband processor, an Application Specific Integrated Circuit (ASIC), a Radio Frequency Integrated Circuit (RFIC), another processor, or any suitable combination thereof) may include, for example, processor 712 and processor 714.

Memory/storage 720 may include main memory, disk memory, or any suitable combination thereof. Memory/storage 720 may include, but is not limited to, any type of volatile or non-volatile memory, such as Dynamic Random Access Memory (DRAM), static Random Access Memory (SRAM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory, solid state memory devices, and the like.

Communication resources 730 may include interconnections or network interface components or other suitable devices to communicate with one or more peripheral devices 704 or one or more databases 706 via network 708. For example, communication resources 730 may include wired communication components (e.g., for coupling via Universal Serial Bus (USB)), cellular communication components, NFC components, bluetooth components (e.g., bluetooth low energy), wi-Fi components, and other communication components.

The instructions 750 may include software, programs, applications, applets, apps, or other executable code for causing at least any of the processors 710 to perform any one or more of the methods discussed herein. The instructions 750 may reside, completely or partially, within at least one of the processor 710 (e.g., within a buffer memory of the processor), the memory/storage 720, or any suitable combination thereof. Further, any portion of the instructions 750 may be transferred from any combination of the peripheral 704 or the database 706 to the hardware resource 700. Accordingly, the processor 710, memory/storage 720, peripheral 704, and memory of database 706 are examples of computer-readable and machine-readable media.

Fig. 8 illustrates an example of an infrastructure device 800, in accordance with various embodiments. Infrastructure device 800 (or "system 800") may be implemented as a base station, a radio head, a RAN node, etc., such as RAN nodes 111 and 112 and/or AP106, as previously shown and described. In other examples, system 800 may be implemented in or by a UE, application server(s) 130, and/or any other element/device discussed herein. The system 800 may include one or more of the following: application circuitry 805, baseband circuitry 810, one or more radio front end modules 815, memory 820, power MANAGEMENT INTEGRATED Circuit (PMIC) 825, power tee 830, network controller 835, network interface connector 840, satellite positioning circuitry 845, and user interface 850. In some embodiments, the apparatus 800 may include additional elements, such as memory/storage, a display, a camera, a sensor, or input/output (I/O) interface elements. In other embodiments, the components described below may be included in more than one device (e.g., for a cloud RAN (C-RAN) implementation, the circuitry may be included separately in more than one device).

As used herein, the term "circuitry" may refer to, be part of, or include, hardware components such as the following configured to provide the described functionality: electronic circuitry, logic circuitry, a processor (shared, dedicated, or group) and/or memory (shared, dedicated, or group), an Application-specific integrated Circuit (ASIC), a field-programmable device (field-programmable device, FPD) (e.g., field-programmable gate array (FPGA), a programmable logic device (programmable logic device, PLD), a Complex PLD (CPLD), a high-capacity PLD (high-CAPACITY PLD, HCPLD), a structured ASIC, or a programmable System on Chip (SoC)), a digital signal processor (DIGITAL SIGNAL processor, DSP), and so forth. In some embodiments, the circuitry may execute one or more software or firmware programs to provide at least some of the described functions. Furthermore, the term "circuitry" may also refer to a combination of one or more hardware elements (or circuitry for use in an electrical or electronic system) and program code for performing the functions of the program code. In these embodiments, the combination of hardware elements and program code may be referred to as a particular type of circuit.

The terms "application circuitry" and/or "baseband circuitry" may be considered synonymous with "processor circuitry" and may be referred to as "processor circuitry". As used herein, the term "processor circuit" may refer to, be part of, or include the following: the circuitry is capable of sequentially and automatically performing a sequence of arithmetic or logical operations; and recording, storing and/or transmitting digital data. The term "processor circuit" may refer to one or more application processors, one or more baseband processors, a physical Central Processing Unit (CPU), a single core processor, a dual core processor, a tri-core processor, a quad-core processor, and/or any other device capable of executing or otherwise operating computer executable instructions such as program code, software modules, and/or functional processes.

Further, various components of the core network 120 (or CN 120 previously discussed) may be referred to as "network elements. The term "network element" may describe a physical or virtualized device for providing wired or wireless communication network services. The term "network element" may be considered synonymous with and/or referred to by the following terms: networked computers, networking hardware, network devices, network nodes, routers, switches, hubs, bridges, radio network controllers, radio access network devices, gateways, servers, virtualized network functions (virtualized network function, VNFs), network function virtualization infrastructure (network functions virtualization infrastructure, NFVI), and so forth.

The application circuitry 805 may include one or more central processing unit (central processing unit, CPU) cores and one or more of the following: cache memory, low drop-out (LDO) voltage regulators, interrupt controllers, serial interfaces such as SPI, I2C or universal programmable serial interface modules, real Time Clock (RTC), timer-counters including interval and watchdog timers, universal input/output (I/O or IO), memory card controllers such as Secure Digital (SD)/multimedia card (MultiMediaCard, MMC), universal serial bus (Universal Serial Bus, USB) interfaces, mobile industrial processor interface (Mobile Industry Processor Interface, MIPI) interfaces, and Joint test access Group (Joint TEST ACCESS Group, JTAG) test access ports. By way of example, the application circuitry 805 may include one or more IntelOr (b)A processor; superfine semiconductor (Advanced Micro Devices, AMD)Processor, acceleration processing unit (ACCELERATED PROCESSING UNIT, APU) orA processor; etc. In some embodiments, the system 800 may not utilize the application circuitry 805, but may include, for example, a dedicated processor/controller to process IP data received from the EPC or 5 GC.

Additionally or alternatively, the application circuitry 805 may include circuitry such as (but not limited to) the following: one or more Field Programmable Devices (FPDs), such as Field Programmable Gate Arrays (FPGAs), and the like; programmable Logic Devices (PLDs), such as Complex PLDs (CPLDs), high-capacity PLDs (HCPLDs), and the like; an ASIC, such as a structured ASIC, etc.; a programmable SoC (PSoC); etc. In such embodiments, the circuitry of application circuitry 805 may comprise logic blocks or logic architectures, including other interconnected resources, that can be programmed to perform various functions, such as the processes, methods, functions, etc. of the various embodiments discussed herein. In such embodiments, the circuitry of application circuitry 805 may include memory cells (e.g., erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (ELECTRICALLY ERASABLE PROGRAMMABLE READ-only memory, EEPROM), flash memory, static memory (e.g., static random access memory (static random access memory), antifuse, etc.) for storing logic blocks, logic architectures, data, etc. in a look-up table (LUT), and so forth.

The baseband circuitry 810 may be implemented, for example, as a solder-in substrate comprising one or more integrated circuits, a single packaged integrated circuit soldered to a main circuit board, or a multi-chip module containing two or more integrated circuits. Although not shown, baseband circuitry 810 may include one or more digital baseband systems that may be coupled to the CPU subsystem, audio subsystem, and interface subsystem via an interconnect subsystem. The digital baseband subsystem may also be coupled to the digital baseband interface and mixed signal baseband subsystem via additional interconnect subsystems. Each interconnect subsystem may include a bus system, a point-to-point connection, a Network On Chip (NOC) architecture, and/or some other suitable bus or interconnect technology, such as those discussed herein. The audio subsystem may include digital signal processing circuitry, buffer memory, program memory, voice processing accelerator circuitry, data converter circuitry such as analog-to-digital and digital-to-analog converter circuitry, analog circuitry including one or more amplifiers and filters, and/or other similar components. In an aspect of the disclosure, baseband circuitry 810 may include protocol processing circuitry with one or more instances of control circuitry (not shown) to provide control functions for digital baseband circuitry and/or radio frequency circuitry (e.g., radio front end module 815).

The user interface circuit 850 may include one or more user interfaces designed to enable user interaction with the system 800 or peripheral component interfaces designed to enable interaction with peripheral components of the system 800. The user interface may include, but is not limited to, one or more physical or virtual buttons (e.g., a reset button), one or more indicators (e.g., light Emitting Diodes (LEDs)), a physical keyboard or keypad, a mouse, a touch pad, a touch screen, a speaker or other audio emitting device, a microphone, a printer, a scanner, a headset, a display screen or display device, and so forth. Peripheral component interfaces may include, but are not limited to, non-volatile memory ports, universal Serial Bus (USB) ports, audio jacks, power supply interfaces, and the like.

Radio Front End Module (RFEM) 815 may include millimeter wave RFEM and one or more sub-millimeter wave Radio Frequency Integrated Circuits (RFICs). In some implementations, one or more sub-millimeter wave RFICs may be physically separate from millimeter wave RFEM. The RFIC may include connections to one or more antennas or antenna arrays, and the RFEM may be connected to multiple antennas. In alternative implementations, both millimeter wave and sub-millimeter wave radio functions may be implemented in the same physical radio front-end module 815. RFEM 815 may include both millimeter-wave and sub-millimeter-wave antennas.

Memory circuit 820 may include one or more of the following: volatile memory, including dynamic random access memory (dynamic random access memory, DRAM) and/or synchronous dynamic random access memory (synchronous dynamic random access memory, SDRAM); and nonvolatile memory (nonvolatile memory, NVM) including high-speed electrically erasable memory (commonly referred to as flash memory), phase-change random access memory (PHASE CHANGE random access memory, PRAM), magnetoresistive random access memory (magnetoresistive random access memory, MRAM), and the like, and may include memory cells from the group consisting ofAndA three-dimensional (3D) intersection (XPOINT) memory. The memory circuit 820 may be implemented as one or more of a soldered-in packaged integrated circuit, a socket memory module, and a plug-in memory card.

The PMIC 825 may include a voltage regulator, a surge protector, a power alarm detection circuit, and one or more backup power supplies such as a battery or a capacitor. The power alarm detection circuit may detect one or more of a power down (under voltage) and surge (over voltage) condition. The power tee circuit 830 may provide power drawn from the network cable to provide both power supply and data connectivity to the infrastructure device 800 with a single cable.

The network controller circuit 835 may provide connectivity to the network using standard network interface protocols, such as Ethernet, GRE tunnel-based Ethernet, multiprotocol label switching (Multiprotocol Label Switching, MPLS) based Ethernet, or some other suitable protocol. Network connectivity may be provided to/from the infrastructure device 800 via a network interface connector 840 using physical connections, which may be electrical (commonly referred to as "copper interconnects"), optical, or wireless. The network controller circuit 835 may include one or more special purpose processors and/or FPGAs to communicate using one or more of the protocols described above. In some implementations, the network controller circuit 835 may include multiple controllers to provide connectivity to other networks using the same or different protocols.

The positioning circuitry 845 may include circuitry to receive and decode signals transmitted by one or more navigation satellite constellations of a global navigation satellite system (global navigation SATELLITE SYSTEM, GNSS). Examples of Navigation satellite constellations (or GNSS) may include the united states global positioning system (Global Positioning System, GPS), the russian global Navigation system (Global Navigation System, GLONASS), the european union galileo system, the chinese beidou Navigation satellite system, regional Navigation systems or GNSS augmentation systems (e.g., indian Constellation WITH INDIAN Constellation, NAVIC), the japan Quasi-Zenith satellite system (Quasi-Zenith SATELLITE SYSTEM, QZSS), the french satellite integrated doppler orbital imaging and radio positioning (Doppler Orbitography and Radio-positioning Integrated by Satellite, DORIS), and so forth. The positioning circuitry 845 may include various hardware elements (e.g., including hardware devices such as switches, filters, amplifiers, antenna elements, etc., to facilitate communication over-the-air (OTA) communication) to communicate with components of a positioning network (e.g., navigation satellite constellation nodes).

The node or satellite of the navigation satellite constellation(s) (the "GNSS node") may provide positioning services by continuously transmitting or broadcasting GNSS signals along a line of sight, which may be used by a GNSS receiver (e.g., the positioning circuitry 845 and/or the positioning circuitry implemented by the UEs 101, 102, etc.) to determine its GNSS position. The GNSS signals may include pseudo-random codes (e.g., a sequence of ones and zeros) known to the GNSS receiver and messages including the time of transmission of the code epoch (time of transmission, toT) (e.g., defined points in the pseudo-random code sequence) and the GNSS node position at ToT. The GNSS receiver may monitor/measure GNSS signals transmitted/broadcast by a plurality of GNSS nodes (e.g., four or more satellites) and solve various equations to determine the corresponding GNSS positions (e.g., spatial coordinates). The GNSS receiver may also implement a clock that is generally less stable and accurate than the atomic clock of the GNSS node, and may use the measured GNSS signals to determine a bias of the GNSS receiver relative to real time (e.g., a bias of the GNSS receiver clock relative to the GNSS node time). In some embodiments, the positioning circuitry 845 may include a Micro-technology (Micro-Technology for Positioning, navigation, AND TIMING, micro-PNT) IC for positioning, navigation, and timing that uses a master timing clock to perform position tracking/estimation without GNSS assistance.

The GNSS receiver may measure time of arrival (ToA) of GNSS signals from the plurality of GNSS nodes according to its own clock. The GNSS receiver may determine a time of flight (ToF) value for each received GNSS signal based on ToA and ToT, and may then determine a three-dimensional (3D) position and clock bias based on ToF. The 3D location may then be converted to latitude, longitude, and altitude. The positioning circuitry 845 may provide data to the application circuitry 805, which may include one or more of location data or time data. The application circuitry 805 may use the time data to operate synchronously with other radio base stations (e.g., such as RAN nodes 111, 112).

The components shown in fig. 8 may communicate with each other using interface circuitry. As used herein, the term "interface circuit" may refer to, be part of, or include circuitry that supports the exchange of information between two or more components or devices. The term "interface circuit" may refer to one or more hardware interfaces, such as a bus, an input/output (I/O) interface, a peripheral component interface, a network interface card, and so forth. Any suitable bus technology may be used in various implementations, including any number of technologies, including industry standard architecture (industry standard architecture, ISA), extended ISA (EISA), peripheral component interconnect (PERIPHERAL COMPONENT INTERCONNECT, PCI), extended peripheral component interconnect (PERIPHERAL COMPONENT INTERCONNECT EXTENDED, PCIx), PCI express (PCIe), or any number of other technologies. The bus may be a proprietary bus, for example, used in SoC-based systems. Other bus systems may be included, such as an I2C interface, an SPI interface, a point-to-point interface, and a power bus, among others.

The following paragraphs describe examples of various embodiments.

Example 1 includes an apparatus for a User Equipment (UE), the apparatus comprising: a memory; and a processor circuit coupled with the memory via an interface, wherein the processor circuit is to: encoding AN indicator for transmission to AN Access Node (AN), wherein the indicator comprises a first value for indicating a first increased blind decoding/channel estimation capability supported by the UE for monitoring a Physical Downlink Control Channel (PDCCH); decoding first higher layer signaling, wherein the first higher layer signaling is sent by the AN in response to receiving the indicator, wherein the first higher layer signaling comprises a second value for indicating a second increased blind decoding/channel estimation capability applied to the UE for monitoring the PDCCH, and wherein the second value is based at least in part on the first value; and monitoring the PDCCH based on the second value, and wherein the memory is for storing the second value.

Example 2 includes the apparatus of example 1, wherein the second value is equal to or less than the first value.

Example 3 includes the apparatus of example 1, wherein the first value is greater than 1.

Example 4 includes the apparatus of example 1, wherein the first increased blind decoding/channel estimation capability indicates a maximum number of PDCCH candidates and/or control channel elements supported by the UE for monitoring the PDCCH, and the second increased blind decoding/channel estimation capability indicates a maximum number of PDCCH candidates and/or control channel elements applied to the UE for monitoring the PDCCH.

Example 5 includes the apparatus of example 1, wherein the second value is indicated by the AN based on: time slots, component Carriers (CCs), CC sets, cells, transmission Reception Points (TRPs), bandwidth parts (BWP), or UEs.

Example 6 includes the apparatus of example 1, wherein the processor circuit is to: decoding second higher layer signaling received from the AN, wherein the second higher layer signaling includes higher layer indexes on a per control resource set (CORESET) basis to enable increased blind decoding/channel estimation capability of the UE; and monitoring the PDCCH based on the second value in response to the per CORESET higher layer index.

Example 7 includes the apparatus of example 6, wherein the per CORESET-based higher-layer index comprises a value of 0 or 1.

Example 8 includes the apparatus of example 6, wherein the processor circuit is to: oversubscription of blind decoding/channel estimation capability by the AN is checked based on the per CORESET higher layer index and the second value.

Example 9 includes the apparatus of any one of examples 1-8, wherein the AN comprises a next generation NodeB (gNB).

Example 10 includes a computer-readable medium having instructions stored thereon, wherein the instructions, when executed by processor circuitry of a User Equipment (UE), cause the processor circuitry to: decoding higher layer signaling received from AN Access Node (AN), wherein the higher layer signaling includes a higher layer index per control resource set (CORESET) for activating a multi-Transmit Receive Point (TRP) operation of the UE based on multi-Downlink Control Information (DCI) per CORESET; and performing the multi-DCI based multi-TRP operation in response to the per CORESET based higher layer index.

Example 11 includes the computer-readable medium of example 10, wherein the per CORESET-based higher-layer index includes a value of 0 or 1.

Example 12 includes the computer-readable medium of example 10 or 11, wherein the AN comprises a next generation NodeB (gNB).

Example 13 includes AN apparatus for AN Access Node (AN), the apparatus comprising: a Radio Frequency (RF) circuit interface; and a processor circuit coupled with the RF circuit interface, wherein the processor circuit is to: decoding an indicator received from a User Equipment (UE) via the RF circuit interface, wherein the indicator includes a first value for indicating a first increased blind decoding/channel estimation capability supported by the UE for monitoring a Physical Downlink Control Channel (PDCCH); encoding a first higher layer signaling based at least in part on the first value, wherein the first higher layer signaling includes a second value for indicating a second increased blind decoding/channel estimation capability applied to the UE for monitoring the PDCCH; and causing the first higher layer signaling to be transmitted to the UE via the RF circuit interface for the UE to monitor the PDCCH based on the second value.

Example 14 includes the apparatus of example 13, wherein the second value is equal to or less than the first value.

Example 15 includes the apparatus of example 13, wherein the first value is greater than 1.

Example 16 includes the apparatus of example 13, wherein the second value is indicated based on: time slots, component Carriers (CCs), CC sets, cells, transmission Reception Points (TRPs), bandwidth parts (BWP), or UEs.

Example 17 includes the apparatus of example 13, wherein the processor circuit is to: encoding a second higher layer signaling, wherein the second higher layer signaling includes a higher layer index per control resource set (CORESET) based on higher layer index per CORESET for enabling increased blind decoding/channel estimation capability of the UE; and causing transmission of the second higher layer signaling to the UE via the RF circuit interface for the UE to monitor the PDCCH based on the second value.

Example 18 includes the apparatus of example 17, wherein the per CORESET-based higher-layer index includes a value of 0 or 1.

Example 19 includes the apparatus of example 17, wherein the processor circuit is to: oversubscription is applied to the PDCCH on the primary cell of the UE based on the per CORESET higher layer index and the second value.

Example 20 includes the apparatus of any one of examples 13-19, wherein the AN comprises a next generation NodeB (gNB).

Example 21 includes a method for a User Equipment (UE), the method comprising: encoding AN indicator for transmission to AN Access Node (AN), wherein the indicator comprises a first value for indicating a first increased blind decoding/channel estimation capability supported by the UE for monitoring a Physical Downlink Control Channel (PDCCH); decoding first higher layer signaling, wherein the first higher layer signaling is sent by the AN in response to receiving the indicator, wherein the first higher layer signaling comprises a second value for indicating a second increased blind decoding/channel estimation capability applied to the UE for monitoring the PDCCH, and wherein the second value is based at least in part on the first value; and monitoring the PDCCH based on the second value.

Example 22 includes the method of example 21, wherein the second value is equal to or less than the first value.

Example 23 includes the method of example 21, wherein the first value is greater than 1.

Example 24 includes the method of example 21, wherein the first increased blind decoding/channel estimation capability indicates a maximum number of PDCCH candidates and/or control channel elements supported by the UE for monitoring the PDCCH, and the second increased blind decoding/channel estimation capability indicates a maximum number of PDCCH candidates and/or control channel elements applied to the UE for monitoring the PDCCH.

Example 25 includes the method of example 21, wherein the second value is indicated by the AN based on: time slots, component Carriers (CCs), CC sets, cells, transmission Reception Points (TRPs), bandwidth parts (BWP), or UEs.

Example 26 includes the method of example 21, further comprising: decoding second higher layer signaling received from the AN, wherein the second higher layer signaling includes higher layer indexes on a per control resource set (CORESET) basis to enable increased blind decoding/channel estimation capability of the UE; and monitoring the PDCCH based on the second value in response to the per CORESET higher layer index.

Example 27 includes the method of example 26, wherein the per CORESET-based higher-layer index includes a value of 0 or 1.

Example 28 includes the method of example 26, further comprising: oversubscription of blind decoding/channel estimation capability by the AN is checked based on the per CORESET higher layer index and the second value.

Example 29 includes the method of any of examples 21-28, wherein the AN comprises a next generation NodeB (gNB).

Example 30 includes an apparatus for a User Equipment (UE), the apparatus comprising: means for encoding AN indicator for transmission to AN Access Node (AN), wherein the indicator comprises a first value for indicating a first increased blind decoding/channel estimation capability supported by the UE for monitoring a Physical Downlink Control Channel (PDCCH); means for decoding first higher layer signaling, wherein the first higher layer signaling is sent by the AN in response to receiving the indicator, wherein the first higher layer signaling comprises a second value for indicating a second increased blind decoding/channel estimation capability applied to the UE for monitoring the PDCCH, and wherein the second value is based at least in part on the first value; and means for monitoring the PDCCH based on the second value.

Example 31 includes the apparatus of example 30, wherein the second value is equal to or less than the first value.

Example 32 includes the apparatus of example 30, wherein the first value is greater than 1.

Example 33 includes the apparatus of example 30, wherein the first increased blind decoding/channel estimation capability indicates a maximum number of PDCCH candidates and/or control channel elements supported by the UE for monitoring the PDCCH, and the second increased blind decoding/channel estimation capability indicates a maximum number of PDCCH candidates and/or control channel elements applied to the UE for monitoring the PDCCH.

Example 34 includes the apparatus of example 30, wherein the second value is indicated by the AN based on: time slots, component Carriers (CCs), CC sets, cells, transmission Reception Points (TRPs), bandwidth parts (BWP), or UEs.

Example 35 includes the apparatus of example 30, further comprising: means for decoding second higher layer signaling received from the AN, wherein the second higher layer signaling includes higher layer indexes on a per control resource set (CORESET) basis to enable increased blind decoding/channel estimation capability of the UE; and means for monitoring the PDCCH based on the second value in response to the per CORESET higher layer index.

Example 36 includes the apparatus of example 35, wherein the per CORESET-based higher-layer index comprises a value of 0 or 1.

Example 37 includes the apparatus of example 35, further comprising: means for checking oversubscription of blind decoding/channel estimation capabilities by the AN based on the per CORESET higher layer index and the second value.

Example 38 includes the apparatus of any one of examples 30-37, wherein the AN comprises a next generation NodeB (gNB).

Example 39 includes a computer-readable medium having instructions stored thereon, wherein the instructions, when executed by processor circuitry of a User Equipment (UE), cause the processor circuitry to perform the method of any of examples 21 to 29.

Example 40 includes an apparatus for a User Equipment (UE), comprising: a Radio Frequency (RF) circuit interface; and a processor circuit coupled with the RF circuit interface, wherein the processor circuit is to: decoding higher layer signaling received from AN Access Node (AN) via the RF circuit interface, wherein the higher layer signaling includes a higher layer index per control resource set (CORESET) based on higher layer index per CORESET for activating multi-Downlink Control Information (DCI) based multi-Transmit Receive Point (TRP) operations of the UE; and performing the multi-DCI based multi-TRP operation in response to the per CORESET based higher layer index.

Example 41 includes the apparatus of example 40, wherein the per CORESET-based higher-layer index includes a value of 0 or 1.

Example 42 includes the apparatus of example 40 or 41, wherein the AN comprises a next generation NodeB (gNB).

Example 43 includes an apparatus for a User Equipment (UE), comprising: means for decoding higher layer signaling received from AN Access Node (AN), wherein the higher layer signaling comprises a higher layer index per control resource set (CORESET) based on higher layer index per CORESET for activating multi-Downlink Control Information (DCI) based multi-Transmit Receive Point (TRP) operations of the UE; and means for performing the multi-DCI based multi-TRP operation in response to the per CORESET higher layer index.

Example 44 includes the apparatus of example 43, wherein the per CORESET-based higher-layer index comprises a value of 0 or 1.

Example 45 includes the apparatus of example 43 or 44, wherein the AN comprises a next generation NodeB (gNB).

Example 46 includes a method for a User Equipment (UE), comprising: decoding higher layer signaling received from AN Access Node (AN), wherein the higher layer signaling includes a higher layer index per control resource set (CORESET) for activating a multi-Transmit Receive Point (TRP) operation of the UE based on multi-Downlink Control Information (DCI) per CORESET; and performing the multi-DCI based multi-TRP operation in response to the per CORESET based higher layer index.

Example 47 includes the method of example 46, wherein the per CORESET-based higher-layer index includes a value of 0 or 1.

Example 48 includes the method of example 46 or 47, wherein the AN comprises a next generation NodeB (gNB).

Example 49 includes AN apparatus for AN Access Node (AN), the apparatus comprising: means for decoding an indicator received from a User Equipment (UE), wherein the indicator comprises a first value for indicating a first increased blind decoding/channel estimation capability supported by the UE for monitoring a Physical Downlink Control Channel (PDCCH); means for encoding first higher layer signaling based at least in part on the first value, wherein the first higher layer signaling includes a second value for indicating a second increased blind decoding/channel estimation capability applied to the UE for monitoring the PDCCH; and means for transmitting the first higher layer signaling to the UE for the UE to monitor the PDCCH based on the second value.

Example 50 includes the apparatus of example 49, wherein the second value is equal to or less than the first value.

Example 51 includes the apparatus of example 49, wherein the first value is greater than 1.

Example 52 includes the apparatus of example 49, wherein the second value is indicated based on: time slots, component Carriers (CCs), CC sets, cells, transmission Reception Points (TRPs), bandwidth parts (BWP), or UEs.

Example 53 includes the apparatus of example 49, further comprising: means for encoding second higher layer signaling, wherein the second higher layer signaling comprises a higher layer index per control resource set (CORESET) based on higher layer index per CORESET for enabling increased blind decoding/channel estimation capability of the UE; and means for transmitting the second higher layer signaling to the UE for the UE to monitor the PDCCH based on the second value.

Example 54 includes the apparatus of example 53, wherein the per CORESET-based higher-layer index comprises a value of 0 or 1.

Example 55 includes the apparatus of example 53, further comprising: means for applying oversubscription to PDCCH on the primary cell of the UE based on the per CORESET higher layer index and the second value.

Example 56 includes the apparatus of any one of examples 49 to 55, wherein the AN comprises a next generation NodeB (gNB).

Example 57 includes a method for AN Access Node (AN), the method comprising: decoding an indicator received from a User Equipment (UE), wherein the indicator includes a first value for indicating a first increased blind decoding/channel estimation capability supported by the UE for monitoring a Physical Downlink Control Channel (PDCCH); encoding a first higher layer signaling based at least in part on the first value, wherein the first higher layer signaling includes a second value for indicating a second increased blind decoding/channel estimation capability applied to the UE for monitoring the PDCCH; and transmitting the first higher layer signaling to the UE for the UE to monitor the PDCCH based on the second value.

Example 58 includes the method of example 57, wherein the second value is equal to or less than the first value.

Example 59 includes the method of example 57, wherein the first value is greater than 1.

Example 60 includes the method of example 57, wherein the second value is indicated based on: time slots, component Carriers (CCs), CC sets, cells, transmission Reception Points (TRPs), bandwidth parts (BWP), or UEs.

Example 61 includes the method of example 57, further comprising: encoding a second higher layer signaling, wherein the second higher layer signaling includes a higher layer index per control resource set (CORESET) based on higher layer index per CORESET for enabling increased blind decoding/channel estimation capability of the UE; and transmitting the second higher layer signaling to the UE for the UE to monitor the PDCCH based on the second value.

Example 62 includes the method of example 61, wherein the per CORESET-based higher-layer index comprises a value of 0 or 1.

Example 63 includes the method of example 61, further comprising: oversubscription is applied to the PDCCH on the primary cell of the UE based on the per CORESET higher layer index and the second value.

Example 64 includes the method of any one of examples 57-63, wherein the AN comprises a next generation NodeB (gNB).

Example 65 includes a computer-readable medium having instructions stored thereon, wherein the instructions, when executed by a processor circuit of AN Access Node (AN), cause the processor circuit to perform the method of any of examples 57-64.

Example 66 includes a User Equipment (UE) as described and illustrated in the specification.

Example 67 includes AN Access Node (AN) as described and illustrated in the specification.

Example 68 includes a method performed at a User Equipment (UE) as described and illustrated in the specification.

Example 69 includes a method performed at AN Access Node (AN) as described and illustrated in the specification.

Although certain embodiments have been illustrated and described herein for purposes of description, various alternative and/or equivalent embodiments or implementations calculated to achieve the same purposes may be substituted for the embodiments shown and described without departing from the scope of the present disclosure. This disclosure is intended to cover any adaptations or variations of the embodiments discussed herein. Accordingly, it is readily understood that the embodiments described herein are limited only by the following claims and their equivalents.

Claims

1. An apparatus for a user equipment, UE, the apparatus comprising:

a memory; and

A processor circuit coupled with the memory via an interface,

Wherein the processor circuit is configured to:

encoding AN indicator for transmission to AN access node, AN, wherein the indicator comprises a first value for indicating a first increased blind decoding and/or channel estimation capability supported by the UE for monitoring a physical downlink control channel, PDCCH;

Decoding first higher layer signaling, wherein the first higher layer signaling is sent by the AN in response to receiving the indicator, wherein the first higher layer signaling comprises a second value for indicating a second increased blind decoding and/or channel estimation capability applied to the UE for monitoring the PDCCH, and wherein the second value is based at least in part on the first value; and

Monitoring the PDCCH based on the second value, and

Wherein the memory is configured to store the second value.

2. The apparatus of claim 1, wherein the second value is equal to or less than the first value.

3. The apparatus of claim 1, wherein the first value is greater than 1.

4. The apparatus of claim 1, wherein the first increased blind decoding and/or channel estimation capability indicates a maximum number of PDCCH candidates and/or control channel elements supported by the UE for monitoring the PDCCH, and the second increased blind decoding and/or channel estimation capability indicates a maximum number of PDCCH candidates and/or control channel elements applied to the UE for monitoring the PDCCH.

5. The apparatus of claim 1, wherein the second value is indicated by the AN based on: a time slot, a component carrier CC, a CC set, a cell, a transmission-reception point TRP, a bandwidth part BWP, or a UE.

6. The apparatus of claim 1, wherein the processor circuit is to:

Decoding second higher layer signaling received from the AN, wherein the second higher layer signaling includes higher layer indexes based on per control resource set CORESET to enable increased blind decoding and/or channel estimation capability of the UE; and

The PDCCH is monitored based on the second value in response to the per CORESET higher layer index.

7. The apparatus of claim 6, wherein the per CORESET-based higher-layer index comprises a value of 0 or 1.

8. The apparatus of claim 6, wherein the processor circuit is to: oversubscription of blind decoding and/or channel estimation capabilities by the AN is checked based on the per CORESET higher layer index and the second value.

9. The apparatus of any of claims 1-8, wherein the AN comprises a next generation NodeB, nb.

10. The apparatus of claim 6, wherein the per CORESET higher layer index is used to activate multi-transmission-reception point, TRP, operation of the UE based on multi-downlink control information, DCI, and wherein the processor circuit is further to:

The multi-DCI based multi-TRP operation is performed in response to the per CORESET higher layer index.

11. AN apparatus for AN access node, AN, the apparatus comprising:

A radio frequency, RF, circuit interface; and

A processor circuit coupled to the RF circuit interface,

Wherein the processor circuit is configured to:

decoding an indicator received from a user equipment, UE, via the RF circuit interface, wherein the indicator comprises a first value for indicating a first increased blind decoding and/or channel estimation capability supported by the UE for monitoring a physical downlink control channel, PDCCH;

Encoding a first higher layer signaling based at least in part on the first value, wherein the first higher layer signaling includes a second value for indicating a second increased blind decoding and/or channel estimation capability applied to the UE for monitoring the PDCCH; and

Such that the first higher layer signaling is transmitted to the UE via the RF circuit interface for the UE to monitor the PDCCH based on the second value.

12. The apparatus of claim 11, wherein the second value is equal to or less than the first value.

13. The apparatus of claim 11, wherein the first value is greater than 1.

14. The apparatus of claim 11, wherein the second value is indicated based on: a time slot, a component carrier CC, a CC set, a cell, a transmission-reception point TRP, a bandwidth part BWP, or a UE.

15. The apparatus of claim 11, wherein the processor circuit is to:

Encoding a second higher layer signaling, wherein the second higher layer signaling includes higher layer indexes per control resource set CORESET, the higher layer indexes per CORESET based for enabling increased blind decoding and/or channel estimation capability of the UE; and

Such that the second higher layer signaling is transmitted to the UE via the RF circuit interface for the UE to monitor the PDCCH based on the second value.

16. The apparatus of claim 15, wherein the per CORESET-based higher-layer index comprises a value of 0 or 1.

17. The apparatus of claim 15, wherein the processor circuit is to: oversubscription is applied to the PDCCH on the primary cell of the UE based on the per CORESET higher layer index and the second value.

18. The apparatus of any of claims 11-17, wherein the AN comprises a next generation NodeB, nb.