CN112614778B - Method and device for forming multifunctional p-GaN electrode in GaN HEMT device - Google Patents
Method and device for forming multifunctional p-GaN electrode in GaN HEMT device Download PDFInfo
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- CN112614778B CN112614778B CN202011500550.1A CN202011500550A CN112614778B CN 112614778 B CN112614778 B CN 112614778B CN 202011500550 A CN202011500550 A CN 202011500550A CN 112614778 B CN112614778 B CN 112614778B
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- 238000000034 method Methods 0.000 title claims abstract description 24
- 230000004888 barrier function Effects 0.000 claims abstract description 51
- 230000005533 two-dimensional electron gas Effects 0.000 claims abstract description 20
- 238000002161 passivation Methods 0.000 claims abstract description 12
- 238000002347 injection Methods 0.000 claims abstract description 10
- 239000007924 injection Substances 0.000 claims abstract description 10
- 238000005530 etching Methods 0.000 claims abstract description 6
- 229910002704 AlGaN Inorganic materials 0.000 claims description 18
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 claims description 2
- 238000000151 deposition Methods 0.000 abstract 1
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000010893 electron trap Methods 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28264—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being a III-V compound
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- H—ELECTRICITY
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4966—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2
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- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
- H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
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Abstract
The invention relates to a method for forming a multifunctional p-GaN electrode in a GaN HEMT device, which comprises the steps of forming an epitaxial structure, enabling two-dimensional electron gas to be completely consumed, etching a p-GaN layer, reserving a p-GaN region for forming a grid electrode, enabling the two-dimensional electron gas to reappear, depositing a passivation layer, etching the passivation layer at the position of an injection electrode until the barrier layer forms holes, growing an additional barrier layer and the p-GaN layer on the barrier layer at the position of the holes, keeping the two-dimensional electron gas not consumed, forming the grid electrode, forming a source electrode and a drain electrode, injecting an electrode on the p-GaN layer, enabling the injection electrode to be automatically connected to the drain electrode, and forming a dielectric layer at the p-GaN region. A device formed by the method of the present invention. The invention can be suitable for forming normally open GaN-based MIS-HEMT, effectively relieve the problem of current collapse and improve the overall performance of the device.
Description
Technical Field
The invention relates to the technical field of transistors, in particular to a method and a device for forming a multifunctional p-GaN electrode in a GaN HEMT device.
Background
A GaN HEMT (high electron mobility transistor) is a normally-on device (threshold voltage Vth < 0V) that has a two-dimensional electron gas (2 DEG) at the interface region between the GaN channel layer and the AlGaN barrier layer, as shown in fig. 1.
In order to realize the normally-off HEMT device (Vth > 0V), the two-dimensional electron gas (2 DEG) under the gate is fully depleted at vgs=0v and reappears with a positive gate bias at Vgs > Vth, as shown in fig. 2, the two-dimensional electron gas (2 DEG) does not exist under the p-GaN gate due to the built-in electric field, but exists in the region other than the p-GaN gate.
There are several ways to implement normally-off HEMT devices (AlGaN with partial or complete recesses for MIS gates, p-GaN gates, etc.). Among the different approaches, p-GaN gates have proven to be the most reliable, and are currently being used in commercial products, forming a p-GaN layer (or p-AlGaN or p-InGaN) on top of a thinner (e.g., 5-20 nm) AlGaN barrier layer can effectively deplete two-dimensional electron gas (2 DEG), as shown in fig. 2, to achieve normally-off operation. This two-dimensional electron gas (2 DEG) depletion effect depends largely on the thickness and Al% of the AlGaN barrier layer and gradually decreases as the thickness (> 20 nm) and/or Al% (> 20%) of the AlGaN barrier layer increases. Therefore, to obtain a desired Vth (e.g., 1-2V), the thickness of the AlGaN barrier layer and Al% must be adjusted simultaneously.
It is well known that GaN HEMT devices (normally-on "depletion mode and normally-off" enhancement mode) experience a reduction in transient on-state current obtained from a static reference line after a higher reverse bias stress is generated in the off-state during on/off switching operation of the device, which is referred to as a "current collapse" or "dynamic rohn" effect. This problem arises because of the presence of high electric field induced electron traps near the surface area of the device and inside the buffer layer. In practice, the device structure typically includes a well-designed field plate (FPs connected to the gate or source) and appropriate surface passivation layers (SiN, siO 2, alN or Al 2O3, etc.) and optimized buffer stacks (GaN dislocation density, carbon or iron compensated doping levels and graded distribution). Another effective technique is to forward bias the P-N junction (such as AlGaN between P-GaN in the HEMT structure of fig. 3, P-GaN hole injection electrode, which can be forward biased during off-state stress, alGaN barrier thickness is sufficiently thick so that the two-dimensional electron gas (2 DEG) will not be depleted during on-state operation compared to the two-dimensional electron gas (2 DEG) depleted under the P-GaN gate) by forward biasing the P-N junction to recombine with the trapped electrons and eliminate the trapped electrons.
The p-GaN has two roles in GaN HEMT devices: firstly, it can be used as a gate electrode to convert a normally-on HEMT into a normally-off device; second, it can be added as a separate hole injection electrode (upon forward biasing) during high voltage off-state stress to alleviate the "current collapse" problem.
Disclosure of Invention
An object of the present invention is to provide a method and device for forming a multifunctional p-GaN electrode in a GaN HEMT device, forming a p-GaN hole injection electrode independent of the p-GaN gate electrode.
In order to achieve the above purpose, the invention adopts the following technical scheme:
A method of forming a multifunctional p-GaN electrode in a GaN HEMT device, comprising the steps of:
Step 1:
forming an epitaxial structure: growing a buffer layer on the base layer, growing a channel layer on the buffer layer, growing a barrier layer on the channel layer, growing a p-GaN layer on the barrier layer to enable the two-dimensional electron gas to be completely exhausted at the interface between the channel layer and the barrier layer,
Step 2:
Etching the p-GaN layer, leaving a p-GaN region for forming a gate electrode, causing two-dimensional electron gas to reappear at an interface between the channel layer and the barrier layer except under the p-GaN region,
Step 3:
(1) A passivation layer is deposited and a passivation layer is deposited,
(2) Etching the passivation layer at the position of the injection electrode until the barrier layer forms holes,
Step 4:
an additional barrier layer is grown on the barrier layer at the hole position, a p-GaN layer is grown on the additional barrier layer, and the two-dimensional electron gas is kept not to be exhausted,
Step 5:
Forming a gate electrode on the p-GaN region, forming a source electrode and a drain electrode, implanting an electrode on the p-GaN layer, and automatically connecting the implanted electrode to the drain electrode,
Step 6:
a dielectric layer is formed at the p-GaN region.
Preferably, in step 1: the thickness of the barrier layer is 5-20nm, so that the threshold voltage Vth of the device is within a set range.
Further preferably, the set threshold voltage vth=1-2V.
Preferably, in step 4: and growing an additional barrier layer by adopting a selective area growth mode.
Preferably, in step 4: a p-GaN layer is grown on the additional barrier layer using MOCVD techniques.
Preferably, in step 4: the growth thickness of the additional barrier layer is 20-60 nm.
Preferably, in step 4: the additional barrier layer is an AlGaN layer.
Preferably, the buffer layer is a GaN or AlGaN layer, the channel layer is a GaN layer, and the barrier layer is an AlGaN layer.
It is a further object of the invention to provide a device.
In order to achieve the above purpose, the invention adopts the following technical scheme:
A device comprising a structure formed by the method of forming a multifunctional p-GaN electrode in a GaN HEMT device.
Preferably, the device comprises a normally-on GaN-based MIS-HEMT.
Due to the application of the technical scheme, compared with the prior art, the invention has the following advantages:
the invention can be suitable for forming normally open GaN-based MIS-HEMT, effectively relieve the problem of current collapse and improve the overall performance of the device.
Drawings
FIG. 1 is a conventional normally-on "depletion" GaN HEMT;
FIG. 2 is a normally-off "enhanced" HEMT;
FIG. 3 is a HEMT of AlGaN with p-GaN hole injection electrodes between p-GaN;
Fig. 4-1 to 4-6 are process flow diagrams for forming a multi-functional p-GaN electrode in this embodiment.
In the above figures:
1. A base layer; 2. a buffer layer; 3. a channel layer; 4. a barrier layer; 5. two-dimensional electron gas; 6. a gate; 7. a source electrode; 8. a drain electrode; 9. a p-GaN layer; 90. a p-GaN region; 91. a p-GaN layer; 10. a passivation layer; 11. an electrode; 12. a dielectric layer.
Detailed Description
The following description of the embodiments of the present invention will be made apparent and fully in view of the accompanying drawings, in which some, but not all embodiments of the invention are shown. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
A method of forming a multifunctional p-GaN electrode in a GaN HEMT device, comprising the steps of:
Step 1: forming an epitaxial structure: epitaxial structures of normally off "enhancement" (Vth > 0V) p-GaN gate HEMTs can be used, specifically: growing a buffer layer 2 on a base layer 1, growing a channel layer 3 on the buffer layer 2, growing a barrier layer 4 on the channel layer 3, and growing a p-GaN layer 9 on the barrier layer 4, wherein: the two-dimensional electron gas 5 is fully depleted at the interface between the channel layer 3 and the barrier layer 4 as shown in fig. 4-1. The thickness of the barrier layer is 5-20nm so that the threshold voltage Vth of the device is within a set range, such as vth=1-2V. In this embodiment: the buffer layer 2 is a GaN or AlGaN layer, the channel layer 3 is a GaN layer, and the barrier layer 4 is AlGaN.
Step 2: the p-GaN layer 9 is patterned and then etched, leaving the p-GaN region 90 for forming the gate electrode, so that the two-dimensional electron gas 5 reappears at the interface between the channel layer 3 and the barrier layer 4 except under the p-GaN region 90, as shown in fig. 4-2.
Step 3:
(1) A passivation layer 10 is deposited and is then deposited,
(2) The passivation layer 10 is etched at the location of the injection electrode until the barrier layer 4 is exposed to form holes, as shown in fig. 4-3.
Step 4:
(1) And growing an additional barrier layer 40 on the barrier layer 4 at the hole position by adopting a Selective Area Growth (SAG) method, wherein the additional barrier layer 40 and the barrier layer 4 are all AlGaN layers, and the growth thickness of the additional barrier layer 40 is 20-60 nm.
(2) A p-GaN layer 91 is grown on the additional barrier layer 40 and the two-dimensional electron gas 5 is kept from being depleted, as shown in fig. 4-4.
Step 5:
a gate electrode 6 is formed on the p-GaN region 91, a source electrode 7, a drain electrode 8 are formed, an electrode 11 is implanted on the p-GaN layer 91, and the implanted electrode 11 is automatically connected to the drain electrode 8 to perform a hole injection function during high-voltage reverse drain bias stress to compensate for trapped electrons, as shown in fig. 4-5.
Step 6: a dielectric layer 12 is formed at the p-GaN region 90 to form a device structure as shown in fig. 4-6.
The method of this embodiment is also applicable to normally-on GaN-based MIS-HEMTs.
The above embodiments are provided to illustrate the technical concept and features of the present invention and are intended to enable those skilled in the art to understand the content of the present invention and implement the same, and are not intended to limit the scope of the present invention. All equivalent changes or modifications made in accordance with the spirit of the present invention should be construed to be included in the scope of the present invention.
Claims (9)
1. A method for forming a multifunctional p-GaN electrode in a GaN HEMT device is characterized in that: the method comprises the following steps: step 1: forming an epitaxial structure: growing a buffer layer on a base layer, growing a channel layer on the buffer layer, growing a barrier layer on the channel layer, and growing a p-GaN layer on the barrier layer to enable two-dimensional electron gas to be completely exhausted at the interface between the channel layer and the barrier layer, wherein the step 2 is as follows: etching the p-GaN layer, leaving a p-GaN region for forming a gate electrode, causing two-dimensional electron gas to reappear at an interface between the channel layer and the barrier layer except under the p-GaN region,
Step 3:
(1) A passivation layer is deposited and a passivation layer is deposited,
(2) Etching the passivation layer at the position of the injection electrode until the barrier layer forms holes,
Step 4: an additional barrier layer is grown on the barrier layer at the hole position, the growth thickness of the additional barrier layer is 20-60 nm, a p-GaN layer is grown on the additional barrier layer, and the two-dimensional electron gas is kept not to be exhausted,
Step 5: forming a gate electrode on the p-GaN region, forming a source electrode and a drain electrode, implanting an electrode on the p-GaN layer, and automatically connecting the implanted electrode to the drain electrode,
Step 6: a dielectric layer is formed at the p-GaN region.
2. The method of forming a multifunctional p-GaN electrode in a GaN HEMT device of claim 1, wherein: in step 1: the thickness of the barrier layer is 5-20nm, so that the threshold voltage Vth of the device is within a set range.
3. The method of forming a multifunctional p-GaN electrode in a GaN HEMT device of claim 2, wherein: the set threshold voltage vth=1-2V.
4. The method of forming a multifunctional p-GaN electrode in a GaN HEMT device of claim 1, wherein: in step 4: and growing an additional barrier layer by adopting a selective area growth mode.
5. The method of forming a multifunctional p-GaN electrode in a GaN HEMT device of claim 1, wherein: in step 4: a p-GaN layer is grown on the additional barrier layer using MOCVD techniques.
6. The method of forming a multifunctional p-GaN electrode in a GaN HEMT device of claim 1, wherein: in step 4: the additional barrier layer is an AlGaN layer.
7. The method of forming a multifunctional p-GaN electrode in a GaN HEMT device of claim 1, wherein: the buffer layer is a GaN or AlGaN layer, the channel layer is a GaN layer, and the barrier layer is an AlGaN layer.
8. A device, characterized in that: comprising a structure formed by the method of forming a multifunctional p-GaN electrode in a GaNHEMT device of any of claims 1-7.
9. The device of claim 8, wherein: the device comprises a normally-on GaN-based MIS-HEMT.
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| JP2005183551A (en) * | 2003-12-17 | 2005-07-07 | Nec Corp | Semiconductor device, field effect transistor, and method for manufacturing same |
| CN103489911A (en) * | 2013-09-06 | 2014-01-01 | 华为技术有限公司 | GaN-based HEMT device and manufacturing method thereof |
| CN105140270A (en) * | 2015-07-29 | 2015-12-09 | 电子科技大学 | Enhancement mode HEMT (high electron mobility transistor) device |
| CN107240549A (en) * | 2017-07-18 | 2017-10-10 | 成都海威华芯科技有限公司 | A kind of preparation method of GaN HEMT devices |
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| KR102080745B1 (en) * | 2013-04-16 | 2020-04-14 | 엘지전자 주식회사 | Nitride semiconductor and method thereof |
| US20140335666A1 (en) * | 2013-05-13 | 2014-11-13 | The Government Of The United States Of America, As Represented By The Secretary Of The Navy | Growth of High-Performance III-Nitride Transistor Passivation Layer for GaN Electronics |
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| JP2005183551A (en) * | 2003-12-17 | 2005-07-07 | Nec Corp | Semiconductor device, field effect transistor, and method for manufacturing same |
| CN103489911A (en) * | 2013-09-06 | 2014-01-01 | 华为技术有限公司 | GaN-based HEMT device and manufacturing method thereof |
| CN105140270A (en) * | 2015-07-29 | 2015-12-09 | 电子科技大学 | Enhancement mode HEMT (high electron mobility transistor) device |
| CN107240549A (en) * | 2017-07-18 | 2017-10-10 | 成都海威华芯科技有限公司 | A kind of preparation method of GaN HEMT devices |
| CN110061053A (en) * | 2019-01-15 | 2019-07-26 | 中山大学 | A kind of enhanced semiconductor transistor and preparation method thereof |
| CN111081772A (en) * | 2019-12-31 | 2020-04-28 | 杭州士兰集成电路有限公司 | Gallium nitride transistor and method for manufacturing the same |
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