CN112464313B - Method for processing differential routing through hole of server wiring - Google Patents
Method for processing differential routing through hole of server wiring Download PDFInfo
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- CN112464313B CN112464313B CN202011374842.5A CN202011374842A CN112464313B CN 112464313 B CN112464313 B CN 112464313B CN 202011374842 A CN202011374842 A CN 202011374842A CN 112464313 B CN112464313 B CN 112464313B
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- 238000000034 method Methods 0.000 title claims abstract description 48
- 238000004088 simulation Methods 0.000 claims abstract description 60
- 238000003672 processing method Methods 0.000 claims abstract description 10
- 238000005553 drilling Methods 0.000 claims description 11
- 238000005457 optimization Methods 0.000 abstract description 8
- 238000010276 construction Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 30
- 238000010586 diagram Methods 0.000 description 7
- 239000002344 surface layer Substances 0.000 description 7
- 230000007812 deficiency Effects 0.000 description 2
- 238000003754 machining Methods 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
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Abstract
The invention provides a processing method of a differential wiring via hole of server wiring, belongs to the technical field of server optimization, and solves the problems that in the prior art, only the differential wiring via hole is dug, the processing method is simple and single, and the problem of insufficient optimization design caused by processing aiming at the actual layer changing condition is solved. The construction process comprises the following steps: acquiring initial position information of wiring; acquiring through hole root information of the differential routing through holes; acquiring basic information of the differential routing via hole; setting simulation conditions according to the initial position information of the wiring, the through hole root information of the differential wiring via hole and the basic information of the differential wiring via hole; simulating the processing process of different differential routing through holes under the set simulation condition to obtain simulation results of the processing of different differential routing through holes; and obtaining a target processing mode of the differential routing via hole according to the different simulation results of the processing of the differential routing via hole.
Description
Technical Field
The invention relates to the technical field of server optimization, in particular to a processing method of a differential routing via hole of server wiring.
Background
In Incloud server design, along with the increase of signal rate, the board card density increases, and the stromatolite is thick bigger and bigger, and impedance is discontinuous, crosstalks the increase, directly leads to link signal integrality to reduce, consequently need optimize the differential wiring hole of server wiring, only carries out the hole digging processing to differential wiring via hole among the prior art, and processing method is simple single, can not handle to the actual layer change condition, leads to the not enough problem of optimal design.
Disclosure of Invention
The invention aims to provide a processing method of a differential routing via hole of server wiring, which solves the problems that in the prior art, only the differential routing via hole is dug, the processing method is simple and single, and the problem of insufficient optimization design caused by processing aiming at the actual layer changing condition is solved.
The invention provides a processing method of a differential routing via hole of server wiring, which comprises the following steps:
acquiring initial position information of wiring;
acquiring through hole root information of the differential routing through holes;
acquiring basic information of the differential routing via hole;
setting simulation conditions according to the initial position information of the wiring, the through hole root information of the differential wiring via hole and the basic information of the differential wiring via hole;
simulating the processing process of different differential routing through holes under the set simulation condition to obtain simulation results of the processing of different differential routing through holes;
and obtaining the target processing mode of the differential routing via hole according to the different simulation results of the processing of the differential routing via hole.
Optionally, before the step of setting the simulation condition according to the initial position information of the wiring, the through-hole root information of the differential routing via, and the basic information of the differential routing via, the method further includes:
and comparing the information of the through hole roots of the differential wiring via holes with a first preset value, and judging the size of the through hole roots of the differential wiring via holes.
Optionally, the starting position information of the wiring is: and position information of a starting point of the wiring and an end point of the wiring.
Optionally, the method further comprises:
and judging whether the starting point of the wiring and the wiring termination point are in adjacent layers or not according to the position information of the starting point of the wiring and the wiring termination point.
Optionally, the step of setting a simulation condition according to the initial position information of the wiring, the through-hole root information of the differential routing via, and the basic information of the differential routing via includes:
selecting any information from the initial position information of the wiring, the through hole root information of the differential wiring via hole and the basic information of the differential wiring via hole as a single variable;
and setting the single variable as a simulation condition.
Optionally, the step of simulating the different processes of processing the differential trace via hole under the set simulation condition to obtain a simulation result of processing the differential trace via hole includes:
and simulating the processing process of different differential routing via holes under the condition of a single variable, and obtaining different processing results as simulation results.
Optionally, the step of obtaining an optimal processing manner of the differential routing via according to the different simulation results of the processing of the differential routing via includes:
and comparing the processing results of the different processing processes of the differential wiring via hole to obtain the target processing mode of the differential wiring via hole.
Optionally, the basic information of the differential routing via is: whether the differential routing via hole adopts back drilling or not.
Optionally, the processing process of the different differential routing vias includes: and carrying out different processing procedures on the differential routing through hole.
Optionally, the simulation result is an impedance TDR graph and a Return loss graph.
The invention provides an optimization process of a differential wiring via hole of server wiring, which comprises the steps of obtaining initial position information of wiring, obtaining through hole root information of the differential wiring via hole, and obtaining process information of the differential wiring via hole; and optimizing the differential routing via holes of the server wiring according to the initial position information of the wiring, the through hole root information of the differential routing via holes and the process information of the differential routing via holes. The signal integrity of the link is ensured, and the optimization deficiency caused by a differential hole digging mode is avoided; the method is simple, efficient and easy to implement, and meanwhile, the reliability of system design is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a flowchart of a method for processing a differential routing via of a server wiring according to an embodiment of the present invention;
FIG. 2 is a diagram of the impedance TDR of the simulation result of embodiment 1 of the present invention;
FIG. 3 is a diagram of Return loss of simulation results of example 1 of the present invention;
FIG. 4 is a TDR chart of simulation results of embodiment 2 of the present invention;
FIG. 5 is a diagram of Return loss of simulation results of example 2 of the present invention;
FIG. 6 is a TDR plot of simulation results of embodiment 3 of the present invention;
FIG. 7 is a diagram of Return loss of simulation results of example 3 of the present invention;
FIG. 8 is a TDR chart of simulation results of embodiment 4 of the present invention;
FIG. 9 is a diagram of Return loss of simulation results of example 4 of the present invention;
FIG. 10 is a graph of the impedance TDR of the simulation result of embodiment 5 of the present invention;
FIG. 11 is a diagram of Return loss of simulation results of example 5 of the present invention;
FIG. 12 is a graph of the impedance TDR of the simulation result of embodiment 6 of the present invention;
FIG. 13 is a diagram of the Return loss of the simulation result of embodiment 6 of the present invention.
Detailed Description
To make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terms "comprising" and "having," and any variations thereof, as referred to in embodiments of the present invention, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements but may alternatively include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
The method for processing the differential routing via hole of the server wiring provided by the embodiment of the invention, as shown in fig. 1, includes:
101. acquiring initial position information of wiring;
102. acquiring through hole root information of the differential routing through holes;
103. acquiring basic information of the differential routing via hole;
104. setting simulation conditions according to the initial position information of the wiring, the through hole root information of the differential wiring via hole and the basic information of the differential wiring via hole;
for example, the number of the differential routing vias should be reduced as much as possible in a double-sided pcb, the excessive differential routing vias are disadvantageous to the strength of the pcb, the differential routing vias are electrically connected back and connect a top plate and a bottom plate by metallization of the differential routing vias, the connection cross-sectional area is limited, connection impedance is provided, the differential routing vias should be used as little as possible particularly for routing with high current, and for routing with difficulty, in order to shorten the routing length or without a method for routing, the differential routing vias are selected for routing.
105. Simulating the processing process of different differential routing through holes under the set simulation condition to obtain simulation results of the processing of different differential routing through holes;
106. and obtaining a target processing mode of the differential routing via hole according to the different simulation results of the processing of the differential routing via hole.
The invention provides a processing method of a differential routing via hole of server wiring, which comprises the steps of obtaining initial position information of the wiring, obtaining through hole root information of the differential routing via hole, and obtaining process information of the differential routing via hole; and optimizing the differential routing via holes of the server wiring according to the initial position information of the wiring, the through hole root information of the differential routing via holes and the process information of the differential routing via holes. The signal integrity of the link is ensured, and the optimization deficiency caused by a differential hole digging mode is avoided; the method is simple, efficient and easy to implement, and meanwhile, the reliability of system design is improved.
Optionally, before the step of setting the simulation condition according to the initial position information of the wiring, the through-hole root information of the differential routing via, and the basic information of the differential routing via, the method further includes:
and comparing the information of the root of the through hole of the differential wiring via hole with a first preset value, and judging the size of the root of the through hole of the differential wiring via hole.
Optionally, the starting position information of the wiring is: and position information of a starting point of the wiring and an end point of the wiring.
Optionally, the method further comprises:
and judging whether the starting point of the wiring and the wiring termination point are in adjacent layers or not according to the position information of the starting point of the wiring and the wiring termination point.
Optionally, the step of setting a simulation condition according to the initial position information of the wiring, the through-hole root information of the differential routing via, and the basic information of the differential routing via includes:
selecting any information from the initial position information of the wiring, the through hole root information of the differential wiring via hole and the basic information of the differential wiring via hole as a single variable;
and setting the single variable as a simulation condition.
Optionally, the step of simulating the different processes of processing the differential trace via hole under the set simulation condition to obtain a simulation result of processing the differential trace via hole includes:
and simulating the processing process of different differential routing via holes under the condition of a single variable, and obtaining different processing results as simulation results.
Illustratively, the specific process of simulating the machining process of the different differential routing via holes under the set simulation condition is as follows:
embodiment 1 is that the routing changes layer from surface layer signal to reference layer, the stub of the via is greater than 30mil, and the differential hole is traversed to dig a hole with a size of 30mil to 50mil without back drilling, so as to obtain the simulation result, as shown in fig. 2 and fig. 3;
in embodiment 2, routing is performed from a surface signal layer to a reference layer, stub of a via is greater than 30mil, and in the case of back drilling, the differential hole is traversed for digging a hole with a size of 30mil to 50mil to obtain a simulation result, as shown in fig. 4 and 5;
in embodiment 3, routing is performed from a surface signal layer to an inner layer (non-adjacent layer), the stub of a via is greater than 30mil, and the differential hole is traversed by the size of 30mil to 50mil without backdrilling, so as to obtain a simulation result, as shown in fig. 6 and 7;
example 4 is to change the routing from the surface signal layer to the inner layer (non-adjacent layer), the stub of the via is greater than 30mil, and in the case of back drilling, the differential hole is traversed by the size of 30mil to 50mil, so as to obtain the simulation result, as shown in fig. 8 and 9;
example 5 is to change the routing from the surface layer signal to the inner layer (non-adjacent layer), the stub of the via is smaller than 30mil, and the differential hole is traversed by the size of 30mil to 50mil without backdrilling, so as to obtain the simulation result, as shown in fig. 10 and 11;
example 6 when the trace is changed from the top layer to the bottom layer, the differential trace via has no via root stub, and the simulation result is obtained by traversing the differential via hole size from 30mil to 50mil, as shown in fig. 12 and 13.
Optionally, the step of obtaining a target processing manner of the differential routing via according to the different simulation results of the processing of the differential routing via includes:
and comparing the processing results of the different processing processes of the differential wiring via hole to obtain the target processing mode of the differential wiring via hole.
Illustratively, the simulation results are shown in table 1:
TABLE 1
Wherein stub is the via root, RL @12G is the right hand, TDR is the attenuation range, Anti-pad optimization is the optimal data, case1 is example 1, case2 is example 2 … case6 is example 6.
When wiring is changed from the surface layer of a main board in a server to the adjacent layer of the main board, if the differential routing via hole has a large through hole root length and a back drilling process is not adopted, performing hole digging treatment on the differential routing via hole by a first preset length, and optimizing the differential routing via hole;
if the wiring adopts a back drilling process, holing with a first preset length as a whole, and optimizing the differential wiring via hole, wherein the second preset length is greater than the second preset length, meanwhile, the second preset length is greater than the through hole root length of the differential wiring via hole, and the through hole root length of the differential wiring via hole is greater than the first preset length.
When the wiring is changed from the surface layer to the inner layer of the inner main board of the server, if the differential wiring via hole has a large through hole root length and a back drilling process is not adopted, all layers participating in the wiring are subjected to hole digging treatment by a second preset length, and the differential wiring via hole is optimized;
and if the wiring adopts a back drilling process, the signal wiring reference layer is not subjected to hole digging treatment, other layers participating in the wiring are subjected to hole digging treatment by a second preset length, and the differential wiring via hole is optimized, wherein the inner layer is a non-adjacent layer of the surface layer of the mainboard in the server.
When the wiring is changed from the surface layer to the inner layer, and the differential wiring via hole does not have large through hole root length, the differential wiring via hole does not need back drilling, the signal wiring reference layer does not dig a hole, other layers participating in wiring do digging processing with a second preset length, and the differential wiring via hole is optimized.
When the wiring is changed from the surface layer of the main board to the bottommost layer of the main board, the differential wiring via hole has no through hole root, all layers participating in wiring are subjected to hole digging treatment by a first preset length, and the differential wiring via hole is optimized.
Optionally, the basic information of the differential routing via is: whether the differential routing via hole adopts back drilling or not.
Optionally, the processing process of the different differential routing vias includes: and carrying out different processing procedures on the differential routing through hole.
Optionally, the simulation result is an impedance TDR graph and a Return loss graph.
Finally, it should be noted that: the above-mentioned embodiments are merely specific embodiments of the present invention, which are used for illustrating the technical solutions of the present invention and not for limiting the same, and the protection scope of the present invention is not limited thereto, although the present invention is described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: any person skilled in the art can modify or easily conceive the technical solutions described in the foregoing embodiments or equivalent substitutes for some technical features within the technical scope of the present disclosure; and the modifications, changes or substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention. Are intended to be covered by the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (5)
1. A processing method of a differential routing via hole of server wiring is characterized by comprising the following steps:
acquiring initial position information of wiring;
acquiring through hole root information of the differential routing through holes;
acquiring basic information of the differential routing via hole;
setting simulation conditions according to the initial position information of the wiring, the through hole root information of the differential wiring via hole and the basic information of the differential wiring via hole;
simulating the processing process of different differential routing through holes under the set simulation condition to obtain simulation results of the processing of different differential routing through holes;
obtaining a target processing mode of the differential routing via hole according to the different simulation results of the processing of the differential routing via hole;
the initial position information of the wiring is as follows: position information of a starting point and an end point of the wiring;
judging whether the starting point of the wiring and the end point of the wiring are in adjacent layers or not according to the position information of the starting point of the wiring and the end point of the wiring;
the step of setting simulation conditions according to the initial position information of the wiring, the through hole root information of the differential wiring via hole and the basic information of the differential wiring via hole includes:
selecting any information from the initial position information of the wiring, the through hole root information of the differential wiring via hole and the basic information of the differential wiring via hole as a single variable;
setting the single variable as a simulation condition;
the step of simulating the processing process of the different differential routing via holes under the set simulation condition to obtain the simulation result of the processing of the differential routing via holes includes:
simulating the processing process of different differential routing via holes under the condition of a single variable to obtain different processing results as simulation results;
the step of obtaining a target processing mode of the differential routing via hole according to the different simulation results of the processing of the differential routing via hole includes:
and comparing the processing results of the different processing processes of the differential wiring via hole to obtain the target processing mode of the differential wiring via hole.
2. The method for processing the differential routing via of the server wire according to claim 1, wherein before the step of setting the simulation condition according to the initial position information of the wire, the through-hole root information of the differential routing via, and the basic information of the differential routing via, the method further comprises:
and comparing the information of the through hole roots of the differential wiring via holes with a first preset value, and judging the size of the through hole roots of the differential wiring via holes.
3. The processing method of the differential routing via of the server wiring according to claim 1, wherein the basic information of the differential routing via is: whether the differential routing via hole adopts back drilling or not.
4. The method for processing the differential routing via of the server wiring according to claim 1, wherein the different differential routing vias are processed by: and carrying out different processing procedures on the differential routing through hole.
5. The method for processing the differential routing via hole of the server wiring according to claim 1, wherein the simulation result is an impedance TDR graph and a Return loss (Return loss) graph.
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Citations (5)
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|---|---|---|---|---|
| CN103366023A (en) * | 2012-03-26 | 2013-10-23 | 鸿富锦精密工业（深圳）有限公司 | Differential signal routing line distributing system and differential signal routing line distributing method |
| CN103717012A (en) * | 2012-09-28 | 2014-04-09 | 杭州华三通信技术有限公司 | PCB board via impedance control method and structure |
| CN105117548A (en) * | 2015-08-25 | 2015-12-02 | 浪潮电子信息产业股份有限公司 | Differential routing method suitable for DUAL STRIPLINE design |
| CN108829937A (en) * | 2018-05-24 | 2018-11-16 | 郑州云海信息技术有限公司 | A method of optimization PCB high speed signal via hole |
| CN212660374U (en) * | 2020-08-11 | 2021-03-05 | 上海麦骏电子有限公司 | Through hole structure for reducing interference of high-speed signal |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103366023A (en) * | 2012-03-26 | 2013-10-23 | 鸿富锦精密工业（深圳）有限公司 | Differential signal routing line distributing system and differential signal routing line distributing method |
| CN103717012A (en) * | 2012-09-28 | 2014-04-09 | 杭州华三通信技术有限公司 | PCB board via impedance control method and structure |
| CN105117548A (en) * | 2015-08-25 | 2015-12-02 | 浪潮电子信息产业股份有限公司 | Differential routing method suitable for DUAL STRIPLINE design |
| CN108829937A (en) * | 2018-05-24 | 2018-11-16 | 郑州云海信息技术有限公司 | A method of optimization PCB high speed signal via hole |
| CN212660374U (en) * | 2020-08-11 | 2021-03-05 | 上海麦骏电子有限公司 | Through hole structure for reducing interference of high-speed signal |
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