CN112398210B - Dual power supply system with current balance and dual power balance controller - Google Patents
Dual power supply system with current balance and dual power balance controller Download PDFInfo
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- CN112398210B CN112398210B CN201910739064.6A CN201910739064A CN112398210B CN 112398210 B CN112398210 B CN 112398210B CN 201910739064 A CN201910739064 A CN 201910739064A CN 112398210 B CN112398210 B CN 112398210B
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/34—Parallel operation in networks using both storage and other dc sources, e.g. providing buffering
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
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Abstract
The present invention relates to a power supply system, and more particularly, to a dual power supply system with current balancing and a dual power balance controller. The dual power supply system with current balancing includes: the first transistor switch module is coupled with a first control end Drv1, a first power input end V1 and a system output end Vo1 of the dual-power balance controller and is used for controlling the first power supply to provide voltage for the system output end Vo1; the second transistor switch module is coupled with a second control end Drv2, a second power input end V2 and a system output end Vo1 of the dual-power balance controller and is used for controlling the second power supply to provide voltage for the system output end Vo1; the purpose of supplying power to a high-power load is achieved through a small number of transistor switches and a simple control circuit design, the cost is saved, and the effect of energy saving in light load is achieved, so that the limitation of the prior art is overcome.
Description
Technical Field
The present invention relates to a power supply system, and more particularly, to a dual power supply system with current balancing and a dual power balance controller.
Background
With the day-to-day variation of electronic devices, the requirements on a power supply system are continuously increased, especially for supplying power to a high-power load, and a single set of power supplies cannot meet the power requirements of the power supplies, so that two or more sets of power supplies are required to supply power to the power supplies simultaneously. Because there may be a voltage difference between each group of power supplies, if the different power supplies are directly shorted, a current reverse current phenomenon may occur.
In a conventional dual power supply system for supplying power to a high-power load, two or more groups of Buck converters are mainly adopted, as shown in fig. 1, the dual power supply system includes two groups of Buck converters, the input ends of the Buck converters are respectively coupled to a first power voltage V1 and a second power voltage V2, the output ends of the Buck converters are respectively coupled to an inductor, and the other ends of the inductors are simultaneously coupled to an output voltage Vo, so that V1 and V2 are superimposed together, and meanwhile, power is supplied to the load ends.
However, in the conventional implementation manner, the number of Buck drivers in each group of Buck converters is relatively large, the number of transistors and the impedance requirements are relatively high, and the number of inductors is also large, so that the cost is high. In addition, the switching loss of the conventional dual power supply system during light load also can generate the problem of energy saving.
Disclosure of Invention
In view of the problems of the dual power supply system in the prior art, the invention provides a dual power supply system with current balance and a dual power balance controller, which realize the purpose of supplying power to a high-power load through a small number of transistor switches and a simple control circuit design, save the cost and realize the effect of saving energy in light load, thereby overcoming the limitation of the prior art.
According to the technical scheme provided by the invention, as a first aspect of the invention:
there is provided a dual power supply system with current balancing, the dual power supply system with current balancing comprising: the switching device comprises a first transistor switch module, a second transistor switch module and a dual-power balance controller;
the first transistor switch module is coupled with a first control end Drv1, a first power input end V1 and a system output end Vo1 of the dual-power balance controller; for controlling said first power supply to supply a voltage to said system output Vo1;
the second transistor switch module is coupled to the second control end Drv2, the second power input end V2 and the system output end Vo1 of the dual-power balance controller, and is configured to control the second power to provide a voltage to the system output end Vo1;
the dual-power balance controller is used for controlling the first control end Drv1 to output a first driving signal to the first transistor switch module according to the balance control signal and controlling the second control end Drv2 to output a second driving signal to the second transistor switch module;
the first driving signal can control the first transistor switch module to be turned on or turned off, and the second driving signal can control the second transistor switch module to be turned on or turned off; and the first transistor switch module and the second transistor switch module are not turned on at the same time.
Further, the balance control signal is a frequency signal generated inside the dual-power balance controller or an externally-connected adjustable frequency signal.
Further, the frequency range of the balance control signal is: 10KHz to 100KHz.
Further, if the voltage provided by the first power supply is not equal to the voltage provided by the second power supply, the first transistor switch module and the second transistor switch module respectively comprise two transistor switch transistors connected in series.
Further, the first transistor switch module includes a first transistor switch M1 and a third transistor switch M3, where a source of the first transistor switch M1 is coupled to the first power input terminal V1, a drain of the first transistor switch M1 is coupled to a drain of the third transistor switch M3, a source of the third transistor switch M3 is coupled to the system output terminal Vo1, and a gate of the first transistor switch M1 and a gate of the third transistor switch M3 are both coupled to the first control terminal Drv1;
the second transistor switch module comprises a second transistor switch M2 and a fourth transistor switch M4, wherein a source electrode of the second transistor switch M2 is coupled to the second power input end V2, a drain electrode of the second transistor switch M2 is coupled to a drain electrode of the fourth transistor switch M4, a source electrode of the fourth transistor switch M4 is coupled to the system output end Vo1, and gates of the second transistor switch M2 and the fourth transistor switch M4 are both coupled to the second control end Drv2;
the system output end Vo1 is connected with one end of the inductor L, and the other end of the inductor L is used for being coupled with the load end Vo2.
Further, if the voltage provided by the first power supply is equal to the voltage provided by the second power supply, the first transistor switch module and the second transistor switch module respectively include a transistor switch.
Further, the first transistor switch module includes a fifth transistor switch M5, a drain electrode of the fifth transistor switch M5 is coupled to the first power input terminal V1, a source electrode of the fifth transistor switch M5 is coupled to the system output terminal Vo1, and a gate electrode of the fifth transistor switch M5 is coupled to the first control terminal Drv1;
the second transistor switch module includes a sixth transistor switch M6, a drain of the sixth transistor switch M6 is coupled to the second power input terminal V2, a source of the sixth transistor switch M6 is coupled to the system output terminal Vo1, and a gate of the sixth transistor switch M6 is coupled to the second control terminal Drv2.
Further, the first power input terminal V1 is coupled to one end of the first input capacitor Cv1, and the other end of the first input capacitor Cv1 is grounded; the second power input terminal V2 is coupled to one end of the second input capacitor Cv2, and the other end of the second input capacitor Cv2 is grounded.
Further, the dual power balance controller includes:
the balance logic unit is used for generating a logic control signal to the logic driving unit according to the balance control signal;
the logic driving unit is coupled with the balance logic unit and is used for outputting a first driving signal at a first control end Drv1 of the dual-power balance controller according to the logic control signal; the second driving signal is output at the second control terminal Drv2 of the dual power balance controller.
As a second aspect of the present invention:
there is provided a dual power balance controller including:
the balance logic unit is used for generating a logic control signal to the logic driving unit according to the balance control signal;
the logic driving unit is coupled to the balance logic unit and is used for outputting a first driving signal at a first control end Drv1 of the dual-power balance controller according to the logic control signal; the second driving signal is output at the second control terminal Drv2 of the dual power balance controller according to the first aspect of the present invention.
From the above, the dual power supply system and the dual power balance controller with current balance provided by the invention have the following advantages compared with the prior art: the invention balances the current of the two power supply modules under high switching frequency through simple control circuit design and a small number of transistors, inductors and the like, provides stable voltage for high-power load, saves cost, does not generate current reverse-filling phenomenon even if larger pressure difference exists between different power supplies, does not influence normal use, and also realizes energy-saving effect in light load.
Drawings
Fig. 1 is a circuit block diagram of a conventional dual power supply system.
FIG. 2 is a circuit diagram of a dual power supply system with current balancing according to a first embodiment of the present invention.
FIG. 3 is a waveform diagram of the output of the dual power supply system with current balancing shown in FIG. 2.
FIG. 4 is a circuit diagram of a second embodiment of a dual power supply system with current balancing according to the present invention.
FIG. 5 is a waveform diagram of the output of the dual power supply system with current balancing of FIG. 4.
FIG. 6 is a circuit schematic of a preferred embodiment of a dual power balance controller.
10. A first transistor switch module, 20 a second transistor switch module, 30 a dual power balance controller.
Detailed Description
The present invention will be further described in detail below with reference to specific embodiments and with reference to the accompanying drawings, in order to make the objects, technical solutions and advantages of the present invention more apparent. Wherein like parts are designated by like reference numerals. It should be noted that the words "front", "rear", "left", "right", "upper" and "lower" used in the following description refer to directions in the drawings. The words "inner" and "outer" are used to refer to directions toward or away from, respectively, the geometric center of a particular component.
There is provided a dual power supply system with current balancing, comprising a first transistor switch module 10, a second transistor switch module 20, a first power input terminal V1 for coupling to a first power source, a second power input terminal V2 for coupling to a second power source, a system output terminal Vo1 for coupling to a load, and a dual power balancing controller 30;
the control end of the first transistor switch module 10 is coupled to the first control end Drv1 of the dual-power balance controller 30, the input end thereof is coupled to the first power input end V1, the output end thereof is coupled to the system output end Vo1, and the first transistor switch module is used for controlling the first power supply to provide voltage to the system output end Vo1 according to the first driving signal outputted by the dual-power balance controller 30;
the control end of the second transistor switch module 20 is coupled to the second control end Drv2 of the dual-power balance controller 30, the input end thereof is coupled to the second power supply, the output end thereof is coupled to the system output end Vo1, and the second transistor switch module is used for controlling the second power supply to provide voltage to the system output end Vo1 according to the second driving signal outputted by the dual-power balance controller 30;
the dual-power balance controller 30 is configured to control the first control terminal Drv1 to output a first driving signal to the first transistor switch module 10 according to a balance control signal, and control the second control terminal Drv2 to output a second driving signal to the second transistor switch module 20;
the first driving signal can control the first transistor switch module 10 to be turned on or turned off, and the second driving signal can control the second transistor switch module 20 to be turned on or turned off; and the first transistor switch module and the second transistor switch module are not simultaneously turned on, it should be explained that the first transistor switch module and the second transistor switch module are not simultaneously turned on includes the following situations: first case: the first transistor switch module 10 is on and the second transistor switch module 20 is off; second case: the first transistor switch module 10 is off and the second transistor switch module 20 is on; third scenario: the first transistor switch module 10 and the second transistor switch module 20 are both off; an alternative embodiment is that the first driving signal and the second driving signal are opposite in phase, and when the first driving signal and the second driving signal are opposite in phase, the first transistor switch module 10 and the second transistor switch module 20 are alternately turned on.
As a first embodiment of the present invention:
if the voltage provided by the first power supply is equal to the voltage provided by the second power supply, the first transistor switch module 10 and the second transistor switch module 20 respectively comprise a transistor switch. I.e.
The first transistor switch module 10 includes a fifth transistor switch M5, a drain electrode of the fifth transistor switch M5 is coupled to the first power input terminal V1, a source electrode of the fifth transistor switch M5 is coupled to the system output terminal Vo1, and a gate electrode of the fifth transistor switch M5 is coupled to the first control terminal Drv1; the first control terminal Drv1 is configured to output a first driving signal to the fifth transistor M5, and is configured to control on/off of the fifth transistor M5, so as to control the first power supply to provide a voltage to the system output terminal Vo1;
the second transistor switch module 20 includes a sixth transistor switch M6, a drain of the sixth transistor switch M6 is coupled to the second power input terminal V2, a source of the sixth transistor switch M6 is coupled to the system output terminal Vo1, and a gate of the sixth transistor switch M6 is coupled to the second control terminal Drv2; the second control terminal Drv2 is capable of outputting a second driving signal to the sixth transistor M6, for controlling on/off of the sixth transistor M6, so as to control the second power supply to provide a voltage to the system output terminal Vo1.
In this embodiment, the first power input terminal V1 is coupled to one end of the first input capacitor Cv1, and the other end of the first input capacitor Cv1 is grounded; the second power input terminal V2 is coupled to one end of the second input capacitor Cv2, and the other end of the second input capacitor Cv2 is grounded.
In use, according to the first embodiment of the present invention, the system output terminal Vo1 is coupled to the load terminal Vo2, and the connection point between the system output terminal Vo1 and the load terminal Vo2 is coupled to one end of the second output capacitor CVo, and the other end of the second output capacitor CVo is grounded. The system output Vo1 is further coupled to the first output capacitor CVo1, although the first output capacitor CVo may be omitted. It should be explained that the capacitance of the second output capacitor CVo is larger than that of the first output capacitor CVo.
For the first embodiment of the present invention, the voltage provided by the first power supply is equal to the voltage provided by the second power supply, and the dual-power Balance controller 30 generates a first driving signal and a second driving signal according to a Balance control signal Balance, where the first driving signal is used for controlling the on or off of the fifth transistor M5, and the second driving signal is used for controlling the on or off of the sixth transistor M6; the Balance control signal Balance may be a frequency signal generated in the dual-power Balance controller 30, or an external adjustable frequency signal, for controlling the switching frequency of the first driving signal and the second driving signal.
Referring to fig. 3, fig. 3 is a waveform diagram of an output of the dual power supply system with current balancing shown in fig. 2. When the Balance control signal Balance is at a low level, the first driving signal output by the first control terminal Drv1 is at a high level, and the second driving signal output by the second control terminal Drv2 is at a low level, so that the first driving signal at the high level drives the fifth transistor M5 to be turned on, the second driving signal at the low level controls the sixth transistor M6 to be turned off, and the first power supply supplies power to the load. Conversely, when the Balance control signal Balance is at a high level, the first driving signal output by the first control terminal Drv1 is at a low level, and the second driving signal output by the second control terminal Drv2 is at a high level, so that the first driving signal at the low level controls the fifth transistor M5 to be turned off, the second driving signal at the high level controls the sixth transistor M6 to be turned on, and the second power source supplies power to the load. The first driving signal and the second driving signal are thus in opposite phase, so that the fifth transistor M5 and the sixth transistor M6 are alternately turned on in the time domain. Of course, the output waveform diagram is not limited to this, and the first driving signal may be at a high level and the second driving signal may be at a low level when balancing the control signal Balance.
Because the frequency of the Balance control signal Basnce can reach 10 KHz-100 KHz, the high switching frequency enables the time that the fifth transistor M5 and the sixth transistor M6 are conducted in the conduction period to be very short, and therefore the first input capacitor Cv1 and the second input capacitor Cv2 can provide stable power supply voltage for a load; assuming that the load needs to input 10A of current, the frequency of the Balance control signal Balance is 50KHz, and the duty ratio of the fifth transistor M5 and the sixth transistor M6 is 1:1, the average current of the first current provided by the first power supply is about 5A, and the average current of the second current provided by the second power supply is about 5A. That is, in the dual power supply system according to the present embodiment, the first current provided when the first transistor switch module 10 is turned on and the second current provided when the second transistor switch module 20 is turned on are balanced by the high frequency switching. In addition, compared with the conventional technology, the number of Buck drivers, transistors and inductors in the dual-power balance controller 30 is reduced, and the impedance requirement of the dual-power balance controller on the transistors is low, so that the cost is greatly saved.
It should be noted that the duty ratio of the fifth transistor M5 and the sixth transistor M6 is not limited to 1:1, and it is only required to satisfy that the sum of the on time of the fifth transistor M5 and the on time of the sixth transistor M6 in one period is equal to the on time required by the load.
As a second embodiment of the present invention:
in the second embodiment of the present invention, the voltage provided by the first power supply is not equal to the voltage provided by the second power supply, and the first transistor switch module 10 and the second transistor switch module 20 respectively comprise two transistor switch transistors connected in series. That is, the first transistor switch module 10 includes a first transistor switch M1 and a third transistor switch M3, wherein a source of the first transistor switch M1 is coupled to the first power input terminal V1, a drain of the first transistor switch M1 is coupled to a drain of the third transistor switch M3, a source of the third transistor switch M3 is coupled to the system output terminal Vo1, and a gate of the first transistor switch M1 and a gate of the third transistor switch M3 are both coupled to the first control terminal Drv1;
the second transistor switch module 20 includes a second transistor switch M2 and a fourth transistor switch M4, where a source of the second transistor switch M2 is coupled to the second power input terminal V2, a drain of the second transistor switch M2 is coupled to a drain of the fourth transistor switch M4, a source of the fourth transistor switch M4 is coupled to the system output terminal Vo1, and gates of the second transistor switch M2 and the fourth transistor switch M4 are both coupled to the second control terminal Drv2.
In this embodiment, the first power input terminal V1 is coupled to one end of the first input capacitor Cv1, and the other end of the first input capacitor Cv1 is grounded; the second power input terminal V2 is coupled to one end of the second input capacitor Cv2, and the other end of the second input capacitor Cv2 is grounded.
In use, according to the second embodiment of the present invention, the system output terminal Vo1 is coupled to one end of the inductor L, the other end of the inductor L is coupled to the load terminal Vo2, the connection point between the inductor L and the load terminal Vo2 is coupled to one end of the second output capacitor CVo, and the other end of the second output capacitor CVo is grounded. The system output Vo1 is coupled to the first output capacitor CVo1, although the first output capacitor CVo may be omitted. It should be explained that the inductor L has the characteristic that the inductor current cannot be suddenly changed, so that a stable power voltage can be provided for the load terminal Vo2; the capacitance range of the first output capacitor Cvo1 is 1 uf-4.7 uf, the first output capacitor Cvo1 can provide current freewheeling for the inductor L during balance switching, and the first transistor switch module 10 and the second transistor switch module 20 do not generate current backflow after balance switching due to smaller capacitance.
Referring to fig. 5, fig. 5 is a waveform diagram of an output of the dual power supply system with current balancing shown in fig. 4. For example, but not limited thereto, it is assumed that the voltage (13V) provided by the first power supply is greater than the voltage (11V) provided by the second power supply voltage. When the Balance control signal Balance is at a low level, the first driving signal output by the first control terminal Drv1 is at a high level, the second control terminal Drv2 outputs the second driving signal at a low level, so that the first driving signal at the high level controls the first transistor switch M1 and the third transistor switch M3 to be turned on, the second driving signal at the low level controls the second transistor switch M2 and the fourth transistor switch M4 to be turned off, the first power supply charges the first output capacitor CVo, the voltage of the system output terminal Vo1 is quickly charged to be approximately equal to the voltage (13V) of the first power supply, and the inductor current gradually rises; when the Balance control signal Balance is at a high level, the first driving signal output by the first control terminal Drv1 is at a low level, the second control terminal Drv2 outputs the second driving signal at a high level, so that the first driving signal at the low level controls the first transistor switch M1 and the third transistor switch M3 to be turned off, the second driving signal at the high level controls the second transistor switch M2 and the fourth transistor switch M4 to be turned on, the first output capacitor CVo is discharged, the voltage of the system output terminal Vo1 is quickly discharged to be approximately equal to the voltage (11V) of the second power supply, and the inductance current gradually decreases. The inductor L and the second output capacitor CVo2 form a filter, so that the output voltage of the load terminal Vo2 is about the average value (12V) of the voltage of the first power source and the voltage of the second power source. In the present embodiment, the switching of the high frequency is also used to balance the first current I1 provided when the first transistor switch module 10 is turned on and the second current I2 provided when the second transistor switch module 20 is turned on in the dual power supply system.
The method reduces the number of Buck drivers, transistors and inductors, saves cost, and further, even if larger voltage difference exists between different power supplies, current reverse-filling phenomenon can not occur.
In the above embodiments, the types of the transistor switches are not limited to the implementation manners described in the specification, and may be transistor types well known to those skilled in the art, such as N-type metal oxide semiconductor field effect transistors (NMOS), P-type metal oxide semiconductor field effect transistors (PMOS), bipolar transistors (BJT), and insulated gate transistors (IGBT).
Referring to fig. 6, fig. 6 is a circuit schematic diagram of a dual power balance controller according to a preferred embodiment. The transistor switch is exemplified herein as a metal-oxide-semiconductor field-effect transistor (NMOS). The dual power balance controller 30 includes a balance logic unit 301, a potential shift unit 302, a logic driving unit 303, and a charge pump 304.
The Balance logic unit 301 is configured to receive a Balance control signal Balance, and generate a potential shift control signal CTRL according to the Balance control signal Balance, where the Balance control signal Balance may be set in the chip. Since the first transistor M1, the second transistor M2, the third transistor M3 and the fourth transistor M4 are N-type metal oxide semiconductor field effect transistors (NMOS), the voltage of the first driving signal or the second driving signal must be higher than the voltage of the system output Vo1 when turned on (for obtaining smaller impedance, the voltage difference needs to be more than 4V). The charge pump 304 provides a power voltage higher than the voltage (4V) of the system output Vo1, which can fully turn on the first transistor M1 and the third transistor M3 (or the second transistor M2 and the fourth transistor M4). The potential shifting unit 302 converts the low operating voltage of the Balance control signal Balance into the high operating voltage of the charge pump 304 according to the potential shifting control signal CTRL, and outputs a first driving signal through the first control terminal Drv1 of the logic driving unit 303 and outputs a second driving signal through the second control terminal Drv2, thereby controlling the switching between the first transistor switch module 10 and the first transistor switch module 10. When the transistor switch is a P-type metal oxide semiconductor field effect transistor (PMOS), the potential shifting unit 302 and the charge pump 304 may be omitted.
The dual power balance controller 30 may further comprise a detection unit, when the load is detected to be in a light load state, a control signal is generated to turn on any one of the first transistor switch module 10 and the second transistor switch module 20, and the other is turned off until the light load state is released, so as to achieve the purpose of light load energy saving.
In summary, the invention balances the current of the two power supply modules under high switching frequency through simple control circuit design and a small number of transistors, inductors and the like, provides stable voltage for high-power load, saves cost, does not generate current reverse-filling phenomenon even if larger pressure difference exists between different power supplies, does not influence normal use, and also realizes energy-saving effect under light load.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the invention.
Claims (6)
1. A dual power supply system with current balancing, the dual power supply system with current balancing comprising: a first transistor switch module (10), a second transistor switch module (20) and a dual power balance controller (30);
the first transistor switch module (10) is coupled to the first control terminal Drv1, the first power input terminal V1 and the system output terminal Vo1 of the dual-power balance controller (30), and is configured to control the first power to provide a voltage to the system output terminal Vo1;
the second transistor switch module (20) is coupled to the second control end Drv2, the second power input end V2 and the system output end Vo1 of the dual-power balance controller (30), and is configured to control the second power to provide a voltage to the system output end Vo1;
the dual-power balance controller (30) is configured to control the first control terminal Drv1 to output a first driving signal to the first transistor switch module (10) according to a balance control signal, and control the second control terminal Drv2 to output a second driving signal to the second transistor switch module (20);
the first driving signal can control the first transistor switch module (10) to be turned on or turned off, and the second driving signal can control the second transistor switch module (20) to be turned on or turned off; and the first transistor switch module and the second transistor switch module are not conducted at the same time;
if the voltage provided by the first power supply is not equal to the voltage provided by the second power supply, the first transistor switch module (10) and the second transistor switch module (20) respectively comprise two transistor switch transistors connected in series;
the first transistor switch module (10) includes a first transistor switch M1 and a third transistor switch M3, wherein a source electrode of the first transistor switch M1 is coupled to the first power input terminal V1, a drain electrode of the first transistor switch M1 is coupled to a drain electrode of the third transistor switch M3, a source electrode of the third transistor switch M3 is coupled to the system output terminal Vo1, and a gate electrode of the first transistor switch M1 and a gate electrode of the third transistor switch M3 are both coupled to the first control terminal Drv1;
the second transistor switch module (20) comprises a second transistor switch M2 and a fourth transistor switch M4, wherein a source electrode of the second transistor switch M2 is coupled to the second power input end V2, a drain electrode of the second transistor switch M2 is coupled to a drain electrode of the fourth transistor switch M4, a source electrode of the fourth transistor switch M4 is coupled to the system output end Vo1, and grid electrodes of the second transistor switch M2 and the fourth transistor switch M4 are both coupled to the second control end Drv2;
the system output end Vo1 is connected with one end of an inductor L, and the other end of the inductor L is used for being coupled with a load end Vo2;
wherein, if the voltage provided by the first power supply is equal to the voltage provided by the second power supply, the first transistor switch module (10) and the second transistor switch module (20) respectively comprise a transistor switch;
the first transistor switch module (10) includes a fifth transistor switch M5, a drain electrode of the fifth transistor switch M5 is coupled to the first power input terminal V1, a source electrode of the fifth transistor switch M5 is coupled to the system output terminal Vo1, and a gate electrode of the fifth transistor switch M5 is coupled to the first control terminal Drv1;
the second transistor switch module (20) includes a sixth transistor switch M6, a drain electrode of the sixth transistor switch M6 is coupled to the second power input terminal V2, a source electrode of the sixth transistor switch M6 is coupled to the system output terminal Vo1, and a gate electrode of the sixth transistor switch M6 is coupled to the second control terminal Drv2.
2. The dual power supply system with current balancing as claimed in claim 1, wherein the balancing control signal is a frequency signal generated inside the dual power balancing controller (30) or an external adjustable frequency signal.
3. The dual power supply system with current balancing as claimed in claim 1, wherein the frequency range of the balancing control signal is: 10KHz to 100KHz.
4. A dual power supply system with current balance as claimed in any one of claims 1 to 3, wherein the first power input terminal V1 is coupled to one end of a first input capacitor Cv1, and the other end of the first input capacitor Cv1 is grounded; the second power input terminal V2 is coupled to one end of the second input capacitor Cv2, and the other end of the second input capacitor Cv2 is grounded.
5. A dual power supply system with current balancing as claimed in any one of claims 1 to 3, wherein the dual power balancing controller (30) comprises:
a balance logic unit (301) for generating a logic control signal to the logic driving unit (303) according to the balance control signal;
a logic driving unit (303) coupled to the balance logic unit, for outputting a first driving signal at a first control terminal Drv1 of the dual-power balance controller (30) according to a logic control signal; a second driving signal is outputted at a second control terminal Drv2 of the dual power balance controller (30).
6. A dual power balance controller, the dual power balance controller comprising:
a balance logic unit (301) for generating a logic control signal to the logic driving unit (303) according to the balance control signal;
a logic driving unit (303) coupled to the balancing logic unit, for outputting a first driving signal at a first control terminal Drv1 of the dual-power balancing controller (30) according to a logic control signal; a second driving signal is output at the second control terminal Drv2 of the dual power balance controller (30) according to any one of claims 1 to 3.
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| CN201910739064.6A CN112398210B (en) | 2019-08-12 | 2019-08-12 | Dual power supply system with current balance and dual power balance controller |
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| CN101771273A (en) * | 2008-12-31 | 2010-07-07 | 华硕电脑股份有限公司 | Current regulating device |
| CN102222976A (en) * | 2011-06-27 | 2011-10-19 | 深圳市英威腾电源有限公司 | Auxiliary power supply and power supply system for power system |
| CN102273036A (en) * | 2008-12-31 | 2011-12-07 | 凌力尔特有限公司 | Method and system for voltage independent power supply load sharing |
| CN109474060A (en) * | 2018-12-19 | 2019-03-15 | 电子科技大学中山学院 | Dual-power switching system and switching method |
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| US9891679B2 (en) * | 2011-12-22 | 2018-02-13 | Astec International Limited | Single phase redundant power supply systems for reducing phase current imbalances |
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| CN101771273A (en) * | 2008-12-31 | 2010-07-07 | 华硕电脑股份有限公司 | Current regulating device |
| CN102273036A (en) * | 2008-12-31 | 2011-12-07 | 凌力尔特有限公司 | Method and system for voltage independent power supply load sharing |
| CN102222976A (en) * | 2011-06-27 | 2011-10-19 | 深圳市英威腾电源有限公司 | Auxiliary power supply and power supply system for power system |
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