CN112270021B - Wireless self-destruction control circuit and method for security chip - Google Patents
Wireless self-destruction control circuit and method for security chip Download PDFInfo
- Publication number
- CN112270021B CN112270021B CN202011005188.0A CN202011005188A CN112270021B CN 112270021 B CN112270021 B CN 112270021B CN 202011005188 A CN202011005188 A CN 202011005188A CN 112270021 B CN112270021 B CN 112270021B
- Authority
- CN
- China
- Prior art keywords
- circuit
- destruction
- self
- authentication
- sub
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 33
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims abstract description 5
- 238000005474 detonation Methods 0.000 claims description 12
- 230000006870 function Effects 0.000 claims description 8
- 230000006378 damage Effects 0.000 claims description 4
- 230000003213 activating effect Effects 0.000 claims 1
- 238000007664 blowing Methods 0.000 claims 1
- 238000004806 packaging method and process Methods 0.000 claims 1
- 238000005538 encapsulation Methods 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 9
- 239000002360 explosive Substances 0.000 description 5
- 230000005540 biological transmission Effects 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/77—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in smart cards
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Computer Security & Cryptography (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Storage Device Security (AREA)
- Mobile Radio Communication Systems (AREA)
Abstract
The invention discloses a wireless self-destruction control circuit and a method for a security chip, wherein the wireless self-destruction control circuit comprises a control sub-circuit, and an authentication sub-circuit, a random number sub-circuit and an enabling state fuse wire which are connected with the control sub-circuit; the authentication sub-circuit is used for authenticating the analysis and the encapsulation of the data packet; the random number sub-circuit is used for generating random numbers required in the authentication flow and the self-destruction signal generation process; the enabling state fuse is used for enabling the wireless self-destruction control circuit and the like; the invention can solve the potential safety hazard that the common self-destruction safety chip cannot start self-destruction in time when in a runaway state by adding the wireless self-destruction control circuit into the common self-destruction safety chip. After the wireless self-destruction safety chip is electrified, the wireless self-destruction safety chip can immediately identify that the wireless self-destruction safety chip is in an out-of-control state, and timely starts a self-destruction process, so that key circuit structures and sensitive data in the safety chip are protected.
Description
Technical Field
The invention relates to the field of integrated circuits, in particular to a wireless self-destruction control circuit and method for a security chip.
Background
The attack means for the security chip can be divided into three types of invasive attack, non-invasive attack and semi-invasive attack, and corresponding protection circuits are designed in the common security chip, so that the attack difficulty and time cost of an attacker are improved as much as possible. If the self-destruction mechanism design is added into the self-destruction safety chip, the self-destruction can be started when the safety chip is attacked, and key circuits and sensitive data in the chip can be thoroughly destroyed in an explosive manner.
Fig. 1 is a schematic structure diagram of a common self-destruction safety chip, and the self-destruction function of the chip consists of a self-destruction control circuit and an on-chip explosive. When the security chip detects external attack, explosive on the chip can be detonated according to the security policy, and key circuits and sensitive data on the chip are destroyed.
The common self-destruction safety chip with the structure shown in the figure 1 can start self-destruction operation only when the safety chip detects effective external attack, and when the safety chip is stolen in a runaway state, the common self-destruction safety chip cannot detect the runaway of the chip and start self-destruction, so that certain potential safety hazard exists.
Disclosure of Invention
The invention aims to overcome the defects of the prior art, provides a wireless self-destruction control circuit and a method for a security chip, and can solve the potential safety hazard that the self-destruction cannot be started in time when the common self-destruction security chip is in an out-of-control state. After the wireless self-destruction safety chip is electrified, the wireless self-destruction safety chip can immediately identify that the wireless self-destruction safety chip is in an out-of-control state, and timely starts a self-destruction process, so that key circuit structures, sensitive data and the like in the safety chip are protected.
The invention aims at realizing the following scheme:
a wireless self-destruction control circuit for a security chip comprises a control sub-circuit, and an authentication sub-circuit, a random number sub-circuit and an enabling state fuse which are connected with the control sub-circuit; the authentication sub-circuit is used for authenticating the analysis and the encapsulation of the data packet; the random number sub-circuit is used for generating random numbers required in the authentication flow and the self-destruction signal generation process; the enable status fuse is used to enable the wireless self-destruction control circuit.
Further, the control sub-circuit comprises a finite state machine module, a command processing module, a self-destruction signal output module, a command return module and an authentication counting module; the finite state machine module is used for realizing the control of the working state of the circuit; the command processing module is used for completing the analysis of the air interface command; the self-destruction signal output module is used for generating a control signal for triggering the self destruction of the chip; the command return module is used for completing the sending of the air interface return data; the authentication counting module is used for completing authentication failure counting, and the overflow threshold value is configured by a user according to the security policy.
The wireless self-destruction control circuit comprises a wireless self-destruction control circuit, a modulation/demodulation sub-circuit, a memory, a clock sub-circuit, a power-on reset sub-circuit and an antenna, wherein the wireless self-destruction control circuit is used for generating a wireless self-destruction control signal, the power-on reset sub-circuit is used for generating a wireless self-destruction control signal, and the antenna is used for receiving and transmitting the wireless self-destruction control signal.
An authentication method for a wireless self-destruction control circuit of a security chip, the authentication sub-circuit 400 comprising the steps of:
s1, an authentication sub-circuit initiates authentication and sends an ID and a random number RN to a management and control device;
s2, the management and control equipment generates a corresponding authentication key AK by using the root key RK and the wireless self-destruction control circuit ID, encrypts RN by using AK and encrypts the encryption result E AK (RN) transmitting to a wireless self-destruction control circuit;
and S3, after receiving the ciphertext sent by the management and control equipment, the wireless self-destruction control circuit decrypts the ciphertext by using the built-in authentication key AK to obtain RN ', and the wireless self-destruction control circuit compares the RN and the RN ', if the RN and the RN ' are consistent, authentication passes, and otherwise, authentication fails.
A method of operation of a wireless self-destruct control circuit for a security chip, comprising:
step 1, after a security chip is powered on, a power-on reset sub-circuit of a wireless self-destruction control circuit completes the reset of a whole circuit;
step 2, the wireless self-destruction control circuit checks whether the enabling state bit is valid, if so, the wireless self-destruction control circuit enters the next working flow, the timer starts to count, and if not, the circuit stops working;
step 3, after the timer expires, the wireless self-destruction control circuit actively initiates authentication with the wireless management and control equipment end, if the authentication passes, the authentication failure counter is cleared and returns to a waiting timing state to wait for next authentication; if the authentication fails, the authentication failure counter is increased by 1, whether the authentication failure times exceeds a set threshold value is judged, when the authentication failure times does not exceed the set threshold value, the wireless self-destruction control circuit returns to a waiting timing state, and otherwise, a self-destruction signal is output.
Further, the enabling state bit of the wireless self-destruction control circuit is realized by a fuse, and after the security chip finishes the initial assembly of the password resource and is placed in a normal working area, the fuse is blown off to activate the wireless self-destruction function.
Further, the self-destruction signal output adopts an N-bit bus, and N is an odd number.
Further, the method comprises the step of starting a self-destruction detonation circuit:
the random number sub-circuit generates an N-1 bit random number RNG [ N-2:0], and performs bit exclusive OR operation on the N-1 bit random number RNG [ N-2:0] to obtain a result; when no out-of-control security chip is detected, outputting self-destruction signals EN_SD [ N-1:0] = { Σrng [ N-2:0], RNG [ N-2:0] }; when detecting that the security chip is out of control, outputting N-bit self-destruction signals EN_SD [ N-1:0] = { to; after the self-destruction detonation circuit receives EN_SD [ N-1:0], carrying out bit exclusive OR on the EN_SD [ N-1:0] to obtain a RESULT SD_RESULT; when sd_result=1, the self-destruct detonation circuit is activated.
The beneficial effects of the invention are as follows:
by adding the wireless self-destruction control circuit into the common self-destruction safety chip, the potential safety hazard that the self-destruction cannot be started in time when the common self-destruction safety chip is in an out-of-control state can be solved. After the wireless self-destruction safety chip is electrified, the wireless self-destruction safety chip can immediately identify that the wireless self-destruction safety chip is in an out-of-control state, and timely starts a self-destruction process, so that key circuit structures, sensitive data and the like in the safety chip are protected.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions of the prior art, the drawings which are used in the description of the embodiments or the prior art will be briefly described, it being obvious that the drawings in the description below are only some embodiments of the invention, and that other drawings can be obtained according to these drawings without inventive faculty for a person skilled in the art.
FIG. 1 is a block diagram of a generic self-destructing security chip;
FIG. 2 is a block diagram of a wireless self-destructing security chip;
FIG. 3 is a general block diagram of the present invention;
FIG. 4 is a workflow diagram of the present invention;
FIG. 5 is a flow chart of the operation of the authentication sub-circuit of the present invention;
FIG. 6 is a block diagram of a control sub-circuit according to the present invention;
in the figure, a control sub-circuit 100, a modulation/demodulation sub-circuit 200, a memory 300, an authentication sub-circuit 400, a random number sub-circuit 500, an enable state fuse 600, a clock sub-circuit 700, a power-on reset sub-circuit 800, an antenna 900, a finite state machine module 110, a command processing module 120, a self-destruction signal output module 130, a command returning module 140, and an authentication counting module 150 are illustrated.
Detailed Description
All of the features disclosed in all of the embodiments of this specification (including any accompanying claims, abstract and drawings), or all of the steps of any method or process so disclosed, may be combined and/or expanded, and substituted in any way, except for the mutually exclusive features and/or steps.
As shown in fig. 1 to 6, a wireless self-destruction control circuit for a security chip includes a control sub-circuit 100, and an authentication sub-circuit 400, a random number sub-circuit 500, and an enable state fuse 600 connected to the control sub-circuit 100; wherein the authentication sub-circuit 400 is used for authenticating the parsing and the encapsulation of the data packet; the random number sub-circuit 500 is used for generating a random number required in the authentication process and the self-destruction signal generation process; the enable status fuse 600 is used to enable the wireless self-destruct control circuit.
Further, the control sub-circuit 100 includes a finite state machine module 110, a command processing module 120, a self-destruction signal output module 130, a command return module 140, and an authentication count module 150; wherein the finite state machine module 110 is configured to implement circuit operation state control; the command processing module 120 is configured to complete parsing of the air interface command; the self-destruction signal output module 130 is used for generating a control signal for triggering the self destruction of the chip; the command return module 140 is configured to complete transmission of air interface return data; the authentication count module 150 is used to complete an authentication failure count, whose overflow threshold is configured by the user according to a security policy.
Further, the device comprises a modulation/demodulation sub-circuit 200, a memory 300, a clock sub-circuit 700, a power-on reset sub-circuit 800 and an antenna 900, wherein the modulation/demodulation sub-circuit 200 is used for demodulating a received radio frequency signal and modulating a transmitted radio frequency signal, the memory 300 is used for storing configuration data required by work, the clock sub-circuit 700 is used for generating an operating clock of the wireless self-destruction control circuit, the power-on reset sub-circuit 800 is used for generating a reset signal of the wireless self-destruction control circuit, and the antenna 900 is used for receiving and transmitting the wireless signal.
An authentication method for a wireless self-destruction control circuit of a security chip, the authentication sub-circuit 400 comprising the steps of:
s1, an authentication sub-circuit 400 initiates authentication and sends an ID and a random number RN to a management and control device;
s2, the management and control equipment generates a corresponding authentication key AK by using the root key RK and the wireless self-destruction control circuit ID, encrypts RN by using AK and encrypts the encryption result E AK (RN) transmitting to a wireless self-destruction control circuit;
and S3, after receiving the ciphertext sent by the management and control equipment, the wireless self-destruction control circuit decrypts the ciphertext by using the built-in authentication key AK to obtain RN ', and the wireless self-destruction control circuit compares the RN and the RN ', if the RN and the RN ' are consistent, authentication passes, and otherwise, authentication fails.
A method of operation of a wireless self-destruct control circuit for a security chip, comprising:
step 1, after a security chip is powered on, a power-on reset sub-circuit of a wireless self-destruction control circuit completes the reset of a whole circuit;
step 2, the wireless self-destruction control circuit checks whether the enabling state bit is valid, if so, the wireless self-destruction control circuit enters the next working flow, the timer starts to count, and if not, the circuit stops working;
step 3, after the timer expires, the wireless self-destruction control circuit actively initiates authentication with the wireless management and control equipment end, if the authentication passes, the authentication failure counter is cleared and returns to a waiting timing state to wait for next authentication; if the authentication fails, the authentication failure counter is increased by 1, whether the authentication failure times exceeds a set threshold value is judged, when the authentication failure times does not exceed the set threshold value, the wireless self-destruction control circuit returns to a waiting timing state, and otherwise, a self-destruction signal is output.
Further, the enabling state bit of the wireless self-destruction control circuit is realized by a fuse, and after the security chip finishes the initial assembly of the password resource and is placed in a normal working area, the fuse is blown off to activate the wireless self-destruction function.
Further, the self-destruction signal output adopts an N-bit bus, and N is an odd number.
Further, the method comprises the step of starting a self-destruction detonation circuit: the random number sub-circuit 500 generates an N-1 bit random number RNG [ N-2:0], which is bitwise XOR-operated to obtain a result RNG [ N-2:0]; when no out-of-control security chip is detected, outputting self-destruction signals EN_SD [ N-1:0] = { Σrng [ N-2:0], RNG [ N-2:0] }; when detecting that the security chip is out of control, outputting N-bit self-destruction signals EN_SD [ N-1:0] = { to; after the self-destruction detonation circuit receives EN_SD [ N-1:0], carrying out bit exclusive OR on the EN_SD [ N-1:0] to obtain a RESULT SD_RESULT; when sd_result=1, the self-destruct detonation circuit is activated.
Fig. 2 is a schematic structural diagram of a wireless self-destruction safety chip, and the self-destruction function on the chip is realized by a wireless self-destruction control circuit and an on-chip explosive, and the wireless self-destruction function is realized by matching with an external wireless control terminal.
Under normal conditions, the security chip is in the electromagnetic wave coverage range of the wireless control end, and the wireless self-destruction control circuit on the security chip periodically performs authentication on the wireless control end. When the safety chip leaves the control area, the wireless control circuit cannot finish authentication, so that the safety chip is judged to be out of control and the self-destruction signal is output to detonate the explosive on the sheet, and the physical self-destruction operation of the safety chip is finished.
Fig. 3 is an overall structure diagram of a wireless self-destruction control circuit of the present invention, which includes a control sub-circuit 100, a modulation/demodulation sub-circuit 200, a memory 300, an authentication sub-circuit 400, a random number sub-circuit 500, an enable status fuse 600, a clock sub-circuit 700, a power-on reset sub-circuit 800, and an antenna 900. Wherein the control sub-circuit 100 is responsible for controlling and scheduling other sub-circuits; the modulation/demodulation sub-circuit 200 demodulates the received radio frequency signal and modulates the transmitted radio frequency signal; the memory 300 holds configuration data required for work; the authentication sub-circuit 400 is responsible for authentication packet parsing and encapsulation; the random number sub-circuit 500 generates a random number required in the authentication process and the self-destruction signal generation process; the enable status fuse 600 is used to enable the wireless self-destruction control circuit; clock subcircuit 700 generates the operating clock of the wireless self-destruct control circuit; the power-on reset sub-circuit 800 generates a reset signal for the wireless self-destruction control circuit; antenna 900 is used for wireless signal reception and transmission.
FIG. 4 is a workflow of a wireless self-destruct control circuit, wherein after a security chip is powered on, a power-on reset sub-circuit of the wireless self-destruct control circuit completes the reset of the whole circuit; then, the wireless self-destruction control circuit checks whether the enabling state bit is valid, if so, the wireless self-destruction control circuit enters the next working flow, the timer starts to count, and if not, the circuit stops working; after the timer expires for a certain time, the wireless self-destruction control circuit actively initiates authentication with the wireless management and control end, if the authentication passes, the authentication failure counter is cleared and returns to a waiting timing state to wait for next authentication; if the authentication fails, the authentication failure counter is increased by 1, whether the authentication failure times exceeds a set threshold value is judged, when the authentication failure times does not exceed the set threshold value, the wireless self-destruction control circuit returns to a waiting timing state, and otherwise, a self-destruction signal is output. To prevent an attacker from turning off the enable signal of the wireless self-destruction control circuit, the enable status bit is implemented by a fuse. After the security chip completes the initial assembly of the password resource and is placed in a normal working area, the fuse is blown off again to activate the wireless self-destruction function.
Fig. 5 is an authentication flow of the authentication sub-circuit in the wireless self-destruction control circuit, and when the power-on reset of the wireless self-destruction control circuit is completed, the authentication sub-circuit initiates authentication and sends the self-ID and the random number RN to the management and control device. The management and control equipment generates a corresponding authentication key AK by using a root key RK and a wireless self-destruction control circuit ID, encrypts RN by using AK and adds an encryption result E AK (RN) sends the message to the wireless self-destruction control circuit. After receiving the ciphertext sent by the management and control equipment, the wireless self-destruction control circuit uses the built-in authentication key AK to decrypt to obtain RN'. The wireless self-destruction control circuit compares the RN and the RN ', if the RN and the RN' are consistent, the authentication is passed, otherwise, the authentication fails. The encryption and decryption operation of the authentication process adopts a grouping algorithm.
Fig. 6 is a block diagram of a control sub-circuit including a finite state machine module 110, a command processing module 120, a self-destruction signal output module 130, a command return module 140, and an authentication count module 150. Wherein the finite state machine module 110 implements circuit operating state control; the command processing module 120 completes the parsing of the air interface commands; the self-destruction signal output module 130 is used for generating a control signal for triggering the self destruction of the chip; the command return module 140 completes the transmission of the air interface return data; the authentication count module 150 completes the authentication failure count, whose overflow threshold may be configured by the user according to the security policy.
The self-destruction signal output adopts an N-bit bus, N is an odd number, the random number sub-circuit generates an N-1 bit random number RNG [ N-2:0], and the N-1 bit random number RNG [ N-2:0] is subjected to bit exclusive OR operation to obtain a result; when no out-of-control security chip is detected, outputting self-destruction signals EN_SD [ N-1:0] = { Σrng [ N-2:0], RNG [ N-2:0] }; when the out-of-control of the security chip is detected, an output N-bit self-destruction signal EN_SD [ N-1:0] = { - (. Times.) RNG [ N-2:0 ]), RNG [ N-2:0] }. After the self-destruction detonation circuit receives EN_SD [ N-1:0], the self-destruction detonation circuit performs bit exclusive OR on the EN_SD [ N-1:0] to obtain a RESULT SD_RESULT. When sd_result=1, the self-destruct detonation circuit is activated.
The invention can solve the potential safety hazard that the common self-destruction safety chip cannot start self-destruction in time when in a runaway state by adding the wireless self-destruction control circuit into the common self-destruction safety chip. After the wireless self-destruction safety chip is electrified, the wireless self-destruction safety chip can immediately identify that the wireless self-destruction safety chip is in an out-of-control state, and timely starts a self-destruction process, so that key circuit structures and sensitive data in the safety chip are protected.
The inventive functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on this understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
In addition to the foregoing examples, those skilled in the art will recognize from the foregoing disclosure that other embodiments can be made and in which various features of the embodiments can be interchanged or substituted, and that such modifications and changes can be made without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (8)
1. An authentication method for a wireless self-destruction control circuit of a security chip, characterized in that an authentication sub-circuit (400) comprises the steps of:
s1, an authentication sub-circuit (400) initiates authentication and sends an ID and a random number RN to a management and control device;
s2, the management and control equipment generates a corresponding authentication key AK by using the root key RK and the wireless self-destruction control circuit ID, encrypts RN by using AK and encrypts the encryption result E AK (RN) transmitting to a wireless self-destruction control circuit;
and S3, after receiving the ciphertext sent by the management and control equipment, the wireless self-destruction control circuit decrypts the ciphertext by using the built-in authentication key AK to obtain RN ', and the wireless self-destruction control circuit compares the RN and the RN ', if the RN and the RN ' are consistent, authentication passes, and otherwise, authentication fails.
2. A method of operating a wireless self-destruct control circuit for a security chip, comprising:
step 1, after a security chip is powered on, a power-on reset sub-circuit of a wireless self-destruction control circuit completes the reset of a whole circuit;
step 2, the wireless self-destruction control circuit checks whether the enabling state bit is valid, if so, the wireless self-destruction control circuit enters the next working flow, the timer starts to count, and if not, the circuit stops working;
step 3, after the timer expires, the wireless self-destruction control circuit actively initiates authentication with the wireless management and control equipment end, if the authentication passes, the authentication failure counter is cleared and returns to a waiting timing state to wait for next authentication; if the authentication fails, the authentication failure counter is increased by 1, whether the authentication failure times exceeds a set threshold value is judged, when the authentication failure times does not exceed the set threshold value, the wireless self-destruction control circuit returns to a waiting timing state, and otherwise, a self-destruction signal is output.
3. The method of claim 2, wherein the enabling status of the wireless self-destruction control circuit is implemented by a fuse, and the wireless self-destruction function is activated by blowing the fuse after the security chip completes the initial loading of the cryptographic resource and is placed in the normal operating area.
4. The method of claim 2, wherein the self-destruct signal output is an N-bit bus, and N is an odd number.
5. A method of operating a wireless self-destruct control circuit for a security chip according to any one of claims 2 to 3 including the step of activating a self-destruct detonation circuit:
the random number sub-circuit (500) generates an N-1 bit random number RNG [ N-2:0], and performs bit exclusive OR operation on the N-1 bit random number RNG [ N-2:0] to obtain a result; when no out-of-control security chip is detected, outputting self-destruction signals EN_SD [ N-1:0] = { Σrng [ N-2:0], RNG [ N-2:0] }; when the out-of-control of the security chip is detected, an output N-bit self-destruction signal EN_SD [ N-1:0] = { - (-) RNG [ N-2:0 ]), RNG [ N-2:0] }; after the self-destruction detonation circuit receives EN_SD [ N-1:0], carrying out bit exclusive OR on the EN_SD [ N-1:0] to obtain a RESULT SD_RESULT; when sd_result=1, the self-destruct detonation circuit is activated.
6. A wireless self-destruction control circuit for a security chip, characterized by comprising a control sub-circuit (100), and an authentication sub-circuit (400), a random number sub-circuit (500), an enable state fuse (600) connected with the control sub-circuit (100), and executing the working method of the wireless self-destruction control circuit for a security chip as claimed in claim 2; wherein the authentication sub-circuit (400) is configured to perform the authentication method for the wireless self-destruction control circuit of the security chip according to claim 1 when the authentication sub-circuit is configured to authenticate the parsing and the packaging of the data packet; the random number sub-circuit (500) is used for generating random numbers required in the authentication flow and the self-destruction signal generation process; the enable status fuse (600) is used to enable the wireless self-destruct control circuit.
7. The wireless self-destruction control circuit for a security chip of claim 6, wherein the control sub-circuit (100) includes a finite state machine module (110), a command processing module (120), a self-destruction signal output module (130), a command return module (140), and an authentication counting module (150); wherein the finite state machine module (110) is used for realizing the control of the working state of the circuit; the command processing module (120) is used for completing the analysis of the air interface command; the self-destruction signal output module (130) is used for generating a control signal for triggering the self destruction of the chip; the command return module (140) is used for completing the sending of the air interface return data; the authentication count module (150) is configured to complete an authentication failure count, the overflow threshold of which is configured by the user according to the security policy.
8. The wireless self-destruction control circuit for a security chip of claim 6, comprising a modulation/demodulation sub-circuit (200), a memory (300), a clock sub-circuit (700), a power-on reset sub-circuit (800) and an antenna (900), the modulation/demodulation sub-circuit (200) being configured to demodulate a received radio frequency signal and modulate a transmitted radio frequency signal, the memory (300) being configured to hold configuration data required for operation, the clock sub-circuit (700) being configured to generate an operation clock for the wireless self-destruction control circuit, the power-on reset sub-circuit (800) being configured to generate a reset signal for the wireless self-destruction control circuit, the antenna (900) being configured to receive and transmit the wireless signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011005188.0A CN112270021B (en) | 2020-09-23 | 2020-09-23 | Wireless self-destruction control circuit and method for security chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011005188.0A CN112270021B (en) | 2020-09-23 | 2020-09-23 | Wireless self-destruction control circuit and method for security chip |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN112270021A CN112270021A (en) | 2021-01-26 |
| CN112270021B true CN112270021B (en) | 2024-03-26 |
Family
ID=74349446
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011005188.0A Active CN112270021B (en) | 2020-09-23 | 2020-09-23 | Wireless self-destruction control circuit and method for security chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112270021B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115378657B (en) * | 2022-07-26 | 2024-02-20 | 电子科技大学 | Authentication synchronization method based on integrated circuit internal temperature sensing |
Citations (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2503424A1 (en) * | 1981-04-03 | 1982-10-08 | Thomson Csf | Self destructing solid state store for secret information - uses solid state memories to store data and requires access code to match stored code supply fuse is not to be melted |
| US5247577A (en) * | 1992-05-13 | 1993-09-21 | Intel Corporation | Methods and apparatus for securely enabling features in highly integrated electronic circuits |
| EP0605356A1 (en) * | 1992-12-30 | 1994-07-06 | Instalaza S.A. | Self-destructive electronic fuse |
| CN102157198A (en) * | 2010-02-11 | 2011-08-17 | 西安奇维测控科技有限公司 | Electronic hard disk for supporting remote self-destruction of short message and data self-destruction method |
| CN102799819A (en) * | 2012-07-04 | 2012-11-28 | 北京京航计算通讯研究所 | Embedded software safety protection system |
| CN103378056A (en) * | 2012-04-12 | 2013-10-30 | 北京理工大学 | Integrated circuit chip-level self-destructive method based on MEMS metal bridge transducer element structure and structure thereof |
| CN105653986A (en) * | 2015-12-25 | 2016-06-08 | 成都三零嘉微电子有限公司 | Micro SD card-based data protection method and device |
| CN106156827A (en) * | 2016-07-29 | 2016-11-23 | 福州瑞芯微电子股份有限公司 | A kind of chip information protection device and method |
| CN106295404A (en) * | 2015-06-17 | 2017-01-04 | 北京虎符科技有限公司 | Integrated SOC based on security kernel |
| CN106791130A (en) * | 2016-12-28 | 2017-05-31 | 宇龙计算机通信科技(深圳)有限公司 | Self-destruction processing method and terminal after a kind of terminal robber |
| CN106933132A (en) * | 2015-12-30 | 2017-07-07 | 娄文忠 | A kind of system and its self-destruction method that intelligent self-destruction is realized based on wireless networking |
| CN106960822A (en) * | 2017-03-30 | 2017-07-18 | 中国电子科技集团公司第二十四研究所 | A kind of integrated circuit self-destruction circuit and method that technology is trimmed based on fuse |
| CN207198856U (en) * | 2017-08-31 | 2018-04-06 | 中国人民解放军海军医学研究所 | Physical security protection circuit |
| CN110733460A (en) * | 2019-11-28 | 2020-01-31 | 江苏迈隆电子科技有限公司 | Self-destruction device and method for automobile key box |
| CN110766383A (en) * | 2018-07-27 | 2020-02-07 | 中城智慧科技有限公司 | Digital wallet supporting anonymous or real-name offline transaction and use method |
| CN111566810A (en) * | 2017-11-24 | 2020-08-21 | 韩国电子通信研究院 | Self-destruction apparatus and method, and semiconductor chip using the same |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9842812B2 (en) * | 2014-03-24 | 2017-12-12 | Honeywell International Inc. | Self-destructing chip |
| US20160241999A1 (en) * | 2015-02-16 | 2016-08-18 | Polaris Tech Global Limited | Cross-platform automated perimeter access control system and method adopting selective adapter |
-
2020
- 2020-09-23 CN CN202011005188.0A patent/CN112270021B/en active Active
Patent Citations (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2503424A1 (en) * | 1981-04-03 | 1982-10-08 | Thomson Csf | Self destructing solid state store for secret information - uses solid state memories to store data and requires access code to match stored code supply fuse is not to be melted |
| US5247577A (en) * | 1992-05-13 | 1993-09-21 | Intel Corporation | Methods and apparatus for securely enabling features in highly integrated electronic circuits |
| EP0605356A1 (en) * | 1992-12-30 | 1994-07-06 | Instalaza S.A. | Self-destructive electronic fuse |
| CN102157198A (en) * | 2010-02-11 | 2011-08-17 | 西安奇维测控科技有限公司 | Electronic hard disk for supporting remote self-destruction of short message and data self-destruction method |
| CN103378056A (en) * | 2012-04-12 | 2013-10-30 | 北京理工大学 | Integrated circuit chip-level self-destructive method based on MEMS metal bridge transducer element structure and structure thereof |
| CN102799819A (en) * | 2012-07-04 | 2012-11-28 | 北京京航计算通讯研究所 | Embedded software safety protection system |
| CN106295404A (en) * | 2015-06-17 | 2017-01-04 | 北京虎符科技有限公司 | Integrated SOC based on security kernel |
| CN105653986A (en) * | 2015-12-25 | 2016-06-08 | 成都三零嘉微电子有限公司 | Micro SD card-based data protection method and device |
| CN106933132A (en) * | 2015-12-30 | 2017-07-07 | 娄文忠 | A kind of system and its self-destruction method that intelligent self-destruction is realized based on wireless networking |
| CN106156827A (en) * | 2016-07-29 | 2016-11-23 | 福州瑞芯微电子股份有限公司 | A kind of chip information protection device and method |
| CN106791130A (en) * | 2016-12-28 | 2017-05-31 | 宇龙计算机通信科技(深圳)有限公司 | Self-destruction processing method and terminal after a kind of terminal robber |
| CN106960822A (en) * | 2017-03-30 | 2017-07-18 | 中国电子科技集团公司第二十四研究所 | A kind of integrated circuit self-destruction circuit and method that technology is trimmed based on fuse |
| CN207198856U (en) * | 2017-08-31 | 2018-04-06 | 中国人民解放军海军医学研究所 | Physical security protection circuit |
| CN111566810A (en) * | 2017-11-24 | 2020-08-21 | 韩国电子通信研究院 | Self-destruction apparatus and method, and semiconductor chip using the same |
| CN110766383A (en) * | 2018-07-27 | 2020-02-07 | 中城智慧科技有限公司 | Digital wallet supporting anonymous or real-name offline transaction and use method |
| CN110733460A (en) * | 2019-11-28 | 2020-01-31 | 江苏迈隆电子科技有限公司 | Self-destruction device and method for automobile key box |
Non-Patent Citations (7)
| Title |
|---|
| A Comparative and Analytical Study on Symmetric Key Cryptography;Bidisha Mandal 等;2014 International Conference on Electronics, Communication and Computational Engineering (ICECCE);第131-136页 * |
| Designing self-destructing wireless sensors with security and performance assurance;Yu Li 等;Computer Networks Computer Networks 141 (2018);第44-56页 * |
| 一种用于安全芯片的光检测防护电路;朱翔 等;通信技术;第50卷(第7期);第1581-1586页 * |
| 一种用于安全芯片的无线自毁电路;范伟力 等;通信技术;第53卷(第11期);第2855-2861页 * |
| 基于AES加密电路的防复制电路及系统设计;张玉浩;徐志鹏;黄新锐;胡航;单伟伟;;电子器件(第01期);第107-111页 * |
| 智能卡芯片安全技术;赵丽华, 卢旭英;网络安全技术与应用(第04期);第30-32页 * |
| 自毁技术与装置研究;郝英好;赵楠;线珊珊;;中国高新技术企业(第14期);第36-38页 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN112270021A (en) | 2021-01-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3890510B2 (en) | Method for cryptographic authentication in a radio frequency identification system | |
| CA2554300C (en) | System and method for encrypted smart card pin entry | |
| KR100931507B1 (en) | Communication Data protection Method based on Symmetric Key Encryption in RFID system, AND APPARATUS FOR ENABLING THE METHOD | |
| CN105933277B (en) | Communication system and communication device | |
| Lu et al. | LEAP: A lightweight encryption and authentication protocol for in-vehicle communications | |
| CN102916957B (en) | Safe, reliable and low-cost RFID mutual authentication method | |
| US20110200189A1 (en) | Encoder and decoder apparatus and methods with key generation | |
| US20050061875A1 (en) | Method and apparatus for a secure RFID system | |
| CN103258169B (en) | Method, chip card and chip card terminal that protection chip card is used without permission | |
| CN110909338B (en) | Security authentication method and system based on security chip and security chip | |
| Tung et al. | Layers of security for active RFID tags | |
| JP2019057167A (en) | Computer program, device and determining method | |
| CN112270021B (en) | Wireless self-destruction control circuit and method for security chip | |
| Wagner et al. | Take a bite of the reality sandwich: revisiting the security of progressive message authentication codes | |
| US8683211B2 (en) | Method of projecting a secure USB key | |
| KR20060132652A (en) | Method for detecting illegal modifications made to manufacturer software | |
| TW202133010A (en) | Method for remotely activating a remote lock system using cryptography and the remote lock system for implementing the method | |
| Solomon et al. | Limon-lightweight authentication for tire pressure monitoring sensors | |
| CN106658484A (en) | Method for preventing wireless network attacks, terminal and wireless access point | |
| KR101318668B1 (en) | Portable memory card having information security function | |
| Tashiro et al. | A secure protocol consisting of two different security-level message authentications over CAN | |
| CN108073818B (en) | Data protection circuit of chip, chip and electronic equipment | |
| US20140208422A1 (en) | Passing Hidden Information Using Attack Detectors | |
| EP3252993B1 (en) | Authentication of a card by contactless reading | |
| CN114422556A (en) | FlexCan bus controller based on SRAM PUF |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |