CN112150976A - Power-down screen cleaning method for liquid crystal display screen - Google Patents
Power-down screen cleaning method for liquid crystal display screen Download PDFInfo
- Publication number
- CN112150976A CN112150976A CN201910572851.6A CN201910572851A CN112150976A CN 112150976 A CN112150976 A CN 112150976A CN 201910572851 A CN201910572851 A CN 201910572851A CN 112150976 A CN112150976 A CN 112150976A
- Authority
- CN
- China
- Prior art keywords
- liquid crystal
- crystal display
- power
- screen
- display screen
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0257—Reduction of after-image effects
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Liquid Crystal (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention provides a power-down screen cleaning method of a liquid crystal display screen, which comprises the following steps: when the liquid crystal display screen works normally, a power supply outside a driving chip of the liquid crystal display screen generates a first digital logic power supply voltage; when the driving chip detects that the voltage of the external power supply is lower than a preset voltage value, the second digital logic power supply voltage is started to supplement the first digital logic power supply voltage, so that the digital logic power-down time is prolonged, the driving chip is convenient to open all grid circuit switches to complete the discharging and screen-clearing operation of the liquid crystal display screen, the phenomena of ghosting and liquid crystal polarization during abnormal power-down are avoided, and the overall performance of the liquid crystal display screen is improved.
Description
Technical Field
The invention relates to a power-down screen cleaning method of a liquid crystal display screen.
Background
With the increasing popularization of smart phones, people also put higher and higher requirements on the display effect of mobile intelligent terminals, and the wide-screen high-resolution high-performance display effect becomes the mainstream. Therefore, the display driver chip functionality and performance of the handheld device also pose increasing challenges.
With the wide application of thin film transistor liquid crystal displays (TFT LCDs) in electronic devices, the display quality greatly affects the user experience. For example, in the case of abnormal power failure (battery removal during operation, forced restart, etc.), a terminal such as a mobile phone may generate ghost and power-on screen flash. This is because there is no discharge path for residual charges between the data line and the common electrode after sudden power failure, and thus a potential difference is generated to cause a polarization phenomenon of the liquid crystal.
Fig. 1 is a schematic circuit diagram of a conventional driving chip with off-chip capacitor for driving a liquid crystal display. The liquid crystal display comprises a liquid crystal display screen 1, a driving chip 2 for driving the liquid crystal display screen 1, a power supply 3 positioned outside the driving chip 2 and an off-chip voltage stabilizing capacitor 4. The external power supply 3 provides a battery voltage VCI, and a power generation module 5 inside the driving chip 2 generates a source driving voltage AVDD/AVEE (+ 5/-5V) required by the source driving module 6, a gate driving voltage VGH/VGL (+ 10/-10V) required by the gate driving module 7, and a digital logic power supply voltage DVDD required by the digital logic module 8.
The driving chip 2 scans the liquid crystal display screen line by line through the gate driving signal after detecting the abnormal power failure, that is, the external power supply voltage VCI is lower than the preset voltage value, that is, sends a screen clearing frame, thereby thoroughly discharging the residual charge. Fig. 2 is a waveform diagram of a conventional lcd screen with power-down and screen-clearing. VCI is external power supply voltage, G1-Gn are gate switching signals of n rows of TFT transistors, the high potential of the gate switching signals is VGH, the low potential of the gate switching signals is VGL, the conduction time of the TFT transistors is t1, and the conduction time interval of two rows is t 2. Sx is a source driving signal, the positive driving voltage is AVDD, and the negative driving voltage is AVEE. When the power failure of a power supply is detected, G1-Gn are sequentially turned on, a source electrode driving signal is GND, and residual charges of the liquid crystal display screen are discharged to the ground.
In some cases supported by the liquid crystal display panel driving circuit, the gate circuit switches of the TFT transistors of all rows may be turned on at the same time to perform power-off. During this period, the power supply required by the driving chip is from the residual charge stored in the off-chip voltage stabilizing capacitor 4 (about 1 muF-2 muF).
As the screen size increases, the load current of the LCD driver chip also increases. After abnormal power failure, the time that the off-chip voltage stabilizing capacitor 4 of the LCD driving chip can maintain is shorter and shorter. Therefore, the screen clearing frame after the abnormal power failure may not be enough to be scanned in a short time, so that the residual charge of the liquid crystal panel cannot be completely discharged.
In order to save the chip cost, the LCD driving chip is gradually implemented by using a scheme of zero off-chip capacitance. Fig. 3 is a schematic circuit diagram of a conventional driving chip with three power supplies and zero off-chip capacitance for driving a liquid crystal display. The display device comprises a liquid crystal display screen 101, a driving chip 102 for driving the liquid crystal display screen 101, and a power supply 103 located outside the driving chip 102. The voltage-stabilizing capacitor (about several nF) is disposed inside the power generation module 105 (such as a charge pump), and the limited chip area makes the internal voltage-stabilizing capacitor difficult to be compared with the original off-chip capacitance value; meanwhile, in high resolution applications, an external power chip 103 is also required for an excessive load, for example, a power supply VDDI (1.8V), source driving power supply voltages AVDD and AVEE are provided by a motherboard power management chip, i.e., a so-called three-power supply mode.
The digital logic power voltage DVDD (about 1.5V) required for driving the digital logic module 108 in the chip 102 is generated by an LDO (low dropout linear regulator) in the VDDI power domain. The large digital logic size and image processing algorithms result in a dramatic increase in the load on the digital logic power supply. Therefore, in the LCD driving chip with zero capacitance, the time of abnormal power failure is shorter, and the digital logic power supply is powered down in preference to other power supplies, so that a clock required by the digital logic cannot be generated in a short time after the power failure, and when the voltage DVDD of the digital logic power supply is lower than about one transistor threshold, the digital logic cannot normally work, so that a series of instructions required by screen clearing frames cannot be completed, and the phenomena of image sticking and liquid crystal polarization during the abnormal power failure are caused.
Disclosure of Invention
The invention aims to provide a power-down screen cleaning method of a liquid crystal display screen, which avoids the phenomena of ghost shadow and liquid crystal polarization during abnormal power-down and improves the overall performance of the liquid crystal display screen.
Based on the consideration, the invention provides a power-down screen clearing method of a liquid crystal display screen, which comprises the following steps: when the liquid crystal display screen works normally, a power supply outside a driving chip of the liquid crystal display screen generates a first digital logic power supply voltage; when the driving chip detects that the voltage of the external power supply is lower than the preset voltage value, the second digital logic power supply voltage is started to supplement the first digital logic power supply voltage so as to prolong the power-down time of the digital logic, and the driving chip is convenient to open all the grid circuit switches to complete the discharging and screen cleaning operation of the liquid crystal display screen.
Preferably, the second digital logic power supply voltage is generated by a source driving voltage or a gate driving voltage or an external power supply voltage higher than the first digital logic power supply voltage.
Preferably, the second digital logic supply voltage is equal to or similar to the first digital logic supply voltage.
Preferably, when the driving chip detects that the voltage of the external power supply is lower than a preset voltage value and the holding time is longer than the preset time, the driving chip judges that the power failure is real, so that the discharging and screen clearing operation of the liquid crystal display screen is triggered.
Preferably, the driving chip provides a clock signal of the gate circuit for turning on the gate circuit switch, and the frequency of the clock signal is increased to be higher than that of the clock signal for normal operation of the driving chip, so that the time required by the discharging and screen clearing operation is shortened.
Preferably, the clock signal turns on the gate circuit switches of all rows row by row or simultaneously.
Preferably, the power-down screen clearing method for the liquid crystal display screen further includes: and turning off the module irrelevant to the discharging and screen clearing operation to prolong the power-down time of the first digital logic power supply voltage.
Preferably, the module for turning off the discharge screenout operation independently comprises: and closing the interface of the mobile industrial processor and the logic function of the digital internal part, closing the source electrode driving circuit, grounding the output of all display channels, closing the common voltage module and closing the gamma module.
Preferably, the voltage-stabilizing capacitor of the driving chip is arranged inside the driving chip or outside the driving chip.
The power-down screen cleaning method of the liquid crystal display screen comprises the following steps: when the liquid crystal display screen works normally, a power supply outside a driving chip of the liquid crystal display screen generates a first digital logic power supply voltage; when the driving chip detects that the voltage of the external power supply is lower than a preset voltage value, the second digital logic power supply voltage is started to supplement the first digital logic power supply voltage, so that the digital logic power-down time is prolonged, the driving chip is convenient to open all grid circuit switches to complete the discharging and screen-clearing operation of the liquid crystal display screen, the phenomena of ghosting and liquid crystal polarization during abnormal power-down are avoided, and the overall performance of the liquid crystal display screen is improved.
Drawings
Other features, objects and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments thereof, which proceeds with reference to the accompanying drawings.
FIG. 1 is a schematic circuit diagram of a conventional LCD panel driven by a driving chip with an off-chip capacitor;
FIG. 2 is a waveform diagram of a conventional LCD screen for clearing screen when power is off;
FIG. 3 is a schematic circuit diagram of a conventional LCD panel driven by a driving chip with an off-chip capacitor;
fig. 4 is a schematic diagram of a power-down screen clearing method of a liquid crystal display screen according to a preferred embodiment of the invention;
fig. 5 is a waveform diagram illustrating a power-down screen clearing method of a liquid crystal display panel according to another preferred embodiment of the present invention;
fig. 6 is a flowchart of a power-down screen clearing method of a liquid crystal display according to another preferred embodiment of the present invention.
In the drawings, like or similar reference numbers indicate like or similar devices (modules) or steps throughout the different views.
Detailed Description
In order to solve the problems in the prior art, the invention provides a power-down screen cleaning method of a liquid crystal display screen, which comprises the following steps: when the liquid crystal display screen works normally, a power supply outside a driving chip of the liquid crystal display screen generates a first digital logic power supply voltage; when the driving chip detects that the voltage of the external power supply is lower than a preset voltage value, the second digital logic power supply voltage is started to supplement the first digital logic power supply voltage, so that the digital logic power-down time is prolonged, the driving chip is convenient to open all grid circuit switches to complete the discharging and screen-clearing operation of the liquid crystal display screen, the phenomena of ghosting and liquid crystal polarization during abnormal power-down are avoided, and the overall performance of the liquid crystal display screen is improved.
In the following detailed description of the preferred embodiments, reference is made to the accompanying drawings which form a part hereof. The accompanying drawings illustrate, by way of example, specific embodiments in which the invention may be practiced. The illustrated embodiments are not intended to be exhaustive of all embodiments according to the invention. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present invention. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the present invention is defined by the appended claims.
Fig. 4 is a schematic diagram illustrating a power-down screen clearing method of a liquid crystal display according to a preferred embodiment of the present invention. The method of the present invention is applicable to the case that the voltage-stabilizing capacitor is disposed inside the driving chip or outside the driving chip, and the case of the built-in voltage-stabilizing capacitor is taken as an example and not a limitation here.
When the LCD driver chip operates in the three-power mode, a first digital logic power voltage DVDD (1.55V) is generated by VDDI (1.8V), and its regulated voltage is contained inside the chip (about several nF). The source driving voltage AVDD comes from a mobile phone mainboard, and the voltage stabilizing capacitance of the source driving voltage AVDD is far larger than a few nF, so that the current discharging speed of the source driving voltage AVDD is far smaller than that of the first digital logic power supply voltage DVDD when abnormal power failure occurs. Therefore, the present invention adds a second digital logic power voltage DVDD2 generated by the source driving voltage AVDD, whose output is shorted with the first digital logic power voltage DVDD. During normal operation of the lcd panel, the second digital logic supply voltage DVDD2 is turned off. The second digital logic power supply voltage DVDD2 is enabled when an abnormal power down is detected (i.e., when the external power supply voltage VDDI is detected to be lower than the preset voltage value V _ DET). Because the source driving voltage AVDD has a slow discharging speed, the second digital logic power supply voltage DVDD2 can prolong the digital logic power-down time, and a schematic diagram of a power-down detection process is shown in fig. 4, wherein a dotted line is a digital logic power-down waveform diagram which does not adopt the second digital logic power supply voltage DVDD2 in the prior art, and a solid line is a digital logic power-down waveform diagram which adopts the second digital logic power supply voltage DVDD2 as supplement in the invention, it can be seen that the second digital logic power supply voltage DVDD2 as supplement of the first digital logic power supply voltage DVDD can prolong the digital logic power-down time, so that a driving chip can open all gate circuit switches to complete the discharging and screen-clearing operations of the liquid crystal display screen, thereby preventing the phenomena of image retention and liquid crystal polarization during abnormal power-down and improving the overall performance of the liquid crystal display screen.
Those skilled in the art will appreciate that the second digital logic supply voltage DVDD2 may also be generated by the gate drive voltage VGH/VGL or an external supply voltage higher than the first digital logic supply voltage DVDD. Preferably, the second digital logic supply voltage DVDD2 is equal to or similar to the first digital logic supply voltage DVDD.
According to the power-down screen clearing method of the liquid crystal display screen, when the liquid crystal display screen normally works, a power supply outside a driving chip of the liquid crystal display screen generates a first digital logic power supply voltage DVDD; when the driving chip detects that the external power supply voltage (for example, VCI/VDDI) is lower than the preset voltage value, the second digital logic power supply voltage DVDD2 is started to supplement the first digital logic power supply voltage DVDD so as to prolong the power-down time of the digital logic, and the driving chip is convenient to open all gate circuit switches to complete the discharging and screen-cleaning operation of the liquid crystal display screen, so that the phenomena of image retention and liquid crystal polarization during abnormal power-down are avoided, and the overall performance of the liquid crystal display screen is improved.
Fig. 5 is a waveform diagram illustrating a power-down screen clearing method of a liquid crystal display according to another preferred embodiment of the present invention.
Generally, when it is detected that the external power supply voltage (e.g., VCI/VDDI) is lower than the preset voltage value V _ DET, the clock signal of the gate circuit is provided by the driving chip for turning on the gate circuit switches, e.g., turning on the gate circuit switches row by row or simultaneously turning on the gate circuit switches of all rows, to complete the discharging and clearing operation of the liquid crystal display. In this embodiment, preferably, when the voltage of the external power supply is lower than the preset voltage value V _ DET, the detection circuit generates an enable signal to increase the clock frequency of the gate driving circuit, and since the discharged residual charges are smaller than the turn-on time of the TFTs required in the normal display, the turn-on time t1 of the TFT transistors in each row is shortened to t3, and the interval time t2 of each row is shortened to t4, so that the screen clearing frame is completed in a shorter time. That is to say, the clock signal frequency of the gate driving circuit is increased to be higher than the clock signal frequency of the driving chip for normal operation, so that the time required by the discharging and screen cleaning operation is further shortened, the phenomena of image sticking and liquid crystal polarization during abnormal power failure are avoided, and the overall performance of the liquid crystal display screen is improved.
In addition, the power-down screen clearing method of the liquid crystal display screen can further comprise the following steps: and after detecting that the power supply is powered down, closing a module irrelevant to the discharging screen clearing operation to prolong the power-down time of the first digital logic power supply voltage DVDD. For example, a Mobile Industry Processor (MIPI) interface with large power consumption and a digital internal part logic function are turned off to reduce the load of the digital internal part logic function on the DVDD; turning off the source driving circuit and grounding output signals GND of all display channels to reduce the load of AVDD; turning off a common Voltage (VCOM) module; turn off GAMMA (GAMMA) module, etc. Therefore, the digital logic power-down time which is long enough is ensured as far as possible, and the driving chip is convenient to open all grid circuit switches to complete the discharging and screen-clearing operation of the liquid crystal display screen, so that the phenomena of residual shadow and liquid crystal polarization during abnormal power-down are avoided, and the overall performance of the liquid crystal display screen is improved.
Fig. 6 is a flowchart illustrating a power-down screen clearing method of a liquid crystal display according to still another preferred embodiment of the present invention.
In the daily use process, due to ESD (electrostatic discharge) or other external interference, the voltage of an external power supply can fluctuate greatly, and when the fluctuation range of the voltage of the external power supply reaches a preset power failure detection threshold value V _ DET, the power failure screen cleaning operation can be triggered mistakenly, so that the screen is influenced by short-time black screen to be used and experienced. In order to prevent false triggering of power-down screen clearing operation, after the analog module detects power-down, the analog module sends a digital logic one enabling signal, and when the signal maintaining time is longer than T0, the digital logic one enabling signal is judged to be true power-down, so that some series of screen clearing operation are triggered. Otherwise, the screen clearing operation is not triggered. The method can avoid false triggering of power failure screen cleaning caused by the instant fluctuation of abnormal power supply voltage.
When the detection circuit judges that the power failure is real, the module irrelevant to the discharging screen clearing operation is closed to prolong the power failure time of the first digital logic power supply voltage DVDD, the second digital logic power supply voltage DVDD2 is started to be used as supplement of the first digital logic power supply voltage DVDD to prolong the digital logic power failure time, the clock signal frequency of the grid driving circuit can be increased to be higher than the clock signal frequency of the driving chip for normal work, the time required by the discharging screen clearing operation is further shortened to complete the discharging screen clearing operation of the liquid crystal display screen, the phenomena of ghost shadow and liquid crystal polarization during abnormal power failure are avoided, and the overall performance of the liquid crystal display screen is improved.
The power-down screen cleaning method of the liquid crystal display screen comprises the following steps: when the liquid crystal display screen works normally, a power supply outside a driving chip of the liquid crystal display screen generates a first digital logic power supply voltage; when the driving chip detects that the voltage of the external power supply is lower than a preset voltage value, the second digital logic power supply voltage is started to supplement the first digital logic power supply voltage, so that the digital logic power-down time is prolonged, the driving chip is convenient to open all grid circuit switches to complete the discharging and screen-clearing operation of the liquid crystal display screen, the phenomena of ghosting and liquid crystal polarization during abnormal power-down are avoided, and the overall performance of the liquid crystal display screen is improved.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive. Furthermore, it will be obvious that the word "comprising" does not exclude other elements or steps, and the word "a" or "an" does not exclude a plurality. Several elements recited in the apparatus claims may also be implemented by one element. The terms first, second, etc. are used to denote names, but not any particular order.
Claims (9)
1. A power-down screen clearing method of a liquid crystal display screen is characterized by comprising the following steps:
when the liquid crystal display screen works normally, a power supply outside a driving chip of the liquid crystal display screen generates a first digital logic power supply voltage;
when the driving chip detects that the voltage of the external power supply is lower than the preset voltage value,
and starting the second digital logic power supply voltage to supplement the first digital logic power supply voltage so as to prolong the power-down time of the digital logic, and facilitating the driving chip to open all the grid circuit switches to finish the discharging and screen cleaning operation of the liquid crystal display screen.
2. The power down clear method of the liquid crystal display panel as claimed in claim 1, wherein the second digital logic power voltage is generated by a source driving voltage or a gate driving voltage or an external power voltage higher than the first digital logic power voltage.
3. The method for clearing a liquid crystal display screen from power loss of claim 1, wherein the second digital logic supply voltage is equal to or similar to the first digital logic supply voltage.
4. The power-down screen clearing method of the liquid crystal display screen as claimed in claim 1, wherein when the driving chip detects that the voltage of the external power supply is lower than a preset voltage value and the maintaining time is longer than a preset time, the power-down is judged to be true power-down, so that the discharging screen clearing operation of the liquid crystal display screen is triggered.
5. The power-down screen clearing method for the liquid crystal display screen as claimed in claim 1, wherein the driving chip provides a clock signal of the gate circuit for turning on the gate circuit switch, and the frequency of the clock signal is increased to be higher than that of the clock signal for the driving chip to normally operate, thereby shortening the time required for the discharging screen clearing operation.
6. The power-down screen cleaning method for the liquid crystal display screen according to claim 5, wherein the clock signal turns on the gate circuit switches of all the rows row by row or simultaneously.
7. The power-down screen clearing method for the liquid crystal display screen according to claim 1, further comprising: and turning off the module irrelevant to the discharging and screen clearing operation to prolong the power-down time of the first digital logic power supply voltage.
8. The power-down screen clearing method for a liquid crystal display panel according to claim 7, wherein turning off the module unrelated to the discharging screen clearing operation comprises: and closing the interface of the mobile industrial processor and the logic function of the digital internal part, closing the source electrode driving circuit, grounding the output of all display channels, closing the common voltage module and closing the gamma module.
9. The power-down screen cleaning method for the liquid crystal display screen as claimed in claim 1, wherein the voltage-stabilizing capacitor of the driving chip is arranged inside the driving chip or outside the driving chip.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910572851.6A CN112150976A (en) | 2019-06-28 | 2019-06-28 | Power-down screen cleaning method for liquid crystal display screen |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910572851.6A CN112150976A (en) | 2019-06-28 | 2019-06-28 | Power-down screen cleaning method for liquid crystal display screen |
Publications (1)
Publication Number | Publication Date |
---|---|
CN112150976A true CN112150976A (en) | 2020-12-29 |
Family
ID=73869121
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201910572851.6A Pending CN112150976A (en) | 2019-06-28 | 2019-06-28 | Power-down screen cleaning method for liquid crystal display screen |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN112150976A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113346608A (en) * | 2021-06-04 | 2021-09-03 | 环旭电子股份有限公司 | Equipment with electronic ink screen and information protection method |
Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1892785A (en) * | 2005-06-27 | 2007-01-10 | 三星电子株式会社 | Display device and driving apparatus having reduced pixel electrode discharge time upon power cut-off |
US20080042952A1 (en) * | 2006-08-18 | 2008-02-21 | Innocom Technology (Shenzhen) Co., Ltd. | Power supply circuit of liquid crystal display for reducing residual image |
CN101162567A (en) * | 2006-10-10 | 2008-04-16 | 奇景光电股份有限公司 | Planar display and time schedule controller thereof |
CN101777320A (en) * | 2010-01-27 | 2010-07-14 | 友达光电(苏州)有限公司 | Ghost eliminating circuit, display and electronic device |
CN103019132A (en) * | 2012-11-21 | 2013-04-03 | 杭州士兰微电子股份有限公司 | Chip and method for realizing low-power-consumption mode |
CN105976776A (en) * | 2016-06-21 | 2016-09-28 | 深圳天珑无线科技有限公司 | Liquid crystal display screen discharging method, liquid crystal display screen and driving chip thereof |
CN206422600U (en) * | 2017-02-06 | 2017-08-18 | 山东鲁能智能技术有限公司 | Charging pile power supply power-fail holding circuit |
CN107134266A (en) * | 2017-05-12 | 2017-09-05 | 京东方科技集团股份有限公司 | Display driver circuit, display drive method and display device |
CN108962165A (en) * | 2018-07-18 | 2018-12-07 | 南京熊猫电子制造有限公司 | A kind of circuit and method for eliminating IGZO display panel power down ghost |
CN109410851A (en) * | 2017-08-17 | 2019-03-01 | 京东方科技集团股份有限公司 | Display driver circuit, voltage conversion device, display device and its shutdown control method |
CN109616069A (en) * | 2019-01-14 | 2019-04-12 | 合肥京东方光电科技有限公司 | Input voltage processing method, device, display base plate and display device |
-
2019
- 2019-06-28 CN CN201910572851.6A patent/CN112150976A/en active Pending
Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1892785A (en) * | 2005-06-27 | 2007-01-10 | 三星电子株式会社 | Display device and driving apparatus having reduced pixel electrode discharge time upon power cut-off |
US20080042952A1 (en) * | 2006-08-18 | 2008-02-21 | Innocom Technology (Shenzhen) Co., Ltd. | Power supply circuit of liquid crystal display for reducing residual image |
CN101162567A (en) * | 2006-10-10 | 2008-04-16 | 奇景光电股份有限公司 | Planar display and time schedule controller thereof |
CN101777320A (en) * | 2010-01-27 | 2010-07-14 | 友达光电(苏州)有限公司 | Ghost eliminating circuit, display and electronic device |
CN103019132A (en) * | 2012-11-21 | 2013-04-03 | 杭州士兰微电子股份有限公司 | Chip and method for realizing low-power-consumption mode |
CN105976776A (en) * | 2016-06-21 | 2016-09-28 | 深圳天珑无线科技有限公司 | Liquid crystal display screen discharging method, liquid crystal display screen and driving chip thereof |
CN206422600U (en) * | 2017-02-06 | 2017-08-18 | 山东鲁能智能技术有限公司 | Charging pile power supply power-fail holding circuit |
CN107134266A (en) * | 2017-05-12 | 2017-09-05 | 京东方科技集团股份有限公司 | Display driver circuit, display drive method and display device |
CN109410851A (en) * | 2017-08-17 | 2019-03-01 | 京东方科技集团股份有限公司 | Display driver circuit, voltage conversion device, display device and its shutdown control method |
CN108962165A (en) * | 2018-07-18 | 2018-12-07 | 南京熊猫电子制造有限公司 | A kind of circuit and method for eliminating IGZO display panel power down ghost |
CN109616069A (en) * | 2019-01-14 | 2019-04-12 | 合肥京东方光电科技有限公司 | Input voltage processing method, device, display base plate and display device |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113346608A (en) * | 2021-06-04 | 2021-09-03 | 环旭电子股份有限公司 | Equipment with electronic ink screen and information protection method |
CN113346608B (en) * | 2021-06-04 | 2024-01-30 | 环旭电子股份有限公司 | Equipment with electronic ink screen and information protection method |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN110120201B (en) | Circuit for eliminating shutdown ghost, control method thereof and liquid crystal display device | |
US10747075B2 (en) | Discharge circuit, discharge method and display device | |
US10930361B2 (en) | Voltage control circuit, shift register unit and display device | |
US11482148B2 (en) | Power supply time sequence control circuit and control method thereof, display driver circuit, and display device | |
CN207781164U (en) | A kind of ghost eliminates circuit, display device and its driving circuit | |
US9454161B1 (en) | Semiconductor device and electronic apparatus | |
CN108962165B (en) | Circuit and method for eliminating power-down residual image of IGZO display panel | |
US9030125B2 (en) | Power circuit having multiple stages of charge pumps | |
US20150049008A1 (en) | Power circuit of displaying device | |
CN108172179B (en) | Power management circuit | |
US10692464B2 (en) | Voltage supply unit and method, display driving circuit and display device | |
KR102507332B1 (en) | Gate driver and display device having the same | |
US9721524B2 (en) | Power supply circuit, display panel driver and display device incorporating the same | |
US20190213968A1 (en) | Array substrate, method for driving the same, and display apparatus | |
JP4042627B2 (en) | Power supply voltage conversion circuit, control method therefor, display device and portable terminal | |
KR20060051884A (en) | Method of supplying power to scan line driving circuit, and power supply circuit | |
CN112150976A (en) | Power-down screen cleaning method for liquid crystal display screen | |
CN101556778A (en) | Method for optimizing display effect at power off and circuit thereof | |
CN112201213B (en) | Pixel circuit and display device | |
US10135444B2 (en) | Semiconductor device with booster part, and booster | |
CN114974150B (en) | Discharge circuit, discharge method and display device | |
CN211181608U (en) | Power supply time sequence control circuit and display device | |
JP2000284866A (en) | Semiconductor device mounting power source circuit and liquid crystal device, electronic appliance using it | |
US10714511B2 (en) | Pull-down circuit of gate driving unit and display device | |
US10446101B2 (en) | GOA circuit and LCD device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20201229 |