CN112134548A - Driving device, control method thereof and electronic equipment - Google Patents
Driving device, control method thereof and electronic equipment Download PDFInfo
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Abstract
The application discloses a driving device, which is used for driving a power output circuit, the driving circuit comprises a first driving circuit, the power output circuit comprises a first power tube, and the first driving circuit is used for providing a first grid voltage to the first power tube so as to control the conduction or the disconnection of the first power tube. The first driving circuit comprises a discharging module, a voltage detection module and a voltage source. When the first grid voltage is greater than the first voltage, the voltage detection module controls the discharge module to discharge the first grid voltage to the ground. When the first grid voltage reaches the first voltage, the voltage detection module controls the discharge module to enable the first grid voltage to discharge to the discharge end of the voltage source. The application also discloses a control method of the driving device and electronic equipment. The application has lower cost.
Description
Technical Field
The present invention relates to electronics, and more particularly, to a driving apparatus, a control method thereof, and an electronic device.
Background
Nowadays, more and more product applications require power chips such as class D power amplifiers and motor drivers to have high-voltage driving capability and provide large output power, and the device operating voltage generally needs more than 10V. High performance, low on-resistance high voltage devices typically use thin gate oxide technology devices, and the normal operating voltage of the gate typically requires a low voltage (about 5V) range. In the prior art, a power transistor (PMOS field effect transistor) at the upper end needs to output a high-power signal, and the gate capacitance of the power transistor is large, so that the transient current is large when the gate discharges. In order to meet the requirement of large transient current when the upper power tube discharges, a current source with an off-chip capacitor is generally used to provide large transient current absorption capability. However, the use of off-chip capacitors results in a large chip layout area and a high chip cost.
Disclosure of Invention
In view of the above, it is desirable to provide a driving apparatus, a control method thereof and an electronic device with low cost.
One aspect of the present application provides a driving apparatus for driving a power output circuit, the driving apparatus includes a first driving circuit, the power output circuit includes a first power transistor, and the first driving circuit is configured to provide a first gate voltage to a gate of the first power transistor to control the first power transistor to be turned on or off; the first drive circuit includes:
a voltage source comprising a discharge end for providing a discharge voltage;
the discharge module is connected with the grid electrode of the first power tube, the voltage source and the ground, and the first grid electrode voltage can selectively discharge to the discharge end of the voltage source or discharge to the ground through the discharge module;
the voltage detection module is used for controlling the discharge module to discharge the first grid voltage to the ground when the first grid voltage is greater than a first voltage, and controlling the discharge module to discharge the first grid voltage to a discharge end of the voltage source when the first grid voltage reaches the first voltage, wherein the first voltage is greater than the discharge voltage.
In some embodiments, the first power transistor is a PMOS fet, the first driving circuit is connected to a gate of the first power transistor, a power supply voltage is connected to a source of the first power transistor, a drain of the first power transistor is connected to an external load, and when the first power transistor is turned on, the power supply voltage charges the external load through the turned-on first power transistor.
In some embodiments, the voltage detection module detects the first gate voltage, outputs a detection signal having a first level to the discharge module when the first gate voltage is greater than the first voltage, and outputs a detection signal having a second level when the first gate voltage is less than or equal to the first voltage; the discharging module controls the first grid voltage to discharge to the ground according to the detection signal with the first level, and the discharging module controls the first grid voltage to discharge to the discharging end of the voltage source according to the detection signal with the second level.
In some embodiments, the discharge module comprises: the switching circuit is used for charging a grid electrode of a first power tube by a power supply voltage or discharging the grid electrode of the first power tube by the switching circuit so as to provide the first grid electrode voltage to the grid electrode of the first power tube; and the voltage control module is used for controlling the switch circuit according to the detection signal, so that when the first grid voltage is discharged to the ground to a first voltage, the first grid voltage is switched from the discharge to the discharge end of the voltage source.
In some embodiments, the switching circuit includes a first switching tube, a second switching tube and a third switching tube, the first switching tube includes a control terminal connected to the voltage control module, a first conducting terminal connected to a power supply voltage and a second conducting terminal connected to a gate of the first power tube, the voltage control module provides a first control voltage to the control terminal of the first switching tube to control on or off between the first conducting terminal and the second conducting terminal of the first switching tube, the gate of the first power tube is charged when the first switching tube is conducted, the second switching tube includes a control terminal connected to the voltage control module, a first conducting terminal connected to ground and a second conducting terminal connected to the gate of the first power tube, the voltage control module provides a second control voltage to the control terminal of the second switching tube, the third switch tube comprises a control end connected to the voltage control module, a first conducting end connected to the discharging end and a second conducting end connected to the grid electrode of the first power tube, and the voltage control module provides a third control voltage to the control end of the third switch tube so as to control the connection or disconnection between the first conducting end and the second conducting end of the third switch tube.
In some embodiments, when a power supply voltage charges a gate of the first power transistor, the first switching transistor is turned on, the second switching transistor is turned off, and the third switching transistor is turned off; when the grid electrode of the first power tube discharges to the ground, the first switch tube is turned off, the second switch tube is turned on, and the third switch tube is turned off; when the grid electrode of the first power tube discharges to the discharge end of the voltage source, the second switch tube is turned off, and the third switch tube is turned on.
In some embodiments, the driving circuit further includes a second driving circuit, the power output circuit further includes a second power transistor, the second power transistor is an NMOS power transistor, the second driving circuit is configured to provide a second gate voltage to a gate of the second power transistor to control on or off of the second power transistor, the second driving circuit is connected to the gate of the second power transistor, a drain of the second power transistor and a drain of the first power transistor are commonly connected to an external load, a source of the second power transistor is connected to ground, when the second power transistor is turned on, the first power transistor is turned off, and the external load is discharged through the turned-on second power transistor.
In some embodiments, the second driving circuit and the first driving circuit have the same structure.
In some embodiments, the driving circuit further includes a dead-time control module, which is configured to receive the first gate voltage and the second gate voltage, and provide a first adjustment signal to the first driving circuit and a second adjustment signal to the second driving circuit, so as to control the first power transistor and the second power transistor to conduct alternately.
In certain embodiments, the difference between the first voltage and the discharge voltage is no greater than 1V.
One aspect of the present application provides a control method of a driving apparatus, including:
providing a first driving circuit, wherein the first driving circuit comprises a voltage source, the voltage source comprises a discharge end, the discharge end is used for providing a discharge voltage, and the first driving circuit is used for providing a first grid voltage to a first power tube so as to control the conduction or the disconnection of the first power tube;
when the first grid voltage is greater than the first voltage, the grid of the first power tube is connected with the ground and discharges to the ground;
when the first grid voltage is reduced to a first voltage, the grid of the first power tube is connected with the discharge end to discharge the discharge end, and the first voltage is greater than the discharge voltage of the discharge end.
In some embodiments, the first driving circuit further comprises a discharging module and a voltage detecting module; when the first grid voltage is greater than the first voltage, the grid of the first power tube is connected with the ground, and discharging to the ground comprises the following steps: the voltage detection module outputs a detection signal of a first level to the discharge module so that the first grid voltage is discharged to the ground through the discharge module; when the first grid voltage is reduced to a first voltage, the grid of the first power tube is connected with the discharge end to discharge to the discharge end, and the first voltage is greater than the discharge voltage of the discharge end, including: the voltage detection module outputs a detection signal of a second level to the discharge module so that the first grid voltage discharges the discharge end of the voltage source through the discharge module.
In some embodiments, the discharge module includes a switching circuit and a voltage control module, the switching circuit includes a first switching tube, a second switching tube and a third switching tube; the discharging of the first gate voltage to ground by the discharge module includes: the voltage control module receives the detection signal of the first level and controls the second switch tube to be conducted, the first grid voltage discharges to the ground through the conducted second switch tube, and the first grid voltage is reduced.
In some embodiments, the discharging the discharge voltage by the discharge module from the first gate voltage comprises: the voltage control module receives the detection signal of the second level and controls the third switching tube to be conducted, and the first grid voltage discharges the discharge voltage through the conducted third switching tube.
One aspect of the present application provides an electronic device including a driving circuit, a power output circuit, and a load, the driving circuit being configured to drive the power output circuit to provide a load voltage to the load, wherein the driving circuit is the driving circuit described above.
The beneficial effects of this application lie in, first drive circuit includes voltage source, voltage detection module, voltage control module and switch circuit, can with the process that first grid voltage discharges divide into to ground discharge stage and to the stage of the discharge end discharge of voltage source, and just through discharging when first grid voltage size is close discharge voltage, consequently first drive circuit need not set up extra off-chip electric capacity, only need the less on-chip electric capacity of integrated capacitance can to the drive circuit of this application and drive method and electronic equipment can save the cost.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a circuit schematic of one embodiment of a driver circuit of the present application;
FIG. 2 is a schematic diagram of a circuit configuration of a portion of the driving circuit shown in FIG. 1;
FIG. 3 is a partial timing diagram of one embodiment of the driver circuit of FIG. 2;
FIG. 4 is a partial timing diagram of another embodiment of the driver circuit of FIG. 2;
fig. 5 is a partial flowchart of an embodiment of a control method of a driving apparatus according to the present application.
Detailed Description
The technical solutions in the embodiments of the present application are clearly and completely described below with reference to the accompanying drawings, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application. The following embodiments and their technical features may be combined with each other without conflict.
Fig. 1 is a schematic circuit diagram of a driving device 10 according to the present application. For example, but not limited to, the driving device 10 may be applied to a class D audio power amplifier circuit. The driving apparatus 10 may receive a pulse width modulation signal PWM from an external pulse width modulation circuit (not shown) and output a corresponding voltage driving signal to a power output circuit 20. The power output circuit 20 outputs a load voltage VOUT to an external load (not shown) under the driving of the driving device 10.
The power output circuit 20 includes a first power transistor PM2 and a second power transistor NM 2. For convenience of description, the embodiment of the present application is described by taking the first power transistor PM2 as a PMOS fet and the second power transistor NM2 as an NMOS fet, by way of example and not limitation. However, this is not intended to limit the embodiments of the present application, and those skilled in the art will appreciate that the first power transistor PM2 and the second power transistor NM2 may use other types of transistors or high voltage devices.
The driving apparatus 10 includes a first driving circuit 11, a second driving circuit 12, and a dead time control module 13. The first driving circuit 11 is configured to provide a first gate voltage HS _ GT2 to the first power transistor PM2 to control the first power transistor PM2 to be turned on or off. The second driving circuit 12 is configured to provide a second gate voltage LS _ GT2 to the second power transistor NM2 to control the second power transistor NM2 to be turned on or off. In some embodiments, the first power transistor PM2 may be referred to as an upper power transistor, and the second power transistor NM2 may be referred to as a lower power transistor.
The first driving circuit 11 is connected to a gate (not numbered) of the first power transistor PM2, a power supply voltage PVDD is connected to a source (not numbered) of the first power transistor PM2, and a drain (not numbered) of the first power transistor PM2 is connected to an external load. When the first power transistor PM2 is turned on, the power supply voltage PVDD charges an external load through the turned-on first power transistor PM 2.
The second driving circuit 12 is connected to a gate (not numbered) of the second power transistor NM2, an external load is connected to a drain (not numbered) of the second power transistor NM2, and a source (not numbered) of the second power transistor NM2 is connected to ground PGND. When the second power transistor NM2 is turned on, the external load is discharged through the turned-on second power transistor NM 2.
The dead time control module 13 is configured to provide a first adjustment signal DT _ HS2 to the first driving circuit 11 and a second adjustment signal DT _ LS2 to the second driving circuit 12, so that the first driving circuit 11 and the second driving circuit 12 do not control the first power transistor PM2 and the second power transistor NM2 to be turned on simultaneously, that is, the dead time control module 13 controls the first power transistor PM2 and the second power transistor NM2 to be turned on alternately through the first driving circuit 11 and the second driving circuit 12, respectively.
The dead time control module 13 is capable of detecting a first gate voltage HS _ GT2 provided to the gate of the first power transistor PM2 and a second gate voltage LS _ GT2 provided to the gate of the second power transistor NM2, and outputting a corresponding first adjustment signal DT _ HS2 to the first driving circuit 11 and a second adjustment signal DT _ LS2 to the second driving circuit 12 according to the detected first and second gate voltages HS _ GT2 and LS _ GT2, so that the first and second power transistors PM2 and NM2 are not simultaneously turned on.
The node where the drain of the first power transistor PM2 and the drain of the second power transistor NM2 are located can be regarded as the output terminal of the power output circuit 20, and is used for outputting the load voltage VOUT to an external load.
In the embodiment shown in fig. 1, the first driving circuit 11 includes a voltage source 101, a discharging module 102, and a voltage detecting module 112. The voltage source 101 includes a discharge terminal (not numbered) for providing a discharge voltage VSS _ REG 2. The discharging module 102 is connected to the discharging terminal, the first power transistor PM2 and ground PGND. By the discharging module 102, the first gate voltage HS _ GT2 can be selectively discharged to the discharging end of the voltage source 101 or to ground PGND. The voltage detection module 112 is connected to the discharge module 102 and the gate of the first power transistor PM 2. The voltage detection module 112 is configured to detect the first gate voltage HS _ GT2 and control the discharge module 102 to selectively discharge the first gate voltage HS _ GT2 according to the detected magnitude of the first gate voltage HS _ GT 2. Wherein the voltage detection module 112 is configured to control the discharging module 102 to discharge the first gate voltage HS _ GT2 to PGND when the first gate voltage HS _ GT2 is greater than a first voltage, and to control the discharging module 102 to discharge the first gate voltage HS _ GT2 to the discharging terminal when the first gate voltage HS _ GT2 drops to a first voltage. By way of example and not limitation, the first voltage is greater than the discharging voltage VSS _ REG2, and a difference between the first voltage and the discharging voltage VSS _ REG2 is not greater than 1V.
Optionally, in some embodiments, the first power transistor PM2 may be a PMOS field effect transistor. The first driving circuit 11 is connected to the gate of the first power transistor PM2, the power supply voltage PVDD is connected to the source of the first power transistor PM2, and the drain of the first power transistor PM2 is connected to an external load. When the first power transistor PM2 is turned on, the power supply voltage PVDD charges an external load through the turned-on first power transistor PM 2.
Alternatively, in some embodiments, the voltage detection module 112 outputs the detection signal HSGT SNS having a first level to the discharge module 102 when the first gate voltage HS _ GT2 is greater than a first voltage, and outputs the detection signal HSGT SNS having a second level to the discharge module 102 when the first gate voltage HS _ GT2 is less than or equal to the first voltage.
The discharging module 102 controls the first gate voltage HS _ GT2 to be discharged to the ground PGND according to the detection signal HSGT _ SNS having the first level. The discharging module 102 controls the first gate voltage HS _ GT2 to discharge the discharging voltage VSS _ REG2 according to the detection signal HSGT _ SNS having the second level. The first level is a low level, and the second level is a high level; or the first level is a high level and the second level is a low level.
The voltage source 101 includes a discharge terminal (not numbered) and a capacitor Cvss 2. The voltage source 101 receives a supply voltage PVDD and outputs the discharging voltage VSS _ REG2 at a discharging terminal. The discharge end of the voltage source 101 has a current sinking capability. For example, but not limited to, the discharging voltage VSS _ REG2 ═ PVDD-VT, VT may represent a voltage value less than 6V, such as VT ═ 5V. The power supply voltage PVDD may be around 10V. The capacitance Cvss2 is an on-chip capacitance, which may have a capacitance value of 0 to 10 pF.
Fig. 2 is a schematic diagram of a partial circuit structure of an embodiment of the driving circuit 10 of the present application, and particularly shows a circuit structure of the first driving circuit 11. The discharging module 102 includes a voltage control module 111 and a switching circuit 113. The voltage control module 111 is configured to control the switch circuit 113, so that the gate of the first power transistor PM2 can selectively PGND discharge to ground or the discharging voltage VSS _ REG 2. The voltage detection module 112 is configured to detect a first gate voltage HS _ GT2 provided to the gate of the first power transistor PM2, and control the voltage control module 111 and the switch circuit 113 when the magnitude of the first gate voltage HS _ GT2 reaches a first voltage, so that the gate of the first power transistor PM2 becomes discharged to the discharge end of the voltage source 101. Alternatively, in some embodiments, voltage source 101 may be a linear regulator integrated on-chip capacitor. The magnitude of the first voltage may be greater than the magnitude of the discharging voltage VSS _ REG2, for example, but not limited to, the difference between the first voltage and the discharging voltage VSS _ REG2 is less than or equal to 1V.
The switching circuit 113 includes a first switching tube Q1, a second switching tube Q2, and a third switching tube Q3. The first switching transistor Q1 includes a control terminal (not numbered) connected to the voltage control module 111, a first conduction terminal (not numbered) connected to the power supply voltage PVDD, and a second conduction terminal (not numbered) connected to the gate of the first power transistor PM 2. The voltage control module 111 provides a first control voltage V1 to the control terminal of the first switch Q1 to control the on/off between the first conducting terminal and the second conducting terminal of the first switch Q1. When the first switch transistor Q1 is turned on, the gate of the first power transistor PM2 is charged.
The second switch Q2 includes a control terminal (not numbered) connected to the voltage control module 111, a first conduction terminal (not numbered) connected to ground PGND, and a second conduction terminal (not numbered) connected to the gate of the first power transistor PM 2. The voltage control module 111 provides a second control voltage V2 to the control terminal of the second switch Q2 to control the on/off between the first conducting terminal and the second conducting terminal of the second switch Q2. When the second switch Q2 is turned on, the gate of the first power transistor PM2 discharges to ground PGND through the turned-on second switch Q2.
The third switching transistor Q3 includes a control terminal (not numbered) connected to the voltage control module 111, a first conduction terminal (not numbered) connected to the discharge terminal of the voltage source 101, and a second conduction terminal (not numbered) connected to the gate of the first power transistor PM 2. The voltage control module 111 provides a third control voltage V3 to the control terminal of the third transistor Q3 to control the on/off between the first conducting terminal and the second conducting terminal of the third transistor Q3. When the third switching tube Q3 is turned on, the gate of the first power tube PM2 discharges to the discharge end of the voltage source 101 through the turned-on third switching tube Q3.
The voltage detection module 112 includes an input terminal connected to the gate of the first power transistor PM2 and an output terminal connected to the voltage control module 111. The voltage detection module 112 is configured to detect the first gate voltage HS _ GT2 and output a corresponding detection signal HSGT _ SNS to the voltage control module 111 according to the first gate voltage HS _ GT2, so that the voltage control module 111 controls the first switch Q1, the second switch Q2 and the third switch Q3 to turn on or off.
It should be noted that, the above description relates to the first switch Q1, the second switch Q2 and the third switch Q3, wherein the control terminal is, for example and without limitation, a gate, the first conducting terminal is, for example and without limitation, a source, and the second conducting terminal is, for example and without limitation, a drain. Alternatively, the first switching transistor Q1 may be a PMOS field effect transistor, the second switching transistor Q2 may be an NMOS field effect transistor, and the third switching transistor Q3 may be an NMOS field effect transistor.
In addition, the first adjustment signal DT _ HS2 output by the dead time control module 13 is applied to the voltage control module 111. The voltage control module 111 also receives a pulse width modulation signal PWM provided by an external pulse width modulation circuit. And may output the first, second, and third control voltages V1, V2, and V3 according to the received pulse width modulation signal PWM, the detection signal HSGT _ SNS, and the first modulation signal DT _ HS 2.
The second drive circuit 12 may have substantially the same circuit configuration as the first drive circuit 11. For example, but not limited to, the second driving circuit 12 may include a plurality of switching transistors (PMOS field effect transistors and/or NMOS field effect transistors) and a voltage control module, wherein the voltage control module controls the switching transistors to be turned on or off, and changes the magnitude of the second gate voltage LS _ GT2 provided to the gate of the second power transistor NM2, thereby controlling the second power transistor NM2 to be turned on or off. Of course, it should be understood that the second driving circuit 12 and the first driving circuit 11 may have the same or different circuit structures, and it is within the scope of the present application as long as the second driving circuit 12 can provide the second gate voltage LS _ GT2 to control the second power transistor NM2 to be turned on or off.
Fig. 3 is a partial signal timing diagram of the driving apparatus 10 according to an embodiment. Wherein:
at time t0, the pulse width modulation signal PWM is low, the second gate voltage LS _ GT2 is high, and the first gate voltage HS _ GT2 is high. The first adjustment signal DT _ HS2 is low. The first driving voltage V1, the second driving voltage V2, and the third driving voltage V3 are low. The load voltage VOUT is low. At this time, the first switching tube Q1 is turned on, the second switching tube Q2 is turned off, and the third switching tube Q3 is turned off. Alternatively, at time t0, the first gate voltage HS _ GT2 may be the magnitude of the power supply voltage PVDD.
At time t1, the PWM signal PWM changes from low to high. The second gate voltage LS _ GT2 output by the second drive circuit 12 starts to become small.
Between times t1 and t2, the second gate voltage LS _ GT2 goes low and reaches a first threshold voltage, which may be a voltage of ground PGND or a turn-on threshold voltage of the second power transistor NM2 (which may also be referred to as a turn-on threshold voltage of the second power transistor PM 2). That is, before the time t2, the second power tube NM2 is turned off.
At time t2, after the dead-time control module 13 receives the second gate voltage LS _ GT2 with the magnitude of the first threshold voltage and a preset delay time elapses, the first adjustment signal DT _ HS2 output by the dead-time control module 13 changes from low level to high level.
Between the time t2 and the time t3, after the voltage control module 111 receives the first adjustment signal DT _ HS2 with a high level, the first control voltage V1 supplied to the first switch Q1 changes from a low level to a high level, and the second control voltage V2 supplied to the second switch Q2 changes from a low level to a high level. The first gate voltage HS _ GT2 becomes gradually smaller. At this time, the first switching tube Q1 is turned off, the second switching tube Q2 is turned on, and the third switching tube Q3 remains turned off. The gate of the first power transistor PM2 is discharged to ground via the conducting second switch Q2, so that the first gate voltage HS _ GT2 becomes gradually smaller.
At time t3, the magnitude of the first gate voltage HS _ GT2 gradually decreases to reach the turn-on voltage of the first power transistor PM2 (which may also be referred to as the turn-on threshold voltage of the first power transistor PM 2), the first power transistor PM2 turns on, the power supply voltage PVDD starts to charge the external load via the turned-on first power transistor PM2, and the load voltage VOUT starts to increase.
Between time t3 and time t4, the magnitude of the first gate voltage HS _ GT2 is substantially maintained at the magnitude of the turn-on voltage of the first power transistor PM2, and the load voltage VOUT gradually increases.
At time t4, the load voltage VOUT reaches the supply voltage PVDD in magnitude.
Between time t4 and time t5, the power supply voltage PVDD no longer charges the external load through the first power transistor PM2, and no charging current flows through the first power transistor PM 2. The gate of the first power transistor PM2 continues to discharge via the conducting second switch Q2, so that the first gate voltage HS _ GT2 continues to taper.
At time t5, the magnitude of the first gate voltage HS _ GT2 becomes PVDD-VT2, where VT2 represents a value slightly less than or equal to VT. For example, but not limited to, VT 5V and VT2 4.5V to 5V. PVDD-VT2 is defined as a first voltage, the first voltage is greater than the discharging voltage VSS _ REG2, and the difference between the first voltage and the discharging voltage is not greater than 1V.
At this time, the voltage detection module 112 detects that the magnitude of the first gate voltage HS _ GT2 becomes the first voltage (PVDD-VT2), and the detection signal HSGT _ SNS output by the voltage detection module 112 changes from the low level to the high level. The detection signal HSGT _ SNS may be a logic level signal. After the voltage control module 111 receives the high-level detection signal HSGT _ SNS, the output third control voltage V3 changes from low to high and the second control voltage V2 changes from high to low. The third switch Q3 is turned on, and the second switch Q2 is turned off.
After time t5, the gate of the first power transistor PM2 discharges through the conducting third switching transistor Q3, and the first gate voltage HS _ GT2 continues to gradually decrease until the magnitude of the discharge voltage VSS _ REG2 is reached.
In the above-mentioned operation flow of the driving apparatus 10, when the voltage magnitude of the first gate voltage HS _ GT2 provided to the gate of the first power transistor PM2 is already close to the (PVDD-VT) value, the voltage detection module 112 controls the voltage control module 111 to turn off the second switch Q2 and turn on the third transistor Q3, so that the magnitude of the first gate voltage HS _ GT2 and the magnitude of the discharge voltage VSS _ REG2 are close to or equal when the gate of the first power transistor PM2 is discharged through the third switch Q3. Therefore, the first driving circuit 110 does not need the voltage source 101 to provide a large pull-down current at this time. Therefore, the driving device 10 or the electronic device including the driving device 10 does not need to be provided with a large capacity of off-chip capacitance, but only needs to be provided with a small capacity of on-chip capacitance Cvss 2.
Fig. 4 is a partial signal timing diagram of another embodiment of the driving apparatus 10. Wherein:
at time t6, the PWM signal PWM is at a high level, the first, second, and third control voltages V1, V2, and V3 are at a high level, the first gate voltage HS _ GT2 is at a low level, the second adjustment signal DT _ LS2 is at a low level, the second gate voltage LS _ GT2 is at a low level, and the load voltage VOUT is the power supply voltage PVDD. At this time, the first power transistor PM2 is fully turned on. The first switch tube Q1 is turned off, and the second switch tube Q2 and the third switch tube Q3 are turned on. At this time, the first gate voltage HS _ GT2 may be a discharging voltage VSS _ REG 2.
At time t7, the PWM signal PWM changes from high level to low level, the voltage control module 111 controls the first, second and third control voltages V1, V2 and V3 to change from high level to low level, the first switch Q1 is turned on, and the second and third switch Q2 and Q3 are turned off.
Between time t7 and time t8, the power supply voltage PVDD charges the gate of the first power transistor PM2 through the turned-on first switching transistor Q1, and the first gate voltage HS _ GT2 gradually increases.
At time t8, the first gate voltage HS _ GT2 becomes the supply voltage PVDD and the first power transistor PM2 turns off.
At time t9, the dead time control module 13 outputs the second adjustment signal DT _ LS2 of high level to the second driving circuit 12 after a predetermined delay time (time t8 to time t 9).
Between the time t9 and the time t10, the second driving circuit 12 receives the second adjustment signal DT _ LS2 of the high level and controls the output second gate voltage LS _ GT2 to become gradually larger from the low level.
At time t10, the second gate voltage LS _ GT2 reaches the turn-on voltage of the second power transistor NM2, the second power transistor NM2 is turned on, and the external load is discharged through the turned-on second power transistor NM 2.
Between time t10 and time t11, the load voltage VOUT gradually decreases.
At time t11, the magnitude of the load voltage VOUT becomes the magnitude of the voltage of ground PGND, and the second gate voltage LS _ GT2 output by the second driving circuit 12 continues to become large up to the power supply voltage PVDD.
As can be seen from the above, the first driving circuit 11 of the driving apparatus 10 of the present application includes the voltage detection module 112, the voltage control module 111 and the switch circuit 113, and can divide the process of the pull-down discharging of the first gate voltage HS _ GT2 into the phase of discharging to ground PGND and discharging to the discharging end of the voltage source 101, and only discharge the discharging voltage VSS _ REG2 through the discharging end when the magnitude of the first gate voltage HS _ GT2 is close to the discharging voltage VSS _ REG2, so that the first driving circuit 11 does not need to provide an additional off-chip capacitor, and only needs an on-chip capacitor with a smaller integrated capacitor, thereby saving the cost.
Fig. 5 is a partial schematic flow chart of an embodiment of a control method of a driving device according to the present application. The drive means may be the drive means 10 of the above described embodiments. The control method of the driving device comprises the following steps:
step S10, providing a first driving circuit, where the first driving circuit includes a voltage source, the voltage source includes a discharging terminal for providing a discharging voltage, and the first driving circuit is configured to provide a first gate voltage to the first power transistor to control the first power transistor to turn on or off.
And step S20, when the first grid voltage is larger than the first voltage, the grid of the first power tube is connected with the ground to discharge to the ground.
And step S30, when the first grid voltage is reduced to a first voltage, the grid of the first power tube is connected with the discharge end to discharge the discharge end, and the first voltage is greater than the discharge voltage of the discharge end.
Optionally, in some embodiments, when the first gate voltage is greater than the first voltage, the discharging the first gate voltage to ground includes: the voltage detection module outputs a detection signal of a first level to the discharge module to enable the first gate voltage to be discharged to the ground through the discharge module. The first gate voltage discharging a discharge voltage when the first gate voltage increases to a first voltage, the first voltage being greater than the discharge voltage comprising: the voltage detection module outputs a detection signal of a second level to the discharge module so that the first grid voltage discharges the discharge end of the voltage source through the discharge module.
Optionally, in some embodiments, the discharge module includes a switching circuit and a voltage control module, and the switching circuit includes a first switching tube, a second switching tube and a third switching tube. The discharging of the first gate voltage to ground by the discharge module includes: the voltage control module receives the detection signal of the first level and controls the second switch tube to be conducted, the first grid voltage discharges to the ground through the conducted second switch tube, and the first grid voltage is reduced.
Optionally, in some embodiments, the discharging the discharge voltage by the discharge module includes: the voltage control module receives the detection signal of the second level and controls the third switching tube to be conducted, and the first grid voltage discharges the discharge voltage through the conducted third switching tube.
Optionally, in some embodiments, the first voltage is greater than the discharge voltage and a difference between the first voltage and the discharge voltage is less than or equal to 1V.
Therefore, the voltage source can meet the current dynamic change requirement when the grid of the first power tube discharges only by integrating the on-chip capacitor of the small capacitor without arranging an off-chip capacitor. In summary, the driving device and the control method thereof can save cost.
Although the application has been shown and described with respect to one or more implementations, equivalent alterations and modifications will occur to others skilled in the art based upon a reading and understanding of this specification and the annexed drawings. This application is intended to embrace all such modifications and variations and is limited only by the scope of the appended claims. In particular regard to the various functions performed by the above described components, the terms used to describe such components are intended to correspond, unless otherwise indicated, to any component which performs the specified function of the described component (e.g., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary implementations of the specification.
The above-mentioned embodiments are only examples of the present application, and not intended to limit the scope of the present application, and all equivalent structures or equivalent flow transformations made by the contents of the specification and the drawings, such as the combination of technical features between the embodiments and the direct or indirect application to other related technical fields, are also included in the scope of the present application.
Claims (15)
1. A driving device for driving a power output circuit, the driving device comprising a first driving circuit, the power output circuit comprising a first power transistor, the first driving circuit being configured to provide a first gate voltage to a gate of the first power transistor to control the first power transistor to be turned on or off; the first drive circuit includes:
a voltage source comprising a discharge end for providing a discharge voltage;
the discharge module is connected with the grid electrode of the first power tube, the voltage source and the ground, and the first grid electrode voltage can selectively discharge to the discharge end of the voltage source or discharge to the ground through the discharge module;
the voltage detection module is used for controlling the discharge module to discharge the first grid voltage to the ground when the first grid voltage is greater than a first voltage, and controlling the discharge module to discharge the first grid voltage to a discharge end of the voltage source when the first grid voltage reaches the first voltage, wherein the first voltage is greater than the discharge voltage.
2. The driving apparatus as claimed in claim 1, wherein the first power transistor is a PMOS fet, the first driving circuit is connected to a gate of the first power transistor, a power supply voltage is connected to a source of the first power transistor, a drain of the first power transistor is connected to an external load, and when the first power transistor is turned on, the power supply voltage charges the external load through the turned-on first power transistor.
3. The driving apparatus according to claim 2, wherein the voltage detection module detects the first gate voltage, outputs a detection signal having a first level to the discharge module when the first gate voltage is greater than the first voltage, and outputs a detection signal having a second level when the first gate voltage is less than or equal to the first voltage;
the discharging module controls the first grid voltage to discharge to the ground according to the detection signal with the first level, and the discharging module controls the first grid voltage to discharge to the discharging end of the voltage source according to the detection signal with the second level.
4. The driving device according to claim 3, wherein the discharging module includes:
the switching circuit is used for charging a grid electrode of a first power tube by a power supply voltage or discharging the grid electrode of the first power tube by the switching circuit so as to provide the first grid electrode voltage to the grid electrode of the first power tube;
and the voltage control module is used for controlling the switch circuit according to the detection signal, so that when the first grid voltage is discharged to the ground to a first voltage, the first grid voltage is switched from the discharge to the discharge end of the voltage source.
5. The driving apparatus according to claim 4, wherein the switching circuit comprises a first switching tube, a second switching tube and a third switching tube, the first switching tube comprises a control terminal connected to the voltage control module, a first conducting terminal connected to a power voltage and a second conducting terminal connected to a gate of a first power tube, the voltage control module provides a first control voltage to the control terminal of the first switching tube to control on or off between the first conducting terminal and the second conducting terminal of the first switching tube, and the gate of the first power tube is charged when the first switching tube is turned on;
the second switch tube comprises a control end connected to the voltage control module, a first conducting end connected to the ground and a second conducting end connected to the grid electrode of the first power tube, the voltage control module provides a second control voltage to the control end of the second switch tube so as to control the connection or disconnection between the first conducting end and the second conducting end of the second switch tube, and when the second switch tube is connected, the grid electrode of the first power tube discharges to the ground through the connected second switch tube;
the third switching tube comprises a control end connected to the voltage control module, a first conducting end connected to the discharge end and a second conducting end connected to the grid electrode of the first power tube, and the voltage control module provides a third control voltage to the control end of the third switching tube so as to control the connection or disconnection between the first conducting end and the second conducting end of the third switching tube.
6. The driving apparatus as claimed in claim 5, wherein when a power supply voltage charges the gate of the first power transistor, the first switching transistor is turned on, the second switching transistor is turned off, and the third switching transistor is turned off; when the grid electrode of the first power tube discharges to the ground, the first switch tube is turned off, the second switch tube is turned on, and the third switch tube is turned off; when the grid electrode of the first power tube discharges to the discharge end of the voltage source, the second switch tube is turned off, and the third switch tube is turned on.
7. The driving apparatus according to claim 2, further comprising a second driving circuit, wherein the power output circuit further comprises a second power transistor, the second power transistor is an NMOS power transistor, the second driving circuit is configured to provide a second gate voltage to the gate of the second power transistor to control the second power transistor to be turned on or off, the second driving circuit is connected to the gate of the second power transistor, the drain of the second power transistor and the drain of the first power transistor are commonly connected to an external load, the source of the second power transistor is connected to ground, when the second power transistor is turned on, the first power transistor is turned off, and the external load is discharged through the turned-on second power transistor.
8. The driving device according to claim 7, wherein the second driving circuit and the first driving circuit have the same structure.
9. The driving apparatus as claimed in claim 7, further comprising a dead time control module for receiving the first gate voltage and the second gate voltage and providing a first adjustment signal to the first driving circuit and a second adjustment signal to the second driving circuit to control the first power transistor and the second power transistor to conduct alternately.
10. The driving apparatus according to claim 1, wherein a difference between the first voltage and the discharge voltage is not more than 1V.
11. A control method of a drive device, characterized by comprising:
providing a first driving circuit, wherein the first driving circuit comprises a voltage source, the voltage source comprises a discharge end, the discharge end is used for providing a discharge voltage, and the first driving circuit is used for providing a first grid voltage to a first power tube so as to control the conduction or the disconnection of the first power tube;
when the first grid voltage is greater than the first voltage, the grid of the first power tube is connected with the ground and discharges to the ground;
when the first grid voltage is reduced to a first voltage, the grid of the first power tube is connected with the discharge end to discharge the discharge end, and the first voltage is greater than the discharge voltage of the discharge end.
12. The control method of the driving apparatus according to claim 11, wherein the first driving circuit further includes a discharging module and a voltage detecting module;
when the first grid voltage is greater than the first voltage, the grid of the first power tube is connected with the ground, and discharging to the ground comprises the following steps: the voltage detection module outputs a detection signal of a first level to the discharge module so that the first grid voltage is discharged to the ground through the discharge module;
when the first grid voltage is reduced to a first voltage, the grid of the first power tube is connected with the discharge end to discharge to the discharge end, and the first voltage is greater than the discharge voltage of the discharge end, including: the voltage detection module outputs a detection signal of a second level to the discharge module so that the first grid voltage discharges the discharge end of the voltage source through the discharge module.
13. The control method of the driving device according to claim 12, wherein the discharging module includes a switching circuit and a voltage control module, the switching circuit includes a first switching tube, a second switching tube and a third switching tube;
the discharging of the first gate voltage to ground by the discharge module includes: the voltage control module receives the detection signal of the first level and controls the second switch tube to be conducted, the first grid voltage discharges to the ground through the conducted second switch tube, and the first grid voltage is reduced.
14. The control method of the driving device according to claim 13, wherein the discharging the discharge voltage by the discharge module with the first gate voltage includes: the voltage control module receives the detection signal of the second level and controls the third switching tube to be conducted, and the first grid voltage discharges the discharge voltage through the conducted third switching tube.
15. An electronic device, comprising a driving apparatus, a power output circuit and a load, wherein the driving circuit is used for driving the power output circuit so as to provide a load voltage for the load, and the driving apparatus is as claimed in any one of claims 1 to 10.
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| CN202010846579.9A CN112134548B (en) | 2020-08-20 | 2020-08-20 | Driving device, control method thereof and electronic equipment |
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| CN202010846579.9A CN112134548B (en) | 2020-08-20 | 2020-08-20 | Driving device, control method thereof and electronic equipment |
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