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CN112071542B - Manufacturing method of PPTC surface electrode - Google Patents

Manufacturing method of PPTC surface electrode Download PDF

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Publication number
CN112071542B
CN112071542B CN202010845511.9A CN202010845511A CN112071542B CN 112071542 B CN112071542 B CN 112071542B CN 202010845511 A CN202010845511 A CN 202010845511A CN 112071542 B CN112071542 B CN 112071542B
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pptc
baffle
substrate
whole
sputtering
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CN112071542A (en
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田伟
廖兵
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Suzhou Dajing Semiconductor Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C17/00Apparatus or processes specially adapted for manufacturing resistors
    • H01C17/28Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals
    • H01C17/288Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals by thin film techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C7/00Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/02Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material having positive temperature coefficient

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  • Physics & Mathematics (AREA)
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  • Physical Vapour Deposition (AREA)

Abstract

The invention discloses a PPTC surface electrode manufacturing method.A lower baffle comprises a bottom plate and baffle frames positioned around the bottom plate, the bottom plate and the baffle frames are fixedly connected to form a substrate placing groove, and the whole PPTC substrate is clamped and fixed by using an upper baffle and the lower baffle; placing the whole PPTC substrate clamped by the upper baffle and the lower baffle on a track support on a sputtering machine and fixing; the bracket enters a sputtering chamber of a sputtering machine, and the target is electrified for sputtering; after sputtering, taking out and dismantling the upper baffle and the lower baffle from the bracket, and cutting the PPTC substrate into single PPTC chips.

Description

Manufacturing method of PPTC surface electrode
Technical Field
The invention relates to the field of electronic components, in particular to a method for manufacturing a PPTC surface electrode.
Background
PPTC is widely used as a circuit protection device to protect electrical elements constituting electrical equipment when an excessive current flows through the electrical equipment. PPTC devices are also widely used as protection devices for interrupting the flow of current through electrical equipment in the event of a failure of an electrical element.
The PPTC can be connected to a circuit only through a surface electrode, and a common manufacturing method of the surface electrode of the PPTC on the market is to cover metal sheets on the upper surface and the lower surface of a PPTC substrate for lamination, and carry out chemical etching according to a PCB manufacturing process to manufacture the PPTC, namely, the surface of a PPTC chip is covered with a copper foil and then chemically etched into an electrode pattern.
Disclosure of Invention
The invention aims to provide a method for manufacturing a PPTC surface electrode, so as to solve the problems in the background technology.
In order to achieve the purpose, the invention provides the following technical scheme: a manufacturing method of a PPTC surface electrode comprises the following steps:
s1, the lower baffle comprises a bottom plate and baffle frames positioned on the periphery of the bottom plate, the bottom plate and the baffle frames are fixedly connected to form a substrate placing groove, and the whole PPTC substrate is clamped and fixed by the upper baffle and the lower baffle;
s2, pre-operating a sputtering machine and vacuumizing;
s3, placing the whole PPTC substrate clamped by the upper baffle and the lower baffle on a track support on a sputtering machine and fixing;
s4, starting a sputtering machine, enabling the support to enter a sputtering chamber of the sputtering machine, electrifying the target material, and sputtering the whole PPTC substrate;
s5, after sputtering is finished, taking out the whole PPTC substrate clamped by the upper baffle and the lower baffle from the support, and dismantling the upper baffle and the lower baffle;
s6, detecting the thickness, the sheet resistance, the adhesive force and the chip resistance of an electrode layer of the whole PPTC substrate;
and S7, cutting the detected whole PPTC substrate into single PPTC chips.
As a preferred technical scheme of the invention, a plurality of mutually parallel hollowed-out grooves are respectively dug on the upper baffle plate and the bottom plate, and the hollowed-out grooves of the upper baffle plate and the bottom plate are distributed in a staggered manner.
As a preferred embodiment of the present invention, S1 further includes cutting metal outside the hollow grooves on the upper and lower baffles.
In a preferred embodiment of the present invention, the current for energizing the target in S4 is in a range of 10 to 30A.
As a preferred technical scheme of the invention, the preferred current range is 18-22A.
As a preferable technical scheme of the invention, the moving speed of the track support in S4 is 3-9 m/h.
As a preferred technical scheme of the invention, the preferred moving speed of the track support is 5-7 m/h.
Compared with the prior art, the invention has the beneficial effects that: the PPTC substrate is clamped by the upper baffle and the lower baffle, the hollowed-out grooves are formed in the upper baffle and the lower baffle, metal layers are sputtered on the upper surface and the lower surface, the hollowed-out parts can be sputtered on the upper metal layers to form electrodes, and therefore the chemical etching process of metal electrodes is omitted, electrode patterns are directly manufactured, and the PPTC substrate has the advantages of being simple in process steps, more environment-friendly in implementation process and capable of improving production efficiency.
Drawings
Figure 1 is a cross-sectional view of a PPTC substrate sandwiched between upper and lower baffles in accordance with the present invention.
In the figure: 1. an upper baffle plate; 2. a lower baffle plate; 3. a substrate placement groove; 4. a PPTC substrate; 5. and (6) hollowing out the groove.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
With reference to FIG. 1
Embodiment 1 a method for manufacturing a PPTC surface electrode, comprising the steps of:
s1, a lower baffle 2 comprises a bottom plate and baffle frames positioned on the periphery of the bottom plate, the bottom plate and the baffle frames are fixedly connected to form a substrate placing groove 3, the whole PPTC substrate 4 is clamped and fixed by using the upper baffle 1 and the lower baffle 2, a plurality of mutually parallel hollowed-out grooves 5 are respectively formed in the upper baffle 1 and the bottom plate, and the hollowed-out grooves 5 of the upper baffle 1 and the bottom plate are distributed in a staggered mode;
s2, pre-operating a sputtering machine and vacuumizing;
s3, placing the whole PPTC substrate 4 clamped by the upper baffle plate 1 and the lower baffle plate 2 on a track support on a sputtering machine and fixing;
s4, starting a sputtering machine, enabling the support to enter a sputtering chamber of the sputtering machine, electrifying the target, wherein the electrifying current is 10A, and sputtering the whole PPTC substrate 4, wherein the moving speed of the track support is 3 m/h;
s5, after sputtering is finished, taking out the whole PPTC substrate 4 clamped by the upper baffle 1 and the lower baffle 2 from the support, and dismantling the upper baffle 1 and the lower baffle 2;
s6, detecting the thickness, the square resistance, the adhesive force and the chip resistance of an electrode layer of the whole PPTC substrate 4, wherein the thickness of the electrode layer is 8um, the square resistance is 13 omega/□, the adhesive force is 1kg, and the chip resistance change rate is 2%;
and S7, cutting the detected whole PPTC substrate 4 into single PPTC chips.
Example 2: a manufacturing method of a PPTC surface electrode comprises the following steps:
s1, a lower baffle 2 comprises a bottom plate and baffle frames positioned on the periphery of the bottom plate, the bottom plate and the baffle frames are fixedly connected to form a substrate placing groove 3, the whole PPTC substrate 4 is clamped and fixed by using the upper baffle 1 and the lower baffle 2, a plurality of mutually parallel hollowed-out grooves 5 are respectively formed in the upper baffle 1 and the bottom plate, and the hollowed-out grooves 5 of the upper baffle 1 and the bottom plate are distributed in a staggered mode;
s2, pre-operating a sputtering machine and vacuumizing;
s3, placing the whole PPTC substrate 4 clamped by the upper baffle plate 1 and the lower baffle plate 2 on a track support on a sputtering machine and fixing;
s4, starting a sputtering machine, enabling the support to enter a sputtering chamber of the sputtering machine, electrifying the target, wherein the electrifying current is 10A, and sputtering the whole PPTC substrate 4, wherein the moving speed of the track support is 6 m/h;
s5, after sputtering is finished, taking out the whole PPTC substrate 4 clamped by the upper baffle 1 and the lower baffle 2 from the support, and dismantling the upper baffle 1 and the lower baffle 2;
s6, detecting the thickness, the square resistance, the adhesive force and the chip resistance value of an electrode layer of the whole PPTC substrate 4, wherein the thickness of the electrode layer is 5um, the square resistance is 16 omega/□, the adhesive force is 1.2kg, and the chip resistance value change rate is 3%;
and S7, cutting the detected whole PPTC substrate 4 into single PPTC chips.
Example 3: a manufacturing method of a PPTC surface electrode comprises the following steps:
s1, a lower baffle 2 comprises a bottom plate and baffle frames positioned on the periphery of the bottom plate, the bottom plate and the baffle frames are fixedly connected to form a substrate placing groove 3, the whole PPTC substrate 4 is clamped and fixed by using the upper baffle 1 and the lower baffle 2, a plurality of mutually parallel hollowed-out grooves 5 are respectively formed in the upper baffle 1 and the bottom plate, and the hollowed-out grooves 5 of the upper baffle 1 and the bottom plate are distributed in a staggered mode;
s2, pre-operating a sputtering machine and vacuumizing;
s3, placing the whole PPTC substrate 4 clamped by the upper baffle plate 1 and the lower baffle plate 2 on a track support on a sputtering machine and fixing;
s4, starting a sputtering machine, enabling the support to enter a sputtering chamber of the sputtering machine, electrifying the target, wherein the electrifying current is 10A, and sputtering the whole PPTC substrate 4, wherein the moving speed of the track support is 9 m/h;
s5, after sputtering is finished, taking out the whole PPTC substrate 4 clamped by the upper baffle 1 and the lower baffle 2 from the support, and dismantling the upper baffle 1 and the lower baffle 2;
s6, detecting the thickness, the square resistance, the adhesive force and the chip resistance value of an electrode layer of the whole PPTC substrate 4, wherein the thickness of the electrode layer is 2um, the square resistance is 20 omega/□, the adhesive force is 0.5kg, and the chip resistance value change rate is 5%;
and S7, cutting the detected whole PPTC substrate 4 into single PPTC chips.
Example 4: a manufacturing method of a PPTC surface electrode comprises the following steps:
s1, a lower baffle 2 comprises a bottom plate and baffle frames positioned on the periphery of the bottom plate, the bottom plate and the baffle frames are fixedly connected to form a substrate placing groove 3, the whole PPTC substrate 4 is clamped and fixed by using the upper baffle 1 and the lower baffle 2, a plurality of mutually parallel hollowed-out grooves 5 are respectively formed in the upper baffle 1 and the bottom plate, and the hollowed-out grooves 5 of the upper baffle 1 and the bottom plate are distributed in a staggered mode;
s2, pre-operating a sputtering machine and vacuumizing;
s3, placing the whole PPTC substrate 4 clamped by the upper baffle plate 1 and the lower baffle plate 2 on a track support on a sputtering machine and fixing;
s4, starting a sputtering machine, enabling the support to enter a sputtering chamber of the sputtering machine, electrifying the target, wherein the electrifying current is 20A, and sputtering the whole PPTC substrate 4, wherein the moving speed of the track support is 3 m/h;
s5, after sputtering is finished, taking out the whole PPTC substrate 4 clamped by the upper baffle 1 and the lower baffle 2 from the support, and dismantling the upper baffle 1 and the lower baffle 2;
s6, detecting the thickness, the square resistance, the adhesive force and the chip resistance value of an electrode layer of the whole PPTC substrate 4, wherein the thickness of the electrode layer is 14um, the square resistance is 6 omega/□, the adhesive force is 0.5kg, and the chip resistance value change rate is 1%;
and S7, cutting the detected whole PPTC substrate 4 into single PPTC chips.
Example 5: a manufacturing method of a PPTC surface electrode comprises the following steps:
s1, a lower baffle 2 comprises a bottom plate and baffle frames positioned on the periphery of the bottom plate, the bottom plate and the baffle frames are fixedly connected to form a substrate placing groove 3, the whole PPTC substrate 4 is clamped and fixed by using the upper baffle 1 and the lower baffle 2, a plurality of mutually parallel hollowed-out grooves 5 are respectively formed in the upper baffle 1 and the bottom plate, and the hollowed-out grooves 5 of the upper baffle 1 and the bottom plate are distributed in a staggered mode;
s2, pre-operating a sputtering machine and vacuumizing;
s3, placing the whole PPTC substrate 4 clamped by the upper baffle plate 1 and the lower baffle plate 2 on a track support on a sputtering machine and fixing;
s4, starting a sputtering machine, enabling the support to enter a sputtering chamber of the sputtering machine, electrifying the target, wherein the electrifying current is 20A, and sputtering the whole PPTC substrate 4, wherein the moving speed of the track support is 6 m/h;
s5, after sputtering is finished, taking out the whole PPTC substrate 4 clamped by the upper baffle 1 and the lower baffle 2 from the support, and dismantling the upper baffle 1 and the lower baffle 2;
s6, detecting the thickness, the square resistance, the adhesive force and the chip resistance of an electrode layer of the whole PPTC substrate 4, wherein the thickness of the electrode layer is 10 mu m, the square resistance is 8 omega/□, the adhesive force is 1kg, and the chip resistance change rate is 0.5%;
and S7, cutting the detected whole PPTC substrate 4 into single PPTC chips.
Example 6: a manufacturing method of a PPTC surface electrode comprises the following steps:
s1, a lower baffle 2 comprises a bottom plate and baffle frames positioned on the periphery of the bottom plate, the bottom plate and the baffle frames are fixedly connected to form a substrate placing groove 3, the whole PPTC substrate 4 is clamped and fixed by using the upper baffle 1 and the lower baffle 2, a plurality of mutually parallel hollowed-out grooves 5 are respectively formed in the upper baffle 1 and the bottom plate, and the hollowed-out grooves 5 of the upper baffle 1 and the bottom plate are distributed in a staggered mode;
s2, pre-operating a sputtering machine and vacuumizing;
s3, placing the whole PPTC substrate 4 clamped by the upper baffle plate 1 and the lower baffle plate 2 on a track support on a sputtering machine and fixing;
s4, starting a sputtering machine, enabling the support to enter a sputtering chamber of the sputtering machine, electrifying the target, wherein the electrifying current is 20A, and sputtering the whole PPTC substrate 4, wherein the moving speed of the track support is 9 m/h;
s5, after sputtering is finished, taking out the whole PPTC substrate 4 clamped by the upper baffle 1 and the lower baffle 2 from the support, and dismantling the upper baffle 1 and the lower baffle 2;
s6, detecting the thickness, the square resistance, the adhesive force and the chip resistance value of an electrode layer of the whole PPTC substrate 4, wherein the thickness of the electrode layer is 6um, the square resistance is 16 omega/□, the adhesive force is 1.2kg, and the chip resistance value change rate is 2%;
and S7, cutting the detected whole PPTC substrate 4 into single PPTC chips.
Example 7: a manufacturing method of a PPTC surface electrode comprises the following steps:
s1, a lower baffle 2 comprises a bottom plate and baffle frames positioned on the periphery of the bottom plate, the bottom plate and the baffle frames are fixedly connected to form a substrate placing groove 3, the whole PPTC substrate 4 is clamped and fixed by using the upper baffle 1 and the lower baffle 2, a plurality of mutually parallel hollowed-out grooves 5 are respectively formed in the upper baffle 1 and the bottom plate, and the hollowed-out grooves 5 of the upper baffle 1 and the bottom plate are distributed in a staggered mode;
s2, pre-operating a sputtering machine and vacuumizing;
s3, placing the whole PPTC substrate 4 clamped by the upper baffle plate 1 and the lower baffle plate 2 on a track support on a sputtering machine and fixing;
s4, starting a sputtering machine, enabling the support to enter a sputtering chamber of the sputtering machine, electrifying the target, wherein the electrifying current is 30A, and sputtering the whole PPTC substrate 4, wherein the moving speed of the track support is 3 m/h;
s5, after sputtering is finished, taking out the whole PPTC substrate 4 clamped by the upper baffle 1 and the lower baffle 2 from the support, and dismantling the upper baffle 1 and the lower baffle 2;
s6, detecting the thickness, the square resistance, the adhesive force and the chip resistance value of an electrode layer of the whole PPTC substrate 4, wherein the thickness of the electrode layer is 20 mu m, the square resistance is 5 omega/□, the adhesive force is 0.2kg, and the chip resistance value change rate is 1%;
and S7, cutting the detected whole PPTC substrate 4 into single PPTC chips.
Example 8: a manufacturing method of a PPTC surface electrode comprises the following steps:
s8, the lower baffle 2 comprises a bottom plate and baffle frames positioned on the periphery of the bottom plate, the bottom plate and the baffle frames are fixedly connected to form a substrate placing groove 3, the whole PPTC substrate 4 is clamped and fixed by using the upper baffle 1 and the lower baffle 2, a plurality of mutually parallel hollowed-out grooves 5 are respectively formed in the upper baffle 1 and the bottom plate, and the hollowed-out grooves 5 of the upper baffle 1 and the bottom plate are distributed in a staggered mode;
s2, pre-operating a sputtering machine and vacuumizing;
s3, placing the whole PPTC substrate 4 clamped by the upper baffle plate 1 and the lower baffle plate 2 on a track support on a sputtering machine and fixing;
s4, starting a sputtering machine, enabling the support to enter a sputtering chamber of the sputtering machine, electrifying the target, wherein the electrifying current is 30A, and sputtering the whole PPTC substrate 4, wherein the moving speed of the track support is 6 m/h;
s5, after sputtering is finished, taking out the whole PPTC substrate 4 clamped by the upper baffle 1 and the lower baffle 2 from the support, and dismantling the upper baffle 1 and the lower baffle 2;
s6, detecting the thickness, the square resistance, the adhesive force and the chip resistance value of an electrode layer of the whole PPTC substrate 4, wherein the thickness of the electrode layer is 15um, the square resistance is 7 omega/□, the adhesive force is 0.5kg, and the chip resistance value change rate is 2%;
and S7, cutting the detected whole PPTC substrate 4 into single PPTC chips.
Example 9: a manufacturing method of a PPTC surface electrode comprises the following steps:
s1, a lower baffle 2 comprises a bottom plate and baffle frames positioned on the periphery of the bottom plate, the bottom plate and the baffle frames are fixedly connected to form a substrate placing groove 3, the whole PPTC substrate 4 is clamped and fixed by using the upper baffle 1 and the lower baffle 2, a plurality of mutually parallel hollowed-out grooves 5 are respectively formed in the upper baffle 1 and the bottom plate, and the hollowed-out grooves 5 of the upper baffle 1 and the bottom plate are distributed in a staggered mode;
s2, pre-operating a sputtering machine and vacuumizing;
s3, placing the whole PPTC substrate 4 clamped by the upper baffle plate 1 and the lower baffle plate 2 on a track support on a sputtering machine and fixing;
s4, starting a sputtering machine, enabling the support to enter a sputtering chamber of the sputtering machine, electrifying the target, wherein the electrifying current is 30A, and sputtering the whole PPTC substrate 4, wherein the moving speed of the track support is 9 m/h;
s5, after sputtering is finished, taking out the whole PPTC substrate 4 clamped by the upper baffle 1 and the lower baffle 2 from the support, and dismantling the upper baffle 1 and the lower baffle 2;
s6, detecting the thickness, the square resistance, the adhesive force and the chip resistance value of an electrode layer of the whole PPTC substrate 4, wherein the thickness of the electrode layer is 10 mu m, the square resistance is 11 omega/□, the adhesive force is 0.8kg, and the chip resistance value change rate is 3%;
and S7, cutting the detected whole PPTC substrate 4 into single PPTC chips.
The following is a summary table of the test results for the nine groups of examples:
Figure GDA0003363702610000091
in view of the detection results of the nine groups of embodiments in the table above, the larger the current is, the thicker the sputtering layer thickness is, the slower the speed is, and the thicker the sputtering layer thickness is; the thicker the electrode thickness is, the smaller the sheet resistance is, and the better the conductivity is; too thick, the adhesion will deteriorate, too thin, the adhesion will also deteriorate; the chip resistance change rate is measured by the contact resistance of the joint of the sputtering layer and the chip, and in summary, the optimal process for manufacturing the PPTC surface electrode by the sputtering method comprises the following steps: the range of the electrified current is 18-22A, and the moving speed range of the track support is 5-7 m/h.
In the present invention, unless otherwise expressly specified or limited, the terms "mounted," "disposed," "connected," "secured," "screwed" and the like are to be construed broadly, e.g., as meaning fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; the terms may be directly connected or indirectly connected through an intermediate, and may be communication between two elements or interaction relationship between two elements, unless otherwise specifically limited, and the specific meaning of the terms in the present invention will be understood by those skilled in the art according to specific situations.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.

Claims (6)

1. A manufacturing method of a PPTC surface electrode is characterized by comprising the following steps: the method comprises the following steps:
s1, a lower baffle (2) comprises a bottom plate and baffle frames positioned on the periphery of the bottom plate, the bottom plate and the baffle frames are fixedly connected to form a substrate placing groove (3), and the upper baffle (1) and the lower baffle (2) are used for clamping and fixing a whole PPTC substrate (4); the upper baffle (1) and the bottom plate are respectively provided with a plurality of hollowed-out grooves (5) which are parallel to each other, and the hollowed-out grooves (5) of the upper baffle (1) and the bottom plate are distributed in a staggered manner;
s2, pre-operating a sputtering machine and vacuumizing;
s3, placing the whole PPTC substrate (4) clamped by the upper baffle (1) and the lower baffle (2) on a track support on a sputtering machine and fixing;
s4, starting a sputtering machine, enabling the support to enter a sputtering chamber of the sputtering machine, electrifying the target and sputtering the whole PPTC substrate (4);
s5, after sputtering is finished, taking out the whole PPTC substrate (4) clamped by the upper baffle (1) and the lower baffle (2) from the support, and dismantling the upper baffle (1) and the lower baffle (2);
s6, detecting the thickness, the sheet resistance, the adhesive force and the chip resistance of an electrode layer of the whole PPTC substrate (4);
and S7, cutting the detected whole PPTC substrate (4) into single PPTC chips.
2. The method for manufacturing a PPTC surface electrode as claimed in claim 1, wherein: s1 further comprises the step of cutting metal outside the hollow grooves (5) on the upper baffle plate (1) and the lower baffle plate (2).
3. The method for manufacturing a PPTC surface electrode as claimed in claim 1, wherein: in S4, the current range for electrifying the target is 10-30A.
4. The method for manufacturing a PPTC surface electrode as claimed in claim 3, wherein: the current range is 18-22A.
5. The method for manufacturing a PPTC surface electrode as claimed in claim 1, wherein: the moving speed of the track support in the S4 is 3-9 m/h.
6. The method for manufacturing a PPTC surface electrode as claimed in claim 5, wherein: the moving speed of the track support is 5-7 m/h.
CN202010845511.9A 2020-08-20 2020-08-20 Manufacturing method of PPTC surface electrode Active CN112071542B (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19634495A1 (en) * 1996-08-26 1998-03-12 Siemens Matsushita Components Metallising electronic ceramic device body ends
CN107731435A (en) * 2017-09-26 2018-02-23 捷捷半导体有限公司 A kind of preparation method of zinc oxide varistor
CN110268558A (en) * 2017-05-18 2019-09-20 株式会社Lg化学 Method for producing negative electrode for lithium secondary battery

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1614076A (en) * 2004-09-24 2005-05-11 李建康 Electrode template for DC sputtering and microfigure method
CN204125521U (en) * 2014-08-14 2015-01-28 昆山萬豐電子有限公司 A kind of mask clamping fixture for magnetron sputtering technique
TWI580806B (en) * 2015-05-29 2017-05-01 Production method of wafer - type thin film resistors

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19634495A1 (en) * 1996-08-26 1998-03-12 Siemens Matsushita Components Metallising electronic ceramic device body ends
CN110268558A (en) * 2017-05-18 2019-09-20 株式会社Lg化学 Method for producing negative electrode for lithium secondary battery
CN107731435A (en) * 2017-09-26 2018-02-23 捷捷半导体有限公司 A kind of preparation method of zinc oxide varistor

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