CN111900984A - Analog-digital conversion circuit, analog-digital conversion method, chip and household appliance - Google Patents
Analog-digital conversion circuit, analog-digital conversion method, chip and household appliance Download PDFInfo
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Abstract
The application discloses an analog-to-digital conversion circuit, an analog-to-digital conversion method, a chip and a household appliance, wherein the analog-to-digital conversion circuit comprises a preprocessing module, a voltage signal processing module and a voltage signal processing module, wherein the preprocessing module is used for preprocessing an input voltage signal to be converted according to a reference voltage signal and generating a preprocessed voltage signal; the analog-to-digital conversion module is connected with the preprocessing module and is used for converting the preprocessed voltage signals into digital processing signals; and the processing module is connected with the analog-to-digital conversion module and is used for calibrating the digital processing signal to obtain a digital conversion signal corresponding to the voltage signal to be converted. By the mode, the offset error in the analog-to-digital conversion circuit can be adjusted, and therefore the resolution of the analog-to-digital conversion circuit is improved.
Description
Technical Field
The present application relates to the field of analog-to-digital conversion technologies, and in particular, to an analog-to-digital conversion circuit, an analog-to-digital conversion method, a chip, and a household appliance.
Background
Analog to Digital converters (ADCs) can convert Analog to Digital quantities, and their performance determines the performance of the product in certain relation. When measuring a small voltage signal, the offset error (offset) of the analog-to-digital converter itself may often cause the measurement error to be multiplied.
The concept of offset error refers to the overall linear deviation of the analog-to-digital conversion curve, and may be referred to as a deviation of zero. For example, in an analog-to-digital converter, the reference voltage is 1024mV, the resolution is 10bit, when the input signal is 5mV, the conversion value is 0, when the input signal is 6mV, the conversion value is 1, i.e., the offset error is-5 LSB, and the voltage signals below 6mV cannot be resolved.
Disclosure of Invention
The application provides an analog-to-digital conversion circuit, an analog-to-digital conversion method, a chip and a household appliance, and aims to solve the problem that a tiny input signal cannot be distinguished due to offset errors in the prior art.
To solve the above technical problem, the present application provides an analog-to-digital conversion circuit, including: the preprocessing module is used for preprocessing the input voltage signal to be converted according to the reference voltage signal to generate a preprocessed voltage signal; the analog-to-digital conversion module is connected with the preprocessing module and is used for converting the preprocessed voltage signals into digital processing signals; and the processing module is connected with the analog-to-digital conversion module and used for calibrating the digital processing signal to obtain a digital conversion signal corresponding to the voltage signal to be converted.
The preprocessing module receives an input voltage signal to be converted at a first moment and stores the voltage signal to be converted; and introducing the reference voltage signal at a second subsequent moment to raise the voltage signal to be converted by using the reference voltage signal to generate a preprocessed voltage signal.
Wherein, the preprocessing module includes: the voltage converter comprises a first switch, a second switch and a third switch, wherein a first end of the first switch is used for receiving an input voltage signal, and the input voltage signal is an input voltage signal to be converted or an input reference ground voltage signal; a second switch, wherein a first terminal of the second switch is used for receiving a reference ground voltage signal, and a second terminal of the second switch is connected to a second terminal of the first switch through a first capacitor; a third switch, wherein a first end of the third switch is connected to a first node between the first switch and the first capacitor; a fourth switch, wherein the fourth switch is a single-pole double-throw switch, a moving end of the fourth switch is connected to a second node between the second switch and the first capacitor, a first fixed end of the fourth switch is connected to a second end of the third switch through the second capacitor, and a second fixed end of the fourth switch is connected to the reference voltage signal; and a fourth node between the first fixed end of the fourth switch and the second capacitor is connected to the ground input end of the analog-to-digital conversion module.
At a first moment, the first switch, the second switch and the third switch are closed and conducted, a movable end of the fourth switch is connected to a first fixed end, a path from the movable end of the fourth switch to a ground input end of the analog-to-digital conversion module is conducted, a first end of the first switch receives an input voltage signal to be converted, the input voltage signal to be converted and a reference ground voltage signal are respectively transmitted to a signal input end and a ground input end of the analog-to-digital conversion module, and the voltage signal to be converted is stored in the first capacitor and the second capacitor; at a second moment, the first switch, the second switch and the third switch are disconnected, the movable end of the fourth switch is connected to the second fixed end, a path from the movable end of the fourth switch to a reference voltage signal is conducted, and the reference voltage signal is introduced to enable a voltage signal to be converted, which is stored in the first capacitor, to be raised to a first storage voltage signal of a first level; and at a subsequent third moment, the third switch is closed, a path between the first node and the third node is conducted, the second capacitor is charged by using the first storage voltage signal which is stored by the first capacitor and is lifted to the first level, the voltage signal to be converted and stored by the second capacitor is lifted, so that the first capacitor and the second capacitor store the second storage voltage signal of the second level, wherein the second storage voltage signal is used as the generated preprocessing voltage signal and is input to the input signal end of the analog-to-digital conversion module.
The analog-to-digital conversion circuit executes initial calibration operation by using the reference voltage signal in advance to obtain a calibration value corresponding to the reference voltage signal.
Wherein the initial calibration operation comprises: at the first moment of initial calibration, a first switch, a second switch and a third switch are closed and conducted, a movable end of a fourth switch is connected to a first fixed end, a path from the movable end of the fourth switch to a ground input end of an analog-to-digital conversion module is conducted, a first end of the first switch receives an input reference ground voltage signal, the reference ground voltage signal is respectively transmitted to a signal input end and the ground input end of the analog-to-digital conversion module, and the reference ground voltage signal is stored in a first capacitor and a second capacitor; at the second moment of the initial calibration, the first switch, the second switch and the third switch are disconnected, and the movable end of the fourth switch is connected to the second fixed end so as to conduct the path from the movable end of the fourth switch to the reference voltage signal, so that the reference ground voltage signal stored by the first capacitor is further raised by using the introduced reference voltage signal, and thus the first initial calibration stored voltage signal is generated; and at the third moment of the initial calibration, the third switch is closed, a path between the first node and the third node is conducted, the second capacitor is charged by using the first initial calibration storage voltage signal, the reference ground voltage signal stored by the second capacitor is raised, a second initial calibration storage voltage signal is generated and stored in the first capacitor and the second capacitor, wherein the second initial calibration storage voltage signal stored on the second capacitor is used as the initial calibration voltage signal and is input to the input signal end of the analog-to-digital conversion module, so that the initial calibration voltage signal is converted into a corresponding initial calibration digital signal by using the analog-to-digital conversion module and is used as a calibration value.
And the processing module executes calibration processing on the digital processing signal according to the calibration value to obtain a digital conversion signal corresponding to the voltage signal to be converted.
And the capacitance value of the first capacitor is the same as that of the second capacitor.
In order to solve the above technical problem, the present application provides an analog-to-digital conversion method applied to the above analog-to-digital conversion circuit, wherein the analog-to-digital conversion method includes: preprocessing an input voltage signal to be converted according to a reference voltage signal to generate a preprocessed voltage signal; converting the preprocessed voltage signal into a digital processing signal; and calibrating the digital processing signal to obtain a digital conversion signal corresponding to the voltage signal to be converted.
Wherein, carry out calibration to the digital processing signal, obtain the digital conversion signal that waits to convert the voltage signal and correspond, include: acquiring a calibration value corresponding to the reference voltage signal; and acquiring a difference value between the digital processing signal and the calibration value, wherein the difference value is used as a digital conversion signal corresponding to the voltage signal to be converted.
In order to solve the above technical problem, the present application provides a chip including the above analog-to-digital conversion circuit. In order to solve the technical problem, the application provides a household appliance, which comprises the chip.
The application discloses an analog-to-digital conversion circuit, an analog-to-digital conversion method, a chip and a household appliance, wherein the analog-to-digital conversion circuit comprises a preprocessing module, a voltage signal processing module and a voltage signal processing module, wherein the preprocessing module is used for preprocessing an input voltage signal to be converted according to a reference voltage signal and generating a preprocessed voltage signal; the analog-to-digital conversion module is connected with the preprocessing module and is used for converting the preprocessed voltage signals into digital processing signals; and the processing module is connected with the analog-to-digital conversion module and used for calibrating the digital processing signal to obtain a digital conversion signal corresponding to the voltage signal to be converted. By the mode, the offset error in the analog-to-digital conversion circuit can be adjusted, and therefore the resolution of the analog-to-digital conversion circuit is improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic diagram of an embodiment of an analog-to-digital conversion circuit according to the present application;
fig. 2 is a schematic circuit diagram of an embodiment of an analog-to-digital conversion circuit according to the present application;
FIG. 3 is a schematic flow chart diagram illustrating an embodiment of an analog-to-digital conversion method according to the present application;
FIG. 4 is a schematic structural diagram of an embodiment of a chip of the present application;
fig. 5 is a schematic structural diagram of an embodiment of the household appliance of the present application.
Detailed Description
In order to make those skilled in the art better understand the technical solution of the present application, the analog-to-digital conversion circuit, the analog-to-digital conversion method, the chip and the household appliance provided by the present invention are further described in detail below with reference to the accompanying drawings and the detailed description.
The analog signal can only be processed by software after being converted into a digital signal, and the operation can be realized by an analog-to-digital converter. Therefore, the analog-to-digital converter is widely applied to various chips, household appliances and electronic equipment. There are many types of analog-to-digital converters, such as successive approximation type analog-to-digital converters, integral type converters, parallel analog-to-digital converters, pipeline type analog-to-digital converters, folding type analog-to-digital converters, and the like. The analog-to-digital converter may be a separate chip or may be a unit included in the chip.
The analog signal is a continuous time and continuous amplitude, and the digital signal is a discrete time and discrete amplitude. In order to convert an analog signal into a digital signal, an analog-to-digital converter generally goes through four processes of sampling, holding, quantizing, and encoding. The higher the conversion accuracy of the analog-to-digital converter is, the closer the digital signal actually obtained by the four processes is to the ideal digital signal.
The analog-to-digital converter usually includes an analog-to-digital conversion circuit, and the offset error is an important parameter for determining the accuracy of the analog-to-digital conversion circuit, and the smaller the offset error is, the more accurate the analog-to-digital conversion result is. The offset error may be caused by various factors, such as device manufacturing reasons, or may be caused by a difference between a reference ground signal and a reference ground signal of an external input signal, or an offset of a comparator itself in the circuit, etc. during circuit design.
Therefore, the analog-to-digital conversion circuit not only can realize analog-to-digital conversion, but also can solve the problem that a small input signal cannot be distinguished due to offset errors in the prior art, so that the resolution of the analog-to-digital conversion circuit is improved.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an embodiment of an analog-to-digital conversion circuit according to the present application. In this embodiment, the analog-to-digital conversion circuit 100 may include a preprocessing module 110, an analog-to-digital conversion module 120, and a processing module 130.
The preprocessing module 110 may be configured to preprocess the input voltage signal V0 to be converted according to the reference voltage signal VREF to generate a preprocessed voltage signal. The analog-to-digital conversion module 120 may be connected to the pre-processing module 110 to convert the pre-processed voltage signal into a digitally processed signal. The processing module 130 may be connected to the analog-to-digital conversion module 120 to perform calibration processing on the digital processing signal to obtain a digital conversion signal corresponding to the voltage signal V0 to be converted.
The voltage signal V0 to be converted is an analog signal, and the digital conversion signal is a digital signal, and the purpose of this embodiment is to convert the voltage signal V0 to be converted, which is an analog signal, into a corresponding digital conversion signal. For example, when the voltage signal V0 to be converted is 5, the digital conversion signal may be converted to "0101".
Further, the preprocessing module 110 may receive the input voltage signal V0 to be converted at a first time, store the voltage signal V0 to be converted; and introducing the reference voltage signal VREF at a second subsequent time to raise the to-be-converted voltage signal V0 with the reference voltage signal VREF, thereby generating a pre-processed voltage signal. The preprocessed voltage signal is an analog signal.
The analog-to-digital conversion module 120 may perform analog-to-digital conversion on the preprocessed voltage signal, where the analog-to-digital conversion includes four processes of sampling, holding, quantizing, and encoding. The analog-to-digital conversion module 120 may measure the pre-processed voltage signal at certain specific time, i.e., complete the sampling.
Since the width of the sampling pulse is short, the sampling output is an intermittent narrow pulse. To digitize a sampled output signal, the instantaneous analog signal resulting from the sampled output needs to be held for a period of time, i.e., the hold is completed.
Quantization is the conversion of a continuous amplitude sample signal into a discrete time, discrete amplitude digital signal, the main problem of quantization being quantization error. The quantization noise mean square value is related to the quantization interval and the input impedance value of the analog-to-digital conversion module 120, assuming that the noise signal is uniformly distributed in the quantization level.
The coding is to code the quantized signal into a binary code and output the binary code. Some of the four processes are combined, for example, sampling and holding can be performed by using the same circuit in the analog-to-digital conversion module 120, quantization and coding can be performed simultaneously in the conversion process, and the time used can be a part of the holding time.
It should be noted that the reference voltage signal VREF is a signal introduced for solving the offset error in this embodiment, is a voltage reference of the preprocessing module 110, is a reference voltage for processing the to-be-converted voltage signal V0, and may not have a requirement on the precision thereof. In addition, the analog-to-digital conversion module 120 also includes a conversion reference voltage, which is a voltage reference of the analog-to-digital conversion module 120 and is a voltage for processing the preprocessed voltage signal. Therefore, there is no correlation between the reference voltage signal VREF and the conversion reference voltage, and those skilled in the art can set the values of both signals according to actual needs. In some embodiments, the reference voltage signal VREF and the conversion reference voltage may be the same or different.
The embodiment provides an analog-to-digital conversion circuit, wherein a preprocessing module can introduce a reference voltage signal to lift a conversion voltage signal to obtain a preprocessed voltage signal; the analog-to-digital conversion module can convert the preprocessed voltage signal into a digital processing signal; the processing module is used for calibrating the digital processing signal to obtain a digital conversion signal corresponding to the voltage signal to be converted. By raising the converted voltage signal, the analog-to-digital conversion circuit can distinguish the tiny converted voltage signal and process the tiny converted voltage signal, namely, the offset error is eliminated or reduced.
Compared with digital calibration in the related art, namely, a reference voltage point is given to be converted once, and the converted value of the reference voltage is used for addition, or an operational amplifier is added to raise an output signal, the former can only aim at the situation that an offset error is biased upwards (namely, the situation that 0mV is input and the output converted value is 10), but cannot calibrate the situation that the offset error is biased downwards (namely, the situation that 5mV is input and the output converted value is 0), and the latter added operational amplifier introduces noise to cause the reduction of the overall performance. The analog-to-digital conversion circuit of the embodiment can be used when the offset error is biased upwards or downwards, so that the absolute error of the analog-to-digital conversion circuit caused by the offset error can be solved; and no additional noise is introduced.
Referring to fig. 2, fig. 2 is a schematic circuit structure diagram of an embodiment of an analog-to-digital conversion circuit of the present application. IN this embodiment, the analog-to-digital conversion module 120 may include a signal input terminal ADC _ IN and a ground input terminal ADC _ GND. The pre-processing module 110 may include four switches S0-S3 and two capacitors C0 and C1. Wherein the capacitance of the first capacitor C0 and the capacitance of the second capacitor C1 may be the same.
Specifically, a first terminal of the first switch S0 is configured to receive an input voltage signal VIN, where the input voltage signal VIN is an input voltage signal V0 to be converted or an input reference ground voltage signal GND. The first terminal of the second switch S1 is used for receiving the ground reference voltage GND, and the second terminal of the second switch S2 is connected to the second terminal of the first switch S0 through the first capacitor C0.
A first terminal of the third switch S2 is connected to a first node between the first switch S0 and the first capacitor C0. The fourth switch S3 is a single pole double throw switch that includes a moving end, the moving end being the so-called "pole", and two stationary ends. The single-pole double-throw switch can control signals to be output to two different directions. The moving terminal a of the fourth switch S3 is connected to the second node between the second switch S1 and the first capacitor C0, the first stationary terminal b of the fourth switch S3 is connected to the second terminal of the third switch S2 through the second capacitor C1, and the second stationary terminal C of the fourth switch S3 is connected to the reference voltage signal VREF.
A third node between the third switch S2 and the second capacitor C1 is connected to the signal input terminal ADC _ IN of the analog-to-digital conversion module 120, and a fourth node between the first fixed terminal b of the fourth switch and the second capacitor C1 is connected to the ground input terminal ADC _ GND of the analog-to-digital conversion module 110.
The first switch S0, the second switch S1, the third switch S2, the fourth switch S3 and the like can be controlled by the control device to turn on and off the switches. Program software may be provided in the control means to control the switching on and off of the first switch S0, the second switch S1, the third switch S2 and the fourth switch S3, respectively, at respective times.
In this embodiment, the operation of generating the digitally processed signal may include:
at the first time, the first switch S0, the second switch S1, and the third switch S2 are turned on, and the moving terminal a of the fourth switch S3 is connected to the first stationary terminal b to be turned on to a path of the ground input terminal ADC _ GND of the analog-to-digital conversion module 120, and the first terminal of the first switch S0 receives the input voltage signal V0 to be converted, so that the input voltage signal to be converted and the reference ground voltage signal GND are transferred to the signal input terminal ADC _ IN and the ground input terminal ADC _ GND of the analog-to-digital conversion module 120, respectively, and the voltage signal to be converted is stored IN the first capacitor C0 and the second capacitor C1.
At the second time, the first switch S0, the second switch S1, and the third switch S2 are turned off, and the moving terminal a of the fourth switch S4 is connected to the second stationary terminal C to be turned on to the path of the reference voltage signal VREF, so that the reference voltage signal VREF is introduced to raise the voltage signal V0 to be converted, stored in the first capacitor C0, to the first storage voltage signal of the first level. The first storage voltage signal is the to-be-converted voltage signal V0+ the reference voltage signal VREF.
At a third subsequent time, the first switch S0, the second switch S1 are opened, and the third switch S2 is closed to turn on a path between the first node between the first switch S0 and the first capacitor C0 and the third node between the third switch S2 and the second capacitor C1, so that the second capacitor C1 is charged with the first storage voltage signal stored by the first capacitor C0 and raised to the first level to raise the voltage signal V0 stored by the second capacitor C1, so that the first capacitor C0 and the second capacitor C1 store the second storage voltage signal at the second level, wherein the second storage voltage signal is the voltage signal to be converted
The second storage voltage signal is inputted to the input signal terminal ADC _ IN of the analog-to-digital conversion module 120 as the generated preprocessed voltage signal, that is, at this time
At the fourth moment, the first switch S0, the second switch S1, and the third switch S2 are turned off, and the analog-to-digital conversion module 120 performs an analog-to-digital conversion process on the preprocessed voltage signal to obtain a digital processed signal.
Further, the processing module 130 may perform a calibration process on the digital processing signal according to the calibration value to obtain a digital conversion signal corresponding to the voltage signal V0 to be converted, for example, subtract the calibration value from the digital processing signal to obtain the digital conversion signal.
The analog-to-digital conversion circuit 120 may perform an initial calibration operation with the reference voltage signal VREF in advance to obtain a calibration value corresponding to the reference voltage signal.
In this embodiment, the initial calibration operation may include:
at a first time of the initial calibration, the first switch S0, the second switch S1, and the third switch S2 are closed to be turned on, and the moving terminal a of the fourth switch S4 is connected to the first stationary terminal b to be turned on to a path of the ground input terminal ADC _ GND of the analog-to-digital conversion module 120, and the first terminal of the first switch S0 receives the input reference ground voltage signal GND, thereby transferring the reference ground voltage signal GND to the signal input terminal ADC _ IN and the ground input terminal ADC _ GND of the analog-to-digital conversion module, respectively, and storing the reference ground voltage signal GND IN the first capacitor and the second capacitor.
At the second time of the initial calibration, the first switch S0, the second switch S1, and the third switch S2 are turned off, and the moving terminal a of the fourth switch S3 is connected to the second stationary terminal C to be turned on to the path of the reference voltage signal VREF, so as to further raise the reference ground voltage signal GND stored in the first capacitor C0 by the introduced reference voltage signal VREF, thereby generating the first initial calibration storage voltage signal. Wherein the first initial calibration storage voltage signal is 0+ the reference voltage signal VREF.
At a third time of the initial calibration, the first switch S0, the second switch S1 are opened, and the third switch S2 is closed to turn on a path between the first node between the first switch S0 and the first capacitor C0 and the third node between the third switch S2 and the second capacitor C1, so that the second capacitor C1 is charged with the first initial calibration storage voltage signal to raise the reference ground voltage signal GND stored in the second capacitor C1, thereby generating and storing the second initial calibration storage voltage signal at the first time of the initial calibrationA capacitor C0 and a second capacitor C1, wherein the second initial calibration stores the voltage signal
The second initial calibration storage voltage signal stored on the second capacitor C1 is input as an initial calibration voltage signal to the input signal terminal ADC _ IN of the analog-to-digital conversion module 120, and at this time,
to convert the initial calibration voltage signal into a corresponding initial calibration digital signal as a calibration value using the analog-to-digital conversion module 120.
As can be seen from the above, the operation of obtaining the digitally processed signal differs from the initial calibration operation in that the input voltage signal VIN is different: in the operation of obtaining the digital processing signal, the input voltage signal is a voltage signal V0 to be converted; in the operation of the initial calibration operation, the input voltage signal is the reference ground voltage signal GND. The calibration value is used for eliminating the influence of the reference voltage signal VREF lifting the voltage signal to be converted.
For example, when the analog-to-digital conversion module 120 has an offset error and the offset error is biased down, i.e. when the input voltage signal is 5mV, the conversion value is 0 (0000); when the input voltage signal is 6mV, the conversion value is 1 (0001); when the input voltage signal is 7mV, the conversion value is 2 (0010); when the input voltage signal is 8mV, the conversion value is 3(0011) … …, i.e., the offset error of the adc module 120 is-5 LSB. After the analog-to-digital conversion circuit 100 in this embodiment is adopted, as shown in the following table, if the input voltage signal V0 to be converted is 4mV, the reference voltage signal VREF is 12 mV; then the preprocessed voltage signal is 4+ 6-10 mV, and the obtained digitally processed signal is 5 (0101); the initial calibration voltage signal is 12/2 mV and 6mV, the obtained calibration value is 1(0001), i.e. the digital conversion signal is 5-1 ═ 4(0100), exactly consistent with the ideal digital conversion value, and so on. The following table shows the correlation results of the voltage signal to be converted V0 from 1V to 6V, and the digital conversion signal obtained by the correlation results is consistent with the ideal digital conversion value.
In this embodiment, the reference voltage signal is 12mV, if the voltage signal to be processed is 1mV, the digital conversion signal is 1(0001), the minute voltage signal can be converted, and the conversion value is consistent with the ideal digital conversion value, that is, the offset error is eliminated by the analog-to-digital conversion circuit 100.
In addition, it should be noted that the reference voltage signal VREF needs to be larger than the reference ground voltage signal GND, which is 0. Too large a reference voltage signal VREF may cause a large deviation between the input analog quantity and the converted digital quantity, and too small a reference voltage signal VREF may cause an offset error that cannot be completely eliminated, so that a person skilled in the art may set the size of the reference voltage signal VREF according to the needs of a product.
The calibration process is performed on the digitally processed signal based on the calibration value, which may be the addition or subtraction of the calibration value from the digitally processed signal to obtain a digitally converted signal. In other embodiments, other calibration processes may be used.
Alternatively, to eliminate offset errors and to match the designed sampling time in mass production, a calibration bit may be reserved for the reference voltage signal VREF and the first capacitor C0.
Based on the analog-to-digital conversion circuit 100, the present application also provides an analog-to-digital conversion method. Referring to fig. 3, fig. 3 is a schematic flowchart illustrating an embodiment of an analog-to-digital conversion method according to the present application. The method of the embodiment comprises the following steps:
s11: and preprocessing the input voltage signal to be converted according to the reference voltage signal to generate a preprocessed voltage signal.
The preprocessing module 110 in the analog-to-digital conversion circuit 100 may preprocess the input voltage signal V0 to be converted according to the reference voltage signal VREF to generate a preprocessed voltage signal. The operation of preprocessing may include raising the voltage signal to be converted V0 with the reference voltage signal VREF.
Specifically, the preprocessing module 110 may receive an input signal to be converted V0 at a first time, store the signal to be converted V0; and introducing a reference voltage signal VREF at a second and third subsequent time to raise the to-be-converted signal V0 with the reference voltage signal VREF, thereby generating a preprocessed voltage signal. For example, the reference voltage signal VREF may be used to raise the voltage signal V0 to be converted to the first storage voltage signal of the first level at the second time, and the second storage voltage signal may be obtained from the first storage voltage signal at the third time, and used as the preprocessing voltage signal.
S12: and converting the preprocessed voltage signal into a digital processing signal.
The analog-to-digital conversion module 120 in the analog-to-digital conversion circuit 100 may convert the preprocessed voltage signal into a digital processed signal, where the voltage signal to be converted V0 and the preprocessed voltage signal are both analog signals, and the digital processed signal is a digital signal, so as to complete the conversion from an analog quantity to a digital quantity. Specifically, the analog-to-digital conversion module 120 may perform fourier transform on the voltage signal to be converted to obtain a digital processing signal.
S13: and calibrating the digital processing signal to obtain a digital conversion signal corresponding to the voltage signal to be converted.
The processing module 130 in the analog conversion circuit 100 may perform calibration processing on the digital signal to obtain a digital conversion signal corresponding to the voltage signal to be converted. In this embodiment, since the voltage signal to be converted is raised by using the reference voltage signal, and the digital processing signal is a digital signal obtained by converting the voltage signal after the corresponding preprocessing, the digital processing signal needs to be calibrated to obtain the digital conversion signal corresponding to the voltage signal to be converted V0.
Specifically, the processing module 130 may obtain a calibration value corresponding to the reference voltage signal VREF; and acquiring a difference value between the digital processing signal and the calibration value, and taking the difference value as a digital conversion signal corresponding to the voltage signal to be converted, namely, performing digital processing on the digital processing signal by using the calibration value corresponding to the reference voltage signal VREF, namely, obtaining an obtained digital conversion signal.
Wherein the step of obtaining the calibration value may comprise: the preprocessing module 110 preprocesses the reference voltage signal VREF to generate an initial calibration voltage signal; the analog-to-digital conversion module 120 converts the initial calibration voltage signal to a calibration value.
Specifically, the preprocessing module 110 may receive an input reference ground voltage signal GND at a first time of initial calibration, store the reference ground voltage signal GND; introducing a reference voltage signal VREF at a second moment of the subsequent initial calibration to raise a reference ground voltage signal GND by using the reference voltage signal VREF so as to generate a first initial calibration storage voltage signal; at the third time of the initial calibration, a second initial calibration storage voltage signal is obtained by using the first initial calibration storage voltage signal, and the second initial calibration storage voltage signal is input to the analog-to-digital conversion module 120 as an initial calibration voltage signal, and the initial calibration voltage signal is converted into a corresponding initial calibration digital signal by using the analog-to-digital conversion module 120 as a calibration value.
The embodiment discloses an analog-to-digital conversion method, which comprises the steps of utilizing a reference voltage signal VREF to lift a signal to be processed to obtain a digital processing signal, so that a tiny signal can be distinguished; then, the digital processing signal is processed through the calibration value corresponding to the reference voltage signal VREF to obtain a digital conversion signal corresponding to the signal to be processed, so that the influence caused by the reference voltage signal VREF is eliminated; therefore, the overall absolute error caused by the offset error can be solved, and no extra noise is introduced.
Based on the analog-to-digital conversion circuit 100, the present application also provides a chip. Referring to fig. 4, fig. 4 is a schematic structural diagram of a chip according to an embodiment of the present application. In this embodiment, the chip 200 may include the analog-to-digital conversion circuit 100.
The chip 200 may be an ADC, or may be another chip integrating the ADC. The chip 200, which may also be understood as a microcircuit, a microchip, an integrated circuit, etc., is a generic term for semiconductor component products. In the present embodiment, the chip 200 may be formed on the surface of a semiconductor wafer by miniaturizing the analog-to-digital conversion circuit 100.
Based on the analog-to-digital conversion circuit 100, the application also provides a household appliance. Referring to fig. 5, fig. 5 is a schematic structural diagram of an embodiment of a household appliance according to the present application. In this embodiment, the household appliance 300 may include the chip 200 including the analog-to-digital conversion circuit 100 described above. The household appliance 300 may be a refrigerator, a television, a washing machine, or other household appliances.
It is to be understood that the specific embodiments described herein are merely illustrative of the application and are not limiting of the application. In addition, for convenience of description, only a part of structures related to the present application, not all of the structures, are shown in the drawings. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terms "first", "second", etc. in this application are used to distinguish between different objects and not to describe a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
The above description is only for the purpose of illustrating embodiments of the present application and is not intended to limit the scope of the present application, and all modifications of equivalent structures and equivalent processes, which are made by the contents of the specification and the drawings of the present application or are directly or indirectly applied to other related technical fields, are also included in the scope of the present application.
Claims (12)
1. An analog-to-digital conversion circuit, comprising:
the preprocessing module is used for preprocessing the input voltage signal to be converted according to the reference voltage signal to generate a preprocessed voltage signal;
the analog-to-digital conversion module is connected with the preprocessing module and is used for converting the preprocessed voltage signals into digital processing signals;
and the processing module is connected with the analog-to-digital conversion module and is used for calibrating the digital processing signal to obtain a digital conversion signal corresponding to the voltage signal to be converted.
2. The analog-to-digital conversion circuit of claim 1, wherein the preprocessing module receives the input voltage signal to be converted at a first time, stores the voltage signal to be converted; and introducing the reference voltage signal at a second subsequent moment so as to raise the voltage signal to be converted by using the reference voltage signal and generate the preprocessed voltage signal.
3. The analog-to-digital conversion circuit of claim 2, wherein the preprocessing module comprises:
a first switch, wherein a first terminal of the first switch is configured to receive an input voltage signal, wherein the input voltage signal is the input voltage signal to be converted or the input reference ground voltage signal;
a second switch, wherein a first terminal of the second switch is configured to receive the reference ground voltage signal, and a second terminal of the second switch is connected to a second terminal of the first switch through a first capacitor;
a third switch, wherein a first end of the third switch is connected to a first node between the first switch and the first capacitor;
a fourth switch, wherein the fourth switch is a single-pole double-throw switch, a moving terminal of the fourth switch is connected to a second node between the second switch and the first capacitor, a first fixed terminal of the fourth switch is connected to a second terminal of the third switch through a second capacitor, and a second fixed terminal of the fourth switch is connected to the reference voltage signal;
a third node between the third switch and the second capacitor is connected to the signal input end of the analog-to-digital conversion module, and a fourth node between the first fixed end of the fourth switch and the second capacitor is connected to the ground input end of the analog-to-digital conversion module.
4. The analog-to-digital conversion circuit of claim 3, wherein at the first time, the first switch, the second switch and the third switch are closed and conducted, a moving terminal of the fourth switch is connected to the first stationary terminal, a path from the moving terminal of the fourth switch to a ground input terminal of the analog-to-digital conversion module is conducted, a first terminal of the first switch receives the input voltage signal to be converted, the input voltage signal to be converted and the reference ground voltage signal are respectively transmitted to the signal input terminal and the ground input terminal of the analog-to-digital conversion module, and the voltage signal to be converted is stored in the first capacitor and the second capacitor;
at the second moment, the first switch, the second switch and the third switch are turned off, the movable end of the fourth switch is connected to the second stationary end, a path from the movable end of the fourth switch to the reference voltage signal is conducted, and the reference voltage signal is introduced to raise the voltage signal to be converted, which is stored in the first capacitor, to a first storage voltage signal of a first level;
at a third subsequent time, the third switch is closed, a path between the first node and the third node is turned on, the first storage voltage signal stored by the first capacitor and raised to the first level is used for charging the second capacitor, the voltage signal to be converted stored by the second capacitor is raised, and the first capacitor and the second capacitor store a second storage voltage signal at a second level, wherein the second storage voltage signal is input to the input signal terminal of the analog-to-digital conversion module as a generated pre-processing voltage signal.
5. The analog-to-digital conversion circuit of claim 3, wherein the analog-to-digital conversion circuit performs an initial calibration operation using the reference voltage signal in advance to obtain a calibration value corresponding to the reference voltage signal.
6. The analog-to-digital conversion circuit of claim 5, wherein the initial calibration operation comprises:
at a first time of initial calibration, the first switch, the second switch and the third switch are closed and conducted, a moving terminal of the fourth switch is connected to the first fixed terminal, a path from the moving terminal of the fourth switch to a ground input terminal of the analog-to-digital conversion module is conducted, a first terminal of the first switch receives the input reference ground voltage signal, the reference ground voltage signal is respectively transmitted to the signal input terminal and the ground input terminal of the analog-to-digital conversion module, and the reference ground voltage signal is stored in the first capacitor and the second capacitor;
at a second time of initial calibration, the first switch, the second switch and the third switch are turned off, the moving terminal of the fourth switch is connected to the second fixed terminal, a path from the moving terminal of the fourth switch to the reference voltage signal is turned on, and the reference voltage signal stored in the first capacitor is further raised by using the introduced reference voltage signal, so as to generate a first initial calibration storage voltage signal;
at a third time of the initial calibration, the third switch is closed, a path between the first node and the third node is conducted, the second capacitor is charged by using the first initial calibration storage voltage signal, the reference ground voltage signal stored by the second capacitor is raised, a second initial calibration storage voltage signal is generated and stored in the first capacitor and the second capacitor, wherein the second initial calibration storage voltage signal stored on the second capacitor is used as an initial calibration voltage signal and input to the input signal terminal of the analog-to-digital conversion module, and the initial calibration voltage signal is converted into a corresponding initial calibration digital signal by using the analog-to-digital conversion module as the calibration value.
7. The analog-to-digital conversion circuit according to claim 6, wherein the processing module performs calibration processing on the digital processing signal according to the calibration value to obtain a digital conversion signal corresponding to the voltage signal to be converted.
8. The analog-to-digital conversion circuit according to claim 3, wherein a capacitance value of the first capacitor is the same as a capacitance value of the second capacitor.
9. An analog-to-digital conversion method applied to the analog-to-digital conversion circuit according to any one of claims 1 to 8, wherein the analog-to-digital conversion method comprises:
preprocessing an input voltage signal to be converted according to a reference voltage signal to generate a preprocessed voltage signal;
converting the preprocessed voltage signal into a digital processing signal;
and calibrating the digital processing signal to obtain a digital conversion signal corresponding to the voltage signal to be converted.
10. The analog-to-digital conversion method according to claim 9, wherein calibrating the digital processing signal to obtain a digital conversion signal corresponding to the voltage signal to be converted comprises:
acquiring a calibration value corresponding to the reference voltage signal;
and acquiring a difference value between the digital processing signal and the calibration value, wherein the difference value is used as the digital conversion signal corresponding to the voltage signal to be converted.
11. A chip comprising an analog-to-digital conversion circuit as claimed in any one of claims 1 to 8.
12. A household appliance, characterized in that it comprises a chip according to claim 11.
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| CN101655687A (en) * | 2008-08-20 | 2010-02-24 | 鸿富锦精密工业（深圳）有限公司 | Calibration system of voltage error |
| CN106571824A (en) * | 2015-10-08 | 2017-04-19 | 联发科技（新加坡）私人有限公司 | Signal processing circuit |
| US10090848B1 (en) * | 2018-01-14 | 2018-10-02 | Shenzhen GOODIX Technology Co., Ltd. | Data converters systematic error calibration using on chip generated precise reference signal |
| CN111162783A (en) * | 2019-11-13 | 2020-05-15 | 广东电网有限责任公司 | Signal analog-digital conversion system |
| CN111175591A (en) * | 2018-11-13 | 2020-05-19 | 湖南中车时代电动汽车股份有限公司 | Signal detection circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101655687A (en) * | 2008-08-20 | 2010-02-24 | 鸿富锦精密工业（深圳）有限公司 | Calibration system of voltage error |
| CN106571824A (en) * | 2015-10-08 | 2017-04-19 | 联发科技（新加坡）私人有限公司 | Signal processing circuit |
| US10090848B1 (en) * | 2018-01-14 | 2018-10-02 | Shenzhen GOODIX Technology Co., Ltd. | Data converters systematic error calibration using on chip generated precise reference signal |
| CN111175591A (en) * | 2018-11-13 | 2020-05-19 | 湖南中车时代电动汽车股份有限公司 | Signal detection circuit |
| CN111162783A (en) * | 2019-11-13 | 2020-05-15 | 广东电网有限责任公司 | Signal analog-digital conversion system |
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