CN111834377A - Array substrate, display panel and display device - Google Patents
Array substrate, display panel and display device Download PDFInfo
- Publication number
- CN111834377A CN111834377A CN202010102893.6A CN202010102893A CN111834377A CN 111834377 A CN111834377 A CN 111834377A CN 202010102893 A CN202010102893 A CN 202010102893A CN 111834377 A CN111834377 A CN 111834377A
- Authority
- CN
- China
- Prior art keywords
- signal
- array substrate
- mounting hole
- signal lines
- group
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 63
- 238000010586 diagram Methods 0.000 description 14
- 238000000034 method Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 241000219122 Cucurbita Species 0.000 description 1
- 235000009852 Cucurbita pepo Nutrition 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000002096 quantum dot Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Nonlinear Science (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
The invention discloses an array substrate, a display panel and a display device. The array substrate is provided with a first area and a second area which are distributed in the first direction in sequence; the array substrate comprises a mounting hole, a pixel circuit and a signal line which is connected with the pixel circuit and extends along a second direction, and the first direction is intersected with the second direction; the first region is provided with a mounting hole and a pixel circuit located on at least one side of the mounting hole in the second direction; the second region is provided with a pixel circuit; the signal lines are divided into a first group of signal lines arranged in the first area and a second group of signal lines arranged in the second area, each signal line in the first group of signal lines is connected to the first fixed potential end, and each signal line in the second group of signal lines is connected to the second fixed potential end. The array substrate disclosed by the invention can adjust the voltage drop difference of the signal lines in the area where the mounting hole is located and other areas, and realizes the uniformity of the loading signals of each pixel circuit.
Description
Technical Field
The invention belongs to the technical field of display, and particularly relates to an array substrate, a display panel and a display device.
Background
With the rapid development of electronic devices, the requirement of users on screen occupation ratio is higher and higher, and traditional electronic devices such as mobile phones, tablet computers and the like need to integrate front cameras, earphones, infrared sensing elements and the like. In the prior art, a groove (Notch) or an opening may be formed in a display screen, and external light may enter a photosensitive component located below the screen through the groove or the opening.
Due to the existence of the slotted or perforated areas, the signal lines connected with the pixel circuits in the row direction and/or the column direction have difference, and the uniformity of display in different areas of the display screen is influenced.
Disclosure of Invention
The embodiment of the invention provides an array substrate, a display panel and a display device, and aims to improve the uniformity of voltage drop of each area and further improve the display uniformity.
In a first aspect, the present invention provides an array substrate having a first region and a second region successively distributed in a first direction; the array substrate comprises a mounting hole, a pixel circuit and a signal line which is connected with the pixel circuit and extends along a second direction, and the first direction is intersected with the second direction; the first region is provided with a mounting hole and a pixel circuit located on at least one side of the mounting hole in the second direction; the second region is provided with a pixel circuit; the signal lines are divided into a first group of signal lines arranged in the first area and a second group of signal lines arranged in the second area, each signal line in the first group of signal lines is connected to the first fixed potential end, and each signal line in the second group of signal lines is connected to the second fixed potential end.
According to one aspect of the invention, the array substrate further comprises a first signal bus, wherein one end of each signal line in the first group of signal lines on the same side is electrically connected to the first signal bus, and is electrically connected to a first fixed potential end through the first signal bus; and/or the array substrate further comprises a second signal bus, and one end of each signal line of the second group of signal lines on the same side is electrically connected to the second signal bus and is electrically connected to the second fixed potential end through the second signal bus.
According to an aspect of the present invention, pixel circuits are provided on both sides of the mounting hole in the second direction; the array substrate further comprises connecting wires arranged in the first area, the connecting wires are distributed around the mounting hole, and the signal wires in the first group of signal wires on two sides of the mounting hole in the second direction are connected through the connecting wires.
According to one aspect of the present invention, the connection line includes a plurality of connection sections arranged at intervals, and each of the signal lines located on one side of the second direction of the mounting hole is connected to one of the signal lines on the other side through one of the connection sections.
According to an aspect of the present invention, the connection line is a ring-shaped wire, and one ends of the signal lines located at both sides of the mounting hole in the second direction are connected to the ring-shaped wire.
According to one aspect of the invention, the annular conductor is in the shape of a circular ring or an annular structure formed by splicing a plurality of bent sections.
According to an aspect of the invention, the array substrate further includes a third signal bus electrically connected to a third fixed potential terminal, the other end of each signal line in the first group of signal lines on the same side is electrically connected to the third signal bus, and the potential of the third fixed potential terminal is the same as the potential of the first fixed potential terminal; and/or the array substrate further comprises a fourth signal bus electrically connected to a fourth fixed potential end, the other end of each signal line in the second group of signal lines on the same side is electrically connected to the fourth signal bus, and the potential of the fourth fixed potential end is the same as the potential of the second fixed potential end.
According to an aspect of the present invention, the signal line is a reference voltage signal line or a power supply voltage signal line.
In a second aspect, the present invention provides a display panel having a non-display area and a display area at least partially surrounding the non-display area, the display panel including the array substrate of any one of the above, wherein the mounting holes are located in the non-display area, and the pixel circuits are located in the display area.
In a third aspect, the present invention provides a display device including the display panel of any one of the above embodiments.
In the embodiment of the invention, the array substrate comprises mounting holes, pixel circuits and signal lines connected with the pixel circuits, the signal lines on the array substrate are grouped according to the areas where the signal lines are located, and the signal lines in different groups are connected to different fixed potential ends so as to load different voltage signals on the signal lines. Different voltages are loaded on the signal lines of different groups, the voltage drop difference of the signal lines in the area where the mounting hole is located and other areas can be adjusted, the uniformity of the loading signals of each pixel circuit is achieved, the uniform control of each pixel of the display panel can be finally achieved, and the effect of displaying the uniformity is achieved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments of the present invention will be briefly described below, and it is obvious that the drawings described below are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an array substrate according to a first embodiment of the present invention;
fig. 2 is a schematic structural diagram of an array substrate according to a second embodiment of the present invention;
fig. 3 is a schematic structural diagram of an array substrate according to a third embodiment of the invention;
fig. 4 is a schematic structural diagram of an array substrate according to a fourth embodiment of the invention;
fig. 5 is a schematic structural diagram of an array substrate according to a fifth embodiment of the present invention;
fig. 6 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of a display device according to an embodiment of the present invention;
fig. 8 is a cross-sectional view taken along line D-D of fig. 7.
In the figure:
100-an array substrate; 11-mounting holes; 12-a pixel circuit; 13-a signal line; 13 a-a first set of signal lines; 13 b-a second set of signal lines; 14-a first signal bus; 15-a second signal bus; 16-connecting lines; 161-a connecting segment; 17-a third signal bus; 18-a fourth signal bus;
200-a display panel;
300-a display device; 310-a functional device;
a1 — first region; a2 — second region; AA-display area; NA-non-display area.
Detailed Description
Features and exemplary embodiments of various aspects of the present invention will be described in detail below, and in order to make objects, technical solutions and advantages of the present invention more apparent, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not to be construed as limiting the invention. It will be apparent to one skilled in the art that the present invention may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present invention by illustrating examples of the present invention.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
It will be understood that when a layer, region or layer is referred to as being "on" or "over" another layer, region or layer in describing the structure of the component, it can be directly on the other layer, region or layer or intervening layers or regions may also be present. Also, if the component is turned over, one layer or region may be "under" or "beneath" another layer or region.
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict.
The array substrate, the display panel and the display device according to the embodiments of the invention are described in detail with reference to fig. 1 to 8. Some well-known structures are shown hidden or transparently in the figure for the sake of clarity in illustrating the structures associated with the present invention.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an array substrate according to a first embodiment of the invention. The array substrate 100 according to the embodiment of the invention has a first region a1 and a second region a2 that are sequentially distributed along the first direction X. The array substrate 100 includes a mounting hole 11, a pixel circuit 12, and a signal line 13 connected to the pixel circuit 12 and extending in a second direction Y, where the first direction X intersects the second direction Y.
The mounting hole 11 may be a through hole or a blind hole, and is configured to accommodate the functional device 310, where the functional device 310 is, for example, a photosensitive component such as an image collector, an infrared sensor, a proximity sensor, an infrared lens, a floodlight sensing element, an ambient light sensor, and a dot matrix projector, and may also be a device such as a headphone or a speaker. The shape of the mounting hole 11 is not limited in the present invention, and may be adjusted according to the functional device 310 that needs to be accommodated, for example, it may be a circle, an ellipse, a dumbbell, a gourd, a rectangle, or other irregular shapes.
The pixel circuit 12 may include a plurality of thin film transistors, capacitors, and the like. The pixel circuit 12 may specifically include a circuit structure of 7T1C or 9T1C, where "T" refers to a thin film transistor, "C" refers to a capacitor, and the number refers to the number of thin film transistors or capacitors. Of course, other circuit configurations may be used, and the present invention is not limited thereto.
The first and second regions a1 and a2 of the array substrate 100 are each provided with a pixel circuit 12, wherein the first region a1 has a mounting hole 11 provided therein, and the pixel circuits 12 of the first region a1 are distributed on at least one side of the mounting hole 11 in the second direction. That is, the first region a1 of the array substrate 100 is a region having the mounting hole 11 along the first direction X, and the second region a2 is a region adjacent to the first region a1 in the first direction X.
The signal lines 13 are divided into a first group of signal lines 13a disposed in the first area a1 and a second group of signal lines 13b disposed in the second area a 2. Each signal line 13 in the first group of signal lines 13a is connected to a first fixed potential terminal, and each signal line 13 in the second group of signal lines 13b is connected to a second fixed potential terminal. The first potential terminal and the second potential terminal refer to signal terminals that can supply a fixed voltage signal to each signal line 13. The voltage signals provided by the first potential terminal and the second potential terminal may be different.
Although the first direction X is shown as a column direction and the second direction Y is shown as a row direction, the first direction X and the second direction Y are not limited to the directions shown in the drawings, and the first direction X may intersect the second direction Y. In some embodiments, the first direction X may be a row direction and the second direction Y may be a column direction.
In this embodiment, the array substrate 100 includes mounting holes 11, pixel circuits 12, and signal lines 13 connected to the pixel circuits 12, the signal lines 13 on the array substrate 100 are grouped according to the areas where the signal lines are located, and the signal lines 13 of different groups are connected to different fixed potential ends, so as to load different voltage signals on the signal lines 13. By applying different voltages to the signal lines 13 of different groups, the voltage drop difference between the signal lines 13 in the region where the mounting hole 11 is located and the other regions can be adjusted, so that the uniformity of the applied signals to the pixel circuits 12 is realized, and finally, the uniformity control of the pixels of the display panel 200 is realized, and the effect of display uniformity is realized.
In some alternative embodiments, the number of the first regions a1 and the second regions a2 may not be limited to one, and may have more than two first regions a1 and/or more than two second regions a 2.
In some optional embodiments, the array substrate 100 may further include a first signal bus 14. In some embodiments, the first signal bus 14 may be disposed at one side of the array substrate 100 other than the pixel region. One end of each signal line 13 in the first group of signal lines 13a on the same side is electrically connected to the first signal bus 14, and is electrically connected to a first fixed potential end through the first signal bus 14. In this embodiment, by connecting each signal line 13 in each first group of signal lines 13a to the first signal bus 14 and loading a voltage signal to each signal line 13 in the first group of signal lines 13a through the first signal bus 14, compared with the case where each signal line 13 of the first group of signal lines 13a is directly connected to the first fixed potential end, the signal routing needs to occupy a larger frame space, and in this embodiment, the first signal bus 14 is adopted, so that the frame space can be saved and the screen occupation ratio can be increased.
Further, in some optional embodiments, please refer to fig. 2, and fig. 2 is a schematic structural diagram of an array substrate according to a second embodiment of the present invention. The array substrate 100 may further include a third signal bus 17, the third signal bus 17 being electrically connected to a third fixed potential terminal, the third fixed potential terminal having the same potential as the first fixed potential terminal. In some embodiments, the third signal bus 17 may be disposed opposite to the first signal bus 14, and the other end of each signal line 13 in the first group of signal lines 13a on the same side is electrically connected to the third signal bus 17 and is electrically connected to the third fixed potential end through the third signal bus 17. In this embodiment, the third signal bus 17 is disposed on the side opposite to the first signal bus 14, two ends of each signal line 13 in the first group of signal lines 13a are respectively connected to the first signal bus 14 and the third signal bus 17, and the same voltage signal is respectively applied to two ends of each signal line 13 in the first group of signal lines 13a, so that the voltage drop difference between the two ends of each signal line 13 in the first group of signal lines 13a can be further reduced, the uniformity of the applied signal to the pixel circuit 12 is improved, and finally, the uniform control of each pixel of the display panel 200 can be realized, and the effect of display uniformity is realized.
In other alternative embodiments, the array substrate 100 may further include a second signal bus 15. In some embodiments, the second signal bus line 15 may be disposed at one side of the array substrate 100 other than the pixel region. One end of each signal line 13 in the second group of signal lines 13 on the same side is electrically connected to the second signal bus 15, and is electrically connected to the second fixed potential end through the second signal bus 15. In this embodiment, by connecting each signal line 13 in each second group of signal lines 13b to the second signal bus 15 and loading a voltage signal to each signal line 13 in the second group of signal lines 13b through the second signal bus 15, compared with the case where each signal line 13 of the second group of signal lines 13b is directly connected to the second fixed potential end, the signal routing needs to occupy a larger frame space, and in this embodiment, the second signal bus 15 is adopted, so that the frame space can be saved and the screen occupation ratio can be increased.
Further, in some optional embodiments, the array substrate 100 may further include a fourth signal bus 18, the fourth signal bus 18 is electrically connected to a fourth fixed potential terminal, and the potential of the fourth fixed potential terminal is the same as the potential of the second fixed potential terminal. In some embodiments, the fourth signal bus 18 may be disposed opposite to the second signal bus 15, and the other end of each signal line 13 in the second group of signal lines 13b on the same side is electrically connected to the fourth signal bus 18 and is electrically connected to the fourth fixed potential end through the fourth signal bus 18. In this embodiment, the fourth signal bus 18 is disposed on the side opposite to the second signal bus 15, two ends of each signal line 13 in the second group of signal lines 13b are respectively connected to the second signal bus 15 and the fourth signal bus 18, and the same voltage signal is respectively applied to two ends of each signal line 13 in the second group of signal lines 13b, so that the voltage drop difference between the two ends of each signal line 13 in the second group of signal lines 13b can be further reduced, the uniformity of the applied signal to the pixel circuit 12 is improved, and finally, the uniform control of each pixel of the display panel 200 can be realized, and the effect of display uniformity is realized.
In some alternative embodiments, the pixel circuits 12 are disposed on both sides of the mounting hole 11 in the second direction Y. The array substrate 100 includes connection lines 16 disposed in the first region a1, the connection lines 16 are distributed around the mounting hole 11, and the signal lines 13 in the first group of signal lines 13a on both sides of the mounting hole 11 in the second direction Y are connected by the connection lines 16.
In an embodiment, please refer to fig. 3, wherein fig. 3 is a schematic structural diagram of an array substrate according to a third embodiment of the present invention. The connecting line 16 includes a plurality of connecting segments 161 arranged at intervals, and each signal line 13 on one side of the second direction Y of the mounting hole 11 is connected to one signal line 13 on the other side through one of the connecting segments 161, so as to load a voltage signal to the pixels in the same row arranged along the second direction Y through one trace.
In another specific embodiment, the connection line 16 may be a loop-shaped wire to which one ends of the signal lines 13 located at both sides of the mounting hole 11 in the second direction are connected. By connecting the signal lines 13 on both sides of the mounting hole 11 of the first region a1 to the same annular lead, the area occupied by the connection of the signal lines 13 on both sides of the mounting hole 11 can be reduced, the consistency of the potentials of the signal lines 13 on both sides of the mounting hole 11 can be ensured, and the display uniformity on both sides of the mounting hole 11 can be improved.
The present invention is not limited with respect to the shape of the loop wire. In some embodiments, as shown in fig. 1 and 2, the ring-shaped conductive line may have a circular ring-shaped structure. In other embodiments, please refer to fig. 4 and 5, fig. 4 is a schematic structural diagram of an array substrate according to a fourth embodiment of the present invention; fig. 5 is a schematic structural diagram of an array substrate according to a fifth embodiment of the present invention. The annular conducting wire can also be an annular structure formed by splicing a plurality of bent sections. The shape of the annular conducting wire can be adjusted adaptively to the setting positions of the pixel circuits 12 and the pixels by adopting an annular structure spliced by a plurality of bending sections, so that the space occupied by the annular conducting wire is reduced.
Further, in some embodiments, the connecting wires 16 may be disposed in the same layer as the signal wires 13 to simplify the manufacturing process. In other embodiments, the connection lines 16 may be disposed on different layers from the signal lines 13, and the connection lines 16 are electrically connected to the signal lines 13 through via holes, so as to avoid short circuit caused by dense routing lines disposed on the same layer.
In some alternative embodiments, the signal line 13 may be a reference voltage signal line. In other alternative embodiments, the signal line 13 may also be a power supply voltage signal line.
Referring to fig. 6, fig. 6 is a schematic structural diagram of a display panel 200 according to an embodiment of the present invention. The display panel 200 of the embodiment of the invention has a non-display area NA and a display area AA at least partially surrounding the non-display area NA. The display panel 200 includes the array substrate 100 of any of the above embodiments. The mounting hole 11 is correspondingly disposed in the non-display area NA of the display panel 200, and the pixel circuit 12 is correspondingly disposed in the display area AA of the display panel 200.
The display panel 200 of the embodiment may be a liquid crystal display panel, and may also be other types of display panels such as an Organic Light-Emitting Diode (OLED), a Micro-LED (Micro-LED), and a quantum dot. In some embodiments, the display panel 200 may be segmented to provide a display panel 200 that is more consistent with size and shape requirements.
The display panel 200 of the embodiment of the invention includes a pixel layer disposed on one side of the array substrate 100, the pixel layer includes a plurality of sub-pixels, and each pixel circuit 12 of the array substrate 100 is used for being electrically connected to each pixel to drive each sub-pixel to emit light for display.
With the array substrate 100 of any of the above embodiments, the display uniformity of each region of the display panel 200 can be improved. Since the display panel 200 of the embodiment of the invention includes the array substrate 100 of any one of the embodiments, the display panel also has the beneficial effects of the array substrate 100 of the embodiment, and the description thereof is omitted.
Fig. 7 and fig. 8 show a display device 300 according to an embodiment of the present invention, where fig. 7 is a schematic structural diagram of the display device according to an embodiment of the present invention; fig. 8 is a cross-sectional view taken along line D-D of fig. 7. The display device 300 of the present embodiment includes the display panel 200 of any of the above embodiments. Since the display device 300 of the present embodiment includes the display panel 200 of any of the above embodiments, it also has the beneficial effects of the display panel 200 of the above embodiments, and the description thereof is omitted here.
The display device 300 of the embodiment may include electronic devices such as a mobile phone, a tablet computer, an electronic book reader, a multimedia playing device, a wearable device, and a vehicle-mounted terminal.
In some alternative embodiments, the display device 300 further includes a functional device 310, and the functional device 310 is disposed in the mounting hole 11 of the array substrate 100. The functional device 310 may be, for example, a photosensitive component such as an image collector, an infrared sensor, a proximity sensor, an infrared lens, a floodlight sensing element, an ambient light sensor, and a dot matrix projector, and may also be a device such as a handset and a speaker.
In accordance with the above-described embodiments of the present invention, these embodiments are not intended to be exhaustive or to limit the invention to the precise embodiments disclosed. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated. The invention is limited only by the claims and their full scope and equivalents.
Claims (10)
1. An array substrate is characterized by comprising a first area and a second area which are distributed in a first direction in sequence;
the array substrate comprises a mounting hole, a pixel circuit and a signal line which is connected with the pixel circuit and extends along a second direction, and the first direction is intersected with the second direction;
the first region is provided with the mounting hole and the pixel circuit located on at least one side of the mounting hole in the second direction;
the second region is provided with the pixel circuit;
the signal lines are divided into a first group of signal lines arranged in the first area and a second group of signal lines arranged in the second area, each signal line in the first group of signal lines is connected to a first fixed potential end, and each signal line in the second group of signal lines is connected to a second fixed potential end.
2. The array substrate of claim 1, further comprising a first signal bus line, wherein one end of each signal line in the first group of signal lines on the same side is electrically connected to the first signal bus line and is electrically connected to the first fixed potential end through the first signal bus line; and/or the presence of a gas in the gas,
the array substrate further comprises a second signal bus, wherein one end of each signal line of the second group of signal lines on the same side is electrically connected to the second signal bus and is electrically connected to the second fixed potential end through the second signal bus.
3. The array substrate of claim 1, wherein the pixel circuits are disposed on both sides of the mounting hole in the second direction;
the array substrate further comprises connecting lines arranged in the first area, the connecting lines are distributed around the mounting hole, and the signal lines in the first group of signal lines on two sides of the mounting hole in the second direction are connected through the connecting lines.
4. The array substrate of claim 3, wherein the connection lines comprise a plurality of connection segments arranged at intervals, and each signal line on one side of the second direction of the mounting hole is connected with one signal line on the other side of the second direction of the mounting hole through one of the connection segments.
5. The array substrate of claim 3, wherein the connection lines are ring-shaped conductive lines, and one ends of the signal lines at both sides of the mounting hole in the second direction are connected to the ring-shaped conductive lines.
6. The array substrate of claim 5, wherein the annular conductive line is in the shape of a circular ring or a ring structure formed by splicing a plurality of bent segments.
7. The array substrate of claim 2, further comprising a third signal bus line electrically connected to a third fixed potential terminal, wherein the other end of each signal line in the first group of signal lines on the same side is electrically connected to the third signal bus line, and the potential of the third fixed potential terminal is the same as the potential of the first fixed potential terminal; and/or the presence of a gas in the gas,
the array substrate further comprises a fourth signal bus electrically connected to a fourth fixed potential end, the other end of each signal line in the second group of signal lines on the same side is electrically connected to the fourth signal bus, and the potential of the fourth fixed potential end is the same as the potential of the second fixed potential end.
8. The array substrate of claim 1, wherein the signal line is a reference voltage signal line or a power voltage signal line.
9. A display panel having a non-display area and a display area at least partially surrounding the non-display area, the display panel comprising the array substrate according to any one of claims 1 to 8, wherein the mounting hole is located in the non-display area and the pixel circuit is located in the display area.
10. A display device characterized by comprising the display panel according to claim 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010102893.6A CN111834377A (en) | 2020-02-19 | 2020-02-19 | Array substrate, display panel and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010102893.6A CN111834377A (en) | 2020-02-19 | 2020-02-19 | Array substrate, display panel and display device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN111834377A true CN111834377A (en) | 2020-10-27 |
Family
ID=72914047
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010102893.6A Pending CN111834377A (en) | 2020-02-19 | 2020-02-19 | Array substrate, display panel and display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111834377A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113160742A (en) * | 2021-02-24 | 2021-07-23 | 合肥维信诺科技有限公司 | Array substrate, display panel and display device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107622749A (en) * | 2017-09-08 | 2018-01-23 | 上海天马有机发光显示技术有限公司 | A kind of display panel, electroluminescence display panel and display device |
| CN107845663A (en) * | 2017-10-27 | 2018-03-27 | 武汉天马微电子有限公司 | Display panel and display device |
| CN109166520A (en) * | 2018-09-19 | 2019-01-08 | 云谷（固安）科技有限公司 | Have the driving circuit, display screen and display equipment of reeded display panel |
-
2020
- 2020-02-19 CN CN202010102893.6A patent/CN111834377A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107622749A (en) * | 2017-09-08 | 2018-01-23 | 上海天马有机发光显示技术有限公司 | A kind of display panel, electroluminescence display panel and display device |
| CN107845663A (en) * | 2017-10-27 | 2018-03-27 | 武汉天马微电子有限公司 | Display panel and display device |
| CN109166520A (en) * | 2018-09-19 | 2019-01-08 | 云谷（固安）科技有限公司 | Have the driving circuit, display screen and display equipment of reeded display panel |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113160742A (en) * | 2021-02-24 | 2021-07-23 | 合肥维信诺科技有限公司 | Array substrate, display panel and display device |
| CN113160742B (en) * | 2021-02-24 | 2022-10-04 | 合肥维信诺科技有限公司 | Array substrate, display panel and display device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109524445B (en) | Display panel and display device | |
| CN112117320B (en) | Display panel and display device | |
| CN108766249B (en) | Foldable display panel and foldable display device | |
| CN107742481B (en) | Special-shaped display panel and display device | |
| CN113160742B (en) | Array substrate, display panel and display device | |
| US12034012B2 (en) | Array substrate, display panel and display apparatus | |
| WO2022179126A1 (en) | Array substrate, display panel, and display device | |
| US10879276B2 (en) | Display panel and display device | |
| CN111969027A (en) | Display panel and display device | |
| CN111952343B (en) | Array substrate and display panel | |
| CN110931515B (en) | Array substrate, display panel and display device | |
| CN111833741B (en) | Array substrate, display panel and display device | |
| CN109445210B (en) | Display panel and display device | |
| CN107910337B (en) | Array substrate, display panel and display device | |
| US20230345785A1 (en) | Array substrate, display panel and display device | |
| CN109375443A (en) | Display panel and display device | |
| CN111833738B (en) | Array substrate, display panel and display device | |
| CN111697040A (en) | Display panel and display device | |
| CN111834377A (en) | Array substrate, display panel and display device | |
| CN110737126A (en) | Display panel and display device | |
| CN113053979B (en) | Array substrate, display panel and display device | |
| CN111948859A (en) | Display substrate and display device | |
| CN113380830B (en) | Array substrate, display panel and display device | |
| CN115528075A (en) | Display panel and display device | |
| CN116825045A (en) | Display panel and display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20201027 |