CN111725786B

CN111725786B - Electronic equipment, power supply and power supply circuit thereof

Info

Publication number: CN111725786B
Application number: CN201910208741.1A
Authority: CN
Inventors: 蒋幸福; 柳婧
Original assignee: BYD Semiconductor Co Ltd
Current assignee: BYD Semiconductor Co Ltd
Priority date: 2019-03-19
Filing date: 2019-03-19
Publication date: 2022-09-16
Anticipated expiration: 2039-03-19
Also published as: CN111725786A

Abstract

The disclosure belongs to the technical field of power supplies, and provides an electronic device, a power supply and a power supply circuit thereof. In the disclosure, by adopting the power supply circuit comprising the rectifier bridge, the voltage transformation module, the power supply switch tube and the control chip, when the output feedback voltage is abnormal, the control chip acquires the demagnetization time of the voltage transformation module and acquires the on-time state information of the power switch tube according to the sampled voltage, and the control chip controls the power switch tube to be switched off when the demagnetization time is not matched with the on-time state information, so that the rear-stage protection of the power supply circuit is realized when the feedback loop fails, and the power supply circuit has low cost and high reliability, and solves the problems of high cost and low reliability of the existing power supply circuit.

Description

Electronic equipment, power supply and power supply circuit thereof

Technical Field

The disclosure belongs to the technical field of power supplies, and particularly relates to an electronic device, a power supply and a power supply circuit thereof.

Background

The importance of a power supply is self-evident as a means for supplying power to various electric devices. At present, the power circuit adopted in the prior art is mainly a typical flyback switching power supply application circuit, as shown in fig. 1. In the flyback switching power supply circuit, the voltage of the feedback winding of the transformer is sampled mainly by the control chip when the flyback switching power supply circuit realizes constant voltage and constant current control, and the sampled voltage is used as the feedback voltage to control the output voltage of the power supply circuit, so that the circuit connection and the parameters of the feedback loop are normally the premise that the output voltage is stable and controllable.

However, in practical application and production processes, due to insufficient solder joints and solder joints, the feedback path inevitably has abnormalities, such as R5 open or short circuit, R6 open or short circuit, feedback coil open circuit, etc., when one of the above abnormal conditions occurs, the VFB voltage sampled by the control chip cannot normally reflect the magnitude of the output voltage, especially when the R5 is open, the R6 is open, or the feedback coil is open, the feedback path is completely disconnected, if the output energy and the load are not matched, even if the output energy is greater than the load consumption, the output voltage VOUT continues to rise (as shown in fig. 2), therefore, even if the output voltage reaches the overvoltage protection point, the control chip can not carry out overvoltage protection on the power circuit, therefore, the output voltage VOUT is out of control, and overvoltage breakdown occurs to a circuit at the rear stage, so that the power circuit is damaged.

In order to solve the above problems, as shown in fig. 1, a conventional method is to connect a zener Z1 at the output end, and since the zener threshold is slightly higher than the rated output voltage of the switching power supply, the zener will be broken down when the above occurs, so that it is ensured that the output voltage is not higher than the breakdown threshold of the zener, and the protection of the power supply circuit is achieved. However, the above protection method increases the cost of the power supply circuit since it requires access to the zener; in addition, as the power of the switching power supply is increased, when the output power of the power supply is greater than the rated power of the zener, the method still cannot achieve the effect of voltage stabilization.

In summary, the conventional power circuit has the problems of high cost and low reliability.

Disclosure of Invention

The present disclosure is directed to an electronic device, a power supply and a power supply circuit thereof, and aims to solve the problems of high cost and low reliability of the conventional power supply circuit.

The power circuit is connected with a load, and comprises a rectifier bridge, a voltage transformation module, a power switch tube and a control chip, wherein the rectifier bridge is connected with the voltage transformation module, the voltage transformation module is connected with the power switch tube, the control chip and the load, the control chip is connected with the power switch tube, the rectifier bridge converts the accessed high-voltage alternating current into high-voltage direct current, the control chip samples the output feedback voltage of a feedback winding end of the voltage transformation module, and controls the on-off of the power switch tube according to the sampling voltage, so that the voltage transformation module generates a charging voltage according to the high-voltage direct current and then charges the load; the control chip is further used for acquiring the demagnetization time of the voltage transformation module, acquiring the on-time state information of the power switch tube according to the sampling voltage, and controlling the power switch tube to be switched off when the demagnetization time is not matched with the on-time state information.

Another object of the present disclosure is to provide a power supply including the above power supply circuit.

It is a further object of the present disclosure to provide an electronic device including the above power supply.

In the disclosure, by adopting the power supply circuit comprising the rectifier bridge, the voltage transformation module, the power supply switch tube and the control chip, when the output feedback voltage is abnormal, the control chip acquires the demagnetization time of the voltage transformation module and acquires the on-time state information of the power switch tube according to the sampled voltage, and the control chip controls the power switch tube to be switched off when the demagnetization time is not matched with the on-time state information, so that the rear-stage protection of the power supply circuit is realized when the feedback loop fails, and the power supply circuit has low cost and high reliability, and solves the problems of high cost and low reliability of the existing power supply circuit.

Drawings

Fig. 1 is a schematic circuit diagram of a power supply circuit provided in the prior art;

FIG. 2 is a schematic diagram of an operating waveform of a power circuit provided in the prior art;

fig. 3 is a schematic circuit diagram of a power circuit according to an embodiment of the disclosure;

fig. 4 is a schematic block diagram of a control chip in a power circuit according to an embodiment of the disclosure;

fig. 5 is a schematic block diagram of a sampling failure protection module in a control chip in a power circuit according to an embodiment of the present disclosure;

fig. 6 is a schematic block diagram of a sampling failure protection module in a control chip in a power circuit according to another embodiment of the present disclosure;

fig. 7 is a schematic circuit structure diagram of a sampling failure protection module in a control chip in a power circuit according to an embodiment of the present disclosure;

fig. 8 is a schematic diagram of an operating waveform of a power supply circuit according to an embodiment of the disclosure.

Detailed Description

In order to make the objects, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the disclosure and are not intended to limit the disclosure.

Implementations of the present disclosure are described in detail below with reference to the specific figures:

fig. 3 shows a block structure of a power supply circuit provided in an embodiment of the present disclosure, and for convenience of description, only a part related to the embodiment is shown, which is detailed as follows:

as shown in fig. 3, the power circuit provided by the embodiment of the present disclosure is connected to a load (not shown in the figure), and includes a rectifier bridge 10, a transformer module 20, a power switch Q1, and a control chip 30.

The rectifier bridge 10 is connected to the transformer module 20, the transformer module 20 is connected to the power switch Q1, the control chip 30 and the load, and the control chip 30 is connected to the power switch Q1.

Specifically, the rectifier bridge 10 receives the high-voltage alternating current, rectifies the high-voltage alternating current into high-voltage direct current, and outputs the high-voltage direct current, the control chip 30 samples output feedback voltage of a feedback winding end of the voltage transformation module 20, and controls the on-off of the power switch tube Q1 according to the sampled voltage, so that the voltage transformation module 20 generates charging voltage according to the high-voltage direct current and charges a load; in addition, the control chip 30 is further configured to obtain a degaussing time of the transformer module 20 and on-time state information of the power switch Q1 according to the sampled voltage, and control the power switch Q1 to turn off when the degaussing time does not match the on-time state information.

In specific implementation, when the feedback loop is normal, that is, the resistors R5 and R6 are connected normally, and the feedback winding of the transformer module 20 is normal, the working process of the power supply circuit provided by the present disclosure is the same as that of the prior art, and reference may be made to the prior art specifically, which is not described herein again.

In order to solve the problem, in the power circuit shown in the present disclosure, the control chip 30 acquires the demagnetization time of the transformer module 20 and acquires the on-time state information of the power switch Q1 according to the sampled voltage, and controls the power switch Q1 to be turned off when the demagnetization time is not matched with the on-time state information; the on-time state information of the power switch Q1 refers to the on-time of the power switch Q1.

It should be noted that, in the embodiment of the present disclosure, the voltage transformation module 20 refers to a structure including a transformer T1, a diode D5, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a capacitor C4, a capacitor C5, and a secondary diode D6, and it is noted that, in the embodiment of the present disclosure, the zener diode Z1 is omitted from the power circuit, and a specific working process of the structure may refer to the prior art and is not described herein again; in addition, the power circuit provided by the embodiment of the present disclosure further includes a filtering module composed of an inductor L1, a capacitor C1, and a capacitor C2, and the filtering module mainly filters the high-voltage direct current output by the rectifier bridge 10 to eliminate the interference signal in the direct current at high voltage.

In the present disclosure, since the longer the on-time of the power switch Q1 is, the more energy is stored in the transformer module 20 in the corresponding cycle, and the demagnetization time of the transformer in the cycle is correspondingly lengthened, in the power circuit provided in the embodiment of the present disclosure, the control chip 30 determines whether the feedback loop is faulty according to the result of whether the demagnetization time of the transformer matches with the on-time state information of the power switch Q1, and when the demagnetization time of the transformer does not match with the on-time state information of the power switch Q1, that is, the demagnetization time is short, and the on-time of the power switch Q1 is long, it is determined that the feedback loop is faulty, and at this time, the control chip 30 controls the power switch Q1 to be turned off, so as to prevent damage to the rear-end circuit, and there is no need to add the zener diode Z1 in the power circuit, the circuit has low cost and high reliability.

Further, as an embodiment of the present disclosure, as shown in fig. 4, the control chip 30 includes: a sample-and-hold module 301, an error amplification module 302, a degaussing time sampling module 303, a constant voltage constant current control module 304, a sample fail safe module 305, a logic control module 306, and an output driver module 307.

Specifically, the sample-and-hold module 301 is connected to the transformer module 20 (not shown in the drawings, please refer to fig. 3), and is configured to sample an output feedback voltage at a feedback winding end of the transformer module 20 to obtain a sampled voltage;

an error amplification module 302, connected to the sample-and-hold module 301, for generating an error amplification voltage according to the sampling voltage obtained by the sample-and-hold module 301 and the received first reference voltage Vref;

the demagnetization time sampling module 303 is connected with the voltage transformation module 20 and is used for generating demagnetization time according to the output feedback voltage;

the constant-voltage constant-current control module 304 is connected with the error amplification module 302 and the sampling failure protection module 305, and is configured to obtain on-time state information of the Q1 of the power switching tube according to the error amplification voltage, and feed the on-time state information back to the sampling failure protection module 305;

the sampling failure protection module 305 is connected to the voltage transformation module 20, the demagnetization time sampling module 303 and the logic control module 306, and is configured to receive a second reference voltage OP1V, a chip enable signal EN and an initial working signal ON, acquire the demagnetization time TDS generated by the demagnetization time sampling module 303, generate power switching tube disconnection control information when detecting that the demagnetization time TDS is not matched with the conduction time state information under the action of the second reference voltage OP1V, the chip enable signal EN and the initial working signal ON, and send the power switching tube disconnection control information to the logic control module 306;

the logic control module 306 is connected to the output driving module 307, and is configured to generate power switching tube driving information according to the power switching tube disconnection control information, and send the power switching tube driving information to the output driving module 307;

and the output driving module 307 is connected to the power switch Q1, and is configured to control the power switch Q1 to turn off according to the power switch driving information.

It should be noted that, in the embodiment of the present disclosure, when the feedback loop is normal, the working processes and principles of the sample-and-hold module 301, the error amplification module 302, the demagnetization time sampling module 303, the constant voltage and constant current control module 304, the logic control module 306, and the output driving module 307 in the control chip 30 provided in the embodiment of the present disclosure are the same as those of the prior art, and reference may be made to the prior art specifically, and details are not described here; in addition, the control chip 30 further includes a reference bias module 308, a high-low voltage conversion module 309, a starting circuit 310, and an output drop compensation module 311, and the connection relationship and working process between the reference bias module 308, the high-low voltage conversion module 309, the starting circuit 310, and the output drop compensation module 311 and other modules in the chip may also refer to the prior art, which is not described herein again.

In the embodiment of the present disclosure, the power circuit shown in the present disclosure adds the sampling failure protection module 305 to the control chip 30, so that the sampling failure protection module 305 generates the power switch tube off control information when the degaussing time is not matched with the on-time state information, and further, the logic control module 306 and the output driving module 307 at the back end control the power switch tube Q1 to be turned off according to the power switch tube off control information, thereby preventing the back end circuit from malfunctioning, without using a zener diode, and having a high integration level, thereby simplifying the structure of the power circuit, reducing the cost, and having high reliability.

Further, as an embodiment of the present disclosure, as shown in fig. 5, the sampling fail safe module 305 includes:

a delay unit 305a for receiving the chip enable signal EN and delaying the chip enable signal EN for a preset time;

a pull-down unit 305b connected to the transformer module 20 (not shown, please refer to fig. 3) and the delay unit 305a, for pulling down the output feedback voltage VFB under the control of the delayed chip enable signal EN;

a degaussing time reference generating unit 305c connected to the pull-down unit 305b and the transformer module 20, for receiving the start working signal ON and the second reference voltage OP1V, and generating a degaussing time reference tdspdd according to the output feedback voltage VFB, the start working signal ON and the second reference voltage OP 1V;

the switch control information generating unit 305d is connected to the delay unit 305a, the degaussing time reference generating unit 305c, the constant voltage constant current control module 304 (not shown, please refer to fig. 4), the degaussing time sampling module 303 (not shown, please refer to fig. 4), and the logic control module 306 (not shown, please refer to fig. 4), and is configured to receive the start working signal ON, and generate the power switch off control information EN-PRO when detecting that the degaussing time TDS is not matched with the ON-time state information OCP under the actions of the start working signal ON, the delayed chip enable signal EN, and the degaussing time reference tdspdd.

In specific implementation, the delay unit 305a is used to delay the chip enable signal EN by 200 microseconds, and the main purpose of delaying the chip enable signal EN by 200 microseconds is to enable the sampling fail-safe module 305 to detect whether the feedback loop fault occurs in the power circuit within the 200 microseconds, thereby effectively ensuring the normal operation of the power circuit; it should be noted that, in the embodiment of the present disclosure, setting the delayed preset time to 200 microseconds is only an exemplary illustration, and the delayed preset time may be specifically adjusted according to the actual situation, and is not specifically limited herein.

Further, as an embodiment of the present disclosure, as shown in fig. 6, the degaussing time reference generating unit 305c includes:

a degaussing time sampling sub-unit 305c1, connected to the transformer module 20 (not shown, please refer to fig. 3) and the pull-down unit 305a, for receiving the second reference voltage OP1V and generating a degaussing time sampling signal TDS1 according to the second reference voltage OP1V and the output feedback voltage VFB;

the demagnetizing time reference generating sub-unit 305c2 is connected to the demagnetizing time sampling sub-unit 305c1 and the switch control information generating unit 305d, and is configured to receive the start operating signal ON and generate a demagnetizing time reference tdspdd according to the demagnetizing time sampling signal TDS1 under the action of the start operating signal ON; in this embodiment, the degaussing time sampling signal TDS1 is the same signal as the degaussing time TDS.

Further, as an embodiment of the present disclosure, as shown in fig. 7, the pull-down unit 305b includes: a first switch element M1 and a first resistor R1.

The control terminal of the first switch element M1 is connected to the delay unit 305a, the input terminal of the first switch element M1 is connected to the second terminal of the first resistor R1, the output terminal of the first switch element M1 is connected to the equipotential terminal, and the first terminal of the first resistor R1 is connected to the transformer module 20 (not shown, please refer to fig. 3).

In practical implementation, the resistance of the first resistor R1 may preferably be 50K, but it should be understood by those skilled in the art that 50K is merely an exemplary illustration of the resistance of the first resistor R1, and does not limit the resistance of the first resistor R1; in addition, a resistor with a resistance value of 50K is connected between the output feedback voltage VFB of the voltage transformation module 20 and the ground, so that when the feedback loop fails, it can be ensured that the impedance between the output feedback voltage VFB and the ground is not greater than 50K, and further, an unrecognizable distorted waveform of the feedback output voltage VFB can not occur.

In addition, in a specific implementation, the first switch element M1 is implemented by an NMOS type transistor, and a gate, a drain and a source of the NMOS type transistor are respectively a control terminal, an input terminal and an output terminal of the first switch element M1. Of course, it is understood by those skilled in the art that the first switching element M1 may also be implemented by using an NPN transistor, a PNP transistor, a PMOS transistor, etc., and is not limited herein.

Further, as an embodiment of the present disclosure, as shown in fig. 7, the degaussing time sampling sub-unit 305c1 includes a comparator CMP1, a positive phase input terminal of the comparator CMP1 is connected to the transforming module 20 (not shown in the figure, please refer to fig. 3) and the pull-down unit 305b, a negative phase input terminal of the comparator CMP1 receives the second reference voltage OP1V, and an output terminal of the comparator CMP1 is connected to the degaussing time reference generating sub-unit 305c 2.

Further, as an embodiment of the present disclosure, as shown in fig. 7, the degaussing time reference generating subunit 305c2 includes:

a first flip-flop RS1, a first delay circuit, a first not gate U1, and a first and gate 1.

A first input terminal of the first flip-flop RS1 is connected to the degaussing time sampling subunit 305c1, a second input terminal of the first flip-flop RS1 receives the start operation signal ON, an output terminal of the first flip-flop RS1 is connected to an input terminal of a first delay circuit and a first input terminal of a first and gate 1, an output terminal of the first delay circuit is connected to an input terminal of a first not gate U1, an output terminal of the first not gate U1 is connected to a second input terminal of the first and gate 1, and an output terminal of the first and gate 1 is connected to the switch control information generating unit 305 d.

Further, as an embodiment of the present disclosure, as shown in fig. 7, the switch control information generating unit 305d includes:

a NAND gate NAND, a second flip-flop RS2, a second not gate U2, a nor gate nor, and a second and gate 2.

Wherein, a first input terminal of the NAND gate NAND receives the start operation signal ON, a second input terminal of the NAND gate NAND is connected to the delay unit 305a, an output terminal of the NAND gate NAND is connected to a second input terminal of the second flip-flop RS2, a first input terminal of the second flip-flop RS2 is connected to the constant voltage and constant current control module 304 (not shown in the figure, please refer to fig. 4), an output terminal of the second flip-flop RS2 is connected to a first input terminal of the second and gate 2, an input terminal of the second not gate U2 is connected to the degaussing time reference generating unit 305c2, an output terminal of the second not gate U2 is connected to a second input terminal of the nor gate nor, a first input terminal of the nor gate is connected to the degaussing time sampling module ((not shown in the figure, please refer to fig. 4)), an output terminal of the nor gate is connected to a second input terminal of the second and gate, an output terminal of the second and gate is connected to the logic control module (not shown in the figure, please refer to fig. 4).

Further, as an embodiment of the present disclosure, as shown in fig. 7, the delay unit 305a includes a second delay circuit that receives the chip enable signal EN and is connected to the pull-down unit 305b and the switch control information generating unit 305 d.

In specific implementation, in the embodiment of the present disclosure, both the first delay circuit and the second delay circuit may be implemented by using an existing signal delay circuit, and a specific structure thereof is not correspondingly limited herein.

The operation principle of the power circuit provided by the present disclosure is specifically described below by taking the circuits shown in fig. 3 to fig. 7 and the operation waveform diagram shown in fig. 8 as an example, and the following details are described below:

first, as shown in fig. 3, when the feedback loop in the power circuit is normal, that is, the resistor R5, the resistor R6 and the feedback winding of the transformer are all connected normally, the working principle of the power circuit may refer to the prior art, and will not be described herein again.

Next, the operation principle of the control chip 30 in the power circuit provided in the embodiment of the present disclosure will be specifically described below by taking an example that a feedback loop of the power circuit fails, that is, one of the resistor R5, the resistor R6, and the feedback winding of the transformer is in abnormal connection, for example, the resistor R5 is short-circuited or open-circuited, the resistor R6 is short-circuited or open-circuited, and the feedback winding of the transformer is open-circuited, and the following details are as follows:

referring to fig. 4 to fig. 7, when the power circuit starts to work, the sampling fail-safe module 305 delays the received chip enable signal EN for 200 microseconds to determine whether the power circuit has an abnormal feedback loop within 200 microseconds of the startup, that is, whether the output feedback voltage VFB is abnormal, and within 200 microseconds of the initial startup stage, the sampling fail-safe module 305 pulls down the output feedback voltage VFB to ensure that the feedback output voltage VFB does not have an unrecognizable distorted waveform.

Further, after the output feedback voltage VFB is pulled down, the comparator CMP1 in the sampling fail-safe module 305 compares the output feedback voltage VFB with 0.1V (OP1V), and if the output feedback voltage is higher than 0.1V, the comparison is used as the start time of the demagnetization time sampling signal TDS1 until the output feedback voltage VFB drops below 0.1V, which is used to determine the end time of the demagnetization time sampling signal TDS 1. Since the output feedback voltage VFB can be normally completed from higher than 0.1V to lower than 0.1V within several microseconds, for example, at least 6 microseconds, that is, if the power circuit has one of the feedback loop abnormalities, the waveform of the output feedback voltage VFB is as shown in fig. 8 through the action of the pull-down resistor R1, the demagnetizing time TDS sampled by the demagnetizing time sampling module 303 will be very small, and since the voltage of the output feedback voltage VFB is very small under the fault of the feedback loop, the sampling voltage VSH sampled by the output feedback voltage VFB will be also very low, and in order to make the power circuit output a normal charging voltage, the error amplifying module 302 will raise the voltage of the error amplifying voltage VEA output by itself to the maximum value, so as to indicate that the signal received by the control chip 30 needs to output a large amount of energy, that is, the conduction frequency and the conduction time IPK of the power switch Q1 need to be adjusted to the maximum state, and after receiving this information, the constant voltage and constant current control module 304 outputs conduction time state information OCP to the sampling fail-safe module 305 to indicate that the conduction time IPK is in the maximum state at this time, that is, the conduction time state information OCP is a flag when the IPK reaches the maximum state.

Further, after the sampling fail-safe module 305 obtains the demagnetization time sampling signal TDS1, the sampling fail-safe module 305 performs 6 μ s delay processing on the demagnetization time sampling signal TD1 through a circuit formed by the first flip-flop RS1, the first delay circuit, the first not gate U1, and the first and gate 1 to obtain the demagnetization time reference tdspdd, so that the demagnetization time reference tdspdd serves as a determination standard to determine whether the demagnetization time TDS is reasonable. When the constant-voltage constant-current control module 304 feeds back the ON-time state information OCP to the sampling fail-safe module 305, which indicates that the ON-time of the power switch Q1 is the maximum, the output of the flip-flop RS2 will jump to high under the action of the ON-time state information OCP and the signal output after the NAND gate NAND performs logical operation ON the initial working signal ON and the delayed chip enable signal EN. Since the corresponding demagnetizing time TDS should be longer when the on-time of the power switch Q1 is the maximum, and when a feedback loop fault occurs, since the output feedback voltage VFB is pulled down to ground, the actually detected demagnetizing time TDS at this time is very small, as shown in fig. 8, after the demagnetizing time TDS jumps to low, until the demagnetizing time reference tdspdd jumps to low, the output of the nor gate 1 is high, so that the power switch off control information EN-PRO obtained by the and gate after performing logic operations on the output signal of the nor gate and the output signal of the trigger RS2 jumps to high, that is, it is determined that the power circuit has a feedback loop abnormality at this time, the power switch needs to be turned off, and at this time, the sampling fail protection module 305 outputs the power switch off control information EN-PRO to the rear logic control module 306, so that the logic control module 306 and the output driving module 307 control the power switch Q1 to be turned off according to the power switch off control information EN-PRO, thereby achieving the purpose of detecting the failure of the feedback loop and protecting the power circuit.

In this embodiment, the power circuit provided by the present disclosure, in response to a VFB with abnormal output feedback voltage due to a failure of a feedback loop, may not normally operate a power back-end circuit, and further, when the power circuit fails, may obtain on-time status information of a power switching tube through a degaussing time and a sampled voltage obtained by sampling, and may control a power switching tube to be turned off when the degaussing time is not matched with the on-time status information, and if there is a large on-time of the switching power tube but a corresponding sampled degaussing time TDS time is short, the power switching tube is actively turned off, so as to protect a power system, and ensure that the output voltage is not further increased, compared with an original zener voltage stabilizing mode, a device cost is saved, and meanwhile, since it is possible to determine whether there is an abnormality within several cycles of startup, it is not necessary to wait until the output voltage increases to a zener breakdown threshold and then passively stabilize the voltage, and therefore the reliability is higher.

Further, the present disclosure also provides a power supply including a power supply circuit. It should be noted that, since the power circuit of the power supply provided by the embodiment of the present disclosure is the same as the power circuit shown in fig. 3 to 7, reference may be made to the foregoing detailed description about fig. 3 to 7 for a specific operating principle of the power circuit in the power supply provided by the embodiment of the present disclosure, and details are not repeated here.

Further, the present disclosure also provides an electronic device including a power supply. It should be noted that, since the power supply of the electronic device provided by the embodiment of the present disclosure is the same as the aforementioned power supply, reference may be made to the foregoing detailed description of the power supply for the specific operating principle of the power supply in the electronic device provided by the embodiment of the present disclosure, and details are not repeated here.

The above description is only exemplary of the present disclosure and should not be taken as limiting the disclosure, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present disclosure should be included in the scope of the present disclosure.

Claims

1. A power circuit is connected with a load, the power circuit comprises a rectifier bridge, a transformation module, a power switch tube and a control chip, the rectifier bridge is connected with the transformation module, the transformation module is respectively connected with the power switch tube, the control chip and the load, and the control chip is connected with the power switch tube; the control chip is further used for acquiring the demagnetization time of the voltage transformation module, acquiring the on-time state information of the power switch tube according to the sampling voltage, and controlling the power switch tube to be switched off when the demagnetization time is not matched with the on-time state information.

2. The power supply circuit according to claim 1, wherein the control chip comprises a sample-and-hold module, an error amplification module, a degaussing time sampling module, a constant voltage and constant current control module, a sampling failure protection module, a logic control module and an output driving module;

the sampling and holding module is connected with the voltage transformation module and is used for sampling the output feedback voltage of the feedback winding end of the voltage transformation module so as to obtain a sampling voltage;

the error amplification module is connected with the sampling and holding module and used for generating an error amplification voltage according to the sampling voltage acquired by the sampling and holding module and the received first reference voltage;

the demagnetization time sampling module is connected with the voltage transformation module and used for generating demagnetization time according to the output feedback voltage;

the constant-voltage constant-current control module is respectively connected with the error amplification module and the sampling failure protection module, and is used for acquiring the on-time state information of the power switch tube according to the error amplification voltage and feeding the on-time state information back to the sampling failure protection module;

the sampling failure protection module is respectively connected with the voltage transformation module, the demagnetization time sampling module and the logic control module, and is used for receiving a second reference voltage, a chip enable signal and an initial working signal, acquiring demagnetization time generated by the demagnetization time sampling module, generating power switch tube disconnection control information when detecting that the demagnetization time is not matched with the conduction time state information under the action of the second reference voltage, the chip enable signal and the initial working signal, and sending the power switch tube disconnection control information to the logic control module;

the logic control module is connected with the output driving module and used for generating power switching tube driving information according to the power switching tube disconnection control information and sending the power switching tube driving information to the output driving module;

the output driving module is connected with the power switch tube and used for controlling the power switch tube to be switched off according to the power switch tube driving information.

3. The power supply circuit of claim 2, wherein the sampling fail safe module comprises:

the delay unit is used for receiving the chip enable signal and delaying the chip enable signal for preset time;

the pull-down unit is respectively connected with the voltage transformation module and the delay unit and is used for pulling down the output feedback voltage under the control of the delayed chip enable signal;

a demagnetizing time reference generating unit, connected to the pull-down unit and the transformer module, respectively, for receiving the initial working signal and the second reference voltage, and generating a demagnetizing time reference according to the output feedback voltage, the initial working signal, and the second reference voltage;

and the switch control information generating unit is respectively connected with the delay unit, the demagnetization time reference generating unit, the constant voltage and constant current control module, the demagnetization time sampling module and the logic control module, and is used for receiving the initial working signal and generating power switch tube disconnection control information when detecting that the demagnetization time is not matched with the on-time state information under the action of the initial working signal, the delayed chip enabling signal and the demagnetization time reference.

4. The power supply circuit according to claim 3, wherein the pull-down unit comprises:

a first switch element and a first resistor;

the control end of the first switch element is connected with the delay unit, the input end of the first switch element is connected with the second end of the first resistor, the output end of the first switch element is connected with the equipotential end, and the first end of the first resistor is connected with the voltage transformation module.

5. The power supply circuit according to claim 3, wherein the degaussing time reference generating unit comprises:

the demagnetization time sampling sub-unit is respectively connected with the voltage transformation module and the pull-down unit and is used for receiving the second reference voltage and generating a demagnetization time sampling signal according to the second reference voltage and the output feedback voltage;

and the demagnetization time reference generating subunit is respectively connected with the demagnetization time sampling subunit and the switch control information generating unit and is used for receiving the initial working signal and generating the demagnetization time reference according to the demagnetization time sampling signal under the action of the initial working signal.

6. The power supply circuit according to claim 5, wherein the degaussing time sampling sub-unit comprises a comparator, a positive phase input terminal of the comparator is connected to the transforming module and the pull-down unit, a negative phase input terminal of the comparator receives the second reference voltage, and an output terminal of the comparator is connected to the degaussing time reference generating sub-unit.

7. The power supply circuit of claim 5, wherein the degaussing time reference generating sub-unit comprises:

the first trigger, the first delay circuit, the first NOT gate and the first AND gate;

the first input end of the first trigger is connected with the demagnetization time sampling subunit, the second input end of the first trigger receives the initial working signal, the output end of the first trigger is respectively connected with the input end of the first delay circuit and the first input end of the first AND gate, the output end of the first delay circuit is connected with the input end of the first NOT gate, the output end of the first NOT gate is connected with the second input end of the first AND gate, and the output end of the first AND gate is connected with the switch control information generating unit.

8. The power supply circuit according to claim 3, wherein the switch control information generating unit includes:

the NAND gate, the second trigger, the second NOT gate, the NOR gate and the second AND gate;

the first input end of the nand gate receives the initial working signal, the second input end of the nand gate is connected with the delay unit, the output end of the nand gate is connected with the second input end of the second trigger, the first input end of the second trigger is connected with the constant-voltage constant-current control module, the output end of the second trigger is connected with the first input end of the second and gate, the input end of the second not gate is connected with the demagnetization time reference generation unit, the output end of the second not gate is connected with the second input end of the nor gate, the first input end of the nor gate is connected with the demagnetization time sampling module, the output end of the nor gate is connected with the second input end of the second and gate, and the output end of the second and gate is connected with the logic control module.

9. A power supply, characterized in that it comprises a power supply circuit according to any one of claims 1 to 8.

10. An electronic device, characterized in that the electronic device comprises a power supply according to claim 9.