CN111694701A - Method and system for detecting off-line state of hardware module of embedded system - Google Patents
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Abstract
The invention provides a method and a system for detecting the offline state of a hardware module of an embedded system, wherein the detection method comprises the following steps: obtaining the state of each hardware module according to the response time difference between the response time of each hardware module and the standard response time; and adopting corresponding operation according to the detection results and the comparison results of all the hardware modules. The detection system comprises a microprocessor, a memory unit and a human-computer interaction interface. Through bit operation, the member variable of the structure body is replaced, and the memory space of the system is saved; through bit operation, all hardware modules do not need to be polled repeatedly, and the hardware modules are processed only when the states of the hardware modules change, so that the resources of a microprocessor are saved; the method is not limited to the embedded system of a single microprocessor, but can be applied to the case of a plurality of microprocessors, and simplifies the process of acquiring the state information of the hardware module among the plurality of microprocessors. The invention is mainly used in the field of hardware module detection.
Description
Technical Field
The invention relates to the field of hardware module detection, in particular to a method and a system for detecting an offline state of a hardware module of an embedded system.
Background
The application of the embedded system is very wide, which relates to a plurality of fields of industrial production, daily life, industrial control, aerospace and the like, and along with the development of electronic technology and computer software technology, the embedded system not only has more and more deep application in the fields, but also gradually shows the use in other traditional non-information equipment. The wide application and intelligent development put higher demands on the hardware and software composition of the embedded system. For some embedded systems with complicated hardware circuits, it takes much time to troubleshoot the failure of the hardware part.
In the scheme of detecting the off-line state of the hardware module, a structural body related to the module state is selected and defined in a program, member variables in the structural body correspond to corresponding hardware modules, the module state is detected in a system interrupt processing program, and finally, hardware faults are prompted through an indicator light, a buzzer and the like. However, when the system is large and there are many hardware modules, if each module needs to define a member variable of the structure, the hardware module offline testing scheme is complex and needs to occupy a large memory, and no matter whether the state information of the system changes, all the member variables need to be judged, and more microprocessor resources are occupied. For the offline test of the hardware module which is only used as the auxiliary test of the running condition of the whole system, if too many microprocessor resources of the main task are occupied, the running condition of the system can be caused to be problematic. Therefore, how to design a relatively simple method and system for detecting the hardware module of the embedded system without too much memory and microprocessor resources is a key point and a difficulty in this respect.
Disclosure of Invention
The present invention is directed to a method for detecting an offline status of a hardware module of an embedded system, so as to solve one or more technical problems in the prior art and provide at least one useful choice or creation condition.
In order to achieve the above object, the present invention adopts the following technical solutions, which are applicable to circularly detecting all hardware modules of an embedded system, and provides a method for detecting an offline state of a hardware module of an embedded system, including the following steps:
setting N as the serial number of a hardware module in the embedded system, setting the initial value of N as 1, setting the value range of N as [1, M ], and setting M as the total number of the hardware modules; the state mark of the hardware module comprises an off-line state and an on-line state, and the initial state mark of all the hardware modules is set to be on-line;
s100: setting N equal to 1;
s200: detecting the response time t2 of the Nth hardware module, and subtracting the measured response time t2 from the standard response time t1 of the Nth hardware module to obtain a response time difference t 3;
s300: when N is smaller than M, if the response time difference t3 is larger than a set value, setting the state flag of the Nth hardware module to be offline, increasing N by 1 and transferring to S200, namely detecting the next hardware module; when N is smaller than M, if the response time difference t3 is smaller than or equal to a set value, setting the state flag of the Nth hardware module to be on-line, increasing N by 1 and transferring to S200, namely detecting the next hardware module; when N is equal to M, go to S400;
s400: when N is equal to M, if the detection results of all the hardware modules are completely the same as the comparison results of all the hardware modules, storing the detection results of all the current hardware modules, and turning to S100, namely performing the next cycle detection; and if the detection results of all the hardware modules are not identical to the comparison results of all the hardware modules, storing the detection results of all the current hardware modules, displaying the detection results through a human-computer interaction interface, and then turning to S100 to perform next cycle detection.
Furthermore, the hardware module of the embedded system comprises a microprocessor module, a memory module, a power supply module and a reset module.
Specifically, the method for detecting the response time t2 of the nth hardware module includes: calculating the time for the microprocessor to enter the interrupt processing operation after the microprocessor receives the data sent by the hardware module, and taking the time as the response time t2 of the Nth hardware module; the standard response time t1 of the nth hardware module is the initial operation time of the microprocessor in the first loop detection, and is the response time of the nth hardware module in the last loop detection in the loop detection after the first loop detection, and the first loop detection is the detection of the first operation steps S100 to S400 of the microprocessor; the last cycle detection is the detection of the last operation of the steps S100 to S400 of the microprocessor; the next cycle detection is the detection of the next operation of the microprocessor from the step S100 to the step S400; the set value is 50 ms.
Specifically, the detection result of the hardware module is the serial number and the state mark of the hardware module; and the comparison result of the hardware module is the serial number and the state mark of the last cycle detection of the hardware module.
Furthermore, the detection results of all the hardware modules are completely the same as the comparison results of all the hardware modules, that is, the serial numbers and the state marks of all the hardware modules are completely the same as the serial numbers and the state marks of all the hardware modules in the last cycle detection; the detection results and the comparison results of all the hardware modules are not completely the same, namely the serial numbers and the state marks of more than or equal to 1 hardware module are different from the serial numbers and the state marks of the corresponding hardware modules of the last cycle detection.
Further, the detection results of all the current hardware modules are stored as numbers and state marks of all the current hardware modules which are used as numbers and state marks of all the hardware modules of the last cycle detection, that is, the detection results of all the current hardware modules are updated to new comparison results of all the hardware modules.
Specifically, the human-computer interaction interface comprises a display screen; the method for displaying through the human-computer interaction interface comprises the step of pushing the state marks of the hardware modules and the corresponding numbers of the state marks of the hardware modules, which are different from the comparison result of the hardware modules, in the detection result of the hardware modules to the human-computer interaction interface for displaying.
The invention also provides a system for detecting the offline state of the hardware module of the embedded system, which comprises the following components:
a microprocessor;
a memory cell: the system comprises a microprocessor, a detection module and a control module, wherein the microprocessor is used for loading and executing the detection method of the offline state of the embedded system hardware module;
furthermore, the detection system further comprises a human-computer interaction interface, and the human-computer interaction interface comprises a display screen.
The invention has the beneficial effects that: through bit operation, the member variable of the structure body is replaced, and the memory space of the system is saved; through bit operation, all hardware modules do not need to be polled repeatedly, and the hardware modules are processed only when the states of the hardware modules change, so that the resources of a microprocessor are saved; the method is not limited to the embedded system of a single microprocessor, but can be applied to the case of a plurality of microprocessors, and simplifies the process of acquiring the state information of the hardware module among the plurality of microprocessors.
Drawings
Fig. 1 is a flowchart illustrating a method for detecting an offline state of a hardware module of an embedded system according to an embodiment of the present invention.
Detailed Description
In order to make those skilled in the art better understand the technical solution of the present invention, the technical solution of the present invention will be clearly and completely described below with reference to the drawings in the embodiment of the present invention, and it is obvious that the described embodiment is only a part of the embodiment of the present invention, and not all embodiments. All other embodiments, which can be obtained by a person skilled in the art based on the embodiments of the present invention without any inventive step, shall fall within the scope of the present invention.
It is to be understood that the terms in the description and in the claims, as well as in the foregoing description and as referring to the figures, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It should be understood that the data so used is intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus. The detailed description of the preferred embodiments of the present invention will be omitted when unnecessary detail or functionality is omitted from the description so as not to obscure the understanding of the present invention. Hereinafter, the present invention will be described in detail by taking a scenario in which the present invention is applied to an embedded system as an example. The invention is not limited thereto and may be applied to any other hybrid configuration.
The conception, the specific structure and the technical effects of the present invention will be clearly and completely described in conjunction with the embodiments and the accompanying drawings to fully understand the objects, the schemes and the effects of the present invention. It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The same reference numbers will be used throughout the drawings to refer to the same or like parts.
Fig. 1 is a flowchart illustrating a method for detecting an offline state of a hardware module of an embedded system according to an embodiment of the present invention, where a "module" in fig. 1 is a "hardware module" in the following embodiments. A method for detecting an offline status of a hardware module of an embedded system according to an embodiment of the present invention is described below with reference to fig. 1.
As shown in fig. 1, a method for detecting an offline state of a hardware module of an embedded system according to an embodiment of the present invention includes the following steps:
defining all hardware modules to be detected by an enumeration method, and arranging the sequence of each hardware module; setting N as the serial number of a hardware module in the embedded system, setting the initial value of N as 1, setting the value range of N as [1, M ], and setting M as the total number of the hardware modules; the state mark of the hardware module comprises an off-line state and an on-line state, wherein a logic '1' is defined to represent the normal state of the hardware module, and a logic '0' is defined to represent the off-line state of the hardware module; setting the initial state marks of all hardware modules as online;
s100: setting N equal to 1;
s200: detecting the response time t2 of the Nth hardware module, and subtracting the measured response time t2 from the standard response time t1 of the Nth hardware module to obtain a response time difference t 3;
s300: when N is smaller than M, if the response time difference t3 is larger than a set value, setting the state flag of the Nth hardware module to be offline, increasing N by 1 and transferring to S200, namely detecting the next hardware module; when N is smaller than M, if the response time difference t3 is smaller than or equal to a set value, setting the state flag of the Nth hardware module to be on-line, increasing N by 1 and transferring to S200, namely detecting the next hardware module; when N is equal to M, saving all detection results, and going to S400;
s400: when N is equal to M, if the detection results of all the hardware modules are completely the same as the comparison results of all the hardware modules, storing the detection results of all the current hardware modules, and turning to S100, namely performing the next cycle detection; and if the detection results of all the hardware modules are not identical to the comparison results of all the hardware modules, storing the detection results of all the current hardware modules, displaying the detection results through a human-computer interaction interface, and then turning to S100 to perform next cycle detection.
Specifically, the method for detecting the response time t2 of the nth hardware module includes: calculating the time for the microprocessor to enter the interrupt processing operation after the microprocessor receives the data sent by the hardware module, and taking the time as the response time t2 of the Nth hardware module; the standard response time t1 of the nth hardware module is the initial operation time of the microprocessor in the first loop detection, and is the response time of the nth hardware module in the last loop detection in the loop detection after the first loop detection, and the first loop detection is the detection of the first operation steps S100 to S400 of the microprocessor; the last cycle detection is the detection of the last operation of the steps S100 to S400 of the microprocessor; the next cycle detection is the detection of the next operation of the microprocessor from the step S100 to the step S400; the set value is 50 ms.
Specifically, the detection result of the hardware module is the serial number and the state mark of the hardware module; and the comparison result of the hardware module is the serial number and the state mark of the last cycle detection of the hardware module.
Furthermore, the detection results of all the hardware modules are completely the same as the comparison results of all the hardware modules, that is, the serial numbers and the state marks of all the hardware modules are completely the same as the serial numbers and the state marks of all the hardware modules in the last cycle detection; the detection results and the comparison results of all the hardware modules are not completely the same, namely the serial numbers and the state marks of more than or equal to 1 hardware module are different from the serial numbers and the state marks of the corresponding hardware modules of the last cycle detection.
Further, the detection results of all the current hardware modules are stored as numbers and state marks of all the current hardware modules which are used as numbers and state marks of all the hardware modules of the last cycle detection, that is, the detection results of all the current hardware modules are updated to new comparison results of all the hardware modules.
Specifically, the human-computer interaction interface comprises a display screen; the method for displaying through the human-computer interaction interface comprises the step of pushing the state marks of the hardware modules and the corresponding numbers of the state marks of the hardware modules, which are different from the comparison result of the hardware modules, in the detection result of the hardware modules to the human-computer interaction interface for displaying.
Specifically, in the first embodiment of the present invention, the following two procedures may be used to record the detection results of all hardware modules:
the following code for this embodiment is C language code, the runtime environment is Keil uVision5,
define Set_bit(data,bit)(data|＝(1<<bit)；
setting the state flag of the hardware module to be '1'/Set _ bit, namely setting the hardware module to be 'on-line';
define Reset_bit(data,bit)(data&＝(～(1<<bit)))；
the hardware module status flag is set to "0", i.e., the hardware module is set to "offline" status.
Here, 'data' is a data variable used to store a hardware module status flag, 'bit' is an enumeration member variable used to store a number representing a hardware module, and is used to determine which bit is to be operated on. When the value range of the hardware module number N is [1,32], a 32-bit integer variable can be defined to store all the hardware module numbers N; when the value of the hardware module number N is larger than 32, arrays with different data types can be defined to store all the hardware module numbers N according to actual conditions, and when the number of the hardware modules is large, the memory space can be saved better.
For example, when N is equal to 3, that is, when the 3 rd hardware module is detected, bit is equal to 3, if the response time difference is less than or equal to the set value 50ms, according to the first row of programs, the "3 + 1" th position "1" from the right of the data variable data is saved, the state flag of the third hardware module is "1", that is, the state flag of the third hardware module is "offline"; and if the response time difference is larger than the set value for 50ms, according to the second row of programs, the position '0' of the '3 + 1' from the right of the data is stored, and the state mark of the third hardware module is kept as '0', namely the state mark of the third hardware module is 'on-line'.
When all the hardware modules are detected, that is, N is equal to M, the loop detection proceeds to S400, and the detection results of all the hardware modules are compared with the comparison results of all the hardware modules. Specifically, the following program statements may be used for operation:
temp2＝detect_state.offline；
offline is the detection result of all current hardware modules;
temp1＝(detect_state.offlineΛdetect_last_state.offline)>>1；
offline is the comparison result of all hardware modules;
if (temp1&0x01)// shows that the bit has changed
if ((temp2> > id) &0x01)// determine the current state of the bit.
Here, temp2 is used to backup the detection results of all the current hardware modules, temp1 is a calculation result obtained by performing an exclusive or operation on the detection results of all the current hardware modules and the comparison results of all the hardware modules, and is used to record which bits have changed, and if the calculation result of a bit is "1", it indicates that the state of the hardware module corresponding to the bit has changed, and if the calculation result of a bit is "0", it indicates that the state of the hardware module corresponding to the bit has not changed. And obtaining the result after all bits are operated by a shifting judgment mode, thereby obtaining the hardware module state corresponding to all the current bits. If the detection results of all the hardware modules are completely the same as the comparison results of all the hardware modules, storing the detection results of all the current hardware modules, and turning to S100, namely performing next cycle detection; if the detection results of all the hardware modules are not identical to the comparison results of all the hardware modules, the detection results of all the current hardware modules are stored, the current state marks of the hardware modules corresponding to the changed bits are obtained through an if ((temp2> > id) &0x01) program, the corresponding hardware module state marks and the corresponding serial numbers are displayed through a human-computer interaction interface, and then S100 is carried out, namely the next cycle detection is carried out. Here, can regard as man-machine interface with liquid crystal display, it is more directly perceived and convenient than traditional display lamp.
When a plurality of microprocessors exist, a sender can directly send a detection result to a receiver, and the receiver only needs to receive data of one variable, and the detection result can be realized by the following programs:
detect_state.offline＝global_cpu1.offline|global_cpu2_offline|。。。global_cpuX_offline
offline is a detection result sent by all microprocessors;
// global _ cpu1.offline is a detection result sent by the first microprocessor;
the// global _ cpu2_ offline is a detection result sent by the second microprocessor;
the// global _ cpu _ offset is a detection result sent by the Xth microprocessor;
where X is the serial number of the microprocessor, when the number of all hardware modules is less than or equal to the number of bits of detect _ state.
When the number of all the hardware modules is greater than the bit number of detect _ state.
total_offline[0]＝global_cpu1_offline|(global_cpu2_offline)；
total_offline[1]＝(global_cpu2_offline)|(global_cpu3_offline)；
。。。
total_offline[X-2]＝(global_cpu(X-1_offline)|(global_cpuX_offline)
// global _ cpu1.offline is a detection result sent by the first microprocessor;
the// global _ cpu2_ offline is a detection result sent by the second microprocessor;
the// global _ cpu3_ offline is a detection result sent by the third microprocessor;
the// global _ cpu (X-1) _ ofline is a detection result sent by the (X-1) th microprocessor;
the// global _ cpu _ offset is a detection result sent by the Xth microprocessor;
// X is the serial number of the microprocessor
For example, the number of the detection results sent by the first microprocessor is 20, the number of the detection results sent by the second microprocessor is 13, the number of the detection results sent by the third microprocessor is 15, all the detection results are stored by using a 32-bit array total _ offset [ ], and the program is as follows:
total_offline[0]＝global_cpu1_offline|(global_cpu2_offline<<20)；
if the number of sets of total _ offset [0] is 32 bits, the detection results in the global _ cpu2_ offset are spliced from the 21 st bit because the global _ cpu1_ offset has 20 detection results and occupies 20 bits, namely the global _ cpu2_ offset < <20 bits are shifted to the left, and then the or operation is performed, and all the 20 detection results in the global _ cpu2_ offset and 12 detection results in the global _ cpu2_ offset are stored;
total_offline[1]＝(global_cpu2_offline>>12)|(global_cpu3_offline<<1)；
if the number of sets of total _ offline [1] is 32 bits, the last 1 detection result in the global _ cpu2_ offline is stored, 1 bit is occupied, then the detection results in the global _ cpu3_ offline are spliced from the 2 nd bit, namely the global _ cpu3_ offline < <1 bit is shifted to the left, and then OR operation is performed, and the last 1 detection result in the global _ cpu2_ offline and all 15 detection results in the global _ cpu3_ offline are stored;
the detection results sent by all the microprocessors are spliced and then processed in a centralized manner, so that the process of acquiring information among the microprocessors is simplified.
The invention also provides a system for detecting the offline state of the hardware module of the embedded system, which comprises a microprocessor, a memory unit and a human-computer interaction interface.
Specifically, the memory unit is configured to store computer program instructions, and the computer program instructions are suitable for being loaded by the microprocessor unit and executing the method for detecting the offline state of the embedded system hardware module;
specifically, the system further comprises a human-computer interaction interface, and the human-computer interaction interface comprises a display screen.
Although the present invention has been described in considerable detail and with reference to certain illustrated embodiments, it is not intended to be limited to any such details or embodiments or any particular embodiment, so as to effectively encompass the intended scope of the invention. Furthermore, the foregoing describes the invention in terms of embodiments foreseen by the inventor for which an enabling description was available, notwithstanding that insubstantial modifications of the invention, not presently foreseen, may nonetheless represent equivalent modifications thereto.
The above description is only a preferred embodiment of the present invention, and the present invention is not limited to the above embodiment, and the present invention shall fall within the protection scope of the present invention as long as the technical effects of the present invention are achieved by the same means. The invention is capable of other modifications and variations in its technical solution and/or its implementation, within the scope of protection of the invention.
Claims (8)
1. A method for detecting the off-line state of a hardware module of an embedded system is characterized by comprising the following steps:
setting N as the serial number of a hardware module in the embedded system, setting the initial value of N as 1, setting the value range of N as [1, M ], and setting M as the total number of the hardware modules; the state mark of the hardware module comprises an off-line state and an on-line state, and the initial state mark of all the hardware modules is set to be on-line;
s100: setting N equal to 1;
s200: detecting the response time t2 of the Nth hardware module, and subtracting the measured response time t2 from the standard response time t1 of the Nth hardware module to obtain a response time difference t 3;
s300: when N is smaller than M, if the response time difference t3 is larger than a set value, setting the state flag of the Nth hardware module to be offline, increasing N by 1 and transferring to S200, namely detecting the next hardware module; when N is smaller than M, if the response time difference t3 is smaller than or equal to a set value, setting the state flag of the Nth hardware module to be on-line, increasing N by 1 and transferring to S200, namely detecting the next hardware module; when N is equal to M, go to S400;
s400: when N is equal to M, if the detection results of all the hardware modules are completely the same as the comparison results of all the hardware modules, storing the detection results of all the current hardware modules, and turning to S100, namely performing the next cycle detection; and if the detection results of all the hardware modules are not identical to the comparison results of all the hardware modules, storing the detection results of all the current hardware modules, displaying the detection results through a human-computer interaction interface, and then turning to S100 to perform next cycle detection.
2. The method according to claim 1, wherein the method for detecting the response time t2 of the Nth hardware module comprises: calculating the time for the microprocessor to enter the interrupt processing operation after the microprocessor receives the data sent by the hardware module, and taking the time as the response time t2 of the Nth hardware module; the standard response time t1 of the nth hardware module is the initial operation time of the microprocessor in the first loop detection, and is the response time of the nth hardware module in the last loop detection in the loop detection after the first loop detection, and the first loop detection is the detection of the first operation steps S100 to S400 of the microprocessor; the last cycle detection is the detection of the last operation of the steps S100 to S400 of the microprocessor; the next cycle detection is the detection of the next operation of the microprocessor from the step S100 to the step S400; the set value is 50 ms.
3. The method for detecting the offline state of the hardware module of the embedded system according to claim 1, wherein the detection result of the hardware module is the serial number and the state mark of the hardware module; and the comparison result of the hardware module is the serial number and the state mark of the hardware module in the last cycle detection.
4. The method for detecting the offline state of the hardware module of the embedded system according to claim 1, wherein the detection results of all the hardware modules are completely the same as the comparison results of all the hardware modules, that is, the serial numbers and the state labels of all the hardware modules are completely the same as the serial numbers and the state labels of all the hardware modules detected in the previous cycle; the detection results and the comparison results of all the hardware modules are not completely the same, namely the serial numbers and the state marks of more than or equal to 1 hardware module are different from the serial numbers and the state marks of the corresponding hardware modules of the last cycle detection.
5. The method for detecting the offline state of the hardware module of the embedded system according to claim 1, wherein the step of storing the detection results of all the current hardware modules is to store the serial numbers and the state labels of all the current hardware modules as the serial numbers and the state labels of all the hardware modules of the last cycle detection, that is, to update the detection results of all the current hardware modules to new comparison results of all the hardware modules.
6. The method for detecting the offline state of the hardware module of the embedded system according to claim 1, wherein the human-computer interaction interface comprises a display screen; the method for displaying through the human-computer interaction interface comprises the step of pushing the state marks of the hardware modules and the corresponding numbers of the state marks of the hardware modules, which are different from the comparison result of the hardware modules, in the detection result of the hardware modules to the human-computer interaction interface for displaying.
7. A system for detecting the offline state of a hardware module of an embedded system comprises:
a microprocessor;
a memory cell: configured to store computer program instructions adapted to be loaded by said microprocessor unit and to perform a method of detecting an offline state of an embedded system hardware module according to any one of claims 1 to 6.
8. The system for detecting the offline state of the hardware module of the embedded system according to claim 7, further comprising a human-computer interface, wherein the human-computer interface comprises a display screen.
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| CN104778403A (en) * | 2014-01-15 | 2015-07-15 | 江苏南大苏富特科技股份有限公司 | Sequence pattern software security vulnerability-based detection method |
| CN105279075A (en) * | 2014-06-10 | 2016-01-27 | 江苏博智软件科技有限公司 | Detection method based on sequence mode software safety hole |
| US20170344438A1 (en) * | 2016-05-24 | 2017-11-30 | Virginia Polytechnic Institute And State University | Microprocessor fault detection and response system |
| CN108241355A (en) * | 2016-12-27 | 2018-07-03 | 合肥美亚光电技术股份有限公司 | Fault recovery method, system and the screening machine of screening machine |
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| CN104778403A (en) * | 2014-01-15 | 2015-07-15 | 江苏南大苏富特科技股份有限公司 | Sequence pattern software security vulnerability-based detection method |
| CN105279075A (en) * | 2014-06-10 | 2016-01-27 | 江苏博智软件科技有限公司 | Detection method based on sequence mode software safety hole |
| US20170344438A1 (en) * | 2016-05-24 | 2017-11-30 | Virginia Polytechnic Institute And State University | Microprocessor fault detection and response system |
| CN108241355A (en) * | 2016-12-27 | 2018-07-03 | 合肥美亚光电技术股份有限公司 | Fault recovery method, system and the screening machine of screening machine |
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