NAND flash memory error rate prediction method and system
Technical Field
The invention belongs to the field of computer storage, and particularly relates to a method and a system for predicting error rate of a NAND flash memory.
Background
In recent years, NAND flash memory has become a mainstream storage medium due to its characteristics of high speed, high storage density, good shock resistance, and the like, and is widely used in many systems such as embedded systems, personal computers, and high-performance servers. But as feature technology size decreases, multilevel storage grows, and the number of layers in a three-dimensional stack increases, various disturbs pose significant challenges to NAND flash reliability.
In the use process of the NAND flash memory, the oxide layer is abraded by programming/Erase (P/E) operation; as wear increases, read errors occur when the written data is read. And a read error may also occur when the written data is left for a period of time to be read. The Raw Bit Error Rate (RBER) indicates the ratio of Error bits to the total number of bits of the read data without decoding. When the original bit error rate is low, the erroneous data can be corrected by the error correction code. However, as the oxide layer wears and time passes, the amount of charge stored in the memory cell also changes significantly, resulting in higher RBER and read failure. The value of data is immeasurable for enterprises or consumers, and is even higher than that of a storage medium of the NAND flash memory, and if the time when a bad block appears in the NAND flash memory can be predicted, the data stored in the NAND flash memory can be transferred to a new NAND flash memory before the bad block appears in the NAND flash memory, so that the data loss is avoided.
Currently, most research is focused on life prediction of a flash memory in order to ensure the safety of data stored in a NAND flash memory. The traditional method for predicting the service life of the NAND flash memory can only roughly classify good blocks and bad blocks, and is not beneficial to taking corresponding measures in time when the NAND flash memory is about to have the bad blocks. In the patent application "a method for predicting the life of a flash memory implemented in an SSD" (application number: 201811514746.9), a method for predicting the life prediction value of a flash memory chip is disclosed. The flash life predicted by the method refers to the number of programming/erasing cycles that can be executed before the flash product fails or reaches the upper limit of an error correction code; specifically, one or more of the flash memory characteristic quantities are operated to obtain operation processing values, the flash memory characteristic quantities and the operation processing values form a set, a subset in the set is taken as the input of a prediction model, and the method only uses a gene programming algorithm to execute prediction model training. In general, the method cannot guarantee the accuracy of the flash life prediction and provide reliable analysis basis for the safety of the data stored in the NAND flash because of the dependence on specific characteristic quantities and specific execution algorithms.
Disclosure of Invention
Aiming at the defects and improvement requirements of the prior art, the invention provides a method and a system for predicting the error rate of a NAND flash memory, and aims to realize the prediction of the original bit error rate in the NAND flash memory and guarantee the data storage safety.
To achieve the above object, according to a first aspect of the present invention, there is provided a NAND flash memory error rate prediction method, including:
acquiring M interference characteristics from historical data of the NAND flash memory as early-stage interference characteristics, acquiring original bit error rates corresponding to the early-stage interference characteristics at the same time, and taking the early-stage interference characteristics and the original bit error rates corresponding to the early-stage interference characteristics as a prediction sample so as to obtain M prediction samples;
inputting the obtained M prediction samples into a trained error rate prediction model, and predicting an original bit error rate corresponding to each later-stage interference feature in N later-stage interference features;
the interference characteristics are characteristics or characteristic combinations which affect the original bit error rate of the NAND flash memory; the error rate prediction model is a multi-input multi-output model and is used for predicting an original bit error rate corresponding to the later-stage interference characteristic according to the earlier-stage interference characteristic and the corresponding original bit error rate; the late interference signature is later in time sequence than the early interference signature; m and N are both positive integers.
The method and the device have a certain rule between the RBER under the early interference characteristic and the RBER under the later interference characteristic of the NAND flash memory, and predict the original bit error rate corresponding to the later interference characteristic according to the early interference characteristic and the corresponding original bit error rate, thereby not only realizing the error rate prediction of the NAND flash memory and providing quantitative and reliable judgment basis for data storage safety, but also predicting the change trend of the error rate of the NAND flash memory and being beneficial to accurately determining the time for data migration.
Further, the disturb characteristics include one or more of program/erase cycles, data retention time, program disturb, read disturb, and inter-layer disturb.
A certain rule exists between the multidimensional interference characteristic and the RBER, for example, Data Retention Time (DR) and programming/erasing periods (P/E cycles), the RBER oscillates and rises predictably along with the increase of the DR and the P/E cycles, but the increasing curves among the P/E cycles, the DR and the RBER are not completely smooth monotone increasing curves and have certain fluctuation, smoothness and even descending change; the method can predict the error rate of the NAND flash memory aiming at the multi-dimensional characteristic interference, can apply the characteristics of the NAND flash memory, and can ensure the prediction accuracy to the maximum extent.
Further, the method for training the error rate prediction model comprises the following steps:
(S1) acquiring M + N interference characteristics and original bit error rates corresponding to the interference characteristics from historical data of the NAND flash memory, dividing the acquired interference characteristics into M interference characteristics in the early stage and N interference characteristics in the later stage, forming training data by the interference characteristics in the early stage and the original bit error rates corresponding to the interference characteristics in the early stage, and forming label data by the interference characteristics in the later stage and the original bit error rates corresponding to the interference characteristics in the later stage, thereby obtaining a training sample consisting of the training data and the label data;
(S2) repeating the step (S1) until T training samples are acquired;
(S3) establishing an error rate prediction model based on the multi-input multi-output model, and then training the error rate prediction model by using all the obtained training samples, so as to obtain a trained error rate prediction model after training is finished;
wherein T is a positive integer.
Further, the interference characteristic and the original bit error rate are obtained in units of blocks.
Further, the interference characteristic and the original bit error rate are obtained in units of pages.
The reliability difference between flash memory blocks is large, and correspondingly, the RBER difference between the blocks is large, so that the error rate estimation cannot be carried out by using a uniform method or parameters; similarly, the reliability and RBER difference between the flash memory pages are large, and the error rate estimation cannot be carried out by using a uniform method or parameters, so that the data are obtained by taking the pages as units, model training and error rate prediction are carried out, and the original bit error rate of each flash memory page can be accurately predicted; with the continuous increase of the page capacity of the flash memory, the method for predicting the page-level error rate has important practical significance.
Further, the error rate prediction model is an artificial neural network model or a recurrent neural network model; an error rate prediction model is established based on an artificial neural network model or a recurrent neural network model, and higher prediction precision can be obtained.
Further, the method for predicting the error rate of the NAND flash memory according to the first aspect of the present invention further includes: if the data acquisition fails when the interference characteristics and the corresponding original bit error rate are acquired from the historical data of the NAND flash memory, missing data is supplemented in a data supplementing mode so as to ensure that the required data can be acquired successfully.
The method and the device utilize a data complementing mode to complement the missing data, can ensure that enough input data can be obtained at any one prediction point, and realize the prediction of the error rate of the NAND flash memory; and enough training samples can be obtained in the model training process, so that the training effect of the model is ensured.
According to a second aspect of the present invention, there is also provided a NAND flash memory error rate prediction system, including: a prediction sample acquisition module and a prediction module;
the prediction sample acquisition module is used for acquiring M interference characteristics from historical data of the NAND flash memory as early-stage interference characteristics, acquiring original bit error rates corresponding to the early-stage interference characteristics at the same time, and taking the early-stage interference characteristics and the original bit error rates corresponding to the early-stage interference characteristics as a prediction sample so as to obtain M prediction samples;
the prediction module is used for inputting the M prediction samples acquired by the prediction sample acquisition module into a trained error rate prediction model and predicting the original bit error rate corresponding to each later-stage interference feature in the N later-stage interference features;
the interference characteristics are characteristics or characteristic combinations which affect the original bit error rate of the NAND flash memory; the error rate prediction model is a multi-input multi-output model and is used for predicting an original bit error rate corresponding to the later-stage interference characteristic according to the earlier-stage interference characteristic and the corresponding original bit error rate; the absolute values of the later-stage interference characteristics are all larger than the absolute values of the earlier-stage interference characteristics; m and N are both positive integers.
Generally, by the above technical solution conceived by the present invention, the following beneficial effects can be obtained:
(1) the method and the device predict the original bit error rate corresponding to the later-period interference characteristic according to the earlier-period interference characteristic and the corresponding original bit error rate, not only realize the error rate prediction of the NAND flash memory and can provide quantitative and reliable judgment basis for data storage safety, but also can predict the change trend of the error rate of the NAND flash memory and are beneficial to accurately determining the time for data migration.
(2) The method realizes the prediction of the error rate of the NAND flash memory, only needs to collect the characteristics influencing the error rate of the NAND flash memory and the original bit error rate, and does not depend on the structural characteristics of the NAND flash memory, so the method can be suitable for the NAND flash memories with various types and various process sizes.
(3) The method can realize the error rate prediction of both the block level and the page level, and has important practical significance.
(4) In the preferred embodiment of the invention, the error rate prediction model is established based on the artificial neural network model or the recurrent neural network model, so that higher prediction precision can be obtained.
Drawings
FIG. 1 is a flowchart of a method for predicting an error rate of a NAND flash memory according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of an error rate prediction model according to an embodiment of the present invention;
fig. 3 is a flowchart of an error rate prediction model training method according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
In the present application, the terms "first," "second," and the like (if any) in the description and the drawings are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order.
In order to realize the prediction of the original bit error rate in the NAND flash memory and guarantee the data storage safety, the NAND flash memory error rate prediction method provided by the invention, as shown in fig. 1, comprises the following steps:
acquiring M interference characteristics from historical data of the NAND flash memory as early-stage interference characteristics, acquiring original bit error rates corresponding to the early-stage interference characteristics at the same time, and taking the early-stage interference characteristics and the original bit error rates corresponding to the early-stage interference characteristics as a prediction sample so as to obtain M prediction samples;
inputting the obtained M prediction samples into a trained error rate prediction model, and predicting an original bit error rate corresponding to each later-stage interference feature in N later-stage interference features;
the interference characteristics are characteristics or characteristic combinations which affect the original bit error rate of the NAND flash memory; the error rate prediction model is a multiple-input multiple-output model, as shown in fig. 2, and is configured to predict an original bit error rate corresponding to the later-stage interference characteristic according to the earlier-stage interference characteristic and the corresponding original bit error rate; the late interference signature is later in time sequence than the early interference signature; m and N are positive integers; in specific application, specific values of M and N, namely the number of early-stage interference features and the specific number of later-stage interference features, can be correspondingly determined according to the change condition of the error rate of the NAND flash memory; for example, if the error rate of the NAND flash memory changes violently, the value of M is relatively large, and the value of N is relatively small, so that the rule that the RBER changes along with the interference characteristic can be accurately learned, and the RBER under the later interference characteristic can be accurately predicted; on the contrary, if the change of the error rate of the NAND flash memory is relatively smooth, the value of M is relatively small, and the value of N is relatively large, so that the model training and the error rate prediction can be simplified under the condition of ensuring the prediction accuracy.
The method for predicting the error rate of the NAND flash memory predicts the original bit error rate corresponding to the later-period interference characteristic according to the earlier-period interference characteristic and the corresponding original bit error rate, not only realizes the error rate prediction of the NAND flash memory and can provide quantitative and reliable judgment basis for data storage safety, but also can predict the change trend of the error rate of the NAND flash memory and is beneficial to accurately determining the time for data migration.
Based on the prediction result of the embodiment, it can be predicted what value of the interference characteristic of the NAND flash will be a bad block, so that corresponding measures (such as data migration) can be taken in advance to ensure the storage safety of data.
In an alternative embodiment, the disturb characteristic includes one or more of program/erase cycle, data retention time, program disturb, read disturb, and inter-layer disturb;
a certain rule exists between the multidimensional interference characteristic and the RBER, for example, Data Retention Time (DR) and programming/erasing periods (P/E cycles), the RBER oscillates and rises predictably along with the increase of the DR and the P/E cycles, but the increasing curves among the P/E cycles, the DR and the RBER are not completely smooth monotone increasing curves and have certain fluctuation, smoothness and even descending change; the NAND flash memory error rate prediction method can predict the NAND flash memory error rate aiming at multi-dimensional characteristic interference, can apply the characteristics of the NAND flash memory and furthest ensure the prediction accuracy;
it should be noted that the above-mentioned interference characteristics are only the characteristics that affect the error rate of the NAND flash memory, which are commonly found in the NAND flash memory, but are not to be understood as the only limitation of the present invention, and other interference characteristics that affect the error rate of the NAND flash memory may also be applied to the present invention, depending on the characteristics of the NAND flash memory; specifically, which kind or kinds of characteristics are selected as the interference characteristics for error rate prediction can be determined comprehensively according to the influence degree of each characteristic on the error rate of the NAND flash memory, the data acquisition cost, the model training cost and other factors.
In an alternative embodiment, as shown in fig. 3, the method for training the error rate prediction model includes:
(S1) acquiring M + N interference characteristics and original bit error rates corresponding to the interference characteristics from historical data of the NAND flash memory, dividing the acquired interference characteristics into M interference characteristics in the early stage and N interference characteristics in the later stage, forming training data by the interference characteristics in the early stage and the original bit error rates corresponding to the interference characteristics in the early stage, and forming label data by the interference characteristics in the later stage and the original bit error rates corresponding to the interference characteristics in the later stage, thereby obtaining a training sample consisting of the training data and the label data;
(S2) repeating the step (S1) until T training samples are acquired;
(S3) establishing an error rate prediction model based on the multi-input multi-output model, and then training the error rate prediction model by using all the obtained training samples, so as to obtain a trained error rate prediction model after training is finished;
wherein T is a positive integer; the specific value of T can be determined according to the training effect requirement of the model, so that the change rule of the original bit error rate of the NAND flash memory along with the interference characteristic can be learned, and overfitting can not occur.
Optionally, the interference characteristic and the original bit error rate are both obtained in units of blocks; alternatively, the interference characteristic and the original bit error rate are both obtained in units of pages.
The error rate prediction method of the NAND flash memory acquires data by taking a block as a unit, performs model training and error rate prediction, and can accurately predict the original bit error rate of each flash memory block; similarly, the reliability and RBER difference between flash memory pages are large, and error rate estimation cannot be performed by using a uniform method or parameters, and the NAND flash memory error rate prediction method can accurately predict the original bit error rate of each flash memory page by acquiring data in units of pages and performing model training and error rate prediction; with the continuous increase of the page capacity of the flash memory, the method for predicting the page-level error rate has important practical significance.
In order to further ensure the prediction accuracy of the error rate prediction model, in an alternative embodiment, the error rate prediction model is an artificial neural network model or a recurrent neural network model; an error rate prediction model is established based on an artificial neural network model or a recurrent neural network model, so that higher prediction precision can be obtained;
it should be noted that the above-mentioned model is only a preferred embodiment of the present invention, and should not be construed as the only limitation to the present invention, and other multiple-input multiple-output models can be applied to the present invention to realize the prediction of the error rate of the NAND flash memory.
In an optional implementation manner, the method for predicting the error rate of the NAND flash memory may further include: if the data acquisition fails when the interference characteristics and the corresponding original bit error rate are acquired from the historical data of the NAND flash memory, missing data is supplemented in a data supplementing mode so as to ensure that the required data can be acquired successfully.
Missing data are supplemented in a data supplementing mode, so that enough input data can be obtained at any one prediction point, and the error rate of the NAND flash memory is predicted; and enough training samples can be obtained in the model training process, so that the training effect of the model is ensured.
In summary, the error rate prediction method for the NAND flash memory can not only predict the number of program/erase cycles that can be executed before the NAND flash memory fails or reaches the upper limit of the error correction code, but also predict the storage time of the NAND flash memory at any number of program/erase cycles; the input of the prediction model is RBER under the previous interference characteristics of the determined dimensionality in the same prediction unit, the prediction model can be an artificial neural network, a recurrent neural network or other multi-input multi-output models, and finally the flash memory error rate corresponding to the NAND flash memory multi-dimensional interference characteristics is obtained through model calculation.
The error rate prediction method of the NAND flash memory does not depend on the structural characteristics of the NAND flash memory, so that the method can be suitable for the NAND flash memories of various types and various process sizes; specifically, the method is not only applicable to dry plane NAND flash memories, but also three-dimensional NAND flash memories, and is also applicable to NAND flash memories of various process sizes, Floating Gate (Floating Gate) and Charge Trap (Charge Trap) types, and is applicable to future complicated RBER change rules.
The invention also provides a system for predicting the error rate of the NAND flash memory, which comprises the following steps: a prediction sample acquisition module and a prediction module;
the prediction sample acquisition module is used for acquiring M interference characteristics from historical data of the NAND flash memory as early-stage interference characteristics, acquiring original bit error rates corresponding to the early-stage interference characteristics at the same time, and taking the early-stage interference characteristics and the original bit error rates corresponding to the early-stage interference characteristics as a prediction sample so as to obtain M prediction samples;
the prediction module is used for inputting the M prediction samples acquired by the prediction sample acquisition module into a trained error rate prediction model and predicting the original bit error rate corresponding to each later-stage interference feature in the N later-stage interference features;
the interference characteristics are characteristics or characteristic combinations which affect the original bit error rate of the NAND flash memory; the error rate prediction model is a multi-input multi-output model and is used for predicting an original bit error rate corresponding to the later-stage interference characteristic according to the earlier-stage interference characteristic and the corresponding original bit error rate; the late interference signature is later in time sequence than the early interference signature; m and N are positive integers;
in the embodiment of the present invention, the detailed implementation of each module may refer to the description in the above method embodiment, and will not be repeated here.
It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.