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CN111399292B - Array substrate, preparation method thereof and touch liquid crystal display device - Google Patents

Array substrate, preparation method thereof and touch liquid crystal display device Download PDF

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CN111399292B
CN111399292B CN202010274220.9A CN202010274220A CN111399292B CN 111399292 B CN111399292 B CN 111399292B CN 202010274220 A CN202010274220 A CN 202010274220A CN 111399292 B CN111399292 B CN 111399292B
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thin film
film transistor
array substrate
photosensitive
electrode
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CN111399292A (en
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刘仕彬
钟德镇
廖家德
郑会龙
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InfoVision Optoelectronics Kunshan Co Ltd
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136227Through-hole connection of the pixel electrode to the active element through an insulation layer
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/13338Input devices, e.g. touch panels
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/042Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by opto-electronic means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • H10D86/021Manufacture or treatment of multiple TFTs
    • H10D86/0221Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/423Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/471Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having different architectures, e.g. having both top-gate and bottom-gate TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • G02F1/136295Materials; Compositions; Manufacture processes
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04103Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices

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  • Physics & Mathematics (AREA)
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  • Engineering & Computer Science (AREA)
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Abstract

The invention provides an array substrate and a preparation method thereof, wherein the array substrate comprises a plurality of sub-pixels which are arranged in an array manner, each sub-pixel comprises a display pixel area and a photosensitive pixel area, a switch thin film transistor and a pixel electrode which are electrically connected are arranged in the display pixel area, and a photosensitive thin film transistor is arranged in the photosensitive pixel area. The invention provides a touch liquid crystal display device which comprises the array substrate. According to the array substrate, the preparation method thereof and the touch liquid crystal display device provided by the invention, the switch thin film transistor and the pixel electrode which are electrically connected are formed in the display pixel area of the array substrate, and the photosensitive thin film transistor is formed in the photosensitive pixel area of the array substrate, so that the manufacturing process of the photosensitive thin film transistor is compatible with that of the switch thin film transistor, and the cost is reduced while the remote sensing is realized.

Description

阵列基板及其制备方法和触控液晶显示装置Array substrate and preparation method thereof, and touch liquid crystal display device

技术领域technical field

本发明涉及显示技术领域,且特别是涉及一种阵列基板及其制备方法和触控液晶显示装置。The present invention relates to the field of display technology, and in particular, to an array substrate, a preparation method thereof, and a touch-control liquid crystal display device.

背景技术Background technique

薄膜晶体管在显示领域得到广泛的应用,氧化物薄膜晶体管,低温多晶硅薄膜晶体管等新技术不断更新。近年来,氢化非晶硅薄膜晶体管(a-Si:H TFT)技术被广泛应用于LCD的开关元件。目前,a-Si:H TFT技术简单,适合用于大面积的电子器件,对显示产业的发展有很大的帮助。Thin film transistors are widely used in the display field, and new technologies such as oxide thin film transistors and low temperature polysilicon thin film transistors are constantly updated. In recent years, hydrogenated amorphous silicon thin film transistor (a-Si:H TFT) technology has been widely used in switching elements of LCDs. At present, a-Si:H TFT technology is simple and suitable for large-area electronic devices, which is of great help to the development of the display industry.

此外,a-Si:H TFT的高光敏特性也为光学传感器的应用提供了发展潜力。利用a-Si:H薄膜的电光特性,可以使a-Si:H TFT实现X射线图像传感、指纹和光学触摸显示等多种增值功能。在这些新的TFT技术中,具有远程触控功能的超大尺寸交互式屏幕在会议室和会议室应用中受到高度重视,在这种情况下,一般使用发光二极管或者激光笔来提供多点光学输入功能。如何将光敏薄膜晶体管嵌入触控液晶显示装置内且与触控液晶显示装置的TFT开关制程兼容,是亟待解决的问题。In addition, the high photosensitivity properties of a-Si:H TFTs also provide development potential for the application of optical sensors. Using the electro-optical properties of a-Si:H thin films, a-Si:H TFTs can realize various value-added functions such as X-ray image sensing, fingerprint and optical touch display. Among these new TFT technologies, oversized interactive screens with remote touch capability are highly valued in meeting rooms and conference room applications, where LEDs or laser pointers are typically used to provide multi-point optical input Function. How to embed the photosensitive thin film transistor in the touch liquid crystal display device and be compatible with the TFT switching process of the touch liquid crystal display device is an urgent problem to be solved.

发明内容SUMMARY OF THE INVENTION

本发明的目的在于提供一种阵列基板及其制备方法和触控液晶显示装置,以解决现有触控液晶装置实现远程触控时光敏薄膜晶体管无法与触控液晶显示装置的制程相兼容的问题。The purpose of the present invention is to provide an array substrate, a preparation method thereof, and a touch-control liquid crystal display device, so as to solve the problem that the photosensitive thin film transistor of the existing touch-control liquid crystal device realizes remote touch control and the process of the touch-control liquid crystal display device cannot be compatible. .

本发明解决其技术问题是采用以下的技术方案来实现的。The present invention solves its technical problems by adopting the following technical solutions.

本发明提供一种阵列基板,所述阵列基板包括阵列排布的多个子像素,每个子像素包括显示像素区和光敏像素区,所述显示像素区内设有电连接的开关薄膜晶体管和像素电极,所述光敏像素区内设有光敏薄膜晶体管。The present invention provides an array substrate, the array substrate includes a plurality of sub-pixels arranged in an array, each sub-pixel includes a display pixel area and a photosensitive pixel area, and the display pixel area is provided with a switching thin film transistor and a pixel electrode that are electrically connected , a photosensitive thin film transistor is arranged in the photosensitive pixel area.

在本发明的一个实施例中,所述阵列基板包括与所述开关薄膜晶体管电连接的第一数据线和第一扫描线以及与所述光敏薄膜晶体管电连接的第二数据线和第二扫描线。In one embodiment of the present invention, the array substrate includes a first data line and a first scan line electrically connected to the switching thin film transistor, and a second data line and a second scan line electrically connected to the photosensitive thin film transistor Wire.

本发明还提供一种触控液晶显示装置,包括如上所述的阵列基板。The present invention also provides a touch-control liquid crystal display device, comprising the above-mentioned array substrate.

在本发明的一个实施例中,触控液晶显示装置包括与所述阵列基板相对设置的彩色滤光基板,所述彩色滤光基板包括第一色阻区、第二色阻区和第三色阻区,每个色阻区与所述阵列基板上的一子像素对应设置。In one embodiment of the present invention, the touch-control liquid crystal display device includes a color filter substrate disposed opposite to the array substrate, and the color filter substrate includes a first color blocking area, a second color blocking area and a third color blocking area Resist regions, each color resist region corresponding to a sub-pixel on the array substrate.

本发明还提供一种制备阵列基板的方法,包括:The present invention also provides a method for preparing an array substrate, comprising:

在阵列基板的基底上的显示像素区和光敏像素区同步形成开关薄膜晶体管和光敏薄膜晶体管;A switching thin film transistor and a photosensitive thin film transistor are formed synchronously in the display pixel area and the photosensitive pixel area on the base of the array substrate;

在所述开关薄膜晶体管上形成相互绝缘的像素电极和公共电极,所述像素电极与所述开关薄膜晶体管电性连接;A pixel electrode and a common electrode that are insulated from each other are formed on the switching thin film transistor, and the pixel electrode is electrically connected to the switching thin film transistor;

在本发明的一个实施例中,在阵列基板的基底上的显示像素区和光敏像素区同步形成开关薄膜晶体管和光敏薄膜晶体管的步骤包括:In one embodiment of the present invention, the step of synchronously forming the switching thin film transistor and the photosensitive thin film transistor in the display pixel area and the photosensitive pixel area on the base of the array substrate includes:

在所述基底的所述显示像素区和所述光敏像素区分别形成第一栅极跟第二栅极,以及在形成所述第一栅极和所述第二栅极的所述基底上形成绝缘层。A first gate electrode and a second gate electrode are respectively formed on the display pixel region and the photosensitive pixel region of the substrate, and on the substrate on which the first gate electrode and the second gate electrode are formed Insulation.

在本发明的一个实施例中,在形成所述第一栅极和所述第二栅极的所述基底上形成绝缘层后的步骤包括:In an embodiment of the present invention, the step of forming an insulating layer on the substrate on which the first gate electrode and the second gate electrode are formed includes:

在形成所述绝缘层的所述第二栅极上形成第二沟道层后,在形成所述绝缘层的所述第一栅极上形成第一沟道层。After forming a second channel layer on the second gate where the insulating layer is formed, a first channel layer is formed on the first gate where the insulating layer is formed.

在本发明的一个实施例中,在形成所述绝缘层的所述第一栅极上形成第一沟道层后的步骤还包括:在所述第一沟道层上形成光阻层,在所述第二沟道层及形成有所述光阻层的所述第一沟道层上形成源漏金属层。In an embodiment of the present invention, the step after forming a first channel layer on the first gate electrode where the insulating layer is formed further includes: forming a photoresist layer on the first channel layer, A source-drain metal layer is formed on the second channel layer and the first channel layer on which the photoresist layer is formed.

在本发明的一个实施例中,对所述第二沟道层上方的所述源漏金属层进行蚀刻形成所述光敏薄膜晶体管的第二源极和第二漏极。In one embodiment of the present invention, the source-drain metal layer above the second channel layer is etched to form the second source electrode and the second drain electrode of the photosensitive thin film transistor.

在本发明的一个实施例中,通过剥离工艺将所述第一沟道层上方的所述光阻层剥离后,所述第一沟道层上方的所述源漏金属层形成所述开关薄膜晶体管的第一源极和第一漏极;所述第一源极与所述第一漏极之间的距离小于或等于所述第二源极和所述第二漏极之间的距离。In an embodiment of the present invention, after the photoresist layer above the first channel layer is peeled off by a lift-off process, the source-drain metal layer above the first channel layer forms the switching film The first source electrode and the first drain electrode of the transistor; the distance between the first source electrode and the first drain electrode is less than or equal to the distance between the second source electrode and the second drain electrode.

在本发明的一个实施例中,所述开关薄膜晶体管为氧化物薄膜晶体管,所述光敏薄膜晶体管为氢化非晶硅薄膜晶体管。In an embodiment of the present invention, the switching thin film transistor is an oxide thin film transistor, and the photosensitive thin film transistor is a hydrogenated amorphous silicon thin film transistor.

本发明提供的阵列基板及其制备方法,通过在阵列基板的显示像素区形成电连接的开关薄膜晶体管和像素电极,在阵列基板的光敏像素区形成光敏薄膜晶体管,可使光敏薄膜晶体管的制程与开关薄膜晶体管的制程兼容,从而可以在实现远程感测的同时降低成本。The array substrate provided by the present invention and the preparation method thereof, by forming electrically connected switching thin film transistors and pixel electrodes in the display pixel area of the array substrate, and forming photosensitive thin film transistors in the photosensitive pixel area of the array substrate, can make the manufacturing process of the photosensitive thin film transistor and the photosensitive thin film transistor compatible. The switching thin-film transistors are process-compatible, enabling remote sensing while reducing cost.

附图说明Description of drawings

图1为本发明第一实施例中液晶触控显示装置的剖面图。FIG. 1 is a cross-sectional view of a liquid crystal touch display device according to a first embodiment of the present invention.

图2为本发明第一实施例中彩色滤光基板的平面结构示意图。FIG. 2 is a schematic plan view of the color filter substrate in the first embodiment of the present invention.

图3为本发明第一实施例中阵列基板的平面结构示意图。FIG. 3 is a schematic plan view of the array substrate in the first embodiment of the present invention.

图4a至图4m为本发明第一实施例中阵列基板的制备工艺流程图。4a to 4m are flow charts of the fabrication process of the array substrate according to the first embodiment of the present invention.

图5为本发明第二实施例中阵列基板的剖面图。5 is a cross-sectional view of an array substrate according to a second embodiment of the present invention.

具体实施方式Detailed ways

为更进一步阐述本发明为达成预定发明目的所采取的技术方式及功效,以下结合附图及实施例,对本发明的具体实施方式、结构、特征及其功效,详细说明如后。In order to further illustrate the technical means and effects adopted by the present invention to achieve the predetermined purpose of the invention, the specific embodiments, structures, features and effects of the present invention are described in detail below in conjunction with the accompanying drawings and examples.

[第一实施例][First Embodiment]

图1为本发明第一实施例中液晶触控显示装置的剖面图,图2为本发明第一实施例中彩色滤光基板的平面结构示意图,图3为本发明第一实施例中阵列基板的平面结构示意图。请结合图1至图3,本发明的实施例提供一种液晶触控显示装置,该液晶触控显示装置包括阵列基板100,阵列基板100包括阵列排布的多个子像素SP(sub-pixel)、第一数据线41、第一扫描线51、第二数据线42和第二扫描线52,每个子像素SP包括显示像素区SP1和光敏像素区SP2,显示像素区SP1内设有电连接的开关薄膜晶体管10和像素电极31,光敏像素区SP2内设有光敏薄膜晶体管20;第一数据线41和第一扫描线51分别与开关薄膜晶体管10电连接,第二数据线42和第二扫描线52分别与光敏薄膜晶体管20电连接。本实施例中,子像素SP例如为红色R、绿色G或蓝色B子像素,多个相邻的子像素SP构成一个显示像素(pixel)。例如,一个显示像素可包括红色R、绿色G和蓝色B三个子像素SP。1 is a cross-sectional view of a liquid crystal touch display device in a first embodiment of the present invention, FIG. 2 is a schematic plan view of a color filter substrate in a first embodiment of the present invention, and FIG. 3 is an array substrate in the first embodiment of the present invention Schematic diagram of the plane structure. Referring to FIGS. 1 to 3 , an embodiment of the present invention provides a liquid crystal touch display device, the liquid crystal touch display device includes an array substrate 100 , and the array substrate 100 includes a plurality of sub-pixels SP (sub-pixels) arranged in an array , the first data line 41, the first scan line 51, the second data line 42 and the second scan line 52, each sub-pixel SP includes a display pixel area SP1 and a photosensitive pixel area SP2, and the display pixel area SP1 is provided with an electrically connected The switching thin film transistor 10 and the pixel electrode 31 are provided with the photosensitive thin film transistor 20 in the photosensitive pixel area SP2; the first data line 41 and the first scanning line 51 are respectively electrically connected to the switching thin film transistor 10, and the second data line 42 and the second scanning The lines 52 are electrically connected to the photosensitive thin film transistors 20, respectively. In this embodiment, the sub-pixels SP are, for example, red R, green G, or blue B sub-pixels, and a plurality of adjacent sub-pixels SP constitute a display pixel (pixel). For example, one display pixel may include three sub-pixels SP of red R, green G and blue B.

请结合图1至图3,第一数据线41和第二数据线42相邻且平行设置,第一扫描线51和第二扫描线52相邻且平行设置。开关薄膜晶体管10包括第一栅极11、第一沟道层13、第一源极14和第一漏极15,第一栅极11连接至第一扫描线51,第一沟道层13设置在第一栅极11上方且分别与第一源极14和第一漏极15电性连接,第一源极14和第一漏极15之一电连接第一数据线41,第一源极14和第一漏极15之另一连接至像素电极31。例如,第一源极14连接至第一数据线41,第一漏极15连接至像素电极31。Please refer to FIG. 1 to FIG. 3 , the first data lines 41 and the second data lines 42 are arranged adjacent to and parallel to each other, and the first scan lines 51 and the second scan lines 52 are arranged adjacent to and parallel to each other. The switching thin film transistor 10 includes a first gate electrode 11 , a first channel layer 13 , a first source electrode 14 and a first drain electrode 15 , the first gate electrode 11 is connected to the first scan line 51 , and the first channel layer 13 is provided Above the first gate 11 and electrically connected to the first source 14 and the first drain 15 respectively, one of the first source 14 and the first drain 15 is electrically connected to the first data line 41 , and the first source The other of the first drain electrode 14 and the first drain electrode 15 is connected to the pixel electrode 31 . For example, the first source electrode 14 is connected to the first data line 41 , and the first drain electrode 15 is connected to the pixel electrode 31 .

光敏薄膜晶体管20包括第二栅极21、第二沟道层23、第二源极24和第二漏极25,第二栅极21连接至第二扫描线52,第二沟道层23设置在第二栅极21上方且分别与第二源极24和第二漏极25电性连接。第二源极24和第二漏极25之一连接至第二数据线42,第二源极24和第二漏极25之另一通过接触孔连接至第二扫描线52,例如,第二源极24连接至第二数据线42,第二漏极25通过接触孔连接至第二扫描线52。本实施例中,第一扫描线51和第二扫描线52可连接至同样的信号端来接收相同的电信号。The photosensitive thin film transistor 20 includes a second gate electrode 21 , a second channel layer 23 , a second source electrode 24 and a second drain electrode 25 , the second gate electrode 21 is connected to the second scan line 52 , and the second channel layer 23 is provided Above the second gate electrode 21 and electrically connected to the second source electrode 24 and the second drain electrode 25 respectively. One of the second source electrode 24 and the second drain electrode 25 is connected to the second data line 42, and the other one of the second source electrode 24 and the second drain electrode 25 is connected to the second scan line 52 through a contact hole, for example, the second The source electrode 24 is connected to the second data line 42, and the second drain electrode 25 is connected to the second scan line 52 through the contact hole. In this embodiment, the first scan line 51 and the second scan line 52 can be connected to the same signal terminal to receive the same electrical signal.

请结合图1至图3,液晶触控显示装置还包括与阵列基板100相对设置的彩色滤光基板200,彩色滤光基板200包括第一色阻区201、第二色阻区202和第三色阻区203,例如:第一色阻区201为红色色阻区、第二色阻区为绿色色阻区、第三色阻区203为蓝色色阻区。每个色阻区与阵列基板100上的一子像素SP对应设置。Please refer to FIG. 1 to FIG. 3 , the liquid crystal touch display device further includes a color filter substrate 200 disposed opposite to the array substrate 100 , and the color filter substrate 200 includes a first color resist region 201 , a second color resist region 202 and a third color filter substrate 200 . The color resist region 203, for example, the first color resist region 201 is a red color resist region, the second color resist region is a green color resist region, and the third color resist region 203 is a blue color resist region. Each color resist region is disposed corresponding to a sub-pixel SP on the array substrate 100 .

当LED光或者激光照射在液晶触控显示装置上时,LED光或者激光透过彩色滤光基板200照射到阵列基板100上,阵列基板100的光敏薄膜晶体管20可以将光强转化为电信号,从而可以实现非接触式的远程触控。When the LED light or laser is irradiated on the liquid crystal touch display device, the LED light or laser is irradiated onto the array substrate 100 through the color filter substrate 200, and the photosensitive thin film transistor 20 of the array substrate 100 can convert the light intensity into an electrical signal, Thereby, a non-contact remote touch can be realized.

本实施例中,第一源极14与第一漏极15之间的距离等于第二源极24和第二漏极25之间的距离。In this embodiment, the distance between the first source electrode 14 and the first drain electrode 15 is equal to the distance between the second source electrode 24 and the second drain electrode 25 .

图4a至图4m为本发明第一实施例中阵列基板的制备工艺流程图,请结合图4a至图4m,本发明的实施例提供一种制备阵列基板的方法,包括:4a to 4m are flowcharts of the manufacturing process of the array substrate according to the first embodiment of the present invention. Please refer to FIG. 4a to FIG. 4m. An embodiment of the present invention provides a method for preparing an array substrate, including:

在阵列基板100的基底110上的显示像素区SP1和光敏像素区SP2同步形成开关薄膜晶体管10和光敏薄膜晶体管20;The display pixel area SP1 and the photosensitive pixel area SP2 on the base 110 of the array substrate 100 are synchronously formed with the switching thin film transistor 10 and the photosensitive thin film transistor 20;

在开关薄膜晶体管10上形成相互绝缘的像素电极31和公共电极32,像素电极31与开关薄膜晶体管10电性连接。A pixel electrode 31 and a common electrode 32 that are insulated from each other are formed on the switching thin film transistor 10 , and the pixel electrode 31 is electrically connected to the switching thin film transistor 10 .

其中,开关薄膜晶体管10为氧化物薄膜晶体管,光敏薄膜晶体管20为氢化非晶硅薄膜晶体管。The switching thin film transistor 10 is an oxide thin film transistor, and the photosensitive thin film transistor 20 is a hydrogenated amorphous silicon thin film transistor.

下面对阵列基板100的制作流程进行具体说明。The manufacturing process of the array substrate 100 will be described in detail below.

请结合图4a,提供一基底110,在基底110上同步形成第一栅极11和第二栅极21,其中,第一栅极11位于显示像素区SP1,第二栅极21位于光敏像素区SP2。然后,在形成有第一栅极11和第二栅极21的基底110上再依次形成一栅极绝缘层101和一绝缘层12。该绝缘层12的材质例如为氧化硅。Referring to FIG. 4a, a substrate 110 is provided, and a first gate 11 and a second gate 21 are formed on the substrate 110 simultaneously, wherein the first gate 11 is located in the display pixel region SP1, and the second gate 21 is located in the photosensitive pixel region SP2. Then, a gate insulating layer 101 and an insulating layer 12 are sequentially formed on the substrate 110 on which the first gate 11 and the second gate 21 are formed. The insulating layer 12 is made of, for example, silicon oxide.

请结合图4b,在形成绝缘层12的第二栅极21上形成第二沟道层23。该第二沟道层23为a-Si:H薄膜层。Referring to FIG. 4 b , a second channel layer 23 is formed on the second gate electrode 21 where the insulating layer 12 is formed. The second channel layer 23 is an a-Si:H thin film layer.

请结合图4c,在形成绝缘层12的第一栅极11上形成第一沟道层13,该第一沟道层13和该第二沟道层23同层设置。然后,在该第一沟道层13上形成光阻层102。本实施例中,该第一沟道层13的材料为铟镓锌氧化物(indium gallium zinc oxide,IGZO),采用IGZO作为第一沟道层13的材料,可以有效降低采用传统氧化硅带来的晶体管漏电流过热问题。在第一沟道层13上形成光阻层102,可以改善IGZO薄膜晶体管的抗液体侵蚀能力,并且提高器件的稳定性。Referring to FIG. 4c, a first channel layer 13 is formed on the first gate 11 on which the insulating layer 12 is formed, and the first channel layer 13 and the second channel layer 23 are disposed in the same layer. Then, a photoresist layer 102 is formed on the first channel layer 13 . In this embodiment, the material of the first channel layer 13 is indium gallium zinc oxide (IGZO). Using IGZO as the material of the first channel layer 13 can effectively reduce the use of traditional silicon oxide. transistor leakage current overheating problem. Forming the photoresist layer 102 on the first channel layer 13 can improve the liquid corrosion resistance of the IGZO thin film transistor and improve the stability of the device.

请结合图4d,在该第一沟道层13上形成光阻层102后,再于第二沟道层23及形成有光阻层的第一沟道层13上形成源漏金属层16。Referring to FIG. 4d, after the photoresist layer 102 is formed on the first channel layer 13, the source-drain metal layer 16 is formed on the second channel layer 23 and the first channel layer 13 on which the photoresist layer is formed.

请结合图4e,对第二沟道层23上方的源漏金属层16进行蚀刻形成光敏薄膜晶体管20的第二源极24和第二漏极25。Referring to FIG. 4 e , the source-drain metal layer 16 above the second channel layer 23 is etched to form the second source electrode 24 and the second drain electrode 25 of the photosensitive thin film transistor 20 .

请结合图4f,通过剥离工艺将第一沟道层13上方的光阻层102剥离后,光阻层102带着源漏金属层16的部分金属一起脱落,第一沟道层13上方的源漏金属层16形成开关薄膜晶体管10的第一源极14和第一漏极15。其中,剥离(Lift-off)工艺是首先在衬底上涂胶并光刻,然后再制备金属薄膜,在有光刻胶的地方,金属薄膜形成在光刻胶上,而没有光刻胶的地方,金属薄膜就直接形成在衬底上。当使用溶剂去除衬底上的光刻胶时,不需要的金属就随着光刻胶的溶解而脱落在溶剂中,而直接形成在衬底上的金属部分则保留下来形成图形。剥离通常用于铂、金、硅化物和难熔金属的图形化。Referring to FIG. 4f , after the photoresist layer 102 above the first channel layer 13 is peeled off by a lift-off process, the photoresist layer 102 is peeled off together with part of the metal of the source-drain metal layer 16 , and the source layer 102 above the first channel layer 13 is peeled off. The drain metal layer 16 forms the first source electrode 14 and the first drain electrode 15 of the switching thin film transistor 10 . Among them, the lift-off process is to first apply glue on the substrate and photolithography, and then prepare a metal thin film. Where there is photoresist, the metal thin film is formed on the photoresist, and there is no photoresist. where the metal thin film is formed directly on the substrate. When a solvent is used to remove the photoresist on the substrate, the unwanted metal is shed in the solvent as the photoresist dissolves, while the metal part formed directly on the substrate remains to form a pattern. Lift-off is commonly used for patterning of platinum, gold, silicides and refractory metals.

请结合图4g,在形成有第一源极14和第一漏极15及形成有第二源极24和第二漏极25的基底110上方形成第一保护层103,该第一保护层103覆盖该显示像素区SP1和光敏像素区SP2。Referring to FIG. 4g, a first protective layer 103 is formed on the substrate 110 on which the first source electrode 14 and the first drain electrode 15 and the second source electrode 24 and the second drain electrode 25 are formed. The first protective layer 103 Cover the display pixel area SP1 and the photosensitive pixel area SP2.

请结合图4h至图4j,在形成有第一保护层103的基底110上方形成有机平坦层104,有机平坦层104覆盖该显示像素区SP1和光敏像素区SP2。对该有机平坦层104蚀刻后形成第一接触孔106使得第一保护层103部分露出,再于第一保护层103上方形成公共电极32。该公共电极32仅形成在显示像素区SP1内。Referring to FIGS. 4h to 4j, an organic flat layer 104 is formed on the substrate 110 on which the first protective layer 103 is formed, and the organic flat layer 104 covers the display pixel area SP1 and the photosensitive pixel area SP2. A first contact hole 106 is formed after etching the organic flat layer 104 so that the first protective layer 103 is partially exposed, and then a common electrode 32 is formed on the first protective layer 103 . The common electrode 32 is only formed in the display pixel region SP1.

请结合图4k,在形成有公共电极32的基底110上方形成第二保护层105,该第二保护层105在第一接触孔106处与第一保护层103接触。该第二保护层105覆盖显示像素区SP1和光敏像素区SP2。Referring to FIG. 4k , a second protective layer 105 is formed on the substrate 110 on which the common electrode 32 is formed, and the second protective layer 105 is in contact with the first protective layer 103 at the first contact hole 106 . The second protective layer 105 covers the display pixel area SP1 and the photosensitive pixel area SP2.

请结合图4l到图4m,对第二保护层105进行蚀刻使得第一源极14露出,再于第二保护层105上方形成像素电极31,该像素电极31与该第一源极14相接触。其中,像素电极31仅形成在显示像素区SP1的上方。4l to 4m, the second protective layer 105 is etched to expose the first source electrode 14, and then a pixel electrode 31 is formed on the second protective layer 105, and the pixel electrode 31 is in contact with the first source electrode 14. . The pixel electrode 31 is only formed above the display pixel region SP1.

本发明提供的阵列基板及其制备方法,通过在阵列基板100的显示像素区SP1形成电连接的开关薄膜晶体管10和像素电极31,在阵列基板100的光敏像素区SP2形成光敏薄膜晶体管20,同时在阵列基板上增加第二数据线和第二扫描线,通过第二数据线和第二扫描线对光敏薄膜晶体管20的触摸感应进行优化;另外,开关薄膜晶体管10为氧化物薄膜晶体管,采用IGZO作为第一沟道层13的材料,光敏薄膜晶体管20为氢化非晶硅薄膜晶体管,采用a-Si作为第二沟道层23的材料;本发明创新性地将该光敏薄膜晶体管20的制程与该开关薄膜晶体管10的制程兼容,从而可以在实现远程感测的同时还可以降低成本。In the array substrate and the manufacturing method thereof provided by the present invention, by forming the switch thin film transistor 10 and the pixel electrode 31 electrically connected in the display pixel area SP1 of the array substrate 100, the photosensitive thin film transistor 20 is formed in the photosensitive pixel area SP2 of the array substrate 100, and at the same time A second data line and a second scan line are added on the array substrate, and the touch sensing of the photosensitive thin film transistor 20 is optimized through the second data line and the second scan line; in addition, the switching thin film transistor 10 is an oxide thin film transistor, using IGZO As the material of the first channel layer 13, the photosensitive thin film transistor 20 is a hydrogenated amorphous silicon thin film transistor, and a-Si is used as the material of the second channel layer 23; the present invention innovatively combines the process of the photosensitive thin film transistor 20 with the The switching thin film transistor 10 is process compatible, so that the cost can be reduced while realizing remote sensing.

[第二实施例][Second Embodiment]

图5为本发明第二实施例中阵列基板的剖面图。阵列基板100的每个子像素SP包括显示像素区SP1和光敏像素区SP2,显示像素区SP1内设有电连接的开关薄膜晶体管和像素电极31,还包括公共电极32,该公共电极32和像素电极31通过第二保护层105绝缘设置,光敏像素区SP2内设有光敏薄膜晶体管。第一栅极11位于显示像素区SP1,第二栅极21位于光敏像素区SP2。在第二沟道层23上方形成光敏薄膜晶体管的第二源极24和第二漏极25。在第一沟道层13上方形成开关薄膜晶体管的第一源极14和第一漏极15。5 is a cross-sectional view of an array substrate according to a second embodiment of the present invention. Each sub-pixel SP of the array substrate 100 includes a display pixel area SP1 and a photosensitive pixel area SP2, the display pixel area SP1 is provided with a switching thin film transistor and a pixel electrode 31 that are electrically connected, and also includes a common electrode 32, the common electrode 32 and the pixel electrode 31 is insulated by the second protective layer 105, and a photosensitive thin film transistor is provided in the photosensitive pixel region SP2. The first gate 11 is located in the display pixel region SP1, and the second gate 21 is located in the photosensitive pixel region SP2. The second source electrode 24 and the second drain electrode 25 of the photosensitive thin film transistor are formed over the second channel layer 23 . A first source electrode 14 and a first drain electrode 15 of the switching thin film transistor are formed over the first channel layer 13 .

本实施例与第一实施例的区别在于,第一源极14与所述第一漏极15之间的距离小于第二源极24和第二漏极25之间的距离。这样的设计可以增大光敏薄膜晶体管20的第二沟道层23露出的面积,使得第二沟道层23更容易感测到光线,从而能够提高光敏薄膜晶体管20的灵敏度。The difference between this embodiment and the first embodiment is that the distance between the first source electrode 14 and the first drain electrode 15 is smaller than the distance between the second source electrode 24 and the second drain electrode 25 . Such a design can increase the exposed area of the second channel layer 23 of the photosensitive thin film transistor 20 , so that the second channel layer 23 can more easily sense light, thereby improving the sensitivity of the photosensitive thin film transistor 20 .

在本文中,术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含,除了包含所列的那些要素,而且还可包含没有明确列出的其他要素。As used herein, the terms "comprising", "comprising" or any other variation thereof are intended to encompass non-exclusive inclusion, in addition to those elements listed, but also other elements not expressly listed.

在本文中,所涉及的前、后、上、下等方位词是以附图中零部件位于图中以及零部件相互之间的位置来定义的,只是为了表达技术方案的清楚及方便。应当理解,所述方位词的使用不应限制本申请请求保护的范围。In this document, the related terms such as front, rear, upper and lower are defined by the positions of the components in the drawings and the positions between the components, which are only for the clarity and convenience of expressing the technical solution. It should be understood that the use of the locative words should not limit the scope of protection claimed in this application.

在不冲突的情况下,本文中上述实施例及实施例中的特征可以相互结合。The above-described embodiments and features of the embodiments herein may be combined with each other without conflict.

以上所述仅为本发明的较佳实施例,并不用以限制本发明,凡在本发明的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included in the protection of the present invention. within the range.

Claims (8)

1. A method for preparing an array substrate is characterized by comprising the following steps:
synchronously forming a switching thin film transistor (10) and a photosensitive thin film transistor (20) in a display pixel region (SP1) and a photosensitive pixel region (SP2) on a substrate (110) of an array substrate (100);
forming a pixel electrode (31) and a common electrode (32) which are insulated from each other on the switching thin film transistor (10), wherein the pixel electrode (31) is electrically connected with the switching thin film transistor (10);
wherein the step of forming the switching thin film transistor (10) and the light sensitive thin film transistor (20) in synchronization with the display pixel region (SP1) and the light sensitive pixel region (SP2) on the base (110) of the array substrate (100) comprises:
forming a first gate electrode (11) and a second gate electrode (21) in the display pixel region (SP1) and the photosensitive pixel region (SP2) of the substrate (110), respectively, and forming an insulating layer (12) on the substrate (110) where the first gate electrode (11) and the second gate electrode (21) are formed;
forming a first channel layer (13) on the first gate (11) on which the insulating layer (12) is formed after forming a second channel layer (23) on the second gate (21) on which the insulating layer (12) is formed;
and forming a light resistance layer (102) on the first channel layer (13), and forming a source-drain metal layer (16) on the second channel layer (23) and the first channel layer (13) formed with the light resistance layer (102).
2. The method of fabricating the array substrate according to claim 1, wherein the source-drain metal layer (16) above the second channel layer (23) is etched to form a second source electrode (24) and a second drain electrode (25) of the photosensitive thin film transistor (20).
3. The method for manufacturing the array substrate according to claim 2, wherein the source drain metal layer (16) above the first channel layer (13) forms a first source electrode (14) and a first drain electrode (15) of the switching thin film transistor (10) after the photoresist layer (102) above the first channel layer (13) is stripped through a stripping process; the distance between the first source (14) and the first drain (15) is smaller than or equal to the distance between the second source (24) and the second drain (25).
4. The method of fabricating an array substrate of claim 1, wherein the switching thin film transistor (10) is an oxide thin film transistor and the photosensitive thin film transistor (20) is a hydrogenated amorphous silicon thin film transistor.
5. An array substrate (100) manufactured by the method for manufacturing an array substrate according to any one of claims 1 to 4, wherein the array substrate (100) comprises a plurality of sub-pixels (SP) arranged in an array, each sub-pixel (SP) comprises a display pixel region (SP1) and a photosensitive pixel region (SP2), the display pixel region (SP1) is provided with a switching thin film transistor (10) and a pixel electrode (31) which are electrically connected, and the photosensitive pixel region (SP2) is provided with a photosensitive thin film transistor (20).
6. The array substrate (100) of claim 5, wherein the array substrate (100) comprises a first data line (41) and a first scan line (51) electrically connected to the switching thin film transistor (10) and a second data line (42) and a second scan line (52) electrically connected to the photosensitive thin film transistor (20).
7. A touch-sensitive liquid crystal display device, comprising the array substrate (100) according to any one of claims 5 to 6.
8. The touch-sensitive liquid crystal display device according to claim 7, further comprising a color filter substrate (200) disposed opposite to the array substrate (100), wherein the color filter substrate (200) comprises a first color-resist region (201), a second color-resist region (202), and a third color-resist region (203), each color-resist region being disposed corresponding to a sub-pixel (SP) on the array substrate (100).
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