CN111341663A - Forming method of radio frequency device - Google Patents
Forming method of radio frequency device Download PDFInfo
- Publication number
- CN111341663A CN111341663A CN202010171428.8A CN202010171428A CN111341663A CN 111341663 A CN111341663 A CN 111341663A CN 202010171428 A CN202010171428 A CN 202010171428A CN 111341663 A CN111341663 A CN 111341663A
- Authority
- CN
- China
- Prior art keywords
- layer
- forming
- opening
- semiconductor substrate
- oxide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 53
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 60
- 229920005591 polysilicon Polymers 0.000 claims abstract description 58
- 239000000758 substrate Substances 0.000 claims abstract description 57
- 239000004065 semiconductor Substances 0.000 claims abstract description 53
- 239000000463 material Substances 0.000 claims description 25
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 11
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 11
- 238000001312 dry etching Methods 0.000 claims description 6
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 5
- 230000003071 parasitic effect Effects 0.000 abstract description 25
- 230000004888 barrier function Effects 0.000 abstract description 5
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- CPELXLSAUQHCOX-UHFFFAOYSA-N Hydrogen bromide Chemical compound Br CPELXLSAUQHCOX-UHFFFAOYSA-N 0.000 description 2
- 229910000673 Indium arsenide Inorganic materials 0.000 description 2
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 1
- 229910000927 Ge alloy Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- AXQKVSDUCKWEKE-UHFFFAOYSA-N [C].[Ge].[Si] Chemical compound [C].[Ge].[Si] AXQKVSDUCKWEKE-UHFFFAOYSA-N 0.000 description 1
- HMDDXIMCDZRSNE-UHFFFAOYSA-N [C].[Si] Chemical compound [C].[Si] HMDDXIMCDZRSNE-UHFFFAOYSA-N 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- RBFDCQDDCJFGIK-UHFFFAOYSA-N arsenic germanium Chemical compound [Ge].[As] RBFDCQDDCJFGIK-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000460 chlorine Substances 0.000 description 1
- 229910052801 chlorine Inorganic materials 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910000042 hydrogen bromide Inorganic materials 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- FAQYAMRNWDIXMY-UHFFFAOYSA-N trichloroborane Chemical compound ClB(Cl)Cl FAQYAMRNWDIXMY-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66636—Lateral single gate silicon transistors with source or drain recessed by etching or first recessed by etching and then refilled
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention provides a method for forming a radio frequency device, which comprises the steps of forming a first opening and a second opening in a semiconductor substrate; forming oxide layers in the first opening and the second opening respectively, wherein the surfaces of the oxide layers are lower than the surface of the semiconductor substrate; and forming a polysilicon layer on the oxide layer to form a source electrode and a drain electrode. That is, by forming the oxide layer between the semiconductor substrate and the polysilicon layer, the semiconductor substrate and the polysilicon layer are isolated by the oxide layer to form a barrier between the substrate and the polysilicon layer through the oxide layer, thereby reducing the parasitic capacitance between the polysilicon layer and the semiconductor substrate, that is, reducing the parasitic capacitance of the source and the drain. Furthermore, the parasitic capacitance of the radio frequency device is reduced, so that the performance of the radio frequency device is improved.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a forming method of a radio frequency device.
Background
The radio frequency switch device is a device used for signal switch in the communication field, has the advantages of simple structure, wide application range, low cost, low power consumption, easy installation, extremely high reliability and the like, and can be widely used in the fields of carrier telephone switching, cable television signal switch and the like. When the device is in operation, the partial region is in an on state and the partial region is in an off state. Radio frequency devices are a good market place. Especially, with the wide application of communication technology, it will be more and more regarded as a new power device. Parasitic capacitance exists in the radio frequency device, and generally, low parasitic capacitance is needed in the radio frequency device to meet the performance requirement of the radio frequency device. However, in the conventional process of the rf device, the formed rf device has a large parasitic capacitance, and the performance of the device is seriously affected by the large parasitic capacitance, and if the rf device is used as a power switch type processing device, the performance of the rf device is reduced, so that the processing capability is affected.
Disclosure of Invention
The invention aims to provide a forming method of a radio frequency device, which aims to solve the problem that the radio frequency device in the prior art has larger parasitic capacitance.
In order to solve the above technical problem, the present invention provides a method for forming a radio frequency device, including:
providing a semiconductor substrate;
forming a first opening and a second opening in the semiconductor substrate;
forming oxide layers in the first opening and the second opening respectively, wherein the surfaces of the oxide layers are lower than the surface of the semiconductor substrate;
forming a polysilicon layer on the oxide layer to form a source electrode and a drain electrode; and the number of the first and second groups,
and forming a gate structure, wherein the gate structure is positioned on the semiconductor substrate between the source electrode and the drain electrode.
Optionally, in the method for forming the radio frequency device, the method for forming the oxide layer in the first opening and the second opening respectively includes:
forming a first oxide material layer in the first opening and the second opening, respectively;
grinding the first oxide material layer to form a second oxide material layer;
and removing part of the thickness of the second oxide material layer to form the oxide layer.
Optionally, in the forming method of the radio frequency device, the second oxide material layer with a partial thickness is removed by a dry etching back etching method to form the oxide layer.
Optionally, in the method for forming the radio frequency device, the oxide layer is a silicon oxide layer.
Optionally, in the method for forming the radio frequency device, the thickness of the oxide layer is 1000 angstroms to 2000 angstroms.
Optionally, in the method for forming the radio frequency device, a dielectric layer is formed on the surface of the semiconductor substrate, and the first opening and the second opening both extend through the dielectric layer.
Optionally, in the method for forming the radio frequency device, the dielectric layer includes a silicon oxide layer and a silicon nitride layer located on the silicon oxide layer.
Optionally, in the method for forming the radio frequency device, after forming the polysilicon layer on the oxide layer, the method for forming the radio frequency device further includes: and removing the dielectric layer to expose the semiconductor substrate.
Optionally, in the method for forming a radio frequency device, in the step of forming a polysilicon layer on the oxide layer to form a source and a drain, a surface of the polysilicon layer is higher than a surface of the semiconductor substrate.
Optionally, in the method for forming the radio frequency device, the thickness of the polysilicon layer is 100 angstroms to 500 angstroms.
In the forming method of the radio frequency device provided by the invention, a first opening and a second opening are formed in a semiconductor substrate; forming oxide layers in the first opening and the second opening respectively, wherein the surfaces of the oxide layers are lower than the surface of the semiconductor substrate; and forming a polysilicon layer on the oxide layer to form a source electrode and a drain electrode. That is, by forming the oxide layer between the semiconductor substrate and the polysilicon layer, the semiconductor substrate and the polysilicon layer are isolated by the oxide layer to form a barrier between the substrate and the polysilicon layer, thereby reducing the parasitic capacitance between the polysilicon layer and the semiconductor substrate, and thus reducing the parasitic capacitance of the source and the drain. Further, since the source electrode and the drain electrode are formed by the oxide layer and the polysilicon layer, the thickness of the polysilicon layer can be controlled, so that the thickness of the polysilicon layer is reduced, and the cross section of the polysilicon layer in the horizontal direction is reduced. And the parasitic capacitance of the source electrode and the drain electrode is reduced, further, the low parasitic capacitance is formed, and the performance of the radio frequency device is improved.
Drawings
Fig. 1 is a schematic flow chart illustrating a method for forming an rf device according to an embodiment of the present invention;
fig. 2-7 are schematic diagrams of structures formed in a method of forming an rf device provided by an implementation of the present invention;
wherein the reference numerals are as follows:
100-a semiconductor substrate; 110-a dielectric layer; 111-a silicon oxide layer; 112-a silicon nitride layer; 113-a second oxide material layer; 120-an oxide layer; 130-a polysilicon layer; 140-a gate structure; 150-side wall layer.
Detailed Description
The following describes the forming method of the rf device according to the present invention in further detail with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
The core idea of the application is to provide a forming method of a radio frequency device, which comprises the steps of forming a first opening and a second opening in a semiconductor substrate; forming oxide layers in the first opening and the second opening respectively, wherein the surfaces of the oxide layers are lower than the surface of the semiconductor substrate; and forming a polysilicon layer on the oxide layer to form a source electrode and a drain electrode. That is, by forming the oxide layer between the semiconductor substrate and the polysilicon layer, the semiconductor substrate and the polysilicon layer are isolated by the oxide layer to form a barrier between the substrate and the polysilicon layer through the oxide layer, thereby reducing the parasitic capacitance between the polysilicon layer and the semiconductor substrate, and thus reducing the parasitic capacitance of the source and the drain. Furthermore, the cross section of the polycrystalline silicon layer in the horizontal direction is reduced by controlling the thickness of the polycrystalline silicon layer so as to reduce the parasitic capacitance of the source electrode and the drain electrode, thereby solving the problem that the radio frequency device in the prior art has larger parasitic capacitance.
The present application will now be described in further detail with reference to specific embodiments.
Referring to fig. 1, a flow chart of a method for forming a radio frequency device according to an embodiment of the invention is shown. As shown in fig. 1, the method for forming the rf device includes:
step S1, providing a semiconductor substrate;
step S2, forming a first opening and a second opening in the semiconductor substrate;
step S3, forming oxide layers in the first opening and the second opening respectively, wherein the surface of the oxide layer is lower than the surface of the semiconductor substrate;
step S4, forming a polysilicon layer on the oxide layer to form a source and a drain;
and step S5, forming a gate structure, wherein the gate structure is positioned on the semiconductor substrate between the source electrode and the drain electrode.
Specifically, please refer to fig. 2 to fig. 7, which are schematic structural diagrams formed in a method for forming a radio frequency device according to an embodiment of the present invention. As shown in fig. 2, in step S1, a semiconductor substrate 100 is provided, and the material of the semiconductor substrate 100 may include, but is not limited to: one or more combinations of Si (silicon), SiC (silicon carbon), SiGe (silicon germanium), SiGeC (silicon germanium carbon), Ge alloy, GeAs (germanium arsenic), InAs (indium arsenide), and InP (indium phosphide). A dielectric layer 110 is formed on the semiconductor substrate 100. The dielectric layer 110 includes a silicon oxide layer 111 and a silicon nitride layer 112 on the silicon oxide layer 111. The dielectric layer 110 may protect the semiconductor substrate 100 in a subsequent process.
As shown in fig. 3, in step S2, a first opening and a second opening are formed in the semiconductor substrate 100; and both the first opening and the second opening extend through the dielectric layer 110. Preferably, the depth of the opening may be 1000 angstroms to 5000 angstroms, so as to facilitate the filling of material in the subsequent process and the formation of a material layer with a certain thickness in the opening in the subsequent process. The first opening and the second opening may be formed in the semiconductor substrate 100 by a dry etching method. The etching gas used in the dry etching process may be one or a combination of chlorine, hydrogen bromide, boron trichloride, and argon, but is not limited thereto, and other gases may also be used to perform the dry etching on the oxide layer 120.
As shown in fig. 5, in step S3, forming an oxide layer 120 in the first opening and the second opening, respectively, wherein the surface of the oxide layer 120 is lower than the surface of the semiconductor substrate 100; specifically, the method for forming the oxide layer 120 in the first opening and the second opening respectively includes: forming a first oxide material layer in the first opening and the second opening, respectively; as shown in fig. 4, the first oxide material layer is polished to form a second oxide material layer 113; the first oxide material layer may be polished by a chemical mechanical polishing method to form the second oxide material layer 113, so as to ensure flatness of each subsequently formed layer. Then, as shown in fig. 5, a portion of the thickness of the second oxide material layer 113 is removed to form the oxide layer 120. Preferably, a partial thickness of the second oxide material layer may be removed by a dry etching back method to form the oxide layer 120. Preferably, the oxide layer 120 is a silicon oxide layer 111, and the thickness of the oxide layer 120 is 1000 angstroms to 2000 angstroms. To isolate the semiconductor substrate 100 by the oxide layer 120.
As shown in fig. 6, in step S4, a polysilicon layer 130 is formed on the oxide layer 120 to form a source and a drain; the method of forming the polysilicon layer includes depositing a polysilicon material layer on the oxide layer 120, and planarizing the polysilicon material layer. Specifically, the polysilicon material layer may be planarized by a chemical mechanical polishing method to form the polysilicon layer 130 having a flat surface, so as to ensure the flatness of the surface of the polysilicon layer 130. And the surface of the polysilicon layer 130 is higher than the surface of the semiconductor substrate 100.
Preferably, the thickness of the polysilicon layer 130 is 100 angstroms to 500 angstroms. Since the source and the drain are formed through the oxide layer 120 and the polysilicon layer 130, the thickness of the polysilicon layer 130 is set to 100-500 angstroms by controlling the thickness of the polysilicon layer 130. Thereby reducing the cross-sectional size of the polysilicon layer 130 in the horizontal direction, and thus reducing the parasitic capacitance of the source and the drain. Furthermore, a smaller parasitic capacitance is formed, and the performance of the device is improved. And, the thickness of the oxide layer 120 is greater than that of the polysilicon layer 130. Thus, the semiconductor substrate 100 and the polysilicon layer 130 are isolated by the oxide layer 120, that is, a barrier is formed between the substrate and the polysilicon layer 130 by the oxide layer 120, so as to reduce the parasitic capacitance between the semiconductor substrate 100 and the polysilicon layer 130, and further reduce the parasitic capacitance of the source and the drain. Furthermore, the parasitic capacitance in the radio frequency device is reduced, and the performance of the radio frequency device is improved.
In an embodiment of the application, after forming the polysilicon layer on the oxide layer, the method for forming the radio frequency device further includes: the dielectric layer 110 is removed to expose the semiconductor substrate 100.
As shown in fig. 7, in step S5, a gate structure 140 is formed, wherein the gate structure 140 is located on the semiconductor substrate 100 between the source and the drain. The gate structure 140 may include a gate dielectric layer and a gate electrode on the gate dielectric layer. After the gate structure 140 is formed, the method for forming the rf device further includes forming sidewall layers 150 on two sides of the gate structure 140, so as to protect the gate structure 140 through the sidewall layers 150. Preferably, the material of the sidewall layer 150 may be one or a combination of silicon oxide and silicon nitride.
In summary, in the forming method of the radio frequency device provided by the present invention, the first opening and the second opening are formed in the semiconductor substrate; forming oxide layers in the first opening and the second opening respectively, wherein the surfaces of the oxide layers are lower than the surface of the semiconductor substrate; and forming a polysilicon layer on the oxide layer to form a source electrode and a drain electrode. That is, by forming the oxide layer between the semiconductor substrate and the polysilicon layer, the semiconductor substrate and the polysilicon layer are isolated by the oxide layer to form a barrier between the substrate and the polysilicon layer through the oxide layer, thereby reducing the parasitic capacitance between the polysilicon layer and the semiconductor substrate, that is, reducing the parasitic capacitance of the source and the drain. Further, since the source electrode and the drain electrode are formed by the oxide layer and the polysilicon layer, the thickness of the polysilicon layer can be controlled, and thus the thickness of the polysilicon layer can be reduced to reduce the cross-sectional size of the polysilicon layer in the horizontal direction. Therefore, the parasitic capacitance of the source electrode and the drain electrode is reduced, low parasitic capacitance is formed, and the performance of the radio frequency device is improved.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.
Claims (10)
1. A method of forming a radio frequency device, comprising:
providing a semiconductor substrate;
forming a first opening and a second opening in the semiconductor substrate;
forming oxide layers in the first opening and the second opening respectively, wherein the surfaces of the oxide layers are lower than the surface of the semiconductor substrate;
forming a polysilicon layer on the oxide layer to form a source electrode and a drain electrode; and the number of the first and second groups,
and forming a gate structure, wherein the gate structure is positioned on the semiconductor substrate between the source electrode and the drain electrode.
2. The method of forming a radio frequency device according to claim 1, wherein the method of forming an oxide layer in each of the first opening and the second opening includes:
forming a first oxide material layer in the first opening and the second opening, respectively;
grinding the first oxide material layer to form a second oxide material layer;
and removing part of the thickness of the second oxide material layer to form the oxide layer.
3. The method for forming a radio frequency device according to claim 2, wherein the second oxide material layer is removed by a dry etching back method to form the oxide layer.
4. The method of claim 3, wherein the oxide layer is a silicon oxide layer.
5. The method of claim 1, wherein the oxide layer has a thickness of 1000 a to 5000 a.
6. The method of claim 1, wherein a dielectric layer is formed on the surface of the semiconductor substrate, and the first opening and the second opening both extend through the dielectric layer.
7. The method of claim 6, wherein the dielectric layer comprises a silicon oxide layer and a silicon nitride layer on the silicon oxide layer.
8. The method of forming a radio frequency device of claim 6, wherein after forming a polysilicon layer on the oxide layer, the method of forming a radio frequency device further comprises: and removing the dielectric layer to expose the semiconductor substrate.
9. The method of forming a radio frequency device according to claim 1, wherein in the step of forming a polysilicon layer on the oxide layer to form the source and the drain, a surface of the polysilicon layer is formed to be higher than a surface of the semiconductor substrate.
10. The method of forming a radio frequency device according to claim 1, wherein the polysilicon layer has a thickness of 100 a to 500 a.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202010171428.8A CN111341663A (en) | 2020-03-12 | 2020-03-12 | Forming method of radio frequency device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202010171428.8A CN111341663A (en) | 2020-03-12 | 2020-03-12 | Forming method of radio frequency device |
Publications (1)
Publication Number | Publication Date |
---|---|
CN111341663A true CN111341663A (en) | 2020-06-26 |
Family
ID=71182396
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202010171428.8A Pending CN111341663A (en) | 2020-03-12 | 2020-03-12 | Forming method of radio frequency device |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN111341663A (en) |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5908313A (en) * | 1996-12-31 | 1999-06-01 | Intel Corporation | Method of forming a transistor |
US20020190344A1 (en) * | 2001-06-15 | 2002-12-19 | Michejda John A. | Semiconductor device having a ghost source/drain region and a method of manufacture therefor |
US20030008438A1 (en) * | 2000-11-15 | 2003-01-09 | Abbott Todd R. | Method of forming a field effect transistor |
CN1437769A (en) * | 1999-12-30 | 2003-08-20 | 英特尔公司 | Field effect transistor structure with partially isolated source/drain junctions and methods of making same |
CN1689149A (en) * | 2002-10-07 | 2005-10-26 | 因芬尼昂技术股份公司 | Field effect transistor with local source/drain insulation and associated method of production |
US20050274951A1 (en) * | 2004-06-14 | 2005-12-15 | Howard Gregory E | MOSFET having channel in bulk semiconductor and source/drain on insulator, and method of fabrication |
CN102769016A (en) * | 2012-08-14 | 2012-11-07 | 北京大学 | Anti-radiation complementary metal oxide semiconductor (CMOS) device and preparation method thereof |
CN103681355A (en) * | 2013-12-18 | 2014-03-26 | 北京大学 | Method for preparing quasi-SOI source-drain field effect transistor device |
-
2020
- 2020-03-12 CN CN202010171428.8A patent/CN111341663A/en active Pending
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5908313A (en) * | 1996-12-31 | 1999-06-01 | Intel Corporation | Method of forming a transistor |
CN1437769A (en) * | 1999-12-30 | 2003-08-20 | 英特尔公司 | Field effect transistor structure with partially isolated source/drain junctions and methods of making same |
US20030008438A1 (en) * | 2000-11-15 | 2003-01-09 | Abbott Todd R. | Method of forming a field effect transistor |
US20020190344A1 (en) * | 2001-06-15 | 2002-12-19 | Michejda John A. | Semiconductor device having a ghost source/drain region and a method of manufacture therefor |
CN1689149A (en) * | 2002-10-07 | 2005-10-26 | 因芬尼昂技术股份公司 | Field effect transistor with local source/drain insulation and associated method of production |
US20050274951A1 (en) * | 2004-06-14 | 2005-12-15 | Howard Gregory E | MOSFET having channel in bulk semiconductor and source/drain on insulator, and method of fabrication |
CN102769016A (en) * | 2012-08-14 | 2012-11-07 | 北京大学 | Anti-radiation complementary metal oxide semiconductor (CMOS) device and preparation method thereof |
CN103681355A (en) * | 2013-12-18 | 2014-03-26 | 北京大学 | Method for preparing quasi-SOI source-drain field effect transistor device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN103378155A (en) | Dummy finfet structure and method of making same | |
CN102214657A (en) | Semiconductor device, isolation structure of semiconductor device and manufacturing method of isolation structure | |
US7867843B2 (en) | Gate structures for flash memory and methods of making same | |
CN101300673B (en) | Rotational shear stress for charge carrier mobility modification | |
KR102003276B1 (en) | Method for fabricating semiconductor device | |
CN101908559B (en) | Silicon-germanium heterojunction bipolar transistor and manufacturing method thereof | |
CN111341663A (en) | Forming method of radio frequency device | |
US20200176304A1 (en) | Oxidized cavity structures within and under semiconductor devices | |
CN103367226B (en) | Semiconductor device manufacturing method | |
CN102157430B (en) | Method of forming shallow trench isolation structure | |
CN107305859B (en) | Manufacturing method of deep trench structure, semiconductor device and electronic device | |
US20090166759A1 (en) | Transistor Having Raised Source/Drain Self-Aligned Contacts And Method Of Forming Same | |
WO2005093812A1 (en) | Transistor with adapted source, drain and channel materials and integrated circuit comprising same | |
CN109950668B (en) | Forming method of radio frequency switch device and radio frequency switch device | |
CN107845681B (en) | Semiconductor device, manufacturing method thereof and electronic device | |
US9768070B1 (en) | Method for manufacturing semiconductor device | |
US20240203780A1 (en) | Dielectric filled alignment mark structures | |
CN111354797B (en) | Radio frequency device and forming method thereof | |
US20240234425A1 (en) | Device with isolation structures in active regions | |
US11257711B1 (en) | Fabricating method of transistors without dishing occurred during CMP process | |
CN101593771B (en) | Semiconductor device and formation method thereof | |
US20230282698A1 (en) | Semiconductor device and manufacturing methods thereof | |
US20230253258A1 (en) | Semiconductor device and methods of formation | |
US20240379456A1 (en) | Semiconductor device and methods of formation | |
WO2023179411A1 (en) | Semiconductor device and preparation method therefor, and electronic device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20200626 |