CN111312895A - Resistive random access memory and manufacturing method thereof - Google Patents
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- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 claims abstract description 20
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims abstract description 17
- 239000010936 titanium Substances 0.000 claims abstract description 17
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- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 claims description 6
- NQKXFODBPINZFK-UHFFFAOYSA-N dioxotantalum Chemical compound O=[Ta]=O NQKXFODBPINZFK-UHFFFAOYSA-N 0.000 claims description 5
- PBCFLUZVCVVTBY-UHFFFAOYSA-N tantalum pentoxide Inorganic materials O=[Ta](=O)O[Ta](=O)=O PBCFLUZVCVVTBY-UHFFFAOYSA-N 0.000 claims description 5
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 4
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
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Abstract
The invention provides a resistive random access memory and a manufacturing method thereof, wherein the resistive random access memory comprises: the resistive random access memory comprises a lower electrode, a lower intercalation layer, a resistive layer, an upper intercalation layer and an upper electrode, wherein the upper intercalation layer is made of metal titanium, and the metal titanium (the upper intercalation layer) has higher standard Gibbs free energy and stronger oxygen absorption capacity, so that oxygen ions can be obtained, the concentration of oxygen vacancies in the resistive layer is increased, the generation of oxygen vacancy conductive filaments is facilitated, and the consistency of the resistive random access memory is improved. Furthermore, the lower insertion layer is made of tantalum nitride, the upper insertion layer and the lower insertion layer can play a role of a series resistor, and the resistive random access memory can have better resistive random access characteristics under the combined action of the upper insertion layer and the lower insertion layer.
Description
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a resistive random access memory and a manufacturing method of the resistive random access memory.
Background
In recent years, with the rapid development of portable electronic products such as smart phones and tablet computers, the market of nonvolatile memories is getting larger, and among them, Flash memories become mainstream products of current nonvolatile memories due to the characteristics of large storage density, high operation speed and the like. However, due to the structural limitation of the Flash memory, the Flash memory will reach the size limit in the near future, and meanwhile, the Flash memory has the disadvantages of higher working voltage, poorer durability and the like, so that the Flash memory is increasingly difficult to meet the requirements of technological development. Therefore, the development of new memories is a research focus in the field of memories at present. Among various new memories, a Resistive Random Access Memory (RRAM) is widely paid attention by researchers because of its advantages of simple manufacturing process, high compatibility with the current CMOS process, low cost, low power consumption, multi-value storage, high read-write speed, and the like, and is considered to be one of the most promising new memories.
Referring to fig. 1, fig. 1 is a schematic view of a resistance change memory in the related art. A resistance change memory in the related art generally includes: the upper electrode 15, the resistance change layer 14, and the lower electrode 13, the material of the resistance change layer 14 is usually tantalum oxide (TaOx), for example, two oxides with different conductivities: the TaO2 and Ta2O5 enable the resistive random access memory to have good durability, and make the resistive random access memory a research hotspot in the field of nonvolatile memories.
In the resistive random access memory, the resistance conversion mechanism is mainly the formation and the breakage of an oxygen vacancy conductive filament, as shown in fig. 1, when a forward voltage with certain conditions is applied to the memory, oxygen ions 142 in the resistive layer 14 can shift under the action of an electric field, and finally enrichment occurs at the upper electrode 15, and a large number of oxygen vacancies 141 are left in the resistive layer 14 to form the oxygen vacancy conductive filament, at this time, the resistive random access memory is in a Low Resistance State (LRS); under the action of the reverse voltage, the oxygen ions 142 are recombined with the oxygen vacancies again, so that the resistive random access memory is in a High Resistance State (HRS). In general, the transition from the high resistance state to the low resistance state is referred to as a SET, and the transition from the low resistance state to the high resistance state is referred to as a RESET. In addition, for a resistance change memory in an initial state, a higher voltage than the SET voltage, i.e., a formation voltage, needs to be applied so that the oxygen ions 142 can leave the crystal lattice to generate sufficient oxygen vacancy 141 defects. From the above mechanism, it can be seen that the randomness of the oxygen vacancy conductive filament is high, which results in poor consistency of the resistive random access memory. The current common practice to increase the probability of oxygen vacancy conductive filaments is: the consistency of the resistive random access memory can be effectively improved by externally connecting the series resistor, but a peripheral circuit is more complicated, and RC delay can be caused.
Disclosure of Invention
The invention aims to provide a resistive random access memory and a manufacturing method thereof, and aims to solve the problem of high randomness of oxygen vacancy conductive filaments in a resistive layer.
In order to solve the above technical problem, the present invention provides a resistive random access memory, including:
a barrier layer;
a lower electrode in the barrier layer;
the lower electrode is covered by the lower intercalation layer, wherein the material of the lower intercalation layer is tantalum nitride;
a resistance-change layer covering the under-insertion layer;
the upper intercalation layer covers the resistance change layer, wherein the material of the upper intercalation layer is metallic titanium; and the number of the first and second groups,
an upper electrode overlying the upper interposer layer.
Optionally, in the resistive random access memory, the lower electrode is made of tantalum nitride; the thickness of the lower electrode is between
Optionally, in the resistive random access memory, the resistive layer is made of tantalum dioxide or tantalum pentoxide; the thickness of the resistance change layer is between
Optionally, in the resistive random access memory, the upper electrode is made of titanium nitride; the thickness of the upper electrode is between
Optionally, in the resistive random access memory, the blocking layer is made of a nitrogen-doped silicon carbide layer.
Optionally, in the resistive random access memory, the resistive random access memory further includes: a first metal layer at the bottom of the barrier layer and a second metal layer at the top of the upper electrode.
Based on the same inventive concept, the invention provides a manufacturing method of a resistive random access memory, which comprises the following steps:
providing a barrier layer, and etching the barrier layer to form a groove;
forming a lower electrode filling the trench;
forming an intercalation layer, wherein the intercalation layer covers the lower electrode, and the material of the intercalation layer is tantalum nitride;
forming a resistance-change layer, wherein the resistance-change layer covers the lower intercalation layer;
forming an upper intercalation layer, wherein the upper intercalation layer covers the resistance change layer, and the material of the upper intercalation layer is metallic titanium; and the number of the first and second groups,
and forming an upper electrode, wherein the upper electrode covers the upper intercalation layer.
Optionally, in the manufacturing method of the resistive random access memory, after the lower electrode is formed and before the lower insertion layer is formed, the manufacturing method of the resistive random access memory includes:
and chemically and mechanically grinding the surface of the lower electrode.
Optionally, in the manufacturing method of the resistive random access memory, before providing the barrier layer, the manufacturing method of the resistive random access memory further includes:
and forming a first metal layer, wherein the first metal layer is positioned at the bottom of the barrier layer.
Optionally, in the manufacturing method of the resistive random access memory, after the upper electrode is formed, the manufacturing method of the resistive random access memory further includes:
forming a second metal layer, wherein the second metal layer covers the upper electrode.
Optionally, in the manufacturing method of the resistive random access memory, the upper insertion layer is formed by a physical vapor deposition process.
Optionally, in the manufacturing method of the resistive random access memory, the under-insertion layer is formed by a physical vapor deposition process.
In summary, in the resistive random access memory and the method of manufacturing the resistive random access memory, the resistive random access memory includes: the resistive random access memory comprises a lower electrode, a lower intercalation layer, a resistive layer, an upper intercalation layer and an upper electrode, wherein the upper intercalation layer is made of metal titanium, and the metal titanium (the upper intercalation layer) has higher standard Gibbs free energy and stronger oxygen absorption capacity, so that oxygen ions can be obtained, the concentration of oxygen vacancies in the resistive layer is increased, the generation of oxygen vacancy conductive filaments is facilitated, and the consistency of the resistive random access memory is improved. Furthermore, the lower insertion layer is made of tantalum nitride, the upper insertion layer and the lower insertion layer can play a role of a series resistor, and the resistive random access memory can have better resistive random access characteristics under the combined action of the upper insertion layer and the lower insertion layer.
Drawings
Fig. 1 is a schematic diagram of a resistive random access memory in the prior art;
fig. 2 to 9 are schematic views of semiconductor structures in steps of a manufacturing method of a resistance change memory according to an embodiment of the present invention;
wherein the reference numbers are as follows:
13-lower electrode, 14-resistance change layer, 141-oxygen vacancy, 142-oxygen ion, 15-upper electrode;
100-interlayer dielectric layer, 110-first metal layer, 120-barrier layer, 121-groove, 130-lower electrode, 140-lower intercalation layer, 150-resistance change layer, 160-upper intercalation layer, 170-upper electrode and 180-second metal layer.
Detailed Description
The resistive random access memory and the method for manufacturing the resistive random access memory according to the present invention are described in detail with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention. Further, the structures illustrated in the drawings are often part of actual structures. In particular, the drawings may have different emphasis points and may sometimes be scaled differently.
The invention provides a resistive random access memory, and referring to fig. 9, fig. 9 is a schematic diagram of the resistive random access memory in a last step of a manufacturing method of the resistive random access memory according to an embodiment of the invention, and the resistive random access memory includes: the multilayer metal oxide semiconductor comprises a barrier layer 120, a lower electrode 130, a lower intercalation layer 140, a resistance-change layer 150, an upper intercalation layer 160 and an upper electrode 170, wherein the lower electrode 130 is positioned in the barrier layer 120, the lower intercalation layer 140 covers the lower electrode 170, the lower intercalation layer 140 is made of tantalum nitride, the resistance-change layer 150 covers the lower intercalation layer 160, the upper intercalation layer 160 covers the resistance-change layer 150, the upper intercalation layer 160 is made of metal titanium, and the upper electrode 170 covers the upper intercalation layer 140. In this embodiment, the upper insertion layer 160 is formed by a physical vapor deposition process, such as a magnetron sputtering process. Because the standard Gibbs free energy of the metal titanium (the upper intercalation layer) is higher and has stronger oxygen absorption capacity, oxygen ions can be obtained, so that the concentration of oxygen vacancies in the resistance change layer is increased, the generation of oxygen vacancy conductive filaments is facilitated, and the consistency of the resistance change memory is improved.
Preferably, the resistance change memory further includes: a first metal layer 110 at the bottom of the barrier layer 120 and a second metal layer 180 at the top of the upper electrode 170. The first metal layer 110 and the second metal layer 180 may be metal interconnection structures formed in a pattern.
Further, the thickness of the upper insertion layer 160 is between
The thickness of the lower layer 140 is between
The upper insertion layer 160 and the lower insertion layer 140 can simultaneously play the role of series resistance, thereby improving the resistance random accessThe resistance change property of the memory further improves the consistency of the resistance change memory.
Preferably, the lower electrode 170 is made of tantalum nitride; the thickness of the lower electrode 170 is between
Further, the material of the resistance change layer 150 is tantalum dioxide or tantalum pentoxide; the thickness of the resistance change layer 150 is between
Preferably, the upper electrode 170 is made of titanium nitride; the upper electrode 170 has a thickness between
In this embodiment, the material of the blocking layer 120 is a nitrogen-doped silicon carbide (NDC) layer.
Based on the same inventive concept, the invention provides a manufacturing method of a resistive random access memory, which comprises the following steps:
s10: providing a barrier layer, and etching the barrier layer to form a groove;
s20: forming a lower electrode filling the trench;
s30: forming an intercalation layer, wherein the intercalation layer covers the lower electrode, and the material of the intercalation layer is tantalum nitride;
s40: forming a resistance-change layer, wherein the resistance-change layer covers the lower intercalation layer;
s50: forming an upper intercalation layer, wherein the upper intercalation layer covers the resistance change layer, and the material of the upper intercalation layer is metallic titanium; and the number of the first and second groups,
s60: and forming an upper electrode, wherein the upper electrode covers the upper intercalation layer.
Further, referring to fig. 2 to 9, fig. 2 to 9 are schematic diagrams of semiconductor structures in steps of a manufacturing method of a resistive random access memory according to an embodiment of the present invention.
First, as shown in fig. 2, a first metal layer 110 is provided, and the first metal layer 110 is located in the interlayer dielectric layer 100. Specifically, the material of the interlayer dielectric layer 100 may be silicon oxide or silicon nitride. In order to locate the first metal layer 110 in the interlayer dielectric layer 100, a silicon oxide layer (silicon nitride layer) is usually formed first, then the first metal layer 110 with a metal pattern is formed on the surface of the silicon oxide layer (silicon nitride layer), and finally a silicon oxide material (silicon nitride material) is filled again in the gap of the first metal layer 110 with a metal pattern to obtain a final interlayer dielectric layer 100, so that the first metal layer 110 is located in the interlayer dielectric layer 100.
Then, as shown in fig. 2 and 3, a barrier layer 120 is provided, and the barrier layer 120 is etched using a dry etching process to form a trench 121. The material of the barrier layer 120 is silicon carbide doped with nitrogen, and the barrier layer 120 covers the first metal layer 110. The trench 121 is formed to be subsequently filled with a tantalum nitride material to form a lower electrode 130 of the resistive random access memory.
Further, as shown in fig. 4, a lower electrode 130 is formed, and the lower electrode 130 fills the trench 121. Specifically, the material of the lower electrode 130 may be tantalum nitride, and in this embodiment, after the lower electrode 130 is formed, the method for manufacturing the resistive random access memory includes: the surface of the lower electrode 130 is chemically and mechanically polished, and the specific operation steps are as follows: filling a tantalum nitride material in the trench 121 by using a physical vapor deposition process and depositing a tantalum nitride material on the surface of the barrier layer 120, then polishing the surface of the tantalum nitride material by using a chemical mechanical polishing process to obtain the lower electrode, removing the excess tantalum nitride material on the surface of the barrier layer 120 to expose the barrier layer 120 during the chemical mechanical polishing, and planarizing the surface of the tantalum nitride material in the trench 121 to obtain the final lower electrode 130.
Next, as shown in fig. 5, an under-layer 140 is formed, where the under-layer 140 covers the lower electrode 130, and a material of the under-layer 140 is tantalum nitride. Specifically, the under-layer 140 is formed by a physical vapor deposition process.
Further, as shown in fig. 6, a resistance-change layer 150 is formed, and the resistance-change layer 150 covers the under-insertion layer 140. Specifically, the step of forming the resistance change layer 150 is as follows: forming a metal tantalum material layer by adopting a physical vapor deposition process; the metallic tantalum material layer is oxidized by an oxidation process to obtain the final resistive layer 150. Due to the characteristics of the oxidation process, the material of the resistive layer 150 may be tantalum dioxide or tantalum pentoxide according to different process requirements.
Further, as shown in fig. 7, an upper insertion layer 160 is formed, where the upper insertion layer 160 covers the resistance-change layer 150, and a material of the upper insertion layer 160 is titanium metal. Specifically, the upper insertion layer 160 is formed by a physical vapor deposition process. The upper intercalation layer is formed by using a metal titanium material, and because the standard Gibbs free energy of the metal titanium is higher, the metal titanium has stronger oxygen absorption capacity, and can capture more oxygen ions, so that the concentration of oxygen vacancies in the resistance change layer 150 can be increased, the generation of oxygen vacancy conductive filaments is facilitated, and the consistency of the resistance change memory is improved.
Finally, as shown in fig. 8, an upper electrode 170 is formed, and the upper electrode 170 covers the upper insertion layer 160. Specifically, the material of the upper electrode 170 may be titanium nitride, and in this embodiment, the upper electrode 170 is formed by a physical vapor phase process.
In this embodiment, as shown in fig. 9, after the forming of the upper electrode 170, the method for manufacturing a resistive random access memory further includes: a second metal layer 180 is formed, wherein the second metal layer 180 covers the upper electrode 170.
In summary, in the resistive random access memory and the method of manufacturing the resistive random access memory, the resistive random access memory includes: the resistive random access memory comprises a lower electrode, a lower intercalation layer, a resistive layer, an upper intercalation layer and an upper electrode, wherein the upper intercalation layer is made of metal titanium, and the metal titanium (the upper intercalation layer) has higher standard Gibbs free energy and stronger oxygen absorption capacity, so that oxygen ions can be obtained, the concentration of oxygen vacancies in the resistive layer is increased, the generation of oxygen vacancy conductive filaments is facilitated, and the consistency of the resistive random access memory is improved. Furthermore, the lower insertion layer is made of tantalum nitride, the upper insertion layer and the lower insertion layer can play a role of a series resistor, and the resistive random access memory can have better resistive random access characteristics under the combined action of the upper insertion layer and the lower insertion layer.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.
Claims (12)
1. A resistance change memory, characterized by comprising:
a barrier layer;
a lower electrode in the barrier layer;
the lower electrode is covered by the lower intercalation layer, wherein the material of the lower intercalation layer is tantalum nitride;
a resistance-change layer covering the under-insertion layer;
the upper intercalation layer covers the resistance change layer, wherein the material of the upper intercalation layer is metallic titanium; and the number of the first and second groups,
an upper electrode overlying the upper interposer layer.
2. The resistive random access memory according to claim 1, wherein the lower electrode is made of tantalum nitride; the thickness of the lower electrode is between
3. The resistive random access memory according to claim 1, wherein the resistive layer is made of tantalum dioxide or tantalum pentoxide; the thickness of the resistance change layer is between
4. The resistive random access memory according to claim 1, wherein the upper electrode is made of titanium nitride; the thickness of the upper electrode is between
5. The resistive random access memory according to claim 1, wherein the material of the barrier layer is a nitrogen-doped silicon carbide layer.
6. The resistive-switching memory according to claim 1, further comprising: a first metal layer at the bottom of the barrier layer and a second metal layer at the top of the upper electrode.
7. A method for manufacturing a resistive random access memory is characterized by comprising the following steps:
providing a barrier layer, and etching the barrier layer to form a groove;
forming a lower electrode filling the trench;
forming an intercalation layer, wherein the intercalation layer covers the lower electrode, and the material of the intercalation layer is tantalum nitride;
forming a resistance-change layer, wherein the resistance-change layer covers the lower intercalation layer;
forming an upper intercalation layer, wherein the upper intercalation layer covers the resistance change layer, and the material of the upper intercalation layer is metallic titanium; and the number of the first and second groups,
and forming an upper electrode, wherein the upper electrode covers the upper intercalation layer.
8. The manufacturing method of a resistance change memory according to claim 7, wherein after the lower electrode is formed and before the under-insertion layer is formed, the manufacturing method of a resistance change memory includes:
and chemically and mechanically grinding the surface of the lower electrode.
9. The manufacturing method of a resistance change memory according to claim 7, wherein before the providing of the barrier layer, the manufacturing method of a resistance change memory further comprises:
and forming a first metal layer, wherein the first metal layer is positioned at the bottom of the barrier layer.
10. The manufacturing method of a resistance change memory according to claim 7, further comprising, after forming the upper electrode:
forming a second metal layer, wherein the second metal layer covers the upper electrode.
11. The manufacturing method of the resistive random access memory according to claim 7, wherein the upper insertion layer is formed by a physical vapor deposition process.
12. The manufacturing method of the resistive random access memory according to claim 7, wherein the under-insertion layer is formed by a physical vapor deposition process.
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| CN112420923A (en) * | 2020-11-26 | 2021-02-26 | 上海华力微电子有限公司 | Resistive random access memory and manufacturing method thereof |
| CN113363380A (en) * | 2021-05-28 | 2021-09-07 | 上海华力微电子有限公司 | Resistive random access memory and forming method thereof |
| WO2023115357A1 (en) * | 2021-12-21 | 2023-06-29 | 华为技术有限公司 | Resistive random access memory and manufacturing method therefor |
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| WO2016176936A1 (en) * | 2015-05-07 | 2016-11-10 | 中国科学院微电子研究所 | Non-volatile resistive switching memory device and manufacturing method therefor |
| US9653682B1 (en) * | 2016-02-05 | 2017-05-16 | Taiwan Semiconductor Manufacturing Company Ltd. | Resistive random access memory structure |
| CN107068860A (en) * | 2017-05-26 | 2017-08-18 | 中国科学院微电子研究所 | Resistive random access memory and preparation method thereof |
| US20190013465A1 (en) * | 2017-07-07 | 2019-01-10 | SK Hynix Inc. | Resistance change memory device |
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| CN112002801A (en) * | 2020-07-20 | 2020-11-27 | 厦门半导体工业技术研发有限公司 | Semiconductor device and method for manufacturing semiconductor device |
| CN112420923A (en) * | 2020-11-26 | 2021-02-26 | 上海华力微电子有限公司 | Resistive random access memory and manufacturing method thereof |
| CN112420923B (en) * | 2020-11-26 | 2024-08-23 | 上海华力微电子有限公司 | Resistive random access memory and manufacturing method thereof |
| CN113363380A (en) * | 2021-05-28 | 2021-09-07 | 上海华力微电子有限公司 | Resistive random access memory and forming method thereof |
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